board.h 18 KB

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  1. /*
  2. * Copyright (c) 2023-2025 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #ifndef _HPM_BOARD_H
  8. #define _HPM_BOARD_H
  9. #include <stdio.h>
  10. #include <stdarg.h>
  11. #include "hpm_common.h"
  12. #include "hpm_clock_drv.h"
  13. #include "hpm_soc.h"
  14. #include "hpm_soc_feature.h"
  15. #include "pinmux.h"
  16. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  17. #include "hpm_debug_console.h"
  18. #endif
  19. #define BOARD_NAME "hpm5300evk"
  20. #define BOARD_UF2_SIGNATURE (0x0A4D5048UL)
  21. /* ACMP desction */
  22. #define BOARD_ACMP HPM_ACMP
  23. #define BOARD_ACMP_CLK clock_acmp0
  24. #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1
  25. #define BOARD_ACMP_IRQ IRQn_ACMP_1
  26. #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */
  27. #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_4 /* align with used pin */
  28. /* dma section */
  29. #define BOARD_APP_HDMA HPM_HDMA
  30. #define BOARD_APP_HDMA_IRQ IRQn_HDMA
  31. #define BOARD_APP_DMAMUX HPM_DMAMUX
  32. #define TEST_DMA_CONTROLLER HPM_HDMA
  33. #define TEST_DMA_IRQ IRQn_HDMA
  34. #ifndef BOARD_RUNNING_CORE
  35. #define BOARD_RUNNING_CORE HPM_CORE0
  36. #endif
  37. /* uart section */
  38. #ifndef BOARD_APP_UART_BASE
  39. #define BOARD_APP_UART_BASE HPM_UART2
  40. #define BOARD_APP_UART_IRQ IRQn_UART2
  41. #define BOARD_APP_UART_BAUDRATE (115200UL)
  42. #define BOARD_APP_UART_CLK_NAME clock_uart2
  43. #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART2_RX
  44. #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART2_TX
  45. #endif
  46. #define BOARD_APP_UART_BREAK_SIGNAL_PIN IOC_PAD_PA26
  47. /* Trigger UART: UART0~3 use HPM_TRGM0_OUTPUT_SRC_UART_TRIG0, UART4~7 use HPM_TRGM0_OUTPUT_SRC_UART_TRIG1 */
  48. #define BOARD_APP_UART_TRIG HPM_TRGM0_OUTPUT_SRC_UART_TRIG0
  49. #define BOARD_UART_TRGM HPM_TRGM0
  50. #define BOARD_UART_TRGM_GPTMR HPM_GPTMR3
  51. #define BOARD_UART_TRGM_GPTMR_CLK clock_gptmr3
  52. #define BOARD_UART_TRGM_GPTMR_CH 2
  53. #define BOARD_UART_TRGM_GPTMR_INPUT HPM_TRGM0_INPUT_SRC_GPTMR3_OUT2
  54. /* uart lin sample section */
  55. #define BOARD_UART_LIN HPM_UART3
  56. #define BOARD_UART_LIN_IRQ IRQn_UART3
  57. #define BOARD_UART_LIN_CLK_NAME clock_uart3
  58. #define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOA
  59. #define BOARD_UART_LIN_TX_PIN (15U) /* PA15 should align with used pin in pinmux configuration */
  60. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  61. #ifndef BOARD_CONSOLE_TYPE
  62. #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART
  63. #endif
  64. #if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART
  65. #ifndef BOARD_CONSOLE_UART_BASE
  66. #define BOARD_CONSOLE_UART_BASE HPM_UART0
  67. #define BOARD_CONSOLE_UART_CLK_NAME clock_uart0
  68. #define BOARD_CONSOLE_UART_IRQ IRQn_UART0
  69. #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
  70. #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
  71. #endif
  72. #define BOARD_CONSOLE_UART_BAUDRATE (115200UL)
  73. #endif
  74. #endif
  75. /* usb cdc acm uart section */
  76. #define BOARD_USB_CDC_ACM_UART BOARD_APP_UART_BASE
  77. #define BOARD_USB_CDC_ACM_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  78. #define BOARD_USB_CDC_ACM_UART_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ
  79. #define BOARD_USB_CDC_ACM_UART_RX_DMA_SRC BOARD_APP_UART_RX_DMA_REQ
  80. /* rtthread-nano finsh section */
  81. #define BOARD_RT_CONSOLE_BASE BOARD_CONSOLE_UART_BASE
  82. #define BOARD_RT_CONSOLE_CLK_NAME BOARD_CONSOLE_UART_CLK_NAME
  83. #define BOARD_RT_CONSOLE_IRQ BOARD_CONSOLE_UART_IRQ
  84. /* modbus sample section */
  85. #define BOARD_MODBUS_UART_BASE BOARD_APP_UART_BASE
  86. #define BOARD_MODBUS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  87. #define BOARD_MODBUS_UART_RX_DMA_REQ BOARD_APP_UART_RX_DMA_REQ
  88. #define BOARD_MODBUS_UART_TX_DMA_REQ BOARD_APP_UART_TX_DMA_REQ
  89. /* nor flash section */
  90. #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL) /* Check */
  91. #define BOARD_FLASH_SIZE (SIZE_1MB)
  92. /* i2c section */
  93. #define BOARD_APP_I2C_BASE HPM_I2C0
  94. #define BOARD_APP_I2C_IRQ IRQn_I2C0
  95. #define BOARD_APP_I2C_CLK_NAME clock_i2c0
  96. #define BOARD_APP_I2C_DMA HPM_HDMA
  97. #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX
  98. #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C0
  99. /* gptmr section */
  100. #define BOARD_GPTMR HPM_GPTMR0
  101. #define BOARD_GPTMR_IRQ IRQn_GPTMR0
  102. #define BOARD_GPTMR_CHANNEL 0
  103. #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR0_0
  104. #define BOARD_GPTMR_CLK_NAME clock_gptmr0
  105. #define BOARD_GPTMR_PWM HPM_GPTMR0
  106. #define BOARD_GPTMR_PWM_CHANNEL 0
  107. #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR0_0
  108. #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr0
  109. #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR0
  110. #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR0
  111. #define BOARD_GPTMR_PWM_SYNC_CHANNEL 1
  112. #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr0
  113. /* User LED */
  114. #define BOARD_LED_GPIO_CTRL HPM_GPIO0
  115. #define BOARD_LED_GPIO_INDEX GPIO_DI_GPIOA
  116. #define BOARD_LED_GPIO_PIN 23
  117. #define BOARD_LED_OFF_LEVEL 1
  118. #define BOARD_LED_ON_LEVEL 0
  119. /* 12V Power Enable for lin transceiver */
  120. #define BOARD_SUPPORT_LIN_TRANSCEIVER_CONTROL 1
  121. #define BOARD_12V_EN_GPIO_CTRL HPM_GPIO0
  122. #define BOARD_12V_EN_GPIO_INDEX GPIO_DI_GPIOA
  123. #define BOARD_12V_EN_GPIO_PIN 24
  124. #define BOARD_LIN_TRANSCEIVER_GPIO_CTRL HPM_GPIO0
  125. #define BOARD_LIN_TRANSCEIVER_GPIO_INDEX GPIO_DI_GPIOA
  126. #define BOARD_LIN_TRANSCEIVER_GPIO_PIN 13
  127. /* gpiom section */
  128. #define BOARD_APP_GPIOM_BASE HPM_GPIOM
  129. #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO
  130. #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast
  131. /* User button */
  132. #define BOARD_APP_GPIO_CTRL HPM_GPIO0
  133. #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOA
  134. #define BOARD_APP_GPIO_PIN 9
  135. #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_A
  136. #define BOARD_BUTTON_PRESSED_VALUE 0
  137. /* spi section */
  138. #define BOARD_APP_SPI_BASE HPM_SPI1
  139. #define BOARD_APP_SPI_CLK_NAME clock_spi1
  140. #define BOARD_APP_SPI_IRQ IRQn_SPI1
  141. #define BOARD_APP_SPI_SCLK_FREQ (20000000UL)
  142. #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
  143. #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U)
  144. #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI1_RX
  145. #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI1_TX
  146. #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0
  147. #define BOARD_SPI_CS_PIN IOC_PAD_PA26
  148. #define BOARD_SPI_CS_ACTIVE_LEVEL (0U)
  149. /* ADC section */
  150. #define BOARD_APP_ADC16_NAME "ADC0"
  151. #define BOARD_APP_ADC16_BASE HPM_ADC0
  152. #define BOARD_APP_ADC16_IRQn IRQn_ADC0
  153. #define BOARD_APP_ADC16_CH_1 (13U)
  154. #define BOARD_APP_ADC16_CLK_NAME (clock_adc0)
  155. #define BOARD_APP_ADC16_CLK_BUS (clk_adc_src_ahb0)
  156. #define BOARD_APP_ADC16_HW_TRIG_SRC_CLK_NAME clock_mot0
  157. #define BOARD_APP_ADC16_HW_TRIG_SRC HPM_PWM0
  158. #define BOARD_APP_ADC16_HW_TRGM HPM_TRGM0
  159. #define BOARD_APP_ADC16_HW_TRGM_IN HPM_TRGM0_INPUT_SRC_PWM0_CH8REF
  160. #define BOARD_APP_ADC16_HW_TRGM_OUT_SEQ TRGM_TRGOCFG_ADC0_STRGI
  161. #define BOARD_APP_ADC16_HW_TRGM_OUT_PMT TRGM_TRGOCFG_ADCX_PTRGI0A
  162. #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A
  163. /* DAC section */
  164. #define BOARD_DAC_BASE HPM_DAC0
  165. #define BOARD_DAC_IRQn IRQn_DAC0
  166. #define BOARD_APP_DAC_CLOCK_NAME clock_dac0
  167. /* Flash section */
  168. #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0)
  169. #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90002U)
  170. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000006U)
  171. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U)
  172. /* SDXC section */
  173. #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC0)
  174. #define BOARD_APP_SDCARD_SUPPORT_1V8 (0)
  175. /* MCAN section */
  176. #define BOARD_APP_CAN_BASE HPM_MCAN3
  177. #define BOARD_APP_CAN_IRQn IRQn_MCAN3
  178. /* CALLBACK TIMER section */
  179. #define BOARD_CALLBACK_TIMER (HPM_GPTMR3)
  180. #define BOARD_CALLBACK_TIMER_CH 1
  181. #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3
  182. #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3)
  183. /* APP PWM */
  184. #define BOARD_APP_PWM HPM_PWM0
  185. #define BOARD_APP_PWM_CLOCK_NAME clock_mot0
  186. #define BOARD_APP_PWM_OUT1 2
  187. #define BOARD_APP_PWM_OUT2 3
  188. #define BOARD_APP_TRGM HPM_TRGM0
  189. #define BOARD_APP_PWM_IRQ IRQn_PWM0
  190. #define BOARD_APP_TRGM_PWM_OUTPUT TRGM_TRGOCFG_PWM0_SYNCI
  191. #define BOARD_APP_TRGM_PWM_INPUT HPM_TRGM0_INPUT_SRC_PWM0_TRGO_0
  192. /*BLDC pwm*/
  193. /*PWM define*/
  194. #define BOARD_BLDCPWM HPM_PWM0
  195. #define BOARD_BLDC_UH_PWM_OUTPIN (6U)
  196. #define BOARD_BLDC_UL_PWM_OUTPIN (7U)
  197. #define BOARD_BLDC_VH_PWM_OUTPIN (4U)
  198. #define BOARD_BLDC_VL_PWM_OUTPIN (5U)
  199. #define BOARD_BLDC_WH_PWM_OUTPIN (2U)
  200. #define BOARD_BLDC_WL_PWM_OUTPIN (3U)
  201. #define BOARD_BLDCPWM_TRGM HPM_TRGM0
  202. #define BOARD_BLDCAPP_PWM_IRQ IRQn_PWM0
  203. #define BOARD_BLDCPWM_CMP_INDEX_0 (0U)
  204. #define BOARD_BLDCPWM_CMP_INDEX_1 (1U)
  205. #define BOARD_BLDCPWM_CMP_INDEX_2 (2U)
  206. #define BOARD_BLDCPWM_CMP_INDEX_3 (3U)
  207. #define BOARD_BLDCPWM_CMP_INDEX_4 (4U)
  208. #define BOARD_BLDCPWM_CMP_INDEX_5 (5U)
  209. #define BOARD_BLDCPWM_CMP_INDEX_6 (6U)
  210. #define BOARD_BLDCPWM_CMP_INDEX_7 (7U)
  211. #define BOARD_BLDCPWM_CMP_TRIG_CMP (20U)
  212. /*HALL define*/
  213. /*RDC*/
  214. #define BOARD_RDC_BASE HPM_RDC
  215. #define BOARD_RDC_TRGM HPM_TRGM0
  216. #define BOARD_RDC_TRG_IN HPM_TRGM0_INPUT_SRC_RDC_TRGO_0
  217. #define BOARD_RDC_TRG_OUT TRGM_TRGOCFG_MOT_GPIO0
  218. #define BOARD_RDC_TRG_ADC TRGM_TRGOCFG_ADCX_PTRGI0A
  219. #define BOARD_RDC_ADC_I_BASE HPM_ADC0
  220. #define BOARD_RDC_ADC_Q_BASE HPM_ADC1
  221. #define BOARD_RDC_ADC_I_CHN (5U)
  222. #define BOARD_RDC_ADC_Q_CHN (6U)
  223. #define BOARD_RDC_IRQ IRQn_RDC
  224. #define BOARD_RDC_ADC_TRIG_FLAG adc16_event_trig_complete
  225. #define BOARD_RDC_ADC_TRG ADC16_CONFIG_TRG0A
  226. /*QEI*/
  227. #define BOARD_BLDC_QEI_TRGM HPM_TRGM0
  228. #define BOARD_BLDC_QEIV2_BASE HPM_QEI1
  229. #define BOARD_BLDC_QEIV2_IRQ IRQn_QEI1
  230. #define BOARD_BLDC_QEI_MOTOR_PHASE_COUNT_PER_REV (16U)
  231. #define BOARD_BLDC_QEI_CLOCK_SOURCE clock_mot0
  232. #define BOARD_BLDC_QEI_FOC_PHASE_COUNT_PER_REV (4000U)
  233. #define BOARD_APP_QEIV2_BASE HPM_QEI1
  234. #define BOARD_APP_QEIV2_IRQ IRQn_QEI1
  235. #define BOARD_APP_QEI_CLOCK_SOURCE clock_mot0
  236. #define BOARD_APP_QEI_ADC_COS_BASE HPM_ADC0
  237. #define BOARD_APP_QEI_ADC_COS_CHN (4U)
  238. #define BOARD_APP_QEI_ADC_SIN_BASE HPM_ADC1
  239. #define BOARD_APP_QEI_ADC_SIN_CHN (5U)
  240. #define BOARD_APP_QEI_ADC_MATRIX_TO_ADC0 trgm_adc_matrix_output_to_qei1_adc0
  241. #define BOARD_APP_QEI_ADC_MATRIX_TO_ADC1 trgm_adc_matrix_output_to_qei1_adc1
  242. #define BOARD_APP_QEI_ADC_MATRIX_FROM_ADC_COS trgm_adc_matrix_in_from_adc0
  243. #define BOARD_APP_QEI_ADC_MATRIX_FROM_ADC_SIN trgm_adc_matrix_in_from_adc1
  244. #define BOARD_APP_QEI_TRG_ADC TRGM_TRGOCFG_ADCX_PTRGI0A
  245. /*Timer define*/
  246. #define BOARD_BLDC_TMR_1MS HPM_GPTMR2
  247. #define BOARD_BLDC_TMR_CH 0
  248. #define BOARD_BLDC_TMR_CMP 0
  249. #define BOARD_BLDC_TMR_IRQ IRQn_GPTMR2
  250. #define BOARD_BLDC_TMR_CLOCK clock_gptmr2
  251. #define BOARD_BLDC_TMR_RELOAD (100000U)
  252. /* BLDC PARAM */
  253. #define BOARD_BLDC_BLOCK_SPEED_KP (0.0005f)
  254. #define BOARD_BLDC_BLOCK_SPEED_KI (0.000009f)
  255. #define BOARD_BLDC_SW_FOC_SPEED_LOOP_SPEED_KP (0.0074f)
  256. #define BOARD_BLDC_SW_FOC_SPEED_LOOP_SPEED_KI (0.0001f)
  257. #define BOARD_BLDC_SW_FOC_POSITION_LOOP_SPEED_KP (0.05f)
  258. #define BOARD_BLDC_SW_FOC_POSITION_LOOP_SPEED_KI (0.001f)
  259. #define BOARD_BLDC_SW_FOC_POSITION_KP (154.7f)
  260. #define BOARD_BLDC_SW_FOC_POSITION_KI (0.113f)
  261. #define BOARD_BLDC_HFI_SPEED_LOOP_KP (40.0f)
  262. #define BOARD_BLDC_HFI_SPEED_LOOP_KI (0.015f)
  263. #define BOARD_BLDC_HFI_PLL_KP (10.0f)
  264. #define BOARD_BLDC_HFI_PLL_KI (1.0f)
  265. /*adc*/
  266. #define BOARD_BLDC_ADC_MODULE (ADCX_MODULE_ADC16)
  267. #define BOARD_BLDC_ADC_U_BASE HPM_ADC0
  268. #define BOARD_BLDC_ADC_V_BASE HPM_ADC1
  269. #define BOARD_BLDC_ADC_W_BASE HPM_ADC1
  270. #define BOARD_BLDC_ADC_TRIG_FLAG adc16_event_trig_complete
  271. #define BOARD_BLDC_ADC_CH_U (5U)
  272. #define BOARD_BLDC_ADC_CH_V (6U)
  273. #define BOARD_BLDC_ADC_CH_W (4U)
  274. #define BOARD_BLDC_ADC_IRQn IRQn_ADC0
  275. #define BOARD_BLDC_ADC_PMT_DMA_SIZE_IN_4BYTES (ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES)
  276. #define BOARD_BLDC_ADC_TRG ADC16_CONFIG_TRG0A
  277. #define BOARD_BLDC_ADC_PREEMPT_TRIG_LEN (1U)
  278. #define BOARD_BLDC_PWM_TRIG_CMP_INDEX (8U)
  279. #define BOARD_BLDC_TRG_ADC TRGM_TRGOCFG_ADCX_PTRGI0A
  280. #define BOARD_BLDC_PWM_TRG_ADC HPM_TRGM0_INPUT_SRC_PWM0_CH8REF
  281. #define BOARD_BLDC_DMA_MUX_SRC HPM_DMA_SRC_MOT_0
  282. #define BOARD_BLDC_DMA_CHN (0U)
  283. #define BOARD_BLDC_DMA_TRG_DST TRGM_TRGOCFG_TRGM_DMA0
  284. #define BOARD_BLDC_DMA_TRG_SRC HPM_TRGM0_DMA_SRC_TRGM0
  285. #define BOARD_BLDC_DMA_TRG_INDEX TRGM_DMACFG_0
  286. #define BOARD_BLDC_DMA_TRG_CMP_INDEX (9U)
  287. #define BOARD_BLDC_DMA_TRG_IN HPM_TRGM0_INPUT_SRC_PWM0_CH9REF
  288. /* PLB */
  289. #define BOARD_PLB_CLOCK_NAME clock_mot0
  290. #define BOARD_PLB_COUNTER HPM_PLB
  291. #define BOARD_PLB_PWM_BASE HPM_PWM0
  292. #define BOARD_PLB_PWM_CLOCK_NAME clock_mot0
  293. #define BOARD_PLB_TRGM HPM_TRGM0
  294. #define BOARD_PLB_PWM_TRG (HPM_TRGM0_INPUT_SRC_PWM0_CH8REF)
  295. #define BOARD_PLB_IN_PWM_TRG (TRGM_TRGOCFG_PLB_IN_00)
  296. #define BOARD_PLB_IN_PWM_PULSE_TRG (TRGM_TRGOCFG_PLB_IN_02)
  297. #define BOARD_PLB_CLR_SIGNAL_INPUT (HPM_TRGM0_INPUT_SRC_PLB_OUT16)
  298. #define BOARD_PLB_TO_TRG_IN (HPM_TRGM0_INPUT_SRC_PLB_OUT00)
  299. #define BOARD_PLB_TRG_OUT (HPM_TRGM0_OUTPUT_SRC_TRGM0_P2)
  300. #define BOARD_PLB_IO_TRG_SHIFT (2)
  301. #define BOARD_PLB_PWM_CMP (8U)
  302. #define BOARD_PLB_PWM_CHN (8U)
  303. #define BOARD_PLB_CHN plb_chn0
  304. #define BOARD_PLB_FILTER_SIG_INPUT_SOURCE HPM_TRGM0_INPUT_SRC_TRGM0_P4
  305. #define BOARD_PLB_FILTER_SIG_OUTUPT_SOURCE HPM_TRGM0_OUTPUT_SRC_MOT_GPIO2
  306. #define BOARD_PLB_FILTER_IO_TRG_SHIFT (2)
  307. /* QEO */
  308. #define BOARD_QEO HPM_QEO0
  309. #define BOARD_QEO_TRGM_POS trgm_pos_matrix_output_to_qeo0
  310. /* moto */
  311. #define BOARD_MOTOR_CLK_NAME clock_mot0
  312. /* SEI */
  313. #define BOARD_SEI HPM_SEI
  314. #define BOARD_SEI_CTRL SEI_CTRL_1
  315. #define BOARD_SEI_IRQn IRQn_SEI0_1
  316. #define BOARD_SEI_CLOCK_NAME clock_mot0
  317. /* OPAMP */
  318. #define BOARD_APP_OPAMP HPM_OPAMP0
  319. #define BOARD_APP_OPAMP_CLOCK clock_opa0
  320. #ifndef BOARD_SHOW_CLOCK
  321. #define BOARD_SHOW_CLOCK 1
  322. #endif
  323. #ifndef BOARD_SHOW_BANNER
  324. #define BOARD_SHOW_BANNER 1
  325. #endif
  326. /* FreeRTOS Definitions */
  327. #define BOARD_FREERTOS_TIMER HPM_GPTMR2
  328. #define BOARD_FREERTOS_TIMER_CHANNEL 1
  329. #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR2
  330. #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr2
  331. #define BOARD_FREERTOS_TICK_SRC_PWM HPM_PWM0
  332. #define BOARD_FREERTOS_TICK_SRC_PWM_IRQ IRQn_PWM0
  333. #define BOARD_FREERTOS_TICK_SRC_PWM_CLK_NAME clock_mot0
  334. #define BOARD_FREERTOS_LOWPOWER_TIMER HPM_PTMR
  335. #define BOARD_FREERTOS_LOWPOWER_TIMER_CHANNEL 1
  336. #define BOARD_FREERTOS_LOWPOWER_TIMER_IRQ IRQn_PTMR
  337. #define BOARD_FREERTOS_LOWPOWER_TIMER_CLK_NAME clock_ptmr
  338. /* Threadx Definitions */
  339. #define BOARD_THREADX_TIMER HPM_GPTMR2
  340. #define BOARD_THREADX_TIMER_CHANNEL 1
  341. #define BOARD_THREADX_TIMER_IRQ IRQn_GPTMR2
  342. #define BOARD_THREADX_TIMER_CLK_NAME clock_gptmr2
  343. #define BOARD_THREADX_LOWPOWER_TIMER HPM_PTMR
  344. #define BOARD_THREADX_LOWPOWER_TIMER_CHANNEL 1
  345. #define BOARD_THREADX_LOWPOWER_TIMER_IRQ IRQn_PTMR
  346. #define BOARD_THREADX_LOWPOWER_TIMER_CLK_NAME clock_ptmr
  347. /* uC/OS-III Definitions */
  348. #define BOARD_UCOS_TIMER HPM_GPTMR2
  349. #define BOARD_UCOS_TIMER_CHANNEL 1
  350. #define BOARD_UCOS_TIMER_IRQ IRQn_GPTMR2
  351. #define BOARD_UCOS_TIMER_CLK_NAME clock_gptmr2
  352. /* i2s over spi Section*/
  353. #define BOARD_I2S_SPI_CS_GPIO_CTRL HPM_GPIO0
  354. #define BOARD_I2S_SPI_CS_GPIO_INDEX GPIO_DI_GPIOA
  355. #define BOARD_I2S_SPI_CS_GPIO_PIN 11
  356. #define BOARD_I2S_SPI_CS_GPIO_PAD IOC_PAD_PA11
  357. #define BOARD_GPTMR_I2S_MCLK HPM_GPTMR0
  358. #define BOARD_GPTMR_I2S_MCLK_CHANNEL 3
  359. #define BOARD_GPTMR_I2S_MCLK_CLK_NAME clock_gptmr0
  360. #define BOARD_GPTMR_I2S_LRCK HPM_GPTMR0
  361. #define BOARD_GPTMR_I2S_LRCK_CHANNEL 1
  362. #define BOARD_GPTMR_I2S_LRCK_CLK_NAME clock_gptmr0
  363. #define BOARD_GPTMR_I2S_BCLK HPM_GPTMR0
  364. #define BOARD_GPTMR_I2S_BLCK_CHANNEL 0
  365. #define BOARD_GPTMR_I2S_BLCK_CLK_NAME clock_gptmr0
  366. #define BOARD_GPTMR_I2S_FINSH HPM_GPTMR0
  367. #define BOARD_GPTMR_I2S_FINSH_IRQ IRQn_GPTMR0
  368. #define BOARD_GPTMR_I2S_FINSH_CHANNEL 2
  369. #define BOARD_GPTMR_I2S_FINSH_CLK_NAME clock_gptmr0
  370. #define BOARD_APP_CLK_REF_PIN_NAME "P1[15] (PA30)"
  371. #define BOARD_APP_CLK_REF_CLK_NAME clock_ref0
  372. #define BOARD_APP_CLK_REF_SRC_NAME clk_src_pll1_clk1
  373. #define BOARD_APP_PLLCTLV2_TEST_PLL pllctlv2_pll1
  374. #define BOARD_APP_PLLCTLV2_TEST_PLL_CLK pllctlv2_clk1
  375. #define BOARD_APP_PLLCTLV2_TEST_PLL_NAME clk_pll1clk1
  376. #if defined(__cplusplus)
  377. extern "C" {
  378. #endif /* __cplusplus */
  379. typedef void (*board_timer_cb)(void);
  380. void board_init(void);
  381. void board_init_console(void);
  382. void board_init_gpio_pins(void);
  383. void board_init_led_pins(void);
  384. void board_init_usb(USB_Type *ptr);
  385. void board_led_write(uint8_t state);
  386. void board_led_toggle(void);
  387. void board_init_uart(UART_Type *ptr);
  388. uint32_t board_init_spi_clock(SPI_Type *ptr);
  389. void board_init_spi_pins(SPI_Type *ptr);
  390. uint32_t board_init_adc_clock(void *ptr, bool clk_src_bus);
  391. void board_init_adc16_pins(void);
  392. uint32_t board_init_dac_clock(DAC_Type *ptr, bool clk_src_ahb);
  393. void board_init_acmp_pins(void);
  394. void board_init_acmp_clock(ACMP_Type *ptr);
  395. void board_init_can(MCAN_Type *ptr);
  396. uint32_t board_init_can_clock(MCAN_Type *ptr);
  397. void board_init_rgb_pwm_pins(void);
  398. void board_disable_output_rgb_led(uint8_t color);
  399. void board_enable_output_rgb_led(uint8_t color);
  400. void board_init_dac_pins(DAC_Type *ptr);
  401. void board_write_spi_cs(uint32_t pin, uint8_t state);
  402. void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
  403. void board_init_usb_dp_dm_pins(void);
  404. void board_init_clock(void);
  405. void board_delay_us(uint32_t us);
  406. void board_delay_ms(uint32_t ms);
  407. void board_timer_create(uint32_t ms, board_timer_cb cb);
  408. void board_ungate_mchtmr_at_lp_mode(void);
  409. uint8_t board_get_led_gpio_off_level(void);
  410. uint8_t board_get_led_pwm_off_level(void);
  411. void board_init_pmp(void);
  412. uint32_t board_init_uart_clock(UART_Type *ptr);
  413. void board_init_sei_pins(SEI_Type *ptr, uint8_t sei_ctrl_idx);
  414. uint32_t board_init_i2c_clock(I2C_Type *ptr);
  415. void board_init_i2c(I2C_Type *ptr);
  416. void board_init_adc_qeiv2_pins(void);
  417. void board_lin_transceiver_control(bool enable);
  418. void board_init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp);
  419. void board_init_clk_ref_pin(void);
  420. uint32_t board_init_gptmr_clock(GPTMR_Type *ptr);
  421. #if defined(__cplusplus)
  422. }
  423. #endif /* __cplusplus */
  424. #endif /* _HPM_BOARD_H */