board.h 20 KB

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  1. /*
  2. * Copyright (c) 2023-2025 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #ifndef _HPM_BOARD_H
  8. #define _HPM_BOARD_H
  9. #include <stdio.h>
  10. #include "hpm_common.h"
  11. #include "hpm_clock_drv.h"
  12. #include "hpm_lcdc_drv.h"
  13. #include "hpm_soc.h"
  14. #include "hpm_soc_feature.h"
  15. #include "pinmux.h"
  16. #ifdef CONFIG_HPM_PANEL
  17. #include "hpm_panel.h"
  18. #endif
  19. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  20. #include "hpm_debug_console.h"
  21. #endif
  22. #define BOARD_NAME "hpm6800evk"
  23. #define BOARD_UF2_SIGNATURE (0x0A4D5048UL)
  24. #ifndef BOARD_RUNNING_CORE
  25. #define BOARD_RUNNING_CORE HPM_CORE0
  26. #endif
  27. /* uart section */
  28. #ifndef BOARD_APP_UART_BASE
  29. #define BOARD_APP_UART_BASE HPM_UART3
  30. #define BOARD_APP_UART_IRQ IRQn_UART3
  31. #define BOARD_APP_UART_BAUDRATE (115200UL)
  32. #define BOARD_APP_UART_CLK_NAME clock_uart3
  33. #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART3_RX
  34. #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART3_TX
  35. #endif
  36. #define BOARD_APP_UART_BREAK_SIGNAL_PIN IOC_PAD_PE04
  37. /* uart lin sample section */
  38. #define BOARD_UART_LIN BOARD_APP_UART_BASE
  39. #define BOARD_UART_LIN_IRQ BOARD_APP_UART_IRQ
  40. #define BOARD_UART_LIN_CLK_NAME BOARD_APP_UART_CLK_NAME
  41. #define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOE
  42. #define BOARD_UART_LIN_TX_PIN (15U) /* PE15 should align with used pin in pinmux configuration */
  43. #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE
  44. #ifndef BOARD_CONSOLE_TYPE
  45. #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART
  46. #endif
  47. #if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART
  48. #ifndef BOARD_CONSOLE_UART_BASE
  49. #define BOARD_CONSOLE_UART_BASE HPM_UART0
  50. #define BOARD_CONSOLE_UART_CLK_NAME clock_uart0
  51. #define BOARD_CONSOLE_UART_IRQ IRQn_UART0
  52. #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
  53. #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
  54. #endif
  55. #define BOARD_CONSOLE_UART_BAUDRATE (115200UL)
  56. #endif
  57. #endif
  58. /* uart microros sample section */
  59. #define BOARD_MICROROS_UART_BASE BOARD_APP_UART_BASE
  60. #define BOARD_MICROROS_UART_IRQ BOARD_APP_UART_IRQ
  61. #define BOARD_MICROROS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  62. /* rtthread-nano finsh section */
  63. #define BOARD_RT_CONSOLE_BASE BOARD_CONSOLE_UART_BASE
  64. #define BOARD_RT_CONSOLE_CLK_NAME BOARD_CONSOLE_UART_CLK_NAME
  65. #define BOARD_RT_CONSOLE_IRQ BOARD_CONSOLE_UART_IRQ
  66. /* usb cdc acm uart section */
  67. #define BOARD_USB_CDC_ACM_UART BOARD_APP_UART_BASE
  68. #define BOARD_USB_CDC_ACM_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  69. #define BOARD_USB_CDC_ACM_UART_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ
  70. #define BOARD_USB_CDC_ACM_UART_RX_DMA_SRC BOARD_APP_UART_RX_DMA_REQ
  71. /* modbus sample section */
  72. #define BOARD_MODBUS_UART_BASE BOARD_APP_UART_BASE
  73. #define BOARD_MODBUS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME
  74. #define BOARD_MODBUS_UART_RX_DMA_REQ BOARD_APP_UART_RX_DMA_REQ
  75. #define BOARD_MODBUS_UART_TX_DMA_REQ BOARD_APP_UART_TX_DMA_REQ
  76. /* lin section */
  77. #define BOARD_LIN HPM_LIN0
  78. #define BOARD_LIN_CLK_NAME clock_lin0
  79. #define BOARD_LIN_IRQ IRQn_LIN0
  80. #define BOARD_LIN_BAUDRATE (19200U)
  81. /* nor flash section */
  82. #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL)
  83. #define BOARD_FLASH_SIZE (16 * SIZE_1MB)
  84. /* i2c section */
  85. #define BOARD_APP_I2C_BASE HPM_I2C1
  86. #define BOARD_APP_I2C_IRQ IRQn_I2C1
  87. #define BOARD_APP_I2C_CLK_NAME clock_i2c1
  88. #define BOARD_APP_I2C_DMA HPM_HDMA
  89. #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX
  90. #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C1
  91. /* cam */
  92. #define BOARD_CAM_I2C_BASE HPM_I2C0
  93. #define BOARD_CAM_I2C_CLK_NAME clock_i2c0
  94. #define BOARD_SUPPORT_CAM_RESET
  95. #define BOARD_SUPPORT_CAM_PWDN
  96. #define BOARD_CAM_RST_GPIO_CTRL HPM_GPIO0
  97. #define BOARD_CAM_RST_GPIO_INDEX GPIO_DI_GPIOA
  98. #define BOARD_CAM_RST_GPIO_PIN 22
  99. #define BOARD_CAM_PWDN_GPIO_CTRL HPM_GPIO0
  100. #define BOARD_CAM_PWDN_GPIO_INDEX GPIO_DI_GPIOA
  101. #define BOARD_CAM_PWDN_GPIO_PIN 21
  102. /* touch panel */
  103. #define BOARD_CAP_I2C_BASE (HPM_I2C0)
  104. #define BOARD_CAP_I2C_CLK_NAME clock_i2c0
  105. #define BOARD_CAP_RST_GPIO (HPM_GPIO0)
  106. #define BOARD_CAP_RST_GPIO_INDEX (GPIO_DI_GPIOY)
  107. #define BOARD_CAP_RST_GPIO_PIN (7)
  108. #define BOARD_CAP_RST_GPIO_IRQ (IRQn_GPIO0_Y)
  109. #define BOARD_CAP_INTR_GPIO (HPM_GPIO0)
  110. #define BOARD_CAP_INTR_GPIO_INDEX (GPIO_DI_GPIOY)
  111. #define BOARD_CAP_INTR_GPIO_PIN (6)
  112. #define BOARD_CAP_INTR_GPIO_IRQ (IRQn_GPIO0_Y)
  113. #define BOARD_CAP_I2C_GPIO HPM_GPIO0
  114. #define BOARD_CAP_I2C_SDA_GPIO_INDEX (GPIO_DI_GPIOF)
  115. #define BOARD_CAP_I2C_SDA_GPIO_PIN (9)
  116. #define BOARD_CAP_I2C_CLK_GPIO_INDEX (GPIO_DI_GPIOF)
  117. #define BOARD_CAP_I2C_CLK_GPIO_PIN (8)
  118. /* i2s section */
  119. #define BOARD_APP_I2S_BASE HPM_I2S3
  120. #define BOARD_APP_I2S_TX_DATA_LINE I2S_DATA_LINE_2
  121. #define BOARD_APP_I2S_RX_DATA_LINE I2S_DATA_LINE_2
  122. #define BOARD_APP_I2S_CLK_NAME clock_i2s3
  123. #define BOARD_APP_I2S_TX_DMA_REQ HPM_DMA_SRC_I2S3_TX
  124. #define BOARD_APP_I2S_IRQ IRQn_I2S3
  125. #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll3_clk0
  126. #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll3clk0
  127. #define BOARD_MIC_I2S HPM_I2S0
  128. #define BOARD_MIC_I2S_CLK_NAME clock_i2s0
  129. #define BOARD_MIC_I2S_DATA_LINE I2S_DATA_LINE_0
  130. #define BOARD_MIC_I2S_RX_DMAMUX_SRC HPM_DMA_SRC_I2S0_RX
  131. #define BOARD_SPEAKER_I2S HPM_I2S1
  132. #define BOARD_SPEAKER_I2S_CLK_NAME clock_i2s1
  133. #define BOARD_SPEAKER_I2S_DATA_LINE I2S_DATA_LINE_0
  134. #define BOARD_SPEAKER_I2S_TX_DMAMUX_SRC HPM_DMA_SRC_I2S1_TX
  135. /* pdm selection */
  136. #define BOARD_PDM_SINGLE_CHANNEL_MASK (0x02U)
  137. #define BOARD_PDM_DUAL_CHANNEL_MASK (0x22U)
  138. /* i2c for i2s codec section */
  139. #define BOARD_CODEC_I2C_BASE HPM_I2C3
  140. #define BOARD_CODEC_I2C_CLK_NAME clock_i2c3
  141. /* dma section */
  142. #define BOARD_APP_XDMA HPM_XDMA
  143. #define BOARD_APP_HDMA HPM_HDMA
  144. #define BOARD_APP_XDMA_IRQ IRQn_XDMA
  145. #define BOARD_APP_HDMA_IRQ IRQn_HDMA
  146. #define BOARD_APP_DMAMUX HPM_DMAMUX
  147. #define TEST_DMA_CONTROLLER HPM_XDMA
  148. #define TEST_DMA_IRQ IRQn_XDMA
  149. /* gptmr section */
  150. #define BOARD_GPTMR HPM_GPTMR2
  151. #define BOARD_GPTMR_IRQ IRQn_GPTMR2
  152. #define BOARD_GPTMR_CHANNEL 0
  153. #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR2_0
  154. #define BOARD_GPTMR_CLK_NAME clock_gptmr2
  155. #define BOARD_GPTMR_PWM HPM_GPTMR2
  156. #define BOARD_GPTMR_PWM_CHANNEL 0
  157. #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR2_0
  158. #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr2
  159. #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR2
  160. #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR2
  161. #define BOARD_GPTMR_PWM_SYNC_CHANNEL 1
  162. #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr2
  163. /* gpio software filter*/
  164. #define DEBOUNCE_THRESHOLD_IN_MS 150
  165. /* pinmux section */
  166. #define USING_GPIO0_FOR_GPIOZ
  167. #ifndef USING_GPIO0_FOR_GPIOZ
  168. #define BOARD_APP_GPIO_CTRL HPM_BGPIO
  169. #define BOARD_APP_GPIO_IRQ IRQn_BGPIO
  170. #else
  171. #define BOARD_APP_GPIO_CTRL HPM_GPIO0
  172. #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_F
  173. #endif
  174. /* gpiom section */
  175. #define BOARD_APP_GPIOM_BASE HPM_GPIOM
  176. #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO
  177. #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast
  178. /*
  179. * in errata, for gpiom, setting the ASSIGN register of GPIOF is invalid.
  180. * so need to configure GPIOE to make it effective at the same time.
  181. */
  182. #define BOARD_LED_GPIOM_GPIO_INDEX GPIO_DI_GPIOE
  183. /* spi section */
  184. #define BOARD_APP_SPI_BASE HPM_SPI3
  185. #define BOARD_APP_SPI_CLK_NAME clock_spi3
  186. #define BOARD_APP_SPI_IRQ IRQn_SPI3
  187. #define BOARD_APP_SPI_SCLK_FREQ (20000000UL)
  188. #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U)
  189. #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U)
  190. #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX
  191. #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX
  192. #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0
  193. #define BOARD_SPI_CS_PIN IOC_PAD_PE04
  194. #define BOARD_SPI_CS_ACTIVE_LEVEL (0U)
  195. /* Flash section */
  196. #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0)
  197. #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U)
  198. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U)
  199. #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U)
  200. /* ADC section */
  201. #define BOARD_APP_ADC16_NAME "ADC0"
  202. #define BOARD_APP_ADC16_BASE HPM_ADC0
  203. #define BOARD_APP_ADC16_IRQn IRQn_ADC0
  204. #define BOARD_APP_ADC16_CH_1 (8U)
  205. #define BOARD_APP_ADC16_CLK_NAME (clock_adc0)
  206. #define BOARD_APP_ADC16_CLK_BUS (clk_adc_src_axi0)
  207. #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A
  208. /* CAN section */
  209. #define BOARD_APP_CAN_BASE HPM_MCAN3
  210. #define BOARD_APP_CAN_IRQn IRQn_MCAN3
  211. /*
  212. * timer for board delay
  213. */
  214. #define BOARD_DELAY_TIMER (HPM_GPTMR3)
  215. #define BOARD_DELAY_TIMER_CH 0
  216. #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3)
  217. #define BOARD_CALLBACK_TIMER (HPM_GPTMR3)
  218. #define BOARD_CALLBACK_TIMER_CH 1
  219. #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3
  220. #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3)
  221. #define BOARD_CPU_FREQ (600000000UL)
  222. /* LED */
  223. #define BOARD_R_GPIO_CTRL HPM_GPIO0
  224. #define BOARD_R_GPIO_INDEX GPIO_DI_GPIOF
  225. #define BOARD_R_GPIO_PIN 1
  226. #define BOARD_G_GPIO_CTRL HPM_GPIO0
  227. #define BOARD_G_GPIO_INDEX GPIO_DI_GPIOF
  228. #define BOARD_G_GPIO_PIN 2
  229. #define BOARD_B_GPIO_CTRL HPM_GPIO0
  230. #define BOARD_B_GPIO_INDEX GPIO_DI_GPIOF
  231. #define BOARD_B_GPIO_PIN 5
  232. #define BOARD_RGB_RED 0
  233. #define BOARD_RGB_GREEN (BOARD_RGB_RED + 1)
  234. #define BOARD_RGB_BLUE (BOARD_RGB_RED + 2)
  235. #define BOARD_LED_GPIO_CTRL BOARD_G_GPIO_CTRL
  236. #define BOARD_LED_GPIO_INDEX BOARD_G_GPIO_INDEX
  237. #define BOARD_LED_GPIO_PIN BOARD_G_GPIO_PIN
  238. #define BOARD_LED_OFF_LEVEL 0
  239. #define BOARD_LED_ON_LEVEL !BOARD_LED_OFF_LEVEL
  240. #define BOARD_LED_TOGGLE_RGB 1
  241. /* Key */
  242. #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOF
  243. #define BOARD_APP_GPIO_PIN 6
  244. #define BOARD_BUTTON_PRESSED_VALUE 0
  245. /* ACMP desction */
  246. #define BOARD_ACMP 0
  247. #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1
  248. #define BOARD_ACMP_IRQ 0
  249. #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */
  250. #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_6 /* align with used pin */
  251. #define BOARD_GWC_BASE HPM_GWC0
  252. #define BOARD_GWC_FUNC_IRQ IRQn_GWCK0_FUNC
  253. #define BOARD_GWC_ERR_IRQ IRQn_GWCK0_ERR
  254. #define BOARD_GWC_PIXEL_WIDTH 1920
  255. #define BOARD_GWC_PIXEL_HEIGHT 1080
  256. /* lcd section */
  257. #define BOARD_LCD_BASE HPM_LCDC
  258. #define BOARD_LCD_IRQ IRQn_LCDC
  259. #define clock_display clock_lcd0
  260. #ifndef BOARD_LCD_WIDTH
  261. #define BOARD_LCD_WIDTH PANEL_SIZE_WIDTH
  262. #endif
  263. #ifndef BOARD_LCD_HEIGHT
  264. #define BOARD_LCD_HEIGHT PANEL_SIZE_HEIGHT
  265. #endif
  266. #define BOARD_MULTI_PANEL_LVDS_LCDC_BASE HPM_LCDC1
  267. #define BOARD_MULTI_PANEL_LVDS_LCDC_CLK clock_lcd1
  268. #define BOARD_MULTI_PANEL_LVDS_NAME "cc10128007"
  269. #define BOARD_MULTI_PANEL_MIPI_LCDC_BASE HPM_LCDC
  270. #define BOARD_MULTI_PANEL_MIPI_LCDC_CLK clock_lcd0
  271. #define BOARD_MULTI_PANEL_MIPI_NAME "mc10128007_31b"
  272. /* pdma section */
  273. #define BOARD_PDMA_BASE HPM_PDMA
  274. #ifndef IRQn_PDMA_D0
  275. #define IRQn_PDMA_D0 IRQn_PDMA
  276. #endif
  277. #ifndef BOARD_SHOW_CLOCK
  278. #define BOARD_SHOW_CLOCK 1
  279. #endif
  280. #ifndef BOARD_SHOW_BANNER
  281. #define BOARD_SHOW_BANNER 1
  282. #endif
  283. /* FreeRTOS Definitions */
  284. #define BOARD_FREERTOS_TIMER HPM_GPTMR2
  285. #define BOARD_FREERTOS_TIMER_CHANNEL 1
  286. #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR2
  287. #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr2
  288. #define BOARD_FREERTOS_LOWPOWER_TIMER HPM_PTMR
  289. #define BOARD_FREERTOS_LOWPOWER_TIMER_CHANNEL 1
  290. #define BOARD_FREERTOS_LOWPOWER_TIMER_IRQ IRQn_PTMR
  291. #define BOARD_FREERTOS_LOWPOWER_TIMER_CLK_NAME clock_ptmr
  292. /* Threadx Definitions */
  293. #define BOARD_THREADX_TIMER HPM_GPTMR2
  294. #define BOARD_THREADX_TIMER_CHANNEL 1
  295. #define BOARD_THREADX_TIMER_IRQ IRQn_GPTMR2
  296. #define BOARD_THREADX_TIMER_CLK_NAME clock_gptmr2
  297. #define BOARD_THREADX_LOWPOWER_TIMER HPM_PTMR
  298. #define BOARD_THREADX_LOWPOWER_TIMER_CHANNEL 1
  299. #define BOARD_THREADX_LOWPOWER_TIMER_IRQ IRQn_PTMR
  300. #define BOARD_THREADX_LOWPOWER_TIMER_CLK_NAME clock_ptmr
  301. /* uC/OS-III Definitions */
  302. #define BOARD_UCOS_TIMER HPM_GPTMR2
  303. #define BOARD_UCOS_TIMER_CHANNEL 1
  304. #define BOARD_UCOS_TIMER_IRQ IRQn_GPTMR2
  305. #define BOARD_UCOS_TIMER_CLK_NAME clock_gptmr2
  306. /* SDXC section */
  307. #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC1)
  308. #define BOARD_APP_SDCARD_SDXC_IRQ IRQn_SDXC1
  309. #define BOARD_APP_SDCARD_SUPPORT_3V3 (1)
  310. #define BOARD_APP_SDCARD_SUPPORT_1V8 (1)
  311. #define BOARD_APP_SDCARD_SUPPORT_4BIT (1)
  312. #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1)
  313. #define BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH (1)
  314. #define BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH (1)
  315. #define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (1)
  316. #define BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO (1)
  317. #define BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO (1)
  318. #if BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO
  319. #define BOARD_APP_SDCARD_CARD_DETECTION_PIN IOC_PAD_PD05
  320. #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL (1) /* pin value 0 means card was detected*/
  321. #endif
  322. #ifdef BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO
  323. #define BOARD_APP_SDCARD_POWER_SWITCH_PIN IOC_PAD_PD07
  324. #endif
  325. #ifdef BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO
  326. #define BOARD_APP_SDCARD_VSEL_PIN IOC_PAD_PD12
  327. #endif
  328. #define BOARD_APP_SDCARD_HOST_USING_IRQ (1)
  329. #define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC0)
  330. #define BOARD_APP_EMMC_SDXC_IRQ IRQn_SDXC0
  331. #define BOARD_APP_EMMC_SUPPORT_3V3 (0)
  332. #define BOARD_APP_EMMC_SUPPORT_1V8 (1)
  333. #define BOARD_APP_EMMC_SUPPORT_4BIT (0)
  334. #define BOARD_APP_EMMC_SUPPORT_8BIT (1)
  335. #define BOARD_APP_EMMC_SUPPORT_DS (1)
  336. #define BOARD_APP_EMMC_HOST_USING_IRQ (0)
  337. #define BOARD_APP_SDIO_SDXC_BASE (HPM_SDXC1)
  338. #define BOARD_APP_SDIO_SDXC_IRQ IRQn_SDXC1
  339. #define BOARD_APP_SDIO_SUPPORT_3V3 (1)
  340. #define BOARD_APP_SDIO_SUPPORT_1V8 (0)
  341. #define BOARD_APP_SDIO_SUPPORT_4BIT (1)
  342. #define BOARD_APP_SDIO_SUPPORT_POWER_SWITCH (1)
  343. #define BOARD_APP_SDIO_SUPPORT_VOLTAGE_SWITCH (0)
  344. #define BOARD_APP_SDIO_SUPPORT_CARD_DETECTION (0)
  345. #define BOARD_APP_SDIO_POWER_SWITCH_USING_GPIO (1)
  346. #define BOARD_APP_SDIO_VOLTAGE_SWITCH_USING_GPIO (0)
  347. #define BOARD_APP_SDIO_POWER_SWITCH_USING_GPIO (1)
  348. #ifdef BOARD_APP_SDIO_POWER_SWITCH_USING_GPIO
  349. #define BOARD_APP_SDIO_POWER_SWITCH_PIN IOC_PAD_PD07
  350. #endif
  351. #ifdef BOARD_APP_SDIO_VOLTAGE_SWITCH_USING_GPIO
  352. #define BOARD_APP_SDIO_VSEL_PIN IOC_PAD_PD12
  353. #endif
  354. #define BOARD_APP_SDIO_WIFI_OOB_PORT (HPM_GPIO0)
  355. #define BOARD_APP_SDIO_WIFI_OOB_PIN (IOC_PAD_PE16)
  356. #define BOARD_APP_SDIO_WIFI_OOB_IRQ IRQn_GPIO0_E
  357. #define BOARD_APP_SDIO_WIFI_WL_REG_ON_PORT (HPM_GPIO0)
  358. #define BOARD_APP_SDIO_WIFI_WL_REG_ON_PIN (IOC_PAD_PE17)
  359. #define BOARD_APP_SDIO_WIFI_SDXC_PORT HPM_SDXC1
  360. /* enet section */
  361. #define BOARD_ENET_COUNT (1U)
  362. #define BOARD_ENET_PPS HPM_ENET0
  363. #define BOARD_ENET_PPS_IDX enet_pps_0
  364. #define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0
  365. #define BOARD_ENET_AUXI_SNAPSHOT HPM_ENET0
  366. #define BOARD_ENET_AUXI_SNAPSHOT_IDX enet_ptp_auxi_snapshot_trigger_0
  367. #define BOARD_ENET_AUXI_SNAPSHOT_PTP_CLOCK clock_ptp0
  368. #define BOARD_ENET_RGMII_PHY_ITF enet_inf_rgmii
  369. #define BOARD_ENET_RGMII_RST_GPIO HPM_GPIO0
  370. #define BOARD_ENET_RGMII_RST_GPIO_INDEX GPIO_DO_GPIOD
  371. #define BOARD_ENET_RGMII_RST_GPIO_PIN (18U)
  372. #define BOARD_ENET_RGMII HPM_ENET0
  373. #define BOARD_ENET_RGMII_TX_DLY (0U)
  374. #define BOARD_ENET_RGMII_RX_DLY (0U)
  375. #define BOARD_ENET_RGMII_PTP_CLOCK clock_ptp0
  376. #define BOARD_ENET_RGMII_PPS0_PINOUT (1)
  377. /* dram section */
  378. #define DDR_TYPE_DDR2 (0U)
  379. #define DDR_TYPE_DDR3L (1U)
  380. #define BOARD_DDR_TYPE DDR_TYPE_DDR3L
  381. #define BOARD_SDRAM_ADDRESS (0x40000000UL)
  382. #if (BOARD_DDR_TYPE == DDR_TYPE_DDR2)
  383. #define BOARD_SDRAM_SIZE (256UL * 1024UL * 1024UL)
  384. #else
  385. #define BOARD_SDRAM_SIZE (512UL * 1024UL * 1024UL)
  386. #endif
  387. /* Tamper Section */
  388. #define BOARD_TAMP_ACTIVE_CH 4
  389. #define BOARD_TAMP_LOW_LEVEL_CH 6
  390. /* i2s over spi Section*/
  391. #define BOARD_I2S_SPI_CS_GPIO_CTRL HPM_GPIO0
  392. #define BOARD_I2S_SPI_CS_GPIO_INDEX GPIO_DI_GPIOE
  393. #define BOARD_I2S_SPI_CS_GPIO_PIN 27
  394. #define BOARD_I2S_SPI_CS_GPIO_PAD IOC_PAD_PE27
  395. #define BOARD_GPTMR_I2S_MCLK HPM_GPTMR2
  396. #define BOARD_GPTMR_I2S_MCLK_CHANNEL 0
  397. #define BOARD_GPTMR_I2S_MCLK_CLK_NAME clock_gptmr2
  398. #define BOARD_GPTMR_I2S_LRCK HPM_GPTMR2
  399. #define BOARD_GPTMR_I2S_LRCK_CHANNEL 1
  400. #define BOARD_GPTMR_I2S_LRCK_CLK_NAME clock_gptmr2
  401. #define BOARD_GPTMR_I2S_BCLK HPM_GPTMR2
  402. #define BOARD_GPTMR_I2S_BLCK_CHANNEL 2
  403. #define BOARD_GPTMR_I2S_BLCK_CLK_NAME clock_gptmr2
  404. #define BOARD_GPTMR_I2S_FINSH HPM_GPTMR2
  405. #define BOARD_GPTMR_I2S_FINSH_IRQ IRQn_GPTMR5
  406. #define BOARD_GPTMR_I2S_FINSH_CHANNEL 3
  407. #define BOARD_GPTMR_I2S_FINSH_CLK_NAME clock_gptmr2
  408. #define BOARD_APP_CLK_REF_PIN_NAME "J20[7] (PD31)"
  409. #define BOARD_APP_CLK_REF_CLK_NAME clock_ref1
  410. #define BOARD_APP_CLK_REF_SRC_NAME clk_src_pll4_clk0
  411. #define BOARD_APP_PLLCTLV2_TEST_PLL pllctlv2_pll4
  412. #define BOARD_APP_PLLCTLV2_TEST_PLL_CLK pllctlv2_clk0
  413. #define BOARD_APP_PLLCTLV2_TEST_PLL_NAME clk_pll4clk0
  414. /* BGPR */
  415. #define BOARD_BGPR HPM_BGPR
  416. #if defined(__cplusplus)
  417. extern "C" {
  418. #endif /* __cplusplus */
  419. typedef void (*board_timer_cb)(void);
  420. void board_init(void);
  421. void board_init_console(void);
  422. void board_init_uart(UART_Type *ptr);
  423. uint32_t board_init_i2c_clock(I2C_Type *ptr);
  424. void board_init_i2c(I2C_Type *ptr);
  425. void board_init_can(MCAN_Type *ptr);
  426. void board_init_gpio_pins(void);
  427. void board_init_spi_pins(SPI_Type *ptr);
  428. void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr);
  429. void board_write_spi_cs(uint32_t pin, uint8_t state);
  430. uint8_t board_get_led_gpio_off_level(void);
  431. void board_init_led_pins(void);
  432. void board_disable_output_rgb_led(uint8_t color);
  433. void board_enable_output_rgb_led(uint8_t color);
  434. void board_led_write(uint8_t state);
  435. void board_led_toggle(void);
  436. /* Initialize SoC overall clocks */
  437. void board_init_clock(void);
  438. uint32_t board_init_spi_clock(SPI_Type *ptr);
  439. uint32_t board_init_can_clock(MCAN_Type *ptr);
  440. void board_init_enet_pps_pins(ENET_Type *ptr);
  441. void board_init_enet_pps_capture_pins(ENET_Type *ptr);
  442. uint8_t board_get_enet_dma_pbl(ENET_Type *ptr);
  443. hpm_stat_t board_reset_enet_phy(ENET_Type *ptr);
  444. hpm_stat_t board_init_enet_pins(ENET_Type *ptr);
  445. hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal);
  446. hpm_stat_t board_init_enet_rgmii_clock_delay(ENET_Type *ptr);
  447. hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr);
  448. hpm_stat_t board_enable_enet_irq(ENET_Type *ptr);
  449. hpm_stat_t board_disable_enet_irq(ENET_Type *ptr);
  450. /*
  451. * @brief Initialize PMP and PMA for but not limited to the following purposes:
  452. * -- non-cacheable memory initialization
  453. */
  454. void board_init_pmp(void);
  455. void board_delay_us(uint32_t us);
  456. void board_delay_ms(uint32_t ms);
  457. void board_timer_create(uint32_t ms, board_timer_cb cb);
  458. void board_ungate_mchtmr_at_lp_mode(void);
  459. /* Initialize the UART clock */
  460. uint32_t board_init_uart_clock(UART_Type *ptr);
  461. void board_lcd_backlight(bool is_on);
  462. void board_init_lcd(void);
  463. void board_panel_para_to_lcdc_by_name(char *name, lcdc_config_t *config);
  464. void board_panel_para_to_lcdc(lcdc_config_t *config);
  465. void board_init_gwc(void);
  466. void board_init_cap_touch(void);
  467. void board_init_usb(USB_Type *ptr);
  468. void board_init_sd_pins(SDXC_Type *ptr);
  469. uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse);
  470. void board_sd_switch_pins_to_1v8(SDXC_Type *ptr);
  471. bool board_sd_detect_card(SDXC_Type *ptr);
  472. uint32_t board_init_dao_clock(void);
  473. uint32_t board_init_pdm_clock(void);
  474. uint32_t board_config_i2s_clock(I2S_Type *ptr, uint32_t sample_rate);
  475. void board_init_adc16_pins(void);
  476. uint32_t board_init_adc_clock(void *ptr, bool clk_src_bus);
  477. void board_init_cam_pins(void);
  478. void board_write_cam_rst(uint8_t state);
  479. void board_write_cam_pwdn(uint8_t state);
  480. uint32_t board_init_cam_clock(CAM_Type *ptr);
  481. void board_init_mipi_csi_cam_pins(void);
  482. void board_write_mipi_csi_cam_rst(uint8_t state);
  483. void board_init_gptmr_channel_pin(GPTMR_Type *ptr, uint32_t channel, bool as_comp);
  484. void board_init_clk_ref_pin(void);
  485. uint32_t board_init_gptmr_clock(GPTMR_Type *ptr);
  486. #if defined(__cplusplus)
  487. }
  488. #endif /* __cplusplus */
  489. #endif /* _HPM_BOARD_H */