link.sct 4.2 KB

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  1. ; *************************************************************
  2. ; *** Scatter-Loading Description File generated by uVision ***
  3. ; *************************************************************
  4. #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc
  5. ; command above MUST be in first line (no comment above!)
  6. /*
  7. ;-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
  8. */
  9. /*--------------------- Flash Configuration ----------------------------------
  10. ; <h> Flash Configuration
  11. ; <o0> Flash Base Address <0x0-0xFFFFFFFF:8>
  12. ; <o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
  13. ; </h>
  14. *----------------------------------------------------------------------------*/
  15. #define __ROM_BASE 0x008000000
  16. #define __ROM_SIZE 0x000040000
  17. /*---------------------------- ITCM Configuration -----------------------------
  18. ; <h> ITCM Configuration
  19. ; <o0> ITCM Base Address <0x0-0xFFFFFFFF:8>
  20. ; <o1> ITCM Size (in Bytes) <0x0-0xFFFFFFFF:8>
  21. ; </h>
  22. *----------------------------------------------------------------------------*/
  23. #define __ITCM_BASE 0x00000000
  24. #define __ITCM_SIZE 0x00008000
  25. /*---------------------------- DTCM Configuration -----------------------------
  26. ; <h> DTCM Configuration
  27. ; <o0> DTCM Base Address <0x0-0xFFFFFFFF:8>
  28. ; <o1> DTCM Size (in Bytes) <0x0-0xFFFFFFFF:8>
  29. ; </h>
  30. *----------------------------------------------------------------------------*/
  31. #define __DTCM_BASE 0x20000000
  32. #define __DTCM_SIZE 0x00008000
  33. /*--------------------- Embedded RAM1 Configuration ---------------------------
  34. ; <h> RAM Configuration
  35. ; <o0> RAM1 Base Address <0x0-0xFFFFFFFF:8>
  36. ; <o1> RAM1 Size (in Bytes) <0x0-0xFFFFFFFF:8>
  37. ; </h>
  38. *----------------------------------------------------------------------------*/
  39. #define __RAM1_BASE 0x30000000
  40. #define __RAM1_SIZE 0x0001C000
  41. /*--------------------- Embedded RAM2 Configuration ---------------------------
  42. ; <h> RAM Configuration
  43. ; <o0> RAM2 Base Address <0x0-0xFFFFFFFF:8>
  44. ; <o1> RAM2 Size (in Bytes) <0x0-0xFFFFFFFF:8>
  45. ; </h>
  46. *----------------------------------------------------------------------------*/
  47. #define __RAM2_BASE 0x3001C000
  48. #define __RAM2_SIZE 0x00004000
  49. /*--------------------- Stack / Heap Configuration ---------------------------
  50. ; <h> Stack / Heap Configuration
  51. ; <o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  52. ; <o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  53. ; </h>
  54. *----------------------------------------------------------------------------*/
  55. #define __STACK_SIZE 0x00000800
  56. #define __HEAP_SIZE 0x00000C00
  57. /*----------------------------------------------------------------------------
  58. User Stack & Heap boundary definition
  59. *----------------------------------------------------------------------------*/
  60. #define __STACK_TOP (__RAM1_BASE + __RAM1_SIZE) /* starts at end of RAM */
  61. #define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */
  62. /*----------------------------------------------------------------------------
  63. Scatter File Definitions definition
  64. *----------------------------------------------------------------------------*/
  65. #define __RO_BASE __ROM_BASE
  66. #define __RO_SIZE __ROM_SIZE
  67. LR_ROM __RO_BASE __RO_SIZE { ; load region size_region
  68. ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address
  69. *.o (RESET, +First)
  70. *(InRoot$$Sections)
  71. ; *(Veneer$$CMSE) ; uncomment for secure applications
  72. .ANY (+RO)
  73. .ANY (+XO)
  74. }
  75. RW_ITCM __ITCM_BASE __ITCM_SIZE { ; RW data
  76. .ANY (+RW +ZI)
  77. }
  78. RW_DTCM __DTCM_BASE __DTCM_SIZE { ; RW data
  79. .ANY (+RW +ZI)
  80. }
  81. RW_RAM1 __RAM1_BASE (__RAM1_SIZE - __STACK_SIZE - __HEAP_SIZE) { ; RW data
  82. .ANY (+RW +ZI)
  83. }
  84. RW_RAM2 __RAM2_BASE __RAM2_SIZE { ; RW data
  85. .ANY (+RW +ZI)
  86. }
  87. #if __HEAP_SIZE > 0
  88. ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap
  89. }
  90. #endif
  91. ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack
  92. }
  93. }