da9062_reg.h 37 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (C) 2015-2017 Dialog Semiconductor
  4. */
  5. #ifndef __DA9062_H__
  6. #define __DA9062_H__
  7. #define DA9062_PMIC_DEVICE_ID 0x62
  8. #define DA9062_PMIC_VARIANT_MRC_AA 0x01
  9. #define DA9062_PMIC_VARIANT_VRC_DA9061 0x01
  10. #define DA9062_PMIC_VARIANT_VRC_DA9062 0x02
  11. #define DA9062_I2C_PAGE_SEL_SHIFT 1
  12. /*
  13. * Registers
  14. */
  15. #define DA9062AA_PAGE_CON 0x000
  16. #define DA9062AA_STATUS_A 0x001
  17. #define DA9062AA_STATUS_B 0x002
  18. #define DA9062AA_STATUS_D 0x004
  19. #define DA9062AA_FAULT_LOG 0x005
  20. #define DA9062AA_EVENT_A 0x006
  21. #define DA9062AA_EVENT_B 0x007
  22. #define DA9062AA_EVENT_C 0x008
  23. #define DA9062AA_IRQ_MASK_A 0x00A
  24. #define DA9062AA_IRQ_MASK_B 0x00B
  25. #define DA9062AA_IRQ_MASK_C 0x00C
  26. #define DA9062AA_CONTROL_A 0x00E
  27. #define DA9062AA_CONTROL_B 0x00F
  28. #define DA9062AA_CONTROL_C 0x010
  29. #define DA9062AA_CONTROL_D 0x011
  30. #define DA9062AA_CONTROL_E 0x012
  31. #define DA9062AA_CONTROL_F 0x013
  32. #define DA9062AA_PD_DIS 0x014
  33. #define DA9062AA_GPIO_0_1 0x015
  34. #define DA9062AA_GPIO_2_3 0x016
  35. #define DA9062AA_GPIO_4 0x017
  36. #define DA9062AA_GPIO_WKUP_MODE 0x01C
  37. #define DA9062AA_GPIO_MODE0_4 0x01D
  38. #define DA9062AA_GPIO_OUT0_2 0x01E
  39. #define DA9062AA_GPIO_OUT3_4 0x01F
  40. #define DA9062AA_BUCK2_CONT 0x020
  41. #define DA9062AA_BUCK1_CONT 0x021
  42. #define DA9062AA_BUCK4_CONT 0x022
  43. #define DA9062AA_BUCK3_CONT 0x024
  44. #define DA9062AA_LDO1_CONT 0x026
  45. #define DA9062AA_LDO2_CONT 0x027
  46. #define DA9062AA_LDO3_CONT 0x028
  47. #define DA9062AA_LDO4_CONT 0x029
  48. #define DA9062AA_DVC_1 0x032
  49. #define DA9062AA_COUNT_S 0x040
  50. #define DA9062AA_COUNT_MI 0x041
  51. #define DA9062AA_COUNT_H 0x042
  52. #define DA9062AA_COUNT_D 0x043
  53. #define DA9062AA_COUNT_MO 0x044
  54. #define DA9062AA_COUNT_Y 0x045
  55. #define DA9062AA_ALARM_S 0x046
  56. #define DA9062AA_ALARM_MI 0x047
  57. #define DA9062AA_ALARM_H 0x048
  58. #define DA9062AA_ALARM_D 0x049
  59. #define DA9062AA_ALARM_MO 0x04A
  60. #define DA9062AA_ALARM_Y 0x04B
  61. #define DA9062AA_SECOND_A 0x04C
  62. #define DA9062AA_SECOND_B 0x04D
  63. #define DA9062AA_SECOND_C 0x04E
  64. #define DA9062AA_SECOND_D 0x04F
  65. #define DA9062AA_SEQ 0x081
  66. #define DA9062AA_SEQ_TIMER 0x082
  67. #define DA9062AA_ID_2_1 0x083
  68. #define DA9062AA_ID_4_3 0x084
  69. #define DA9062AA_ID_12_11 0x088
  70. #define DA9062AA_ID_14_13 0x089
  71. #define DA9062AA_ID_16_15 0x08A
  72. #define DA9062AA_ID_22_21 0x08D
  73. #define DA9062AA_ID_24_23 0x08E
  74. #define DA9062AA_ID_26_25 0x08F
  75. #define DA9062AA_ID_28_27 0x090
  76. #define DA9062AA_ID_30_29 0x091
  77. #define DA9062AA_ID_32_31 0x092
  78. #define DA9062AA_SEQ_A 0x095
  79. #define DA9062AA_SEQ_B 0x096
  80. #define DA9062AA_WAIT 0x097
  81. #define DA9062AA_EN_32K 0x098
  82. #define DA9062AA_RESET 0x099
  83. #define DA9062AA_BUCK_ILIM_A 0x09A
  84. #define DA9062AA_BUCK_ILIM_B 0x09B
  85. #define DA9062AA_BUCK_ILIM_C 0x09C
  86. #define DA9062AA_BUCK2_CFG 0x09D
  87. #define DA9062AA_BUCK1_CFG 0x09E
  88. #define DA9062AA_BUCK4_CFG 0x09F
  89. #define DA9062AA_BUCK3_CFG 0x0A0
  90. #define DA9062AA_VBUCK2_A 0x0A3
  91. #define DA9062AA_VBUCK1_A 0x0A4
  92. #define DA9062AA_VBUCK4_A 0x0A5
  93. #define DA9062AA_VBUCK3_A 0x0A7
  94. #define DA9062AA_VLDO1_A 0x0A9
  95. #define DA9062AA_VLDO2_A 0x0AA
  96. #define DA9062AA_VLDO3_A 0x0AB
  97. #define DA9062AA_VLDO4_A 0x0AC
  98. #define DA9062AA_VBUCK2_B 0x0B4
  99. #define DA9062AA_VBUCK1_B 0x0B5
  100. #define DA9062AA_VBUCK4_B 0x0B6
  101. #define DA9062AA_VBUCK3_B 0x0B8
  102. #define DA9062AA_VLDO1_B 0x0BA
  103. #define DA9062AA_VLDO2_B 0x0BB
  104. #define DA9062AA_VLDO3_B 0x0BC
  105. #define DA9062AA_VLDO4_B 0x0BD
  106. #define DA9062AA_BBAT_CONT 0x0C5
  107. #define DA9062AA_INTERFACE 0x105
  108. #define DA9062AA_CONFIG_A 0x106
  109. #define DA9062AA_CONFIG_B 0x107
  110. #define DA9062AA_CONFIG_C 0x108
  111. #define DA9062AA_CONFIG_D 0x109
  112. #define DA9062AA_CONFIG_E 0x10A
  113. #define DA9062AA_CONFIG_G 0x10C
  114. #define DA9062AA_CONFIG_H 0x10D
  115. #define DA9062AA_CONFIG_I 0x10E
  116. #define DA9062AA_CONFIG_J 0x10F
  117. #define DA9062AA_CONFIG_K 0x110
  118. #define DA9062AA_CONFIG_M 0x112
  119. #define DA9062AA_TRIM_CLDR 0x120
  120. #define DA9062AA_GP_ID_0 0x121
  121. #define DA9062AA_GP_ID_1 0x122
  122. #define DA9062AA_GP_ID_2 0x123
  123. #define DA9062AA_GP_ID_3 0x124
  124. #define DA9062AA_GP_ID_4 0x125
  125. #define DA9062AA_GP_ID_5 0x126
  126. #define DA9062AA_GP_ID_6 0x127
  127. #define DA9062AA_GP_ID_7 0x128
  128. #define DA9062AA_GP_ID_8 0x129
  129. #define DA9062AA_GP_ID_9 0x12A
  130. #define DA9062AA_GP_ID_10 0x12B
  131. #define DA9062AA_GP_ID_11 0x12C
  132. #define DA9062AA_GP_ID_12 0x12D
  133. #define DA9062AA_GP_ID_13 0x12E
  134. #define DA9062AA_GP_ID_14 0x12F
  135. #define DA9062AA_GP_ID_15 0x130
  136. #define DA9062AA_GP_ID_16 0x131
  137. #define DA9062AA_GP_ID_17 0x132
  138. #define DA9062AA_GP_ID_18 0x133
  139. #define DA9062AA_GP_ID_19 0x134
  140. #define DA9062AA_DEVICE_ID 0x181
  141. #define DA9062AA_VARIANT_ID 0x182
  142. #define DA9062AA_CUSTOMER_ID 0x183
  143. #define DA9062AA_CONFIG_ID 0x184
  144. /*
  145. * Bit fields
  146. */
  147. /* DA9062AA_PAGE_CON = 0x000 */
  148. #define DA9062AA_PAGE_SHIFT 0
  149. #define DA9062AA_PAGE_MASK 0x3f
  150. #define DA9062AA_WRITE_MODE_SHIFT 6
  151. #define DA9062AA_WRITE_MODE_MASK BIT(6)
  152. #define DA9062AA_REVERT_SHIFT 7
  153. #define DA9062AA_REVERT_MASK BIT(7)
  154. /* DA9062AA_STATUS_A = 0x001 */
  155. #define DA9062AA_NONKEY_SHIFT 0
  156. #define DA9062AA_NONKEY_MASK 0x01
  157. #define DA9062AA_DVC_BUSY_SHIFT 2
  158. #define DA9062AA_DVC_BUSY_MASK BIT(2)
  159. /* DA9062AA_STATUS_B = 0x002 */
  160. #define DA9062AA_GPI0_SHIFT 0
  161. #define DA9062AA_GPI0_MASK 0x01
  162. #define DA9062AA_GPI1_SHIFT 1
  163. #define DA9062AA_GPI1_MASK BIT(1)
  164. #define DA9062AA_GPI2_SHIFT 2
  165. #define DA9062AA_GPI2_MASK BIT(2)
  166. #define DA9062AA_GPI3_SHIFT 3
  167. #define DA9062AA_GPI3_MASK BIT(3)
  168. #define DA9062AA_GPI4_SHIFT 4
  169. #define DA9062AA_GPI4_MASK BIT(4)
  170. /* DA9062AA_STATUS_D = 0x004 */
  171. #define DA9062AA_LDO1_ILIM_SHIFT 0
  172. #define DA9062AA_LDO1_ILIM_MASK 0x01
  173. #define DA9062AA_LDO2_ILIM_SHIFT 1
  174. #define DA9062AA_LDO2_ILIM_MASK BIT(1)
  175. #define DA9062AA_LDO3_ILIM_SHIFT 2
  176. #define DA9062AA_LDO3_ILIM_MASK BIT(2)
  177. #define DA9062AA_LDO4_ILIM_SHIFT 3
  178. #define DA9062AA_LDO4_ILIM_MASK BIT(3)
  179. /* DA9062AA_FAULT_LOG = 0x005 */
  180. #define DA9062AA_TWD_ERROR_SHIFT 0
  181. #define DA9062AA_TWD_ERROR_MASK 0x01
  182. #define DA9062AA_POR_SHIFT 1
  183. #define DA9062AA_POR_MASK BIT(1)
  184. #define DA9062AA_VDD_FAULT_SHIFT 2
  185. #define DA9062AA_VDD_FAULT_MASK BIT(2)
  186. #define DA9062AA_VDD_START_SHIFT 3
  187. #define DA9062AA_VDD_START_MASK BIT(3)
  188. #define DA9062AA_TEMP_CRIT_SHIFT 4
  189. #define DA9062AA_TEMP_CRIT_MASK BIT(4)
  190. #define DA9062AA_KEY_RESET_SHIFT 5
  191. #define DA9062AA_KEY_RESET_MASK BIT(5)
  192. #define DA9062AA_NSHUTDOWN_SHIFT 6
  193. #define DA9062AA_NSHUTDOWN_MASK BIT(6)
  194. #define DA9062AA_WAIT_SHUT_SHIFT 7
  195. #define DA9062AA_WAIT_SHUT_MASK BIT(7)
  196. /* DA9062AA_EVENT_A = 0x006 */
  197. #define DA9062AA_E_NONKEY_SHIFT 0
  198. #define DA9062AA_E_NONKEY_MASK 0x01
  199. #define DA9062AA_E_ALARM_SHIFT 1
  200. #define DA9062AA_E_ALARM_MASK BIT(1)
  201. #define DA9062AA_E_TICK_SHIFT 2
  202. #define DA9062AA_E_TICK_MASK BIT(2)
  203. #define DA9062AA_E_WDG_WARN_SHIFT 3
  204. #define DA9062AA_E_WDG_WARN_MASK BIT(3)
  205. #define DA9062AA_E_SEQ_RDY_SHIFT 4
  206. #define DA9062AA_E_SEQ_RDY_MASK BIT(4)
  207. #define DA9062AA_EVENTS_B_SHIFT 5
  208. #define DA9062AA_EVENTS_B_MASK BIT(5)
  209. #define DA9062AA_EVENTS_C_SHIFT 6
  210. #define DA9062AA_EVENTS_C_MASK BIT(6)
  211. /* DA9062AA_EVENT_B = 0x007 */
  212. #define DA9062AA_E_TEMP_SHIFT 1
  213. #define DA9062AA_E_TEMP_MASK BIT(1)
  214. #define DA9062AA_E_LDO_LIM_SHIFT 3
  215. #define DA9062AA_E_LDO_LIM_MASK BIT(3)
  216. #define DA9062AA_E_DVC_RDY_SHIFT 5
  217. #define DA9062AA_E_DVC_RDY_MASK BIT(5)
  218. #define DA9062AA_E_VDD_WARN_SHIFT 7
  219. #define DA9062AA_E_VDD_WARN_MASK BIT(7)
  220. /* DA9062AA_EVENT_C = 0x008 */
  221. #define DA9062AA_E_GPI0_SHIFT 0
  222. #define DA9062AA_E_GPI0_MASK 0x01
  223. #define DA9062AA_E_GPI1_SHIFT 1
  224. #define DA9062AA_E_GPI1_MASK BIT(1)
  225. #define DA9062AA_E_GPI2_SHIFT 2
  226. #define DA9062AA_E_GPI2_MASK BIT(2)
  227. #define DA9062AA_E_GPI3_SHIFT 3
  228. #define DA9062AA_E_GPI3_MASK BIT(3)
  229. #define DA9062AA_E_GPI4_SHIFT 4
  230. #define DA9062AA_E_GPI4_MASK BIT(4)
  231. /* DA9062AA_IRQ_MASK_A = 0x00A */
  232. #define DA9062AA_M_NONKEY_SHIFT 0
  233. #define DA9062AA_M_NONKEY_MASK 0x01
  234. #define DA9062AA_M_ALARM_SHIFT 1
  235. #define DA9062AA_M_ALARM_MASK BIT(1)
  236. #define DA9062AA_M_TICK_SHIFT 2
  237. #define DA9062AA_M_TICK_MASK BIT(2)
  238. #define DA9062AA_M_WDG_WARN_SHIFT 3
  239. #define DA9062AA_M_WDG_WARN_MASK BIT(3)
  240. #define DA9062AA_M_SEQ_RDY_SHIFT 4
  241. #define DA9062AA_M_SEQ_RDY_MASK BIT(4)
  242. /* DA9062AA_IRQ_MASK_B = 0x00B */
  243. #define DA9062AA_M_TEMP_SHIFT 1
  244. #define DA9062AA_M_TEMP_MASK BIT(1)
  245. #define DA9062AA_M_LDO_LIM_SHIFT 3
  246. #define DA9062AA_M_LDO_LIM_MASK BIT(3)
  247. #define DA9062AA_M_DVC_RDY_SHIFT 5
  248. #define DA9062AA_M_DVC_RDY_MASK BIT(5)
  249. #define DA9062AA_M_VDD_WARN_SHIFT 7
  250. #define DA9062AA_M_VDD_WARN_MASK BIT(7)
  251. /* DA9062AA_IRQ_MASK_C = 0x00C */
  252. #define DA9062AA_M_GPI0_SHIFT 0
  253. #define DA9062AA_M_GPI0_MASK 0x01
  254. #define DA9062AA_M_GPI1_SHIFT 1
  255. #define DA9062AA_M_GPI1_MASK BIT(1)
  256. #define DA9062AA_M_GPI2_SHIFT 2
  257. #define DA9062AA_M_GPI2_MASK BIT(2)
  258. #define DA9062AA_M_GPI3_SHIFT 3
  259. #define DA9062AA_M_GPI3_MASK BIT(3)
  260. #define DA9062AA_M_GPI4_SHIFT 4
  261. #define DA9062AA_M_GPI4_MASK BIT(4)
  262. /* DA9062AA_CONTROL_A = 0x00E */
  263. #define DA9062AA_SYSTEM_EN_SHIFT 0
  264. #define DA9062AA_SYSTEM_EN_MASK 0x01
  265. #define DA9062AA_POWER_EN_SHIFT 1
  266. #define DA9062AA_POWER_EN_MASK BIT(1)
  267. #define DA9062AA_POWER1_EN_SHIFT 2
  268. #define DA9062AA_POWER1_EN_MASK BIT(2)
  269. #define DA9062AA_STANDBY_SHIFT 3
  270. #define DA9062AA_STANDBY_MASK BIT(3)
  271. #define DA9062AA_M_SYSTEM_EN_SHIFT 4
  272. #define DA9062AA_M_SYSTEM_EN_MASK BIT(4)
  273. #define DA9062AA_M_POWER_EN_SHIFT 5
  274. #define DA9062AA_M_POWER_EN_MASK BIT(5)
  275. #define DA9062AA_M_POWER1_EN_SHIFT 6
  276. #define DA9062AA_M_POWER1_EN_MASK BIT(6)
  277. /* DA9062AA_CONTROL_B = 0x00F */
  278. #define DA9062AA_WATCHDOG_PD_SHIFT 1
  279. #define DA9062AA_WATCHDOG_PD_MASK BIT(1)
  280. #define DA9062AA_FREEZE_EN_SHIFT 2
  281. #define DA9062AA_FREEZE_EN_MASK BIT(2)
  282. #define DA9062AA_NRES_MODE_SHIFT 3
  283. #define DA9062AA_NRES_MODE_MASK BIT(3)
  284. #define DA9062AA_NONKEY_LOCK_SHIFT 4
  285. #define DA9062AA_NONKEY_LOCK_MASK BIT(4)
  286. #define DA9062AA_NFREEZE_SHIFT 5
  287. #define DA9062AA_NFREEZE_MASK (0x03 << 5)
  288. #define DA9062AA_BUCK_SLOWSTART_SHIFT 7
  289. #define DA9062AA_BUCK_SLOWSTART_MASK BIT(7)
  290. /* DA9062AA_CONTROL_C = 0x010 */
  291. #define DA9062AA_DEBOUNCING_SHIFT 0
  292. #define DA9062AA_DEBOUNCING_MASK 0x07
  293. #define DA9062AA_AUTO_BOOT_SHIFT 3
  294. #define DA9062AA_AUTO_BOOT_MASK BIT(3)
  295. #define DA9062AA_OTPREAD_EN_SHIFT 4
  296. #define DA9062AA_OTPREAD_EN_MASK BIT(4)
  297. #define DA9062AA_SLEW_RATE_SHIFT 5
  298. #define DA9062AA_SLEW_RATE_MASK (0x03 << 5)
  299. #define DA9062AA_DEF_SUPPLY_SHIFT 7
  300. #define DA9062AA_DEF_SUPPLY_MASK BIT(7)
  301. /* DA9062AA_CONTROL_D = 0x011 */
  302. #define DA9062AA_TWDSCALE_SHIFT 0
  303. #define DA9062AA_TWDSCALE_MASK 0x07
  304. /* DA9062AA_CONTROL_E = 0x012 */
  305. #define DA9062AA_RTC_MODE_PD_SHIFT 0
  306. #define DA9062AA_RTC_MODE_PD_MASK 0x01
  307. #define DA9062AA_RTC_MODE_SD_SHIFT 1
  308. #define DA9062AA_RTC_MODE_SD_MASK BIT(1)
  309. #define DA9062AA_RTC_EN_SHIFT 2
  310. #define DA9062AA_RTC_EN_MASK BIT(2)
  311. #define DA9062AA_V_LOCK_SHIFT 7
  312. #define DA9062AA_V_LOCK_MASK BIT(7)
  313. /* DA9062AA_CONTROL_F = 0x013 */
  314. #define DA9062AA_WATCHDOG_SHIFT 0
  315. #define DA9062AA_WATCHDOG_MASK 0x01
  316. #define DA9062AA_SHUTDOWN_SHIFT 1
  317. #define DA9062AA_SHUTDOWN_MASK BIT(1)
  318. #define DA9062AA_WAKE_UP_SHIFT 2
  319. #define DA9062AA_WAKE_UP_MASK BIT(2)
  320. /* DA9062AA_PD_DIS = 0x014 */
  321. #define DA9062AA_GPI_DIS_SHIFT 0
  322. #define DA9062AA_GPI_DIS_MASK 0x01
  323. #define DA9062AA_PMIF_DIS_SHIFT 2
  324. #define DA9062AA_PMIF_DIS_MASK BIT(2)
  325. #define DA9062AA_CLDR_PAUSE_SHIFT 4
  326. #define DA9062AA_CLDR_PAUSE_MASK BIT(4)
  327. #define DA9062AA_BBAT_DIS_SHIFT 5
  328. #define DA9062AA_BBAT_DIS_MASK BIT(5)
  329. #define DA9062AA_OUT32K_PAUSE_SHIFT 6
  330. #define DA9062AA_OUT32K_PAUSE_MASK BIT(6)
  331. #define DA9062AA_PMCONT_DIS_SHIFT 7
  332. #define DA9062AA_PMCONT_DIS_MASK BIT(7)
  333. /* DA9062AA_GPIO_0_1 = 0x015 */
  334. #define DA9062AA_GPIO0_PIN_SHIFT 0
  335. #define DA9062AA_GPIO0_PIN_MASK 0x03
  336. #define DA9062AA_GPIO0_TYPE_SHIFT 2
  337. #define DA9062AA_GPIO0_TYPE_MASK BIT(2)
  338. #define DA9062AA_GPIO0_WEN_SHIFT 3
  339. #define DA9062AA_GPIO0_WEN_MASK BIT(3)
  340. #define DA9062AA_GPIO1_PIN_SHIFT 4
  341. #define DA9062AA_GPIO1_PIN_MASK (0x03 << 4)
  342. #define DA9062AA_GPIO1_TYPE_SHIFT 6
  343. #define DA9062AA_GPIO1_TYPE_MASK BIT(6)
  344. #define DA9062AA_GPIO1_WEN_SHIFT 7
  345. #define DA9062AA_GPIO1_WEN_MASK BIT(7)
  346. /* DA9062AA_GPIO_2_3 = 0x016 */
  347. #define DA9062AA_GPIO2_PIN_SHIFT 0
  348. #define DA9062AA_GPIO2_PIN_MASK 0x03
  349. #define DA9062AA_GPIO2_TYPE_SHIFT 2
  350. #define DA9062AA_GPIO2_TYPE_MASK BIT(2)
  351. #define DA9062AA_GPIO2_WEN_SHIFT 3
  352. #define DA9062AA_GPIO2_WEN_MASK BIT(3)
  353. #define DA9062AA_GPIO3_PIN_SHIFT 4
  354. #define DA9062AA_GPIO3_PIN_MASK (0x03 << 4)
  355. #define DA9062AA_GPIO3_TYPE_SHIFT 6
  356. #define DA9062AA_GPIO3_TYPE_MASK BIT(6)
  357. #define DA9062AA_GPIO3_WEN_SHIFT 7
  358. #define DA9062AA_GPIO3_WEN_MASK BIT(7)
  359. /* DA9062AA_GPIO_4 = 0x017 */
  360. #define DA9062AA_GPIO4_PIN_SHIFT 0
  361. #define DA9062AA_GPIO4_PIN_MASK 0x03
  362. #define DA9062AA_GPIO4_TYPE_SHIFT 2
  363. #define DA9062AA_GPIO4_TYPE_MASK BIT(2)
  364. #define DA9062AA_GPIO4_WEN_SHIFT 3
  365. #define DA9062AA_GPIO4_WEN_MASK BIT(3)
  366. /* DA9062AA_GPIO_WKUP_MODE = 0x01C */
  367. #define DA9062AA_GPIO0_WKUP_MODE_SHIFT 0
  368. #define DA9062AA_GPIO0_WKUP_MODE_MASK 0x01
  369. #define DA9062AA_GPIO1_WKUP_MODE_SHIFT 1
  370. #define DA9062AA_GPIO1_WKUP_MODE_MASK BIT(1)
  371. #define DA9062AA_GPIO2_WKUP_MODE_SHIFT 2
  372. #define DA9062AA_GPIO2_WKUP_MODE_MASK BIT(2)
  373. #define DA9062AA_GPIO3_WKUP_MODE_SHIFT 3
  374. #define DA9062AA_GPIO3_WKUP_MODE_MASK BIT(3)
  375. #define DA9062AA_GPIO4_WKUP_MODE_SHIFT 4
  376. #define DA9062AA_GPIO4_WKUP_MODE_MASK BIT(4)
  377. /* DA9062AA_GPIO_MODE0_4 = 0x01D */
  378. #define DA9062AA_GPIO0_MODE_SHIFT 0
  379. #define DA9062AA_GPIO0_MODE_MASK 0x01
  380. #define DA9062AA_GPIO1_MODE_SHIFT 1
  381. #define DA9062AA_GPIO1_MODE_MASK BIT(1)
  382. #define DA9062AA_GPIO2_MODE_SHIFT 2
  383. #define DA9062AA_GPIO2_MODE_MASK BIT(2)
  384. #define DA9062AA_GPIO3_MODE_SHIFT 3
  385. #define DA9062AA_GPIO3_MODE_MASK BIT(3)
  386. #define DA9062AA_GPIO4_MODE_SHIFT 4
  387. #define DA9062AA_GPIO4_MODE_MASK BIT(4)
  388. /* DA9062AA_GPIO_OUT0_2 = 0x01E */
  389. #define DA9062AA_GPIO0_OUT_SHIFT 0
  390. #define DA9062AA_GPIO0_OUT_MASK 0x07
  391. #define DA9062AA_GPIO1_OUT_SHIFT 3
  392. #define DA9062AA_GPIO1_OUT_MASK (0x07 << 3)
  393. #define DA9062AA_GPIO2_OUT_SHIFT 6
  394. #define DA9062AA_GPIO2_OUT_MASK (0x03 << 6)
  395. /* DA9062AA_GPIO_OUT3_4 = 0x01F */
  396. #define DA9062AA_GPIO3_OUT_SHIFT 0
  397. #define DA9062AA_GPIO3_OUT_MASK 0x07
  398. #define DA9062AA_GPIO4_OUT_SHIFT 3
  399. #define DA9062AA_GPIO4_OUT_MASK (0x03 << 3)
  400. /* DA9062AA_BUCK2_CONT = 0x020 */
  401. #define DA9062AA_BUCK2_EN_SHIFT 0
  402. #define DA9062AA_BUCK2_EN_MASK 0x01
  403. #define DA9062AA_BUCK2_GPI_SHIFT 1
  404. #define DA9062AA_BUCK2_GPI_MASK (0x03 << 1)
  405. #define DA9062AA_BUCK2_CONF_SHIFT 3
  406. #define DA9062AA_BUCK2_CONF_MASK BIT(3)
  407. #define DA9062AA_VBUCK2_GPI_SHIFT 5
  408. #define DA9062AA_VBUCK2_GPI_MASK (0x03 << 5)
  409. /* DA9062AA_BUCK1_CONT = 0x021 */
  410. #define DA9062AA_BUCK1_EN_SHIFT 0
  411. #define DA9062AA_BUCK1_EN_MASK 0x01
  412. #define DA9062AA_BUCK1_GPI_SHIFT 1
  413. #define DA9062AA_BUCK1_GPI_MASK (0x03 << 1)
  414. #define DA9062AA_BUCK1_CONF_SHIFT 3
  415. #define DA9062AA_BUCK1_CONF_MASK BIT(3)
  416. #define DA9062AA_VBUCK1_GPI_SHIFT 5
  417. #define DA9062AA_VBUCK1_GPI_MASK (0x03 << 5)
  418. /* DA9062AA_BUCK4_CONT = 0x022 */
  419. #define DA9062AA_BUCK4_EN_SHIFT 0
  420. #define DA9062AA_BUCK4_EN_MASK 0x01
  421. #define DA9062AA_BUCK4_GPI_SHIFT 1
  422. #define DA9062AA_BUCK4_GPI_MASK (0x03 << 1)
  423. #define DA9062AA_BUCK4_CONF_SHIFT 3
  424. #define DA9062AA_BUCK4_CONF_MASK BIT(3)
  425. #define DA9062AA_VBUCK4_GPI_SHIFT 5
  426. #define DA9062AA_VBUCK4_GPI_MASK (0x03 << 5)
  427. /* DA9062AA_BUCK3_CONT = 0x024 */
  428. #define DA9062AA_BUCK3_EN_SHIFT 0
  429. #define DA9062AA_BUCK3_EN_MASK 0x01
  430. #define DA9062AA_BUCK3_GPI_SHIFT 1
  431. #define DA9062AA_BUCK3_GPI_MASK (0x03 << 1)
  432. #define DA9062AA_BUCK3_CONF_SHIFT 3
  433. #define DA9062AA_BUCK3_CONF_MASK BIT(3)
  434. #define DA9062AA_VBUCK3_GPI_SHIFT 5
  435. #define DA9062AA_VBUCK3_GPI_MASK (0x03 << 5)
  436. /* DA9062AA_LDO1_CONT = 0x026 */
  437. #define DA9062AA_LDO1_EN_SHIFT 0
  438. #define DA9062AA_LDO1_EN_MASK 0x01
  439. #define DA9062AA_LDO1_GPI_SHIFT 1
  440. #define DA9062AA_LDO1_GPI_MASK (0x03 << 1)
  441. #define DA9062AA_LDO1_PD_DIS_SHIFT 3
  442. #define DA9062AA_LDO1_PD_DIS_MASK BIT(3)
  443. #define DA9062AA_VLDO1_GPI_SHIFT 5
  444. #define DA9062AA_VLDO1_GPI_MASK (0x03 << 5)
  445. #define DA9062AA_LDO1_CONF_SHIFT 7
  446. #define DA9062AA_LDO1_CONF_MASK BIT(7)
  447. /* DA9062AA_LDO2_CONT = 0x027 */
  448. #define DA9062AA_LDO2_EN_SHIFT 0
  449. #define DA9062AA_LDO2_EN_MASK 0x01
  450. #define DA9062AA_LDO2_GPI_SHIFT 1
  451. #define DA9062AA_LDO2_GPI_MASK (0x03 << 1)
  452. #define DA9062AA_LDO2_PD_DIS_SHIFT 3
  453. #define DA9062AA_LDO2_PD_DIS_MASK BIT(3)
  454. #define DA9062AA_VLDO2_GPI_SHIFT 5
  455. #define DA9062AA_VLDO2_GPI_MASK (0x03 << 5)
  456. #define DA9062AA_LDO2_CONF_SHIFT 7
  457. #define DA9062AA_LDO2_CONF_MASK BIT(7)
  458. /* DA9062AA_LDO3_CONT = 0x028 */
  459. #define DA9062AA_LDO3_EN_SHIFT 0
  460. #define DA9062AA_LDO3_EN_MASK 0x01
  461. #define DA9062AA_LDO3_GPI_SHIFT 1
  462. #define DA9062AA_LDO3_GPI_MASK (0x03 << 1)
  463. #define DA9062AA_LDO3_PD_DIS_SHIFT 3
  464. #define DA9062AA_LDO3_PD_DIS_MASK BIT(3)
  465. #define DA9062AA_VLDO3_GPI_SHIFT 5
  466. #define DA9062AA_VLDO3_GPI_MASK (0x03 << 5)
  467. #define DA9062AA_LDO3_CONF_SHIFT 7
  468. #define DA9062AA_LDO3_CONF_MASK BIT(7)
  469. /* DA9062AA_LDO4_CONT = 0x029 */
  470. #define DA9062AA_LDO4_EN_SHIFT 0
  471. #define DA9062AA_LDO4_EN_MASK 0x01
  472. #define DA9062AA_LDO4_GPI_SHIFT 1
  473. #define DA9062AA_LDO4_GPI_MASK (0x03 << 1)
  474. #define DA9062AA_LDO4_PD_DIS_SHIFT 3
  475. #define DA9062AA_LDO4_PD_DIS_MASK BIT(3)
  476. #define DA9062AA_VLDO4_GPI_SHIFT 5
  477. #define DA9062AA_VLDO4_GPI_MASK (0x03 << 5)
  478. #define DA9062AA_LDO4_CONF_SHIFT 7
  479. #define DA9062AA_LDO4_CONF_MASK BIT(7)
  480. /* DA9062AA_DVC_1 = 0x032 */
  481. #define DA9062AA_VBUCK1_SEL_SHIFT 0
  482. #define DA9062AA_VBUCK1_SEL_MASK 0x01
  483. #define DA9062AA_VBUCK2_SEL_SHIFT 1
  484. #define DA9062AA_VBUCK2_SEL_MASK BIT(1)
  485. #define DA9062AA_VBUCK4_SEL_SHIFT 2
  486. #define DA9062AA_VBUCK4_SEL_MASK BIT(2)
  487. #define DA9062AA_VBUCK3_SEL_SHIFT 3
  488. #define DA9062AA_VBUCK3_SEL_MASK BIT(3)
  489. #define DA9062AA_VLDO1_SEL_SHIFT 4
  490. #define DA9062AA_VLDO1_SEL_MASK BIT(4)
  491. #define DA9062AA_VLDO2_SEL_SHIFT 5
  492. #define DA9062AA_VLDO2_SEL_MASK BIT(5)
  493. #define DA9062AA_VLDO3_SEL_SHIFT 6
  494. #define DA9062AA_VLDO3_SEL_MASK BIT(6)
  495. #define DA9062AA_VLDO4_SEL_SHIFT 7
  496. #define DA9062AA_VLDO4_SEL_MASK BIT(7)
  497. /* DA9062AA_COUNT_S = 0x040 */
  498. #define DA9062AA_COUNT_SEC_SHIFT 0
  499. #define DA9062AA_COUNT_SEC_MASK 0x3f
  500. #define DA9062AA_RTC_READ_SHIFT 7
  501. #define DA9062AA_RTC_READ_MASK BIT(7)
  502. /* DA9062AA_COUNT_MI = 0x041 */
  503. #define DA9062AA_COUNT_MIN_SHIFT 0
  504. #define DA9062AA_COUNT_MIN_MASK 0x3f
  505. /* DA9062AA_COUNT_H = 0x042 */
  506. #define DA9062AA_COUNT_HOUR_SHIFT 0
  507. #define DA9062AA_COUNT_HOUR_MASK 0x1f
  508. /* DA9062AA_COUNT_D = 0x043 */
  509. #define DA9062AA_COUNT_DAY_SHIFT 0
  510. #define DA9062AA_COUNT_DAY_MASK 0x1f
  511. /* DA9062AA_COUNT_MO = 0x044 */
  512. #define DA9062AA_COUNT_MONTH_SHIFT 0
  513. #define DA9062AA_COUNT_MONTH_MASK 0x0f
  514. /* DA9062AA_COUNT_Y = 0x045 */
  515. #define DA9062AA_COUNT_YEAR_SHIFT 0
  516. #define DA9062AA_COUNT_YEAR_MASK 0x3f
  517. #define DA9062AA_MONITOR_SHIFT 6
  518. #define DA9062AA_MONITOR_MASK BIT(6)
  519. /* DA9062AA_ALARM_S = 0x046 */
  520. #define DA9062AA_ALARM_SEC_SHIFT 0
  521. #define DA9062AA_ALARM_SEC_MASK 0x3f
  522. #define DA9062AA_ALARM_STATUS_SHIFT 6
  523. #define DA9062AA_ALARM_STATUS_MASK (0x03 << 6)
  524. /* DA9062AA_ALARM_MI = 0x047 */
  525. #define DA9062AA_ALARM_MIN_SHIFT 0
  526. #define DA9062AA_ALARM_MIN_MASK 0x3f
  527. /* DA9062AA_ALARM_H = 0x048 */
  528. #define DA9062AA_ALARM_HOUR_SHIFT 0
  529. #define DA9062AA_ALARM_HOUR_MASK 0x1f
  530. /* DA9062AA_ALARM_D = 0x049 */
  531. #define DA9062AA_ALARM_DAY_SHIFT 0
  532. #define DA9062AA_ALARM_DAY_MASK 0x1f
  533. /* DA9062AA_ALARM_MO = 0x04A */
  534. #define DA9062AA_ALARM_MONTH_SHIFT 0
  535. #define DA9062AA_ALARM_MONTH_MASK 0x0f
  536. #define DA9062AA_TICK_TYPE_SHIFT 4
  537. #define DA9062AA_TICK_TYPE_MASK BIT(4)
  538. #define DA9062AA_TICK_WAKE_SHIFT 5
  539. #define DA9062AA_TICK_WAKE_MASK BIT(5)
  540. /* DA9062AA_ALARM_Y = 0x04B */
  541. #define DA9062AA_ALARM_YEAR_SHIFT 0
  542. #define DA9062AA_ALARM_YEAR_MASK 0x3f
  543. #define DA9062AA_ALARM_ON_SHIFT 6
  544. #define DA9062AA_ALARM_ON_MASK BIT(6)
  545. #define DA9062AA_TICK_ON_SHIFT 7
  546. #define DA9062AA_TICK_ON_MASK BIT(7)
  547. /* DA9062AA_SECOND_A = 0x04C */
  548. #define DA9062AA_SECONDS_A_SHIFT 0
  549. #define DA9062AA_SECONDS_A_MASK 0xff
  550. /* DA9062AA_SECOND_B = 0x04D */
  551. #define DA9062AA_SECONDS_B_SHIFT 0
  552. #define DA9062AA_SECONDS_B_MASK 0xff
  553. /* DA9062AA_SECOND_C = 0x04E */
  554. #define DA9062AA_SECONDS_C_SHIFT 0
  555. #define DA9062AA_SECONDS_C_MASK 0xff
  556. /* DA9062AA_SECOND_D = 0x04F */
  557. #define DA9062AA_SECONDS_D_SHIFT 0
  558. #define DA9062AA_SECONDS_D_MASK 0xff
  559. /* DA9062AA_SEQ = 0x081 */
  560. #define DA9062AA_SEQ_POINTER_SHIFT 0
  561. #define DA9062AA_SEQ_POINTER_MASK 0x0f
  562. #define DA9062AA_NXT_SEQ_START_SHIFT 4
  563. #define DA9062AA_NXT_SEQ_START_MASK (0x0f << 4)
  564. /* DA9062AA_SEQ_TIMER = 0x082 */
  565. #define DA9062AA_SEQ_TIME_SHIFT 0
  566. #define DA9062AA_SEQ_TIME_MASK 0x0f
  567. #define DA9062AA_SEQ_DUMMY_SHIFT 4
  568. #define DA9062AA_SEQ_DUMMY_MASK (0x0f << 4)
  569. /* DA9062AA_ID_2_1 = 0x083 */
  570. #define DA9062AA_LDO1_STEP_SHIFT 0
  571. #define DA9062AA_LDO1_STEP_MASK 0x0f
  572. #define DA9062AA_LDO2_STEP_SHIFT 4
  573. #define DA9062AA_LDO2_STEP_MASK (0x0f << 4)
  574. /* DA9062AA_ID_4_3 = 0x084 */
  575. #define DA9062AA_LDO3_STEP_SHIFT 0
  576. #define DA9062AA_LDO3_STEP_MASK 0x0f
  577. #define DA9062AA_LDO4_STEP_SHIFT 4
  578. #define DA9062AA_LDO4_STEP_MASK (0x0f << 4)
  579. /* DA9062AA_ID_12_11 = 0x088 */
  580. #define DA9062AA_PD_DIS_STEP_SHIFT 4
  581. #define DA9062AA_PD_DIS_STEP_MASK (0x0f << 4)
  582. /* DA9062AA_ID_14_13 = 0x089 */
  583. #define DA9062AA_BUCK1_STEP_SHIFT 0
  584. #define DA9062AA_BUCK1_STEP_MASK 0x0f
  585. #define DA9062AA_BUCK2_STEP_SHIFT 4
  586. #define DA9062AA_BUCK2_STEP_MASK (0x0f << 4)
  587. /* DA9062AA_ID_16_15 = 0x08A */
  588. #define DA9062AA_BUCK4_STEP_SHIFT 0
  589. #define DA9062AA_BUCK4_STEP_MASK 0x0f
  590. #define DA9062AA_BUCK3_STEP_SHIFT 4
  591. #define DA9062AA_BUCK3_STEP_MASK (0x0f << 4)
  592. /* DA9062AA_ID_22_21 = 0x08D */
  593. #define DA9062AA_GP_RISE1_STEP_SHIFT 0
  594. #define DA9062AA_GP_RISE1_STEP_MASK 0x0f
  595. #define DA9062AA_GP_FALL1_STEP_SHIFT 4
  596. #define DA9062AA_GP_FALL1_STEP_MASK (0x0f << 4)
  597. /* DA9062AA_ID_24_23 = 0x08E */
  598. #define DA9062AA_GP_RISE2_STEP_SHIFT 0
  599. #define DA9062AA_GP_RISE2_STEP_MASK 0x0f
  600. #define DA9062AA_GP_FALL2_STEP_SHIFT 4
  601. #define DA9062AA_GP_FALL2_STEP_MASK (0x0f << 4)
  602. /* DA9062AA_ID_26_25 = 0x08F */
  603. #define DA9062AA_GP_RISE3_STEP_SHIFT 0
  604. #define DA9062AA_GP_RISE3_STEP_MASK 0x0f
  605. #define DA9062AA_GP_FALL3_STEP_SHIFT 4
  606. #define DA9062AA_GP_FALL3_STEP_MASK (0x0f << 4)
  607. /* DA9062AA_ID_28_27 = 0x090 */
  608. #define DA9062AA_GP_RISE4_STEP_SHIFT 0
  609. #define DA9062AA_GP_RISE4_STEP_MASK 0x0f
  610. #define DA9062AA_GP_FALL4_STEP_SHIFT 4
  611. #define DA9062AA_GP_FALL4_STEP_MASK (0x0f << 4)
  612. /* DA9062AA_ID_30_29 = 0x091 */
  613. #define DA9062AA_GP_RISE5_STEP_SHIFT 0
  614. #define DA9062AA_GP_RISE5_STEP_MASK 0x0f
  615. #define DA9062AA_GP_FALL5_STEP_SHIFT 4
  616. #define DA9062AA_GP_FALL5_STEP_MASK (0x0f << 4)
  617. /* DA9062AA_ID_32_31 = 0x092 */
  618. #define DA9062AA_WAIT_STEP_SHIFT 0
  619. #define DA9062AA_WAIT_STEP_MASK 0x0f
  620. #define DA9062AA_EN32K_STEP_SHIFT 4
  621. #define DA9062AA_EN32K_STEP_MASK (0x0f << 4)
  622. /* DA9062AA_SEQ_A = 0x095 */
  623. #define DA9062AA_SYSTEM_END_SHIFT 0
  624. #define DA9062AA_SYSTEM_END_MASK 0x0f
  625. #define DA9062AA_POWER_END_SHIFT 4
  626. #define DA9062AA_POWER_END_MASK (0x0f << 4)
  627. /* DA9062AA_SEQ_B = 0x096 */
  628. #define DA9062AA_MAX_COUNT_SHIFT 0
  629. #define DA9062AA_MAX_COUNT_MASK 0x0f
  630. #define DA9062AA_PART_DOWN_SHIFT 4
  631. #define DA9062AA_PART_DOWN_MASK (0x0f << 4)
  632. /* DA9062AA_WAIT = 0x097 */
  633. #define DA9062AA_WAIT_TIME_SHIFT 0
  634. #define DA9062AA_WAIT_TIME_MASK 0x0f
  635. #define DA9062AA_WAIT_MODE_SHIFT 4
  636. #define DA9062AA_WAIT_MODE_MASK BIT(4)
  637. #define DA9062AA_TIME_OUT_SHIFT 5
  638. #define DA9062AA_TIME_OUT_MASK BIT(5)
  639. #define DA9062AA_WAIT_DIR_SHIFT 6
  640. #define DA9062AA_WAIT_DIR_MASK (0x03 << 6)
  641. /* DA9062AA_EN_32K = 0x098 */
  642. #define DA9062AA_STABILISATION_TIME_SHIFT 0
  643. #define DA9062AA_STABILISATION_TIME_MASK 0x07
  644. #define DA9062AA_CRYSTAL_SHIFT 3
  645. #define DA9062AA_CRYSTAL_MASK BIT(3)
  646. #define DA9062AA_DELAY_MODE_SHIFT 4
  647. #define DA9062AA_DELAY_MODE_MASK BIT(4)
  648. #define DA9062AA_OUT_CLOCK_SHIFT 5
  649. #define DA9062AA_OUT_CLOCK_MASK BIT(5)
  650. #define DA9062AA_RTC_CLOCK_SHIFT 6
  651. #define DA9062AA_RTC_CLOCK_MASK BIT(6)
  652. #define DA9062AA_EN_32KOUT_SHIFT 7
  653. #define DA9062AA_EN_32KOUT_MASK BIT(7)
  654. /* DA9062AA_RESET = 0x099 */
  655. #define DA9062AA_RESET_TIMER_SHIFT 0
  656. #define DA9062AA_RESET_TIMER_MASK 0x3f
  657. #define DA9062AA_RESET_EVENT_SHIFT 6
  658. #define DA9062AA_RESET_EVENT_MASK (0x03 << 6)
  659. /* DA9062AA_BUCK_ILIM_A = 0x09A */
  660. #define DA9062AA_BUCK3_ILIM_SHIFT 0
  661. #define DA9062AA_BUCK3_ILIM_MASK 0x0f
  662. /* DA9062AA_BUCK_ILIM_B = 0x09B */
  663. #define DA9062AA_BUCK4_ILIM_SHIFT 0
  664. #define DA9062AA_BUCK4_ILIM_MASK 0x0f
  665. /* DA9062AA_BUCK_ILIM_C = 0x09C */
  666. #define DA9062AA_BUCK1_ILIM_SHIFT 0
  667. #define DA9062AA_BUCK1_ILIM_MASK 0x0f
  668. #define DA9062AA_BUCK2_ILIM_SHIFT 4
  669. #define DA9062AA_BUCK2_ILIM_MASK (0x0f << 4)
  670. /* DA9062AA_BUCK2_CFG = 0x09D */
  671. #define DA9062AA_BUCK2_PD_DIS_SHIFT 5
  672. #define DA9062AA_BUCK2_PD_DIS_MASK BIT(5)
  673. #define DA9062AA_BUCK2_MODE_SHIFT 6
  674. #define DA9062AA_BUCK2_MODE_MASK (0x03 << 6)
  675. /* DA9062AA_BUCK1_CFG = 0x09E */
  676. #define DA9062AA_BUCK1_PD_DIS_SHIFT 5
  677. #define DA9062AA_BUCK1_PD_DIS_MASK BIT(5)
  678. #define DA9062AA_BUCK1_MODE_SHIFT 6
  679. #define DA9062AA_BUCK1_MODE_MASK (0x03 << 6)
  680. /* DA9062AA_BUCK4_CFG = 0x09F */
  681. #define DA9062AA_BUCK4_VTTR_EN_SHIFT 3
  682. #define DA9062AA_BUCK4_VTTR_EN_MASK BIT(3)
  683. #define DA9062AA_BUCK4_VTT_EN_SHIFT 4
  684. #define DA9062AA_BUCK4_VTT_EN_MASK BIT(4)
  685. #define DA9062AA_BUCK4_PD_DIS_SHIFT 5
  686. #define DA9062AA_BUCK4_PD_DIS_MASK BIT(5)
  687. #define DA9062AA_BUCK4_MODE_SHIFT 6
  688. #define DA9062AA_BUCK4_MODE_MASK (0x03 << 6)
  689. /* DA9062AA_BUCK3_CFG = 0x0A0 */
  690. #define DA9062AA_BUCK3_PD_DIS_SHIFT 5
  691. #define DA9062AA_BUCK3_PD_DIS_MASK BIT(5)
  692. #define DA9062AA_BUCK3_MODE_SHIFT 6
  693. #define DA9062AA_BUCK3_MODE_MASK (0x03 << 6)
  694. /* DA9062AA_VBUCK2_A = 0x0A3 */
  695. #define DA9062AA_VBUCK2_A_SHIFT 0
  696. #define DA9062AA_VBUCK2_A_MASK 0x7f
  697. #define DA9062AA_BUCK2_SL_A_SHIFT 7
  698. #define DA9062AA_BUCK2_SL_A_MASK BIT(7)
  699. /* DA9062AA_VBUCK1_A = 0x0A4 */
  700. #define DA9062AA_VBUCK1_A_SHIFT 0
  701. #define DA9062AA_VBUCK1_A_MASK 0x7f
  702. #define DA9062AA_BUCK1_SL_A_SHIFT 7
  703. #define DA9062AA_BUCK1_SL_A_MASK BIT(7)
  704. /* DA9062AA_VBUCK4_A = 0x0A5 */
  705. #define DA9062AA_VBUCK4_A_SHIFT 0
  706. #define DA9062AA_VBUCK4_A_MASK 0x7f
  707. #define DA9062AA_BUCK4_SL_A_SHIFT 7
  708. #define DA9062AA_BUCK4_SL_A_MASK BIT(7)
  709. /* DA9062AA_VBUCK3_A = 0x0A7 */
  710. #define DA9062AA_VBUCK3_A_SHIFT 0
  711. #define DA9062AA_VBUCK3_A_MASK 0x7f
  712. #define DA9062AA_BUCK3_SL_A_SHIFT 7
  713. #define DA9062AA_BUCK3_SL_A_MASK BIT(7)
  714. /* DA9062AA_VLDO[1-4]_A common */
  715. #define DA9062AA_VLDO_A_MIN_SEL 2
  716. /* DA9062AA_VLDO1_A = 0x0A9 */
  717. #define DA9062AA_VLDO1_A_SHIFT 0
  718. #define DA9062AA_VLDO1_A_MASK 0x3f
  719. #define DA9062AA_LDO1_SL_A_SHIFT 7
  720. #define DA9062AA_LDO1_SL_A_MASK BIT(7)
  721. /* DA9062AA_VLDO2_A = 0x0AA */
  722. #define DA9062AA_VLDO2_A_SHIFT 0
  723. #define DA9062AA_VLDO2_A_MASK 0x3f
  724. #define DA9062AA_LDO2_SL_A_SHIFT 7
  725. #define DA9062AA_LDO2_SL_A_MASK BIT(7)
  726. /* DA9062AA_VLDO3_A = 0x0AB */
  727. #define DA9062AA_VLDO3_A_SHIFT 0
  728. #define DA9062AA_VLDO3_A_MASK 0x3f
  729. #define DA9062AA_LDO3_SL_A_SHIFT 7
  730. #define DA9062AA_LDO3_SL_A_MASK BIT(7)
  731. /* DA9062AA_VLDO4_A = 0x0AC */
  732. #define DA9062AA_VLDO4_A_SHIFT 0
  733. #define DA9062AA_VLDO4_A_MASK 0x3f
  734. #define DA9062AA_LDO4_SL_A_SHIFT 7
  735. #define DA9062AA_LDO4_SL_A_MASK BIT(7)
  736. /* DA9062AA_VBUCK2_B = 0x0B4 */
  737. #define DA9062AA_VBUCK2_B_SHIFT 0
  738. #define DA9062AA_VBUCK2_B_MASK 0x7f
  739. #define DA9062AA_BUCK2_SL_B_SHIFT 7
  740. #define DA9062AA_BUCK2_SL_B_MASK BIT(7)
  741. /* DA9062AA_VBUCK1_B = 0x0B5 */
  742. #define DA9062AA_VBUCK1_B_SHIFT 0
  743. #define DA9062AA_VBUCK1_B_MASK 0x7f
  744. #define DA9062AA_BUCK1_SL_B_SHIFT 7
  745. #define DA9062AA_BUCK1_SL_B_MASK BIT(7)
  746. /* DA9062AA_VBUCK4_B = 0x0B6 */
  747. #define DA9062AA_VBUCK4_B_SHIFT 0
  748. #define DA9062AA_VBUCK4_B_MASK 0x7f
  749. #define DA9062AA_BUCK4_SL_B_SHIFT 7
  750. #define DA9062AA_BUCK4_SL_B_MASK BIT(7)
  751. /* DA9062AA_VBUCK3_B = 0x0B8 */
  752. #define DA9062AA_VBUCK3_B_SHIFT 0
  753. #define DA9062AA_VBUCK3_B_MASK 0x7f
  754. #define DA9062AA_BUCK3_SL_B_SHIFT 7
  755. #define DA9062AA_BUCK3_SL_B_MASK BIT(7)
  756. /* DA9062AA_VLDO1_B = 0x0BA */
  757. #define DA9062AA_VLDO1_B_SHIFT 0
  758. #define DA9062AA_VLDO1_B_MASK 0x3f
  759. #define DA9062AA_LDO1_SL_B_SHIFT 7
  760. #define DA9062AA_LDO1_SL_B_MASK BIT(7)
  761. /* DA9062AA_VLDO2_B = 0x0BB */
  762. #define DA9062AA_VLDO2_B_SHIFT 0
  763. #define DA9062AA_VLDO2_B_MASK 0x3f
  764. #define DA9062AA_LDO2_SL_B_SHIFT 7
  765. #define DA9062AA_LDO2_SL_B_MASK BIT(7)
  766. /* DA9062AA_VLDO3_B = 0x0BC */
  767. #define DA9062AA_VLDO3_B_SHIFT 0
  768. #define DA9062AA_VLDO3_B_MASK 0x3f
  769. #define DA9062AA_LDO3_SL_B_SHIFT 7
  770. #define DA9062AA_LDO3_SL_B_MASK BIT(7)
  771. /* DA9062AA_VLDO4_B = 0x0BD */
  772. #define DA9062AA_VLDO4_B_SHIFT 0
  773. #define DA9062AA_VLDO4_B_MASK 0x3f
  774. #define DA9062AA_LDO4_SL_B_SHIFT 7
  775. #define DA9062AA_LDO4_SL_B_MASK BIT(7)
  776. /* DA9062AA_BBAT_CONT = 0x0C5 */
  777. #define DA9062AA_BCHG_VSET_SHIFT 0
  778. #define DA9062AA_BCHG_VSET_MASK 0x0f
  779. #define DA9062AA_BCHG_ISET_SHIFT 4
  780. #define DA9062AA_BCHG_ISET_MASK (0x0f << 4)
  781. /* DA9062AA_INTERFACE = 0x105 */
  782. #define DA9062AA_IF_BASE_ADDR_SHIFT 4
  783. #define DA9062AA_IF_BASE_ADDR_MASK (0x0f << 4)
  784. /* DA9062AA_CONFIG_A = 0x106 */
  785. #define DA9062AA_PM_I_V_SHIFT 0
  786. #define DA9062AA_PM_I_V_MASK 0x01
  787. #define DA9062AA_PM_O_TYPE_SHIFT 2
  788. #define DA9062AA_PM_O_TYPE_MASK BIT(2)
  789. #define DA9062AA_IRQ_TYPE_SHIFT 3
  790. #define DA9062AA_IRQ_TYPE_MASK BIT(3)
  791. #define DA9062AA_PM_IF_V_SHIFT 4
  792. #define DA9062AA_PM_IF_V_MASK BIT(4)
  793. #define DA9062AA_PM_IF_FMP_SHIFT 5
  794. #define DA9062AA_PM_IF_FMP_MASK BIT(5)
  795. #define DA9062AA_PM_IF_HSM_SHIFT 6
  796. #define DA9062AA_PM_IF_HSM_MASK BIT(6)
  797. /* DA9062AA_CONFIG_B = 0x107 */
  798. #define DA9062AA_VDD_FAULT_ADJ_SHIFT 0
  799. #define DA9062AA_VDD_FAULT_ADJ_MASK 0x0f
  800. #define DA9062AA_VDD_HYST_ADJ_SHIFT 4
  801. #define DA9062AA_VDD_HYST_ADJ_MASK (0x07 << 4)
  802. /* DA9062AA_CONFIG_C = 0x108 */
  803. #define DA9062AA_BUCK_ACTV_DISCHRG_SHIFT 2
  804. #define DA9062AA_BUCK_ACTV_DISCHRG_MASK BIT(2)
  805. #define DA9062AA_BUCK1_CLK_INV_SHIFT 3
  806. #define DA9062AA_BUCK1_CLK_INV_MASK BIT(3)
  807. #define DA9062AA_BUCK4_CLK_INV_SHIFT 4
  808. #define DA9062AA_BUCK4_CLK_INV_MASK BIT(4)
  809. #define DA9062AA_BUCK3_CLK_INV_SHIFT 6
  810. #define DA9062AA_BUCK3_CLK_INV_MASK BIT(6)
  811. /* DA9062AA_CONFIG_D = 0x109 */
  812. #define DA9062AA_GPI_V_SHIFT 0
  813. #define DA9062AA_GPI_V_MASK 0x01
  814. #define DA9062AA_NIRQ_MODE_SHIFT 1
  815. #define DA9062AA_NIRQ_MODE_MASK BIT(1)
  816. #define DA9062AA_SYSTEM_EN_RD_SHIFT 2
  817. #define DA9062AA_SYSTEM_EN_RD_MASK BIT(2)
  818. #define DA9062AA_FORCE_RESET_SHIFT 5
  819. #define DA9062AA_FORCE_RESET_MASK BIT(5)
  820. /* DA9062AA_CONFIG_E = 0x10A */
  821. #define DA9062AA_BUCK1_AUTO_SHIFT 0
  822. #define DA9062AA_BUCK1_AUTO_MASK 0x01
  823. #define DA9062AA_BUCK2_AUTO_SHIFT 1
  824. #define DA9062AA_BUCK2_AUTO_MASK BIT(1)
  825. #define DA9062AA_BUCK4_AUTO_SHIFT 2
  826. #define DA9062AA_BUCK4_AUTO_MASK BIT(2)
  827. #define DA9062AA_BUCK3_AUTO_SHIFT 4
  828. #define DA9062AA_BUCK3_AUTO_MASK BIT(4)
  829. /* DA9062AA_CONFIG_G = 0x10C */
  830. #define DA9062AA_LDO1_AUTO_SHIFT 0
  831. #define DA9062AA_LDO1_AUTO_MASK 0x01
  832. #define DA9062AA_LDO2_AUTO_SHIFT 1
  833. #define DA9062AA_LDO2_AUTO_MASK BIT(1)
  834. #define DA9062AA_LDO3_AUTO_SHIFT 2
  835. #define DA9062AA_LDO3_AUTO_MASK BIT(2)
  836. #define DA9062AA_LDO4_AUTO_SHIFT 3
  837. #define DA9062AA_LDO4_AUTO_MASK BIT(3)
  838. /* DA9062AA_CONFIG_H = 0x10D */
  839. #define DA9062AA_BUCK1_2_MERGE_SHIFT 3
  840. #define DA9062AA_BUCK1_2_MERGE_MASK BIT(3)
  841. #define DA9062AA_BUCK2_OD_SHIFT 5
  842. #define DA9062AA_BUCK2_OD_MASK BIT(5)
  843. #define DA9062AA_BUCK1_OD_SHIFT 6
  844. #define DA9062AA_BUCK1_OD_MASK BIT(6)
  845. /* DA9062AA_CONFIG_I = 0x10E */
  846. #define DA9062AA_NONKEY_PIN_SHIFT 0
  847. #define DA9062AA_NONKEY_PIN_MASK 0x03
  848. #define DA9062AA_nONKEY_SD_SHIFT 2
  849. #define DA9062AA_nONKEY_SD_MASK BIT(2)
  850. #define DA9062AA_WATCHDOG_SD_SHIFT 3
  851. #define DA9062AA_WATCHDOG_SD_MASK BIT(3)
  852. #define DA9062AA_KEY_SD_MODE_SHIFT 4
  853. #define DA9062AA_KEY_SD_MODE_MASK BIT(4)
  854. #define DA9062AA_HOST_SD_MODE_SHIFT 5
  855. #define DA9062AA_HOST_SD_MODE_MASK BIT(5)
  856. #define DA9062AA_INT_SD_MODE_SHIFT 6
  857. #define DA9062AA_INT_SD_MODE_MASK BIT(6)
  858. #define DA9062AA_LDO_SD_SHIFT 7
  859. #define DA9062AA_LDO_SD_MASK BIT(7)
  860. /* DA9062AA_CONFIG_J = 0x10F */
  861. #define DA9062AA_KEY_DELAY_SHIFT 0
  862. #define DA9062AA_KEY_DELAY_MASK 0x03
  863. #define DA9062AA_SHUT_DELAY_SHIFT 2
  864. #define DA9062AA_SHUT_DELAY_MASK (0x03 << 2)
  865. #define DA9062AA_RESET_DURATION_SHIFT 4
  866. #define DA9062AA_RESET_DURATION_MASK (0x03 << 4)
  867. #define DA9062AA_TWOWIRE_TO_SHIFT 6
  868. #define DA9062AA_TWOWIRE_TO_MASK BIT(6)
  869. #define DA9062AA_IF_RESET_SHIFT 7
  870. #define DA9062AA_IF_RESET_MASK BIT(7)
  871. /* DA9062AA_CONFIG_K = 0x110 */
  872. #define DA9062AA_GPIO0_PUPD_SHIFT 0
  873. #define DA9062AA_GPIO0_PUPD_MASK 0x01
  874. #define DA9062AA_GPIO1_PUPD_SHIFT 1
  875. #define DA9062AA_GPIO1_PUPD_MASK BIT(1)
  876. #define DA9062AA_GPIO2_PUPD_SHIFT 2
  877. #define DA9062AA_GPIO2_PUPD_MASK BIT(2)
  878. #define DA9062AA_GPIO3_PUPD_SHIFT 3
  879. #define DA9062AA_GPIO3_PUPD_MASK BIT(3)
  880. #define DA9062AA_GPIO4_PUPD_SHIFT 4
  881. #define DA9062AA_GPIO4_PUPD_MASK BIT(4)
  882. /* DA9062AA_CONFIG_M = 0x112 */
  883. #define DA9062AA_NSHUTDOWN_PU_SHIFT 1
  884. #define DA9062AA_NSHUTDOWN_PU_MASK BIT(1)
  885. #define DA9062AA_WDG_MODE_SHIFT 3
  886. #define DA9062AA_WDG_MODE_MASK BIT(3)
  887. #define DA9062AA_OSC_FRQ_SHIFT 4
  888. #define DA9062AA_OSC_FRQ_MASK (0x0f << 4)
  889. /* DA9062AA_TRIM_CLDR = 0x120 */
  890. #define DA9062AA_TRIM_CLDR_SHIFT 0
  891. #define DA9062AA_TRIM_CLDR_MASK 0xff
  892. /* DA9062AA_GP_ID_0 = 0x121 */
  893. #define DA9062AA_GP_0_SHIFT 0
  894. #define DA9062AA_GP_0_MASK 0xff
  895. /* DA9062AA_GP_ID_1 = 0x122 */
  896. #define DA9062AA_GP_1_SHIFT 0
  897. #define DA9062AA_GP_1_MASK 0xff
  898. /* DA9062AA_GP_ID_2 = 0x123 */
  899. #define DA9062AA_GP_2_SHIFT 0
  900. #define DA9062AA_GP_2_MASK 0xff
  901. /* DA9062AA_GP_ID_3 = 0x124 */
  902. #define DA9062AA_GP_3_SHIFT 0
  903. #define DA9062AA_GP_3_MASK 0xff
  904. /* DA9062AA_GP_ID_4 = 0x125 */
  905. #define DA9062AA_GP_4_SHIFT 0
  906. #define DA9062AA_GP_4_MASK 0xff
  907. /* DA9062AA_GP_ID_5 = 0x126 */
  908. #define DA9062AA_GP_5_SHIFT 0
  909. #define DA9062AA_GP_5_MASK 0xff
  910. /* DA9062AA_GP_ID_6 = 0x127 */
  911. #define DA9062AA_GP_6_SHIFT 0
  912. #define DA9062AA_GP_6_MASK 0xff
  913. /* DA9062AA_GP_ID_7 = 0x128 */
  914. #define DA9062AA_GP_7_SHIFT 0
  915. #define DA9062AA_GP_7_MASK 0xff
  916. /* DA9062AA_GP_ID_8 = 0x129 */
  917. #define DA9062AA_GP_8_SHIFT 0
  918. #define DA9062AA_GP_8_MASK 0xff
  919. /* DA9062AA_GP_ID_9 = 0x12A */
  920. #define DA9062AA_GP_9_SHIFT 0
  921. #define DA9062AA_GP_9_MASK 0xff
  922. /* DA9062AA_GP_ID_10 = 0x12B */
  923. #define DA9062AA_GP_10_SHIFT 0
  924. #define DA9062AA_GP_10_MASK 0xff
  925. /* DA9062AA_GP_ID_11 = 0x12C */
  926. #define DA9062AA_GP_11_SHIFT 0
  927. #define DA9062AA_GP_11_MASK 0xff
  928. /* DA9062AA_GP_ID_12 = 0x12D */
  929. #define DA9062AA_GP_12_SHIFT 0
  930. #define DA9062AA_GP_12_MASK 0xff
  931. /* DA9062AA_GP_ID_13 = 0x12E */
  932. #define DA9062AA_GP_13_SHIFT 0
  933. #define DA9062AA_GP_13_MASK 0xff
  934. /* DA9062AA_GP_ID_14 = 0x12F */
  935. #define DA9062AA_GP_14_SHIFT 0
  936. #define DA9062AA_GP_14_MASK 0xff
  937. /* DA9062AA_GP_ID_15 = 0x130 */
  938. #define DA9062AA_GP_15_SHIFT 0
  939. #define DA9062AA_GP_15_MASK 0xff
  940. /* DA9062AA_GP_ID_16 = 0x131 */
  941. #define DA9062AA_GP_16_SHIFT 0
  942. #define DA9062AA_GP_16_MASK 0xff
  943. /* DA9062AA_GP_ID_17 = 0x132 */
  944. #define DA9062AA_GP_17_SHIFT 0
  945. #define DA9062AA_GP_17_MASK 0xff
  946. /* DA9062AA_GP_ID_18 = 0x133 */
  947. #define DA9062AA_GP_18_SHIFT 0
  948. #define DA9062AA_GP_18_MASK 0xff
  949. /* DA9062AA_GP_ID_19 = 0x134 */
  950. #define DA9062AA_GP_19_SHIFT 0
  951. #define DA9062AA_GP_19_MASK 0xff
  952. /* DA9062AA_DEVICE_ID = 0x181 */
  953. #define DA9062AA_DEV_ID_SHIFT 0
  954. #define DA9062AA_DEV_ID_MASK 0xff
  955. /* DA9062AA_VARIANT_ID = 0x182 */
  956. #define DA9062AA_VRC_SHIFT 0
  957. #define DA9062AA_VRC_MASK 0x0f
  958. #define DA9062AA_MRC_SHIFT 4
  959. #define DA9062AA_MRC_MASK (0x0f << 4)
  960. /* DA9062AA_CUSTOMER_ID = 0x183 */
  961. #define DA9062AA_CUST_ID_SHIFT 0
  962. #define DA9062AA_CUST_ID_MASK 0xff
  963. /* DA9062AA_CONFIG_ID = 0x184 */
  964. #define DA9062AA_CONFIG_REV_SHIFT 0
  965. #define DA9062AA_CONFIG_REV_MASK 0xff
  966. #endif /* __DA9062_H__ */