board_dev.c 9.2 KB

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  1. /**************************************************************************//**
  2. *
  3. * @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020-1-16 Wayne First version
  10. *
  11. ******************************************************************************/
  12. #include <rtdevice.h>
  13. #include <drv_gpio.h>
  14. #if defined(BOARD_USING_STORAGE_SPIFLASH)
  15. #if defined(RT_USING_SFUD)
  16. #include "dev_spi_flash.h"
  17. #include "dev_spi_flash_sfud.h"
  18. #endif
  19. #include "drv_qspi.h"
  20. #define W25X_REG_READSTATUS (0x05)
  21. #define W25X_REG_READSTATUS2 (0x35)
  22. #define W25X_REG_WRITEENABLE (0x06)
  23. #define W25X_REG_WRITESTATUS (0x01)
  24. #define W25X_REG_QUADENABLE (0x02)
  25. static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
  26. {
  27. rt_uint8_t u8Val;
  28. rt_err_t result = RT_EOK;
  29. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
  30. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  31. RT_ASSERT(result > 0);
  32. return u8Val;
  33. }
  34. static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
  35. {
  36. rt_uint8_t u8Val;
  37. rt_err_t result = RT_EOK;
  38. rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
  39. result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
  40. RT_ASSERT(result > 0);
  41. return u8Val;
  42. }
  43. static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
  44. {
  45. rt_uint8_t w25x_txCMD1;
  46. rt_uint8_t au8Val[2];
  47. rt_err_t result;
  48. struct rt_qspi_message qspi_message = {0};
  49. /* Enable WE */
  50. w25x_txCMD1 = W25X_REG_WRITEENABLE;
  51. result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1));
  52. if (result != sizeof(w25x_txCMD1))
  53. goto exit_SpiFlash_WriteStatusReg;
  54. /* Prepare status-1, 2 data */
  55. au8Val[0] = u8Value1;
  56. au8Val[1] = u8Value2;
  57. /* 1-bit mode: Instruction+payload */
  58. qspi_message.instruction.content = W25X_REG_WRITESTATUS;
  59. qspi_message.instruction.qspi_lines = 1;
  60. qspi_message.qspi_data_lines = 1;
  61. qspi_message.parent.cs_take = 1;
  62. qspi_message.parent.cs_release = 1;
  63. qspi_message.parent.send_buf = &au8Val[0];
  64. qspi_message.parent.length = sizeof(au8Val);
  65. qspi_message.parent.next = RT_NULL;
  66. if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val))
  67. {
  68. result = -RT_ERROR;
  69. }
  70. result = RT_EOK;
  71. exit_SpiFlash_WriteStatusReg:
  72. return result;
  73. }
  74. static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
  75. {
  76. volatile uint8_t u8ReturnValue;
  77. do
  78. {
  79. u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
  80. u8ReturnValue = u8ReturnValue & 1;
  81. }
  82. while (u8ReturnValue != 0); // check the BUSY bit
  83. }
  84. static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
  85. {
  86. rt_err_t result = RT_EOK;
  87. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  88. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  89. u8Status2 |= W25X_REG_QUADENABLE;
  90. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  91. RT_ASSERT(result == RT_EOK);
  92. SpiFlash_WaitReady(qspi_device);
  93. }
  94. static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
  95. {
  96. rt_err_t result = RT_EOK;
  97. uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
  98. uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
  99. u8Status2 &= ~W25X_REG_QUADENABLE;
  100. result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
  101. RT_ASSERT(result == RT_EOK);
  102. SpiFlash_WaitReady(qspi_device);
  103. }
  104. static int rt_hw_spiflash_init(void)
  105. {
  106. /*
  107. Don't forget to switch SPIM pins to QSPI0 pins on NuMaker-M467HJ V1.0 board.
  108. CS: R12-Open, R13-Close
  109. CLK: R14-Open, R15-Close
  110. MOSI: R16-Open, R17-Close
  111. MISO: R18-Open, R19-Close
  112. IO2: R20-Open, R21-Close
  113. IO3: R22-Open, R23-Close
  114. */
  115. if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
  116. return -1;
  117. #if defined(RT_USING_SFUD)
  118. if (rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi01") == RT_NULL)
  119. {
  120. return -(RT_ERROR);
  121. }
  122. #endif
  123. return 0;
  124. }
  125. INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
  126. #endif /* BOARD_USING_STORAGE_SPIFLASH */
  127. #if defined(BOARD_USING_NAU8822) && defined(NU_PKG_USING_NAU8822)
  128. #include <acodec_nau8822.h>
  129. S_NU_NAU8822_CONFIG sCodecConfig =
  130. {
  131. .i2c_bus_name = "i2c2",
  132. .i2s_bus_name = "sound0",
  133. .pin_phonejack_en = NU_GET_PININDEX(NU_PD, 3),
  134. .pin_phonejack_det = NU_GET_PININDEX(NU_PD, 2),
  135. };
  136. int rt_hw_nau8822_port(void)
  137. {
  138. if (nu_hw_nau8822_init(&sCodecConfig) != RT_EOK)
  139. return -1;
  140. return 0;
  141. }
  142. INIT_COMPONENT_EXPORT(rt_hw_nau8822_port);
  143. #endif /* BOARD_USING_NAU8822 */
  144. #if defined(BOARD_USING_LCD_SSD1963) && defined(NU_PKG_USING_SSD1963_EBI)
  145. #include <drv_ebi.h>
  146. #include "NuMicro.h"
  147. #include <lcd_ssd1963.h>
  148. #if defined(PKG_USING_GUIENGINE)
  149. #include <rtgui/driver.h>
  150. #endif
  151. int rt_hw_ssd1963_port(void)
  152. {
  153. rt_err_t ret = RT_EOK;
  154. /* Open ebi BOARD_USING_SSD1963_EBI_PORT */
  155. ret = nu_ebi_init(BOARD_USING_SSD1963_EBI_PORT, EBI_BUSWIDTH_16BIT, EBI_TIMING_FAST, EBI_OPMODE_NORMAL, EBI_CS_ACTIVE_LOW);
  156. if (ret != RT_EOK)
  157. return ret;
  158. switch (BOARD_USING_SSD1963_EBI_PORT)
  159. {
  160. case 0:
  161. EBI->CTL0 |= EBI_CTL_CACCESS_Msk;
  162. EBI->TCTL0 |= (EBI_TCTL_WAHDOFF_Msk | EBI_TCTL_RAHDOFF_Msk);
  163. break;
  164. case 1:
  165. EBI->CTL1 |= EBI_CTL_CACCESS_Msk;
  166. EBI->TCTL1 |= (EBI_TCTL_WAHDOFF_Msk | EBI_TCTL_RAHDOFF_Msk);
  167. break;
  168. case 2:
  169. EBI->CTL2 |= EBI_CTL_CACCESS_Msk;
  170. EBI->TCTL2 |= (EBI_TCTL_WAHDOFF_Msk | EBI_TCTL_RAHDOFF_Msk);
  171. break;
  172. default:
  173. return -1;
  174. }
  175. if (rt_hw_lcd_ssd1963_ebi_init(EBI_BANK0_BASE_ADDR + BOARD_USING_SSD1963_EBI_PORT * EBI_MAX_SIZE) != RT_EOK)
  176. return -1;
  177. rt_hw_lcd_ssd1963_init();
  178. #if defined(PKG_USING_GUIENGINE)
  179. rt_device_t lcd_ssd1963;
  180. lcd_ssd1963 = rt_device_find("lcd");
  181. if (lcd_ssd1963)
  182. {
  183. rtgui_graphic_set_device(lcd_ssd1963);
  184. }
  185. #endif
  186. return 0;
  187. }
  188. INIT_COMPONENT_EXPORT(rt_hw_ssd1963_port);
  189. #endif /* BOARD_USING_LCD_SSD1963 */
  190. #if defined(BOARD_USING_ILI2130) && defined(NU_PKG_USING_TPC_ILI)
  191. #include "ili.h"
  192. #define ILI2130_RST_PIN NU_GET_PININDEX(NU_PD, 10)
  193. #define ILI2130_IRQ_PIN NU_GET_PININDEX(NU_PG, 6)
  194. extern int tpc_sample(const char *name);
  195. int rt_hw_ili2130_port(void)
  196. {
  197. struct rt_touch_config cfg;
  198. rt_base_t rst_pin = ILI2130_RST_PIN;
  199. cfg.dev_name = "i2c1";
  200. cfg.irq_pin.pin = ILI2130_IRQ_PIN;
  201. cfg.irq_pin.mode = PIN_MODE_INPUT_PULLUP;
  202. cfg.user_data = &rst_pin;
  203. rt_hw_ili_tpc_init("ili_tpc", &cfg);
  204. return tpc_sample("ili_tpc");
  205. }
  206. INIT_ENV_EXPORT(rt_hw_ili2130_port);
  207. #endif /* if defined(BOARD_USING_ILI2130) && defined(NU_PKG_USING_ILI_TPC) */
  208. #if defined(BOARD_USING_LCD_FSA506) && defined(NU_PKG_USING_FSA506_EBI)
  209. #include <drv_ebi.h>
  210. #include "NuMicro.h"
  211. #include <lcd_fsa506.h>
  212. #if defined(PKG_USING_GUIENGINE)
  213. #include <rtgui/driver.h>
  214. #endif
  215. int rt_hw_fsa506_port(void)
  216. {
  217. rt_err_t ret = RT_EOK;
  218. /* Open ebi BOARD_USING_FSA506_EBI_PORT */
  219. ret = nu_ebi_init(BOARD_USING_FSA506_EBI_PORT, EBI_BUSWIDTH_16BIT, EBI_TIMING_SLOW, EBI_OPMODE_CACCESS, EBI_CS_ACTIVE_LOW);
  220. if (ret != RT_EOK)
  221. return ret;
  222. if (rt_hw_lcd_fsa506_ebi_init(EBI_BANK0_BASE_ADDR + BOARD_USING_FSA506_EBI_PORT * EBI_MAX_SIZE) != RT_EOK)
  223. return -1;
  224. rt_hw_lcd_fsa506_init();
  225. #if defined(PKG_USING_GUIENGINE)
  226. rt_device_t lcd_fsa506 = rt_device_find("lcd");
  227. if (lcd_fsa506)
  228. {
  229. rtgui_graphic_set_device(lcd_fsa506);
  230. }
  231. #endif
  232. return 0;
  233. }
  234. INIT_COMPONENT_EXPORT(rt_hw_fsa506_port);
  235. #endif /* BOARD_USING_LCD_FSA506 */
  236. #if defined(BOARD_USING_ST1663I) && defined(NU_PKG_USING_TPC_ST1663I)
  237. #include "st1663i.h"
  238. #define ST1663I_RST_PIN NU_GET_PININDEX(NU_PD, 10)
  239. #define ST1663I_IRQ_PIN NU_GET_PININDEX(NU_PG, 6)
  240. extern int tpc_sample(const char *name);
  241. int rt_hw_st1663i_port(void)
  242. {
  243. struct rt_touch_config cfg;
  244. rt_base_t rst_pin = ST1663I_RST_PIN;
  245. cfg.dev_name = "i2c1";
  246. cfg.irq_pin.pin = ST1663I_IRQ_PIN;
  247. cfg.irq_pin.mode = PIN_MODE_INPUT_PULLUP;
  248. cfg.user_data = &rst_pin;
  249. rt_hw_st1663i_init("st1663i", &cfg);
  250. return tpc_sample("st1663i");
  251. }
  252. INIT_ENV_EXPORT(rt_hw_st1663i_port);
  253. #endif /* if defined(BOARD_USING_ST1663I) && defined(NU_PKG_USING_TPC_ST1663I) */
  254. #if defined(BOARD_USING_SENSOR0)
  255. #include "ccap_sensor.h"
  256. #define SENSOR0_RST_PIN NU_GET_PININDEX(NU_PG, 11)
  257. #define SENSOR0_PD_PIN NU_GET_PININDEX(NU_PD, 12)
  258. ccap_sensor_io sIo_sensor0 =
  259. {
  260. .RstPin = SENSOR0_RST_PIN,
  261. .PwrDwnPin = SENSOR0_PD_PIN,
  262. .I2cName = "i2c0"
  263. };
  264. int rt_hw_sensor0_port(void)
  265. {
  266. return nu_ccap_sensor_create(&sIo_sensor0, (ccap_sensor_id)BOARD_USING_SENSON0_ID, "sensor0");
  267. }
  268. INIT_COMPONENT_EXPORT(rt_hw_sensor0_port);
  269. #endif /* BOARD_USING_SENSOR0 */
  270. #if defined(BOARD_USING_NCT7717U)
  271. #include "sensor_nct7717u.h"
  272. int rt_hw_nct7717u_port(void)
  273. {
  274. struct rt_sensor_config cfg;
  275. cfg.intf.dev_name = "i2c2";
  276. cfg.irq_pin.pin = PIN_IRQ_PIN_NONE;
  277. return rt_hw_nct7717u_init("nct7717u", &cfg);
  278. }
  279. INIT_APP_EXPORT(rt_hw_nct7717u_port);
  280. #endif /* BOARD_USING_NCT7717U */