drv_wdt.c 2.6 KB

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  1. /*
  2. * Copyright (c) 2006-2024 RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024-11-25 hywing The first version for NXP MCXA153 Board
  9. */
  10. #include <rtthread.h>
  11. #include "drv_wdt.h"
  12. #include "fsl_wdog32.h"
  13. #include "fsl_clock.h"
  14. #ifdef RT_USING_WDT
  15. #define WDT WDOG
  16. #define WDT_CLOCK_SOURCE kWDOG32_ClockSource1 /* 0: Bus, 1: LPO, 2: SOSC, 3: SIRC */
  17. #define WDT_CLOCK_SOURCE_FREQ (128 * 1000 / 256) /* 128kHz LPO divided by 256 */
  18. #define APP_WDT_IRQn WDOG_EWM_IRQn
  19. #define APP_WDT_IRQ_HANDLER WDOG_EWM_IRQHandler
  20. struct mcx_wdt
  21. {
  22. rt_watchdog_t watchdog;
  23. WDOG_Type *wdt_base;
  24. };
  25. static struct mcx_wdt wdt_dev;
  26. void APP_WDT_IRQ_HANDLER(void)
  27. {
  28. /* ---- There's no WARN feature for WDOG32, will reset. ---- */
  29. for (;;)
  30. {
  31. }
  32. }
  33. static rt_err_t wdt_init(rt_watchdog_t *wdt)
  34. {
  35. wdog32_config_t config;
  36. WDOG32_GetDefaultConfig(&config);
  37. config.enableWdog32 = false;
  38. config.clockSource = WDT_CLOCK_SOURCE;
  39. config.prescaler = kWDOG32_ClockPrescalerDivide256;
  40. config.timeoutValue = WDT_CLOCK_SOURCE_FREQ * 5;
  41. config.enableInterrupt = true;
  42. WDOG32_Init(WDT, &config);
  43. NVIC_EnableIRQ(APP_WDT_IRQn);
  44. return RT_EOK;
  45. }
  46. static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
  47. {
  48. /* Feed fast path */
  49. if (cmd == RT_DEVICE_CTRL_WDT_KEEPALIVE)
  50. {
  51. WDOG32_Refresh(wdt_dev.wdt_base);
  52. return RT_EOK;
  53. }
  54. __disable_irq();
  55. WDOG32_Unlock(wdt_dev.wdt_base);
  56. switch (cmd)
  57. {
  58. case RT_DEVICE_CTRL_WDT_START:
  59. WDOG32_Enable(wdt_dev.wdt_base);
  60. break;
  61. case RT_DEVICE_CTRL_WDT_STOP:
  62. WDOG32_Disable(wdt_dev.wdt_base);
  63. break;
  64. case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
  65. if (arg != RT_NULL)
  66. {
  67. uint32_t timeout = *((uint32_t *)arg);
  68. timeout = timeout * WDT_CLOCK_SOURCE_FREQ;
  69. WDOG32_SetTimeoutValue(wdt_dev.wdt_base, timeout);
  70. }
  71. break;
  72. default:
  73. break;
  74. }
  75. __enable_irq();
  76. return RT_EOK;
  77. }
  78. static struct rt_watchdog_ops wdt_ops =
  79. {
  80. wdt_init,
  81. wdt_control,
  82. };
  83. int rt_hw_wdt_init(void)
  84. {
  85. wdt_dev.wdt_base = WDT;
  86. wdt_dev.watchdog.ops = &wdt_ops;
  87. if (rt_hw_watchdog_register(&wdt_dev.watchdog, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK)
  88. {
  89. rt_kprintf("wdt register failed\n");
  90. return -RT_ERROR;
  91. }
  92. return RT_EOK;
  93. }
  94. INIT_BOARD_EXPORT(rt_hw_wdt_init);
  95. #endif /* RT_USING_WDT */