drv_sdif.c 22 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Email: opensource_embedded@phytium.com.cn
  7. *
  8. * Change Logs:
  9. * Date Author Notes
  10. * 2023/7/11 liqiaozhong init SD card and mount file system
  11. * 2023/11/8 zhugengyu add interrupt handling for dma waiting, unify function naming
  12. * 2024/4/7 zhugengyu support use two sdif device
  13. */
  14. /***************************** Include Files *********************************/
  15. #include "rtconfig.h"
  16. #if defined(BSP_USING_SDIF_LAYER)
  17. #include <rthw.h>
  18. #include <rtdef.h>
  19. #include <rtthread.h>
  20. #include <rtdevice.h>
  21. #include <rtdbg.h>
  22. #include <drivers/dev_mmcsd_core.h>
  23. #ifdef RT_USING_SMART
  24. #include "ioremap.h"
  25. #endif
  26. #include "mm_aspace.h"
  27. #include "interrupt.h"
  28. #define LOG_TAG "sdif_drv"
  29. #include "drv_log.h"
  30. #include "ftypes.h"
  31. #include "fparameters.h"
  32. #include "fcpu_info.h"
  33. #include "fsdif_timing.h"
  34. #include "fsdif.h"
  35. #include "fsdif_hw.h"
  36. #include "drv_sdif.h"
  37. /************************** Constant Definitions *****************************/
  38. #define SDIF_CARD_TYPE_MICRO_SD 1
  39. #define SDIF_CARD_TYPE_EMMC 2
  40. #define SDIF_CARD_TYPE_SDIO 3
  41. #define SDIF_DMA_BLK_SZ 512U
  42. #define SDIF_MAX_BLK_TRANS 20U
  43. #define SDIF_DMA_ALIGN SDIF_DMA_BLK_SZ
  44. /* preserve pointer to host instance */
  45. static struct rt_mmcsd_host *mmc_host[FSDIF_NUM] = {RT_NULL};
  46. /**************************** Type Definitions *******************************/
  47. typedef struct
  48. {
  49. FSdif sdif;
  50. rt_int32_t sd_type;
  51. FSdifIDmaDesc *rw_desc;
  52. uintptr_t rw_desc_dma;
  53. rt_size_t rw_desc_num;
  54. struct rt_event event;
  55. #define SDIF_EVENT_CARD_DETECTED (1 << 0)
  56. #define SDIF_EVENT_COMMAND_DONE (1 << 1)
  57. #define SDIF_EVENT_DATA_DONE (1 << 2)
  58. #define SDIF_EVENT_ERROR_OCCUR (1 << 3)
  59. #define SDIF_EVENT_SDIO_IRQ (1 << 4)
  60. void *aligned_buffer;
  61. uintptr_t aligned_buffer_dma;
  62. rt_size_t aligned_buffer_size;
  63. FSdifCmdData req_cmd;
  64. FSdifCmdData req_stop;
  65. FSdifData req_data;
  66. } sdif_info_t;
  67. /************************** Variable Definitions *****************************/
  68. /***************** Macros (Inline Functions) Definitions *********************/
  69. /******************************* Functions *********************************/
  70. static void sdif_host_relax(void)
  71. {
  72. rt_thread_mdelay(1);
  73. }
  74. void sdif_change(rt_uint32_t id)
  75. {
  76. RT_ASSERT(id < FSDIF_NUM);
  77. if (mmc_host[id])
  78. {
  79. mmcsd_change(mmc_host[id]);
  80. }
  81. }
  82. rt_int32_t sdif_card_inserted(rt_uint32_t id)
  83. {
  84. RT_ASSERT(id < FSDIF_NUM);
  85. if (mmc_host[id])
  86. {
  87. return mmc_host[id]->ops->get_card_status(mmc_host[id]);
  88. }
  89. return 0;
  90. }
  91. static void sdif_card_detect_callback(FSdif *const sdif, void *args, u32 status, u32 dmac_status)
  92. {
  93. struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
  94. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  95. rt_event_send(&host_info->event, SDIF_EVENT_CARD_DETECTED);
  96. sdif_change(host_info->sdif.config.instance_id);
  97. }
  98. static void sdif_command_done_callback(FSdif *const sdif, void *args, u32 status, u32 dmac_status)
  99. {
  100. struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
  101. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  102. rt_event_send(&host_info->event, SDIF_EVENT_COMMAND_DONE);
  103. }
  104. static void sdif_data_done_callback(FSdif *const sdif, void *args, u32 status, u32 dmac_status)
  105. {
  106. struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
  107. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  108. rt_event_send(&host_info->event, SDIF_EVENT_DATA_DONE);
  109. }
  110. static void sdif_sdio_irq_callback(FSdif *const sdif, void *args, u32 status, u32 dmac_status)
  111. {
  112. struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
  113. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  114. rt_event_send(&host_info->event, SDIF_EVENT_SDIO_IRQ);
  115. }
  116. static void sdif_error_occur_callback(FSdif *const sdif, void *args, u32 status, u32 dmac_status)
  117. {
  118. struct rt_mmcsd_host *host = (struct rt_mmcsd_host *)args;
  119. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  120. LOG_E("Error occur !!!");
  121. LOG_E("Status: 0x%x, dmac status: 0x%x.", status, dmac_status);
  122. if (status & FSDIF_INT_RE_BIT)
  123. LOG_E("Response err. 0x%x", FSDIF_INT_RE_BIT);
  124. if (status & FSDIF_INT_RTO_BIT)
  125. LOG_E("Response timeout. 0x%x", FSDIF_INT_RTO_BIT);
  126. if (dmac_status & FSDIF_DMAC_STATUS_DU)
  127. LOG_E("Descriptor un-readable. 0x%x", FSDIF_DMAC_STATUS_DU);
  128. if (status & FSDIF_INT_DCRC_BIT)
  129. LOG_E("Data CRC error. 0x%x", FSDIF_INT_DCRC_BIT);
  130. if (status & FSDIF_INT_RCRC_BIT)
  131. LOG_E("Data CRC error. 0x%x", FSDIF_INT_RCRC_BIT);
  132. rt_event_send(&host_info->event, SDIF_EVENT_ERROR_OCCUR);
  133. }
  134. static rt_err_t sdif_pre_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  135. {
  136. rt_err_t err = RT_EOK;
  137. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  138. if (host_info->sd_type != SDIF_CARD_TYPE_SDIO)
  139. {
  140. /* ignore SDIO detect command */
  141. if ((req->cmd->cmd_code == SD_IO_SEND_OP_COND) ||
  142. (req->cmd->cmd_code == SD_IO_RW_DIRECT))
  143. {
  144. req->cmd->err = -1;
  145. mmcsd_req_complete(host);
  146. err = RT_EEMPTY;
  147. }
  148. }
  149. if (host_info->sd_type == SDIF_CARD_TYPE_EMMC)
  150. {
  151. /* ignore micro SD detect command, not in eMMC spec. */
  152. if ((req->cmd->cmd_code == SD_APP_OP_COND) ||
  153. (req->cmd->cmd_code == APP_CMD))
  154. {
  155. req->cmd->err = -1;
  156. mmcsd_req_complete(host);
  157. err = RT_EEMPTY;
  158. }
  159. /* ignore mmcsd_send_if_cond(CMD-8) which will failed for eMMC
  160. but check cmd arg to let SEND_EXT_CSD (CMD-8) run */
  161. if ((req->cmd->cmd_code == SD_SEND_IF_COND) &&
  162. (req->cmd->arg == 0x1AA)) /* 0x1AA is the send_if_cond pattern, use it by care */
  163. {
  164. req->cmd->err = -1;
  165. mmcsd_req_complete(host);
  166. err = RT_EEMPTY;
  167. }
  168. }
  169. if ((req->cmd->cmd_code == READ_MULTIPLE_BLOCK) ||
  170. (req->cmd->cmd_code == WRITE_MULTIPLE_BLOCK)) /* set block count */
  171. {
  172. struct rt_mmcsd_req sbc;
  173. struct rt_mmcsd_cmd sbc_cmd;
  174. rt_memset(&sbc, 0, sizeof(sbc));
  175. rt_memset(&sbc_cmd, 0, sizeof(sbc_cmd));
  176. sbc_cmd.cmd_code = SET_BLOCK_COUNT;
  177. RT_ASSERT(req->data);
  178. sbc_cmd.arg = req->data->blks;
  179. sbc_cmd.flags = RESP_R1;
  180. LOG_I("set block_count = %d", req->data->blks);
  181. sbc.data = RT_NULL;
  182. sbc.cmd = &sbc_cmd;
  183. sbc.stop = RT_NULL;
  184. sbc.sbc = RT_NULL;
  185. mmcsd_send_request(host, &sbc);
  186. err = sbc_cmd.err;
  187. if (req->cmd->busy_timeout < 1000) /* in case rt-thread do not give wait timeout */
  188. {
  189. req->cmd->busy_timeout = 5000;
  190. }
  191. }
  192. return err;
  193. }
  194. static void sdif_convert_command_info(struct rt_mmcsd_host *host, struct rt_mmcsd_cmd *in_cmd, struct rt_mmcsd_data *in_data, FSdifCmdData *out_req)
  195. {
  196. FSdifCmdData *out_cmd = out_req;
  197. FSdifData *out_data = out_req->data_p;
  198. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  199. uint32_t opcode = in_cmd->cmd_code;
  200. out_cmd->rawcmd = FSDIF_CMD_INDX_SET(opcode);
  201. if (in_cmd->cmd_code == GO_IDLE_STATE)
  202. {
  203. out_cmd->rawcmd |= FSDIF_CMD_INIT;
  204. }
  205. if (in_cmd->cmd_code == GO_INACTIVE_STATE)
  206. {
  207. out_cmd->rawcmd |= FSDIF_CMD_STOP_ABORT;
  208. }
  209. if (in_cmd->cmd_code == VOLTAGE_SWITCH)
  210. {
  211. out_cmd->rawcmd |= FSDIF_CMD_VOLT_SWITCH;
  212. }
  213. if (resp_type(in_cmd) != RESP_NONE)
  214. {
  215. out_cmd->rawcmd |= FSDIF_CMD_RESP_EXP;
  216. if (resp_type(in_cmd) == RESP_R2)
  217. {
  218. /* need 136 bits long response */
  219. out_cmd->rawcmd |= FSDIF_CMD_RESP_LONG;
  220. }
  221. if ((resp_type(in_cmd) != RESP_R3) &&
  222. (resp_type(in_cmd) != RESP_R4))
  223. {
  224. /* most cmds need CRC */
  225. out_cmd->rawcmd |= FSDIF_CMD_RESP_CRC;
  226. }
  227. }
  228. if (in_data)
  229. {
  230. RT_ASSERT(out_data);
  231. out_cmd->rawcmd |= FSDIF_CMD_DAT_EXP;
  232. if (in_data->flags & DATA_DIR_READ)
  233. {
  234. out_data->buf = (void *)in_data->buf;
  235. out_data->buf_dma = (uintptr_t)in_data->buf + PV_OFFSET;
  236. }
  237. else if (in_data->flags & DATA_DIR_WRITE)
  238. {
  239. out_cmd->rawcmd |= FSDIF_CMD_DAT_WRITE;
  240. out_data->buf = (void *)in_data->buf;
  241. out_data->buf_dma = (uintptr_t)in_data->buf + PV_OFFSET;
  242. }
  243. else
  244. {
  245. RT_ASSERT(0);
  246. }
  247. out_data->blksz = in_data->blksize;
  248. out_data->blkcnt = in_data->blks;
  249. out_data->datalen = in_data->blksize * in_data->blks;
  250. /* handle unaligned input buffer */
  251. if (out_data->buf_dma % SDIF_DMA_ALIGN)
  252. {
  253. RT_ASSERT(out_data->datalen <= host_info->aligned_buffer_size);
  254. out_data->buf = host_info->aligned_buffer;
  255. out_data->buf_dma = (uintptr_t)host_info->aligned_buffer + PV_OFFSET;
  256. if (in_data->flags & DATA_DIR_WRITE)
  257. {
  258. /* copy the data need to write to sd card */
  259. memcpy(out_data->buf, in_data->buf, out_data->datalen);
  260. }
  261. }
  262. LOG_D("buf@%p, blksz: %d, datalen: %ld",
  263. out_data->buf,
  264. out_data->blksz,
  265. out_data->datalen);
  266. }
  267. out_cmd->cmdidx = in_cmd->cmd_code;
  268. out_cmd->cmdarg = in_cmd->arg;
  269. LOG_D("cmdarg: 0x%x", out_cmd->cmdarg);
  270. }
  271. static rt_err_t sdif_do_transfer(struct rt_mmcsd_host *host, FSdifCmdData *req_cmd, rt_int32_t timeout_ms)
  272. {
  273. FError ret = FT_SUCCESS;
  274. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  275. rt_uint32_t event = 0U;
  276. rt_uint32_t wait_event = 0U;
  277. LOG_I("cmd-%d sending", req_cmd->cmdidx);
  278. if (req_cmd->data_p == RT_NULL)
  279. {
  280. wait_event = SDIF_EVENT_COMMAND_DONE;
  281. }
  282. else
  283. {
  284. wait_event = SDIF_EVENT_COMMAND_DONE | SDIF_EVENT_DATA_DONE;
  285. }
  286. if (req_cmd->data_p)
  287. {
  288. ret = FSdifSetupDMADescriptor(&host_info->sdif, req_cmd->data_p);
  289. if (ret != FT_SUCCESS)
  290. {
  291. LOG_E("FSdifSetupDMADescriptor fail.");
  292. return -RT_ERROR;
  293. }
  294. }
  295. ret = FSdifDMATransfer(&host_info->sdif, req_cmd);
  296. if (ret != FT_SUCCESS)
  297. {
  298. LOG_E("FSdifDMATransfer() fail. ret = 0x%x", ret);
  299. return -RT_ERROR;
  300. }
  301. while (TRUE)
  302. {
  303. /*
  304. * transfer without data: wait COMMAND_DONE event
  305. * transfer with data: wait COMMAND_DONE and DATA_DONE event
  306. */
  307. if (rt_event_recv(&host_info->event,
  308. (wait_event),
  309. (RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR),
  310. rt_tick_from_millisecond(1000),
  311. &event) == RT_EOK)
  312. {
  313. (void)FSdifGetCmdResponse(&host_info->sdif, req_cmd);
  314. break;
  315. }
  316. /*
  317. * transfer with error: check if ERROR_OCCUR event exists, no wait
  318. */
  319. if (rt_event_recv(&host_info->event,
  320. (SDIF_EVENT_ERROR_OCCUR),
  321. (RT_EVENT_FLAG_AND | RT_WAITING_NO),
  322. 0,
  323. &event) == RT_EOK)
  324. {
  325. LOG_E("Sdif DMA transfer endup with error !!!");
  326. return -RT_EIO;
  327. }
  328. timeout_ms -= 1000;
  329. if (timeout_ms <= 0)
  330. {
  331. LOG_E("Sdif DMA transfer endup with timeout !!!");
  332. return -RT_EIO;
  333. }
  334. }
  335. return RT_EOK;
  336. }
  337. static void sdif_send_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  338. {
  339. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  340. FSdifCmdData *req_cmd = &host_info->req_cmd;
  341. FSdifData *req_data = &host_info->req_data;
  342. rt_err_t err = sdif_pre_request(host, req);
  343. if (err != RT_EOK)
  344. {
  345. return;
  346. }
  347. rt_memset(req_cmd, 0, sizeof(FSdifCmdData));
  348. if (req->data)
  349. {
  350. rt_memset(req_data, 0, sizeof(FSdifData));
  351. req_cmd->data_p = req_data;
  352. }
  353. else
  354. {
  355. req_cmd->data_p = RT_NULL;
  356. }
  357. sdif_convert_command_info(host, req->cmd, req->data, req_cmd);
  358. req->cmd->err = sdif_do_transfer(host, req_cmd, req->cmd->busy_timeout);
  359. if (resp_type(req->cmd) & RESP_MASK)
  360. {
  361. if (resp_type(req->cmd) == RESP_R2)
  362. {
  363. req->cmd->resp[3] = req_cmd->response[0];
  364. req->cmd->resp[2] = req_cmd->response[1];
  365. req->cmd->resp[1] = req_cmd->response[2];
  366. req->cmd->resp[0] = req_cmd->response[3];
  367. }
  368. else
  369. {
  370. req->cmd->resp[0] = req_cmd->response[0];
  371. }
  372. }
  373. if (req->data && (req->data->flags & DATA_DIR_READ))
  374. {
  375. /* if it is read sd card, copy data to unaligned buffer and return */
  376. if ((uintptr)req->data->buf % SDIF_DMA_ALIGN)
  377. {
  378. rt_memcpy((void *)req->data->buf,
  379. (void *)host_info->aligned_buffer,
  380. req_cmd->data_p->datalen);
  381. }
  382. }
  383. mmcsd_req_complete(host);
  384. }
  385. static void sdif_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
  386. {
  387. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  388. FSdif *sdif = &host_info->sdif;
  389. uintptr base_addr = sdif->config.base_addr;
  390. if (0 != io_cfg->clock)
  391. {
  392. // boolean is_ddr = FALSE;
  393. // if (host->card->type == CARD_TYPE_MMC)
  394. // {
  395. // if (io_cfg->timing == MMCSD_TIMING_MMC_HS400 ||
  396. // io_cfg->timing == MMCSD_TIMING_MMC_HS400_ENH_DS)
  397. // {
  398. // is_ddr = TRUE;
  399. // }
  400. // }
  401. // else if (host->card->type == CARD_TYPE_SD)
  402. // {
  403. // if (io_cfg->timing == MMCSD_TIMING_UHS_DDR50)
  404. // {
  405. // is_ddr = TRUE;
  406. // }
  407. // }
  408. // if (FSDIF_SUCCESS != FSdifSetClkFreqByCalc(&dev->hc, is_ddr, io_cfg->clock))
  409. // {
  410. // LOG_E("FSdifSetClkFreqByCalc fail.")
  411. // }
  412. FSdifTiming timing;
  413. FError ret;
  414. boolean is_ddr = FALSE;
  415. memset(&timing, 0U, sizeof(timing));
  416. /* Get the timing setting based on the clock frequency and device removability */
  417. ret = FSdifGetTimingSetting(io_cfg->clock, sdif->config.non_removable, &timing);
  418. if (ret != FT_SUCCESS)
  419. {
  420. LOG_E("Failed to find timing for clock-%d", io_cfg->clock);
  421. }
  422. /* Set the clock frequency using the obtained timing setting */
  423. ret = FSdifSetClkFreqByDict(sdif, FALSE, &timing, io_cfg->clock);
  424. if (ret != FT_SUCCESS)
  425. {
  426. LOG_E("FSdifSetClkFreq fail.");
  427. }
  428. }
  429. switch (io_cfg->bus_width)
  430. {
  431. case MMCSD_BUS_WIDTH_1:
  432. FSdifSetBusWidth(base_addr, 1U);
  433. break;
  434. case MMCSD_BUS_WIDTH_4:
  435. FSdifSetBusWidth(base_addr, 4U);
  436. break;
  437. case MMCSD_BUS_WIDTH_8:
  438. FSdifSetBusWidth(base_addr, 8U);
  439. break;
  440. default:
  441. LOG_E("Invalid bus width %d", io_cfg->bus_width);
  442. break;
  443. }
  444. }
  445. static rt_int32_t sdif_card_status(struct rt_mmcsd_host *host)
  446. {
  447. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  448. FSdif *sdif = &host_info->sdif;
  449. uintptr base_addr = sdif->config.base_addr;
  450. return FSdifCheckIfCardExists(base_addr) ? 1 : 0;
  451. }
  452. static const struct rt_mmcsd_host_ops ops =
  453. {
  454. .request = sdif_send_request,
  455. .set_iocfg = sdif_set_iocfg,
  456. .get_card_status = sdif_card_status,
  457. .enable_sdio_irq = RT_NULL,
  458. .execute_tuning = RT_NULL,
  459. };
  460. static void sdif_ctrl_setup_interrupt(struct rt_mmcsd_host *host)
  461. {
  462. sdif_info_t *host_info = (sdif_info_t *)host->private_data;
  463. FSdif *sdif = &(host_info->sdif);
  464. FSdifConfig *config_p = &sdif->config;
  465. rt_uint32_t cpu_id = rt_hw_cpu_id();
  466. rt_hw_interrupt_set_target_cpus(config_p->irq_num, cpu_id);
  467. rt_hw_interrupt_set_priority(config_p->irq_num, 0xd0);
  468. /* register intr callback */
  469. rt_hw_interrupt_install(config_p->irq_num,
  470. FSdifInterruptHandler,
  471. sdif,
  472. NULL);
  473. /* enable irq */
  474. rt_hw_interrupt_umask(config_p->irq_num);
  475. FSdifRegisterEvtHandler(sdif, FSDIF_EVT_CARD_DETECTED, sdif_card_detect_callback, host);
  476. FSdifRegisterEvtHandler(sdif, FSDIF_EVT_ERR_OCCURE, sdif_error_occur_callback, host);
  477. FSdifRegisterEvtHandler(sdif, FSDIF_EVT_CMD_DONE, sdif_command_done_callback, host);
  478. FSdifRegisterEvtHandler(sdif, FSDIF_EVT_DATA_DONE, sdif_data_done_callback, host);
  479. FSdifRegisterEvtHandler(sdif, FSDIF_EVT_SDIO_IRQ, sdif_sdio_irq_callback, host);
  480. return;
  481. }
  482. static rt_err_t sdif_host_init(rt_uint32_t id, rt_uint32_t type)
  483. {
  484. struct rt_mmcsd_host *host = RT_NULL;
  485. sdif_info_t *host_info = RT_NULL;
  486. const FSdifConfig *default_sdif_config = RT_NULL;
  487. FSdifConfig sdif_config;
  488. rt_err_t result = RT_EOK;
  489. host = mmcsd_alloc_host();
  490. if (!host)
  491. {
  492. LOG_E("Alloc host failed");
  493. result = RT_ENOMEM;
  494. goto err_free;
  495. }
  496. host_info = rt_malloc(sizeof(sdif_info_t));
  497. if (!host_info)
  498. {
  499. LOG_E("Malloc host_info failed");
  500. result = RT_ENOMEM;
  501. goto err_free;
  502. }
  503. rt_memset(host_info, 0, sizeof(*host_info));
  504. result = rt_event_init(&host_info->event, "sdif_event", RT_IPC_FLAG_FIFO);
  505. RT_ASSERT(RT_EOK == result);
  506. host_info->aligned_buffer_size = SDIF_DMA_BLK_SZ * SDIF_MAX_BLK_TRANS;
  507. host_info->aligned_buffer = rt_malloc_align(host_info->aligned_buffer_size,
  508. SDIF_DMA_ALIGN);
  509. if (!host_info->aligned_buffer)
  510. {
  511. LOG_E("Malloc aligned buffer failed");
  512. result = RT_ENOMEM;
  513. goto err_free;
  514. }
  515. host_info->aligned_buffer_dma = (uintptr_t)host_info->aligned_buffer + PV_OFFSET;
  516. rt_memset(host_info->aligned_buffer, 0, host_info->aligned_buffer_size);
  517. host_info->rw_desc_num = (SDIF_DMA_BLK_SZ * SDIF_MAX_BLK_TRANS) / FSDIF_IDMAC_MAX_BUF_SIZE + 1;
  518. host_info->rw_desc = rt_malloc_align(host_info->rw_desc_num * sizeof(FSdifIDmaDesc),
  519. SDIF_DMA_ALIGN);
  520. if (!host_info->rw_desc)
  521. {
  522. LOG_E("Malloc rw_desc failed");
  523. result = RT_ENOMEM;
  524. goto err_free;
  525. }
  526. host_info->rw_desc_dma = (uintptr_t)host_info->rw_desc + PV_OFFSET;
  527. rt_memset(host_info->rw_desc, 0, host_info->rw_desc_num * sizeof(FSdifIDmaDesc));
  528. /* host data init */
  529. host->ops = &ops;
  530. host->freq_min = FSDIF_CLK_SPEED_400KHZ;
  531. if (type == SDIF_CARD_TYPE_MICRO_SD)
  532. {
  533. host->freq_max = FSDIF_CLK_SPEED_50_MHZ;
  534. }
  535. else
  536. {
  537. host->freq_max = FSDIF_CLK_SPEED_52_MHZ;
  538. }
  539. host->valid_ocr = VDD_32_33 | VDD_33_34; /* voltage 3.3v */
  540. host->flags = MMCSD_MUTBLKWRITE | MMCSD_BUSWIDTH_4;
  541. host->max_seg_size = SDIF_DMA_BLK_SZ; /* used in block_dev.c */
  542. host->max_dma_segs = SDIF_MAX_BLK_TRANS; /* physical segment number */
  543. host->max_blk_size = SDIF_DMA_BLK_SZ; /* all the 4 para limits size of one blk tran */
  544. host->max_blk_count = SDIF_MAX_BLK_TRANS;
  545. host->private_data = host_info;
  546. host->name[0] = 's';
  547. host->name[1] = 'd';
  548. host->name[2] = '0' + id;
  549. host->name[3] = '\0';
  550. mmc_host[id] = host;
  551. RT_ASSERT((default_sdif_config = FSdifLookupConfig(id)) != RT_NULL);
  552. sdif_config = *default_sdif_config;
  553. #ifdef RT_USING_SMART
  554. sdif_config.base_addr = (uintptr)rt_ioremap((void *)sdif_config.base_addr, 0x1000);
  555. #endif
  556. sdif_config.trans_mode = FSDIF_IDMA_TRANS_MODE;
  557. if (type == SDIF_CARD_TYPE_MICRO_SD)
  558. {
  559. sdif_config.non_removable = FALSE; /* TF card is removable on board */
  560. }
  561. else if (type == SDIF_CARD_TYPE_EMMC)
  562. {
  563. sdif_config.non_removable = TRUE; /* eMMC is unremovable on board */
  564. }
  565. if (FSDIF_SUCCESS != FSdifCfgInitialize(&host_info->sdif, &sdif_config))
  566. {
  567. LOG_E("SDIF controller init failed.");
  568. result = RT_EIO;
  569. goto err_free;
  570. }
  571. if (FSDIF_SUCCESS != FSdifSetIDMAList(&host_info->sdif,
  572. host_info->rw_desc,
  573. host_info->rw_desc_dma,
  574. host_info->rw_desc_num))
  575. {
  576. LOG_E("SDIF controller setup DMA failed.");
  577. result = RT_EIO;
  578. goto err_free;
  579. }
  580. FSdifRegisterRelaxHandler(&host_info->sdif, sdif_host_relax); /* SDIF delay for a while */
  581. host_info->sd_type = type;
  582. LOG_I("Init sdif-%d as %d", id, type);
  583. /* setup interrupt */
  584. sdif_ctrl_setup_interrupt(host);
  585. return result;
  586. err_free:
  587. if (host)
  588. {
  589. mmcsd_free_host(host);
  590. }
  591. if (host_info)
  592. {
  593. if (host_info->aligned_buffer)
  594. {
  595. rt_free(host_info->aligned_buffer);
  596. host_info->aligned_buffer = RT_NULL;
  597. host_info->aligned_buffer_size = 0U;
  598. }
  599. if (host_info->rw_desc)
  600. {
  601. rt_free(host_info->rw_desc);
  602. host_info->rw_desc = RT_NULL;
  603. host_info->rw_desc_num = 0;
  604. }
  605. rt_free(host_info);
  606. }
  607. return result;
  608. }
  609. int rt_hw_sdif_init(void)
  610. {
  611. int status = RT_EOK;
  612. rt_uint32_t sd_type;
  613. FSdifTimingInit();
  614. #ifdef USING_SDIF0
  615. #if defined(USE_SDIF0_TF)
  616. sd_type = SDIF_CARD_TYPE_MICRO_SD;
  617. #elif defined(USE_SDIF0_EMMC)
  618. sd_type = SDIF_CARD_TYPE_EMMC;
  619. #endif
  620. status = sdif_host_init(FSDIF0_ID, sd_type);
  621. if (status != RT_EOK)
  622. {
  623. LOG_E("SDIF0 init failed, status = %d", status);
  624. return status;
  625. }
  626. #endif
  627. #ifdef USING_SDIF1
  628. #if defined(USE_SDIF1_TF)
  629. sd_type = SDIF_CARD_TYPE_MICRO_SD;
  630. #elif defined(USE_SDIF1_EMMC)
  631. sd_type = SDIF_CARD_TYPE_EMMC;
  632. #endif
  633. status = sdif_host_init(FSDIF1_ID, sd_type);
  634. if (status != RT_EOK)
  635. {
  636. LOG_E("SDIF0 init failed, status = %d", status);
  637. return status;
  638. }
  639. #endif
  640. return status;
  641. }
  642. INIT_DEVICE_EXPORT(rt_hw_sdif_init);
  643. #endif /* BSP_USING_SDIF_LAYER */