hal_phy.c 23 KB

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  1. /*
  2. * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
  3. *
  4. * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
  5. * the the People's Republic of China and other countries.
  6. * All Allwinner Technology Co.,Ltd. trademarks are used with permission.
  7. *
  8. * DISCLAIMER
  9. * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
  10. * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
  11. * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
  12. * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
  13. * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
  14. * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
  15. * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
  16. *
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
  19. * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
  20. * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
  21. * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
  22. * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  23. * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  26. * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
  27. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  28. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  30. * OF THE POSSIBILITY OF SUCH DAMAGE.
  31. */
  32. //#include <config.h>
  33. //#include <common.h>
  34. #include <stdio.h>
  35. #include <hal_thread.h>
  36. #include <hal_mem.h>
  37. #include <string.h>
  38. #include <typedef.h>
  39. #include <rtthread.h>
  40. //#include <drivers/sys_fsys.h>
  41. //#include <net.h>
  42. //#include <command.h>
  43. #include <sunxi_hal_miiphy.h>
  44. #include <sunxi_hal_phy.h>
  45. #include <errno.h>
  46. //#include <linux/err.h>
  47. //#include <linux/compiler.h>
  48. /* Generic PHY support and helper functions */
  49. /**
  50. * genphy_config_advert - sanitize and advertise auto-negotation parameters
  51. * @phydev: target phy_device struct
  52. *
  53. * Description: Writes MII_ADVERTISE with the appropriate values,
  54. * after sanitizing the values to make sure we only advertise
  55. * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
  56. * hasn't changed, and > 0 if it has changed.
  57. */
  58. static int genphy_config_advert(struct phy_device *phydev)
  59. {
  60. uint32_t advertise;
  61. int oldadv, adv;
  62. int err, changed = 0;
  63. /* Only allow advertising what
  64. * this PHY supports */
  65. phydev->advertising &= phydev->supported;
  66. advertise = phydev->advertising;
  67. /* Setup standard advertisement */
  68. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  69. if (adv < 0)
  70. return adv;
  71. adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  72. ADVERTISE_PAUSE_ASYM);
  73. if (advertise & ADVERTISED_10baseT_Half)
  74. adv |= ADVERTISE_10HALF;
  75. if (advertise & ADVERTISED_10baseT_Full)
  76. adv |= ADVERTISE_10FULL;
  77. if (advertise & ADVERTISED_100baseT_Half)
  78. adv |= ADVERTISE_100HALF;
  79. if (advertise & ADVERTISED_100baseT_Full)
  80. adv |= ADVERTISE_100FULL;
  81. if (advertise & ADVERTISED_Pause)
  82. adv |= ADVERTISE_PAUSE_CAP;
  83. if (advertise & ADVERTISED_Asym_Pause)
  84. adv |= ADVERTISE_PAUSE_ASYM;
  85. if (advertise & ADVERTISED_1000baseX_Half)
  86. adv |= ADVERTISE_1000XHALF;
  87. if (advertise & ADVERTISED_1000baseX_Full)
  88. adv |= ADVERTISE_1000XFULL;
  89. if (adv != oldadv) {
  90. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  91. if (err < 0)
  92. return err;
  93. changed = 1;
  94. }
  95. /* Configure gigabit if it's supported */
  96. if (phydev->supported & (SUPPORTED_1000baseT_Half |
  97. SUPPORTED_1000baseT_Full)) {
  98. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  99. if (adv < 0)
  100. return adv;
  101. adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  102. if (advertise & SUPPORTED_1000baseT_Half)
  103. adv |= ADVERTISE_1000HALF;
  104. if (advertise & SUPPORTED_1000baseT_Full)
  105. adv |= ADVERTISE_1000FULL;
  106. if (adv != oldadv) {
  107. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
  108. adv);
  109. if (err < 0)
  110. return err;
  111. changed = 1;
  112. }
  113. }
  114. return changed;
  115. }
  116. /**
  117. * genphy_setup_forced - configures/forces speed/duplex from @phydev
  118. * @phydev: target phy_device struct
  119. *
  120. * Description: Configures MII_BMCR to force speed/duplex
  121. * to the values in phydev. Assumes that the values are valid.
  122. */
  123. static int genphy_setup_forced(struct phy_device *phydev)
  124. {
  125. int err;
  126. int ctl = 0;
  127. phydev->pause = phydev->asym_pause = 0;
  128. if (SPEED_1000 == phydev->speed)
  129. ctl |= BMCR_SPEED1000;
  130. else if (SPEED_100 == phydev->speed)
  131. ctl |= BMCR_SPEED100;
  132. if (DUPLEX_FULL == phydev->duplex)
  133. ctl |= BMCR_FULLDPLX;
  134. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  135. return err;
  136. }
  137. /**
  138. * genphy_restart_aneg - Enable and Restart Autonegotiation
  139. * @phydev: target phy_device struct
  140. */
  141. int genphy_restart_aneg(struct phy_device *phydev)
  142. {
  143. int ctl;
  144. ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  145. if (ctl < 0)
  146. return ctl;
  147. ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
  148. /* Don't isolate the PHY if we're negotiating */
  149. ctl &= ~(BMCR_ISOLATE);
  150. ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  151. return ctl;
  152. }
  153. /**
  154. * genphy_config_aneg - restart auto-negotiation or write BMCR
  155. * @phydev: target phy_device struct
  156. *
  157. * Description: If auto-negotiation is enabled, we configure the
  158. * advertising, and then restart auto-negotiation. If it is not
  159. * enabled, then we write the BMCR.
  160. */
  161. int genphy_config_aneg(struct phy_device *phydev)
  162. {
  163. int result;
  164. if (AUTONEG_ENABLE != phydev->autoneg)
  165. return genphy_setup_forced(phydev);
  166. result = genphy_config_advert(phydev);
  167. if (result < 0) /* error */
  168. return result;
  169. if (result == 0) {
  170. /* Advertisment hasn't changed, but maybe aneg was never on to
  171. * begin with? Or maybe phy was isolated? */
  172. int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  173. if (ctl < 0)
  174. return ctl;
  175. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  176. result = 1; /* do restart aneg */
  177. }
  178. /* Only restart aneg if we are advertising something different
  179. * than we were before. */
  180. if (result > 0)
  181. result = genphy_restart_aneg(phydev);
  182. return result;
  183. }
  184. /**
  185. * genphy_update_link - update link status in @phydev
  186. * @phydev: target phy_device struct
  187. *
  188. * Description: Update the value in phydev->link to reflect the
  189. * current link value. In order to do this, we need to read
  190. * the status register twice, keeping the second value.
  191. */
  192. int genphy_update_link(struct phy_device *phydev)
  193. {
  194. unsigned int mii_reg;
  195. /*
  196. * Wait if the link is up, and autonegotiation is in progress
  197. * (ie - we're capable and it's not done)
  198. */
  199. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  200. /*
  201. * If we already saw the link up, and it hasn't gone down, then
  202. * we don't need to wait for autoneg again
  203. */
  204. if (phydev->link && mii_reg & BMSR_LSTATUS)
  205. return 0;
  206. if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
  207. int i = 0;
  208. printf("%s Waiting for PHY auto negotiation to complete",
  209. "eth0");
  210. while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
  211. /*
  212. * Timeout reached ?
  213. */
  214. if (i > PHY_ANEG_TIMEOUT) {
  215. printf(" TIMEOUT !\n");
  216. phydev->link = 0;
  217. return 0;
  218. }
  219. /*if (ctrlc()) {
  220. puts("user interrupt!\n");
  221. phydev->link = 0;
  222. return -EINTR;
  223. }*/
  224. if ((i++ % 500) == 0)
  225. printf(".");
  226. udelay(1000); /* 1 ms */
  227. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  228. }
  229. printf(" done\n");
  230. phydev->link = 1;
  231. } else {
  232. /* Read the link a second time to clear the latched state */
  233. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  234. if (mii_reg & BMSR_LSTATUS)
  235. phydev->link = 1;
  236. else
  237. phydev->link = 0;
  238. }
  239. return 0;
  240. }
  241. /*
  242. * Generic function which updates the speed and duplex. If
  243. * autonegotiation is enabled, it uses the AND of the link
  244. * partner's advertised capabilities and our advertised
  245. * capabilities. If autonegotiation is disabled, we use the
  246. * appropriate bits in the control register.
  247. *
  248. * Stolen from Linux's mii.c and phy_device.c
  249. */
  250. int genphy_parse_link(struct phy_device *phydev)
  251. {
  252. int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  253. /* We're using autonegotiation */
  254. if (phydev->supported & SUPPORTED_Autoneg) {
  255. uint32_t lpa = 0;
  256. int gblpa = 0;
  257. uint32_t estatus = 0;
  258. /* Check for gigabit capability */
  259. if (phydev->supported & (SUPPORTED_1000baseT_Full |
  260. SUPPORTED_1000baseT_Half)) {
  261. /* We want a list of states supported by
  262. * both PHYs in the link
  263. */
  264. gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
  265. if (gblpa < 0) {
  266. printf("Could not read MII_STAT1000. Ignoring gigabit capability\n");
  267. gblpa = 0;
  268. }
  269. gblpa &= phy_read(phydev,
  270. MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
  271. }
  272. /* Set the baseline so we only have to set them
  273. * if they're different
  274. */
  275. phydev->speed = SPEED_10;
  276. phydev->duplex = DUPLEX_HALF;
  277. /* Check the gigabit fields */
  278. if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
  279. phydev->speed = SPEED_1000;
  280. if (gblpa & PHY_1000BTSR_1000FD)
  281. phydev->duplex = DUPLEX_FULL;
  282. /* We're done! */
  283. return 0;
  284. }
  285. lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  286. lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
  287. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  288. phydev->speed = SPEED_100;
  289. if (lpa & LPA_100FULL)
  290. phydev->duplex = DUPLEX_FULL;
  291. } else if (lpa & LPA_10FULL)
  292. phydev->duplex = DUPLEX_FULL;
  293. /*
  294. * Extended status may indicate that the PHY supports
  295. * 1000BASE-T/X even though the 1000BASE-T registers
  296. * are missing. In this case we can't tell whether the
  297. * peer also supports it, so we only check extended
  298. * status if the 1000BASE-T registers are actually
  299. * missing.
  300. */
  301. if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
  302. estatus = phy_read(phydev, MDIO_DEVAD_NONE,
  303. MII_ESTATUS);
  304. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
  305. ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
  306. phydev->speed = SPEED_1000;
  307. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
  308. phydev->duplex = DUPLEX_FULL;
  309. }
  310. } else {
  311. uint32_t bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  312. phydev->speed = SPEED_10;
  313. phydev->duplex = DUPLEX_HALF;
  314. if (bmcr & BMCR_FULLDPLX)
  315. phydev->duplex = DUPLEX_FULL;
  316. if (bmcr & BMCR_SPEED1000)
  317. phydev->speed = SPEED_1000;
  318. else if (bmcr & BMCR_SPEED100)
  319. phydev->speed = SPEED_100;
  320. }
  321. return 0;
  322. }
  323. int genphy_config(struct phy_device *phydev)
  324. {
  325. int val;
  326. uint32_t features;
  327. /* For now, I'll claim that the generic driver supports
  328. * all possible port types */
  329. features = (SUPPORTED_TP | SUPPORTED_MII
  330. | SUPPORTED_AUI | SUPPORTED_FIBRE |
  331. SUPPORTED_BNC);
  332. /* Do we support autonegotiation? */
  333. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  334. if (val < 0)
  335. return val;
  336. if (val & BMSR_ANEGCAPABLE)
  337. features |= SUPPORTED_Autoneg;
  338. if (val & BMSR_100FULL)
  339. features |= SUPPORTED_100baseT_Full;
  340. if (val & BMSR_100HALF)
  341. features |= SUPPORTED_100baseT_Half;
  342. if (val & BMSR_10FULL)
  343. features |= SUPPORTED_10baseT_Full;
  344. if (val & BMSR_10HALF)
  345. features |= SUPPORTED_10baseT_Half;
  346. if (val & BMSR_ESTATEN) {
  347. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
  348. if (val < 0)
  349. return val;
  350. if (val & ESTATUS_1000_TFULL)
  351. features |= SUPPORTED_1000baseT_Full;
  352. if (val & ESTATUS_1000_THALF)
  353. features |= SUPPORTED_1000baseT_Half;
  354. if (val & ESTATUS_1000_XFULL)
  355. features |= SUPPORTED_1000baseX_Full;
  356. if (val & ESTATUS_1000_XHALF)
  357. features |= SUPPORTED_1000baseX_Half;
  358. }
  359. phydev->supported = features;
  360. phydev->advertising = features;
  361. genphy_config_aneg(phydev);
  362. return 0;
  363. }
  364. int genphy_startup(struct phy_device *phydev)
  365. {
  366. genphy_update_link(phydev);
  367. genphy_parse_link(phydev);
  368. return 0;
  369. }
  370. int genphy_shutdown(struct phy_device *phydev)
  371. {
  372. return 0;
  373. }
  374. static struct phy_driver genphy_driver = {
  375. .uid = 0xffffffff,
  376. .mask = 0xffffffff,
  377. .name = "Generic PHY",
  378. .features = 0,
  379. .config = genphy_config,
  380. .startup = genphy_startup,
  381. .shutdown = genphy_shutdown,
  382. };
  383. static LIST_HEAD(phy_drivers);
  384. int phy_init(void)
  385. {
  386. #ifdef CONFIG_PHY_ATHEROS
  387. phy_atheros_init();
  388. #endif
  389. #ifdef CONFIG_PHY_BROADCOM
  390. phy_broadcom_init();
  391. #endif
  392. #ifdef CONFIG_PHY_DAVICOM
  393. phy_davicom_init();
  394. #endif
  395. #ifdef CONFIG_PHY_ET1011C
  396. phy_et1011c_init();
  397. #endif
  398. #ifdef CONFIG_PHY_ICPLUS
  399. phy_icplus_init();
  400. #endif
  401. #ifdef CONFIG_PHY_LXT
  402. phy_lxt_init();
  403. #endif
  404. #ifdef CONFIG_PHY_MARVELL
  405. phy_marvell_init();
  406. #endif
  407. #ifdef CONFIG_PHY_MICREL
  408. phy_micrel_init();
  409. #endif
  410. #ifdef CONFIG_PHY_NATSEMI
  411. phy_natsemi_init();
  412. #endif
  413. #ifdef CONFIG_PHY_REALTEK
  414. phy_realtek_init();
  415. #endif
  416. #ifdef CONFIG_PHY_SMSC
  417. phy_smsc_init();
  418. #endif
  419. #ifdef CONFIG_PHY_TERANETICS
  420. phy_teranetics_init();
  421. #endif
  422. #ifdef CONFIG_PHY_VITESSE
  423. phy_vitesse_init();
  424. #endif
  425. return 0;
  426. }
  427. int phy_register(struct phy_driver *drv)
  428. {
  429. INIT_LIST_HEAD(&drv->list);
  430. list_add_tail(&drv->list, &phy_drivers);
  431. return 0;
  432. }
  433. static int phy_probe(struct phy_device *phydev)
  434. {
  435. int err = 0;
  436. phydev->advertising = phydev->supported = phydev->drv->features;
  437. phydev->mmds = phydev->drv->mmds;
  438. if (phydev->drv->probe)
  439. err = phydev->drv->probe(phydev);
  440. return err;
  441. }
  442. static struct phy_driver *generic_for_interface(phy_interface_t interface)
  443. {
  444. #ifdef CONFIG_PHYLIB_10G
  445. if (is_10g_interface(interface))
  446. return &gen10g_driver;
  447. #endif
  448. return &genphy_driver;
  449. }
  450. static struct phy_driver *get_phy_driver(struct phy_device *phydev,
  451. phy_interface_t interface)
  452. {
  453. struct list_head *entry;
  454. int phy_id = phydev->phy_id;
  455. struct phy_driver *drv = NULL;
  456. list_for_each(entry, &phy_drivers) {
  457. drv = list_entry(entry, struct phy_driver, list);
  458. if ((drv->uid & drv->mask) == (phy_id & drv->mask))
  459. return drv;
  460. }
  461. /* If we made it here, there's no driver for this PHY */
  462. return generic_for_interface(interface);
  463. }
  464. static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
  465. int phy_id,
  466. phy_interface_t interface)
  467. {
  468. struct phy_device *dev;
  469. /* We allocate the device, and initialize the
  470. * default values */
  471. dev = hal_malloc(sizeof(*dev));
  472. if (!dev) {
  473. printf("Failed to allocate PHY device for %s:%d\n",
  474. bus->name, addr);
  475. return NULL;
  476. }
  477. memset(dev, 0, sizeof(*dev));
  478. dev->duplex = -1;
  479. dev->link = 1;
  480. dev->interface = interface;
  481. dev->autoneg = AUTONEG_ENABLE;
  482. dev->addr = addr;
  483. dev->phy_id = phy_id;
  484. dev->bus = bus;
  485. dev->drv = get_phy_driver(dev, interface);
  486. phy_probe(dev);
  487. bus->phymap[addr] = dev;
  488. return dev;
  489. }
  490. /**
  491. * get_phy_id - reads the specified addr for its ID.
  492. * @bus: the target MII bus
  493. * @addr: PHY address on the MII bus
  494. * @phy_id: where to store the ID retrieved.
  495. *
  496. * Description: Reads the ID registers of the PHY at @addr on the
  497. * @bus, stores it in @phy_id and returns zero on success.
  498. */
  499. //int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, uint32_t *phy_id)
  500. int get_phy_id(struct mii_dev *bus, int addr, int devad, uint32_t *phy_id)
  501. {
  502. int phy_reg;
  503. /* Grab the bits from PHYIR1, and put them
  504. * in the upper half */
  505. phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
  506. if (phy_reg < 0)
  507. return -EIO;
  508. *phy_id = (phy_reg & 0xffff) << 16;
  509. /* Grab the bits from PHYIR2, and put them in the lower half */
  510. phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
  511. if (phy_reg < 0)
  512. return -EIO;
  513. *phy_id |= (phy_reg & 0xffff);
  514. return 0;
  515. }
  516. static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
  517. unsigned phy_mask, int devad, phy_interface_t interface)
  518. {
  519. uint32_t phy_id = 0xffffffff;
  520. while (phy_mask) {
  521. int addr = ffs(phy_mask) - 1;
  522. int r = get_phy_id(bus, addr, devad, &phy_id);
  523. /* If the PHY ID is mostly f's, we didn't find anything */
  524. if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
  525. return phy_device_create(bus, addr, phy_id, interface);
  526. phy_mask &= ~(1 << addr);
  527. }
  528. return NULL;
  529. }
  530. static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
  531. unsigned phy_mask, phy_interface_t interface)
  532. {
  533. /* If we have one, return the existing device, with new interface */
  534. while (phy_mask) {
  535. int addr = ffs(phy_mask) - 1;
  536. if (bus->phymap[addr]) {
  537. bus->phymap[addr]->interface = interface;
  538. return bus->phymap[addr];
  539. }
  540. phy_mask &= ~(1 << addr);
  541. }
  542. return NULL;
  543. }
  544. static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
  545. unsigned phy_mask, phy_interface_t interface)
  546. {
  547. int i;
  548. struct phy_device *phydev;
  549. phydev = search_for_existing_phy(bus, phy_mask, interface);
  550. if (phydev)
  551. return phydev;
  552. /* Try Standard (ie Clause 22) access */
  553. /* Otherwise we have to try Clause 45 */
  554. for (i = 0; i < 5; i++) {
  555. phydev = create_phy_by_mask(bus, phy_mask,
  556. i ? i : MDIO_DEVAD_NONE, interface);
  557. if (IS_ERR(phydev))
  558. return NULL;
  559. if (phydev)
  560. return phydev;
  561. }
  562. printf("Phy not found\n");
  563. return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface);
  564. }
  565. /**
  566. * get_phy_device - reads the specified PHY device and returns its @phy_device struct
  567. * @bus: the target MII bus
  568. * @addr: PHY address on the MII bus
  569. *
  570. * Description: Reads the ID registers of the PHY at @addr on the
  571. * @bus, then allocates and returns the phy_device to represent it.
  572. */
  573. static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
  574. phy_interface_t interface)
  575. {
  576. return get_phy_device_by_mask(bus, 1 << addr, interface);
  577. }
  578. int phy_reset(struct phy_device *phydev)
  579. {
  580. int reg;
  581. int timeout = 500;
  582. int devad = MDIO_DEVAD_NONE;
  583. #ifdef CONFIG_PHYLIB_10G
  584. /* If it's 10G, we need to issue reset through one of the MMDs */
  585. if (is_10g_interface(phydev->interface)) {
  586. if (!phydev->mmds)
  587. gen10g_discover_mmds(phydev);
  588. devad = ffs(phydev->mmds) - 1;
  589. }
  590. #endif
  591. reg = phy_read(phydev, devad, MII_BMCR);
  592. if (reg < 0) {
  593. printf("PHY status read failed\n");
  594. return -1;
  595. }
  596. reg |= BMCR_RESET;
  597. if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
  598. printf("PHY reset failed\n");
  599. return -1;
  600. }
  601. #ifdef CONFIG_PHY_RESET_DELAY
  602. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  603. #endif
  604. /*
  605. * Poll the control register for the reset bit to go to 0 (it is
  606. * auto-clearing). This should happen within 0.5 seconds per the
  607. * IEEE spec.
  608. */
  609. while ((reg & BMCR_RESET) && timeout--) {
  610. reg = phy_read(phydev, devad, MII_BMCR);
  611. if (reg < 0) {
  612. printf("PHY status read failed\n");
  613. return -1;
  614. }
  615. udelay(1000);
  616. }
  617. if (reg & BMCR_RESET) {
  618. printf("PHY reset timed out\n");
  619. return -1;
  620. }
  621. return 0;
  622. }
  623. int miiphy_reset(const char *devname, unsigned char addr)
  624. {
  625. struct mii_dev *bus = miiphy_get_dev_by_name(devname);
  626. struct phy_device *phydev;
  627. /*
  628. * miiphy_reset was only used on standard PHYs, so we'll fake it here.
  629. * If later code tries to connect with the right interface, this will
  630. * be corrected by get_phy_device in phy_connect()
  631. */
  632. phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
  633. return phy_reset(phydev);
  634. }
  635. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  636. phy_interface_t interface)
  637. {
  638. /* Reset the bus */
  639. if (bus->reset)
  640. bus->reset(bus);
  641. /* Wait 15ms to make sure the PHY has come out of hard reset */
  642. udelay(15000);
  643. return get_phy_device_by_mask(bus, phy_mask, interface);
  644. }
  645. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
  646. {
  647. /* Soft Reset the PHY */
  648. phy_reset(phydev);
  649. if (phydev->dev) {
  650. printf("%s:%d is connected to %s. Reconnecting to %s\n",
  651. phydev->bus->name, phydev->addr,
  652. "eth0", "eth0");
  653. }
  654. phydev->dev = dev;
  655. printf("%s connected to %s\n", "eth0", "eth0");
  656. }
  657. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  658. struct eth_device *dev, phy_interface_t interface)
  659. {
  660. struct phy_device *phydev;
  661. phydev = phy_find_by_mask(bus, 1 << addr, interface);
  662. if (phydev)
  663. phy_connect_dev(phydev, dev);
  664. else
  665. printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
  666. return phydev;
  667. }
  668. /*
  669. * Start the PHY. Returns 0 on success, or a negative error code.
  670. */
  671. int phy_startup(struct phy_device *phydev)
  672. {
  673. if (phydev->drv->startup)
  674. return phydev->drv->startup(phydev);
  675. return 0;
  676. }
  677. static int __board_phy_config(struct phy_device *phydev)
  678. {
  679. if (phydev->drv->config)
  680. return phydev->drv->config(phydev);
  681. return 0;
  682. }
  683. int board_phy_config(struct phy_device *phydev)
  684. __attribute__((weak, alias("__board_phy_config")));
  685. int phy_config(struct phy_device *phydev)
  686. {
  687. /* Invoke an optional board-specific helper */
  688. board_phy_config(phydev);
  689. return 0;
  690. }
  691. int phy_shutdown(struct phy_device *phydev)
  692. {
  693. if (phydev->drv->shutdown)
  694. phydev->drv->shutdown(phydev);
  695. return 0;
  696. }