Kconfig 14 KB

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  1. menuconfig RT_USING_SPI
  2. bool "Using SPI Bus/Device device drivers"
  3. default n
  4. help
  5. Enable the SPI framework so hardware controllers and client drivers can
  6. register SPI buses/devices through RT-Thread. This brings in the SPI core,
  7. the DM glue, and the optional software backend. Turn it on for any board
  8. that connects SPI flashes, sensors, RF chips, or display panels; disable
  9. only when SPI is unused to save footprint.
  10. if RT_USING_SPI
  11. menuconfig RT_USING_SPI_ISR
  12. bool "Enable interrupt-safe SPI operations (using spinlocks in ISR context)"
  13. default y
  14. help
  15. Allow SPI APIs to be invoked from interrupt context by guarding
  16. transfer state with spinlocks instead of mutexes. Enable it when
  17. DMA completion or GPIO IRQ handlers need to queue SPI work; leave
  18. it off if every transfer happens in thread context to slightly
  19. reduce locking overhead.
  20. config RT_USING_SPI_BITOPS
  21. bool "Enable SPI bit-bang operation functions"
  22. default n
  23. menuconfig RT_USING_SOFT_SPI
  24. bool "Use GPIO to simulate SPI"
  25. default n
  26. select RT_USING_PIN
  27. select RT_USING_SPI_BITOPS
  28. help
  29. Build software (bit-banged) SPI masters that toggle GPIO pins in
  30. software. Each bus selected below lets you pick SCK/MISO/MOSI pins
  31. and an exported bus name, ideal for simple sensors or when all
  32. hardware SPI controllers are in use.
  33. if RT_USING_SOFT_SPI
  34. menuconfig RT_USING_SOFT_SPI0
  35. bool "Enable SPI0 Bus (software simulation)"
  36. default y
  37. help
  38. Instantiate the first software SPI bus using the pins
  39. configured below. Disable it if your board does not need a
  40. bit-banged SPI0 instance.
  41. if RT_USING_SOFT_SPI0
  42. config RT_SOFT_SPI0_SCK_PIN
  43. int "SCK pin number"
  44. range 0 32767
  45. default 1
  46. config RT_SOFT_SPI0_MISO_PIN
  47. int "MISO pin number"
  48. range 0 32767
  49. default 2
  50. config RT_SOFT_SPI0_MOSI_PIN
  51. int "MOSI pin number"
  52. range 0 32767
  53. default 3
  54. config RT_SOFT_SPI0_BUS_NAME
  55. string "Bus name"
  56. default "spi0"
  57. config RT_SOFT_SPI0_TIMING_DELAY
  58. int "Timing delay (us)"
  59. range 0 32767
  60. default 1
  61. endif
  62. menuconfig RT_USING_SOFT_SPI1
  63. bool "Enable SPI1 Bus (software simulation)"
  64. default y
  65. help
  66. Enable a second software SPI channel for additional
  67. low-speed peripherals when dedicated controllers run out.
  68. if RT_USING_SOFT_SPI1
  69. config RT_SOFT_SPI1_SCK_PIN
  70. int "SCK pin number"
  71. range 0 32767
  72. default 4
  73. config RT_SOFT_SPI1_MISO_PIN
  74. int "MISO pin number"
  75. range 0 32767
  76. default 5
  77. config RT_SOFT_SPI1_MOSI_PIN
  78. int "MOSI pin number"
  79. range 0 32767
  80. default 6
  81. config RT_SOFT_SPI1_BUS_NAME
  82. string "Bus name"
  83. default "spi1"
  84. config RT_SOFT_SPI1_TIMING_DELAY
  85. int "Timing delay (us)"
  86. range 0 32767
  87. default 1
  88. endif
  89. menuconfig RT_USING_SOFT_SPI2
  90. bool "Enable SPI2 Bus (software simulation)"
  91. default n
  92. help
  93. Optional third soft SPI bus. Only enable when the PCB
  94. routes the corresponding GPIO pins.
  95. if RT_USING_SOFT_SPI2
  96. config RT_SOFT_SPI2_SCK_PIN
  97. int "SCK pin number"
  98. range 0 32767
  99. default 7
  100. config RT_SOFT_SPI2_MISO_PIN
  101. int "MISO pin number"
  102. range 0 32767
  103. default 8
  104. config RT_SOFT_SPI2_MOSI_PIN
  105. int "MOSI pin number"
  106. range 0 32767
  107. default 9
  108. config RT_SOFT_SPI2_BUS_NAME
  109. string "Bus name"
  110. default "spi2"
  111. config RT_SOFT_SPI2_TIMING_DELAY
  112. int "Timing delay (us)"
  113. range 0 32767
  114. default 1
  115. endif
  116. menuconfig RT_USING_SOFT_SPI3
  117. bool "Enable SPI3 Bus (software simulation)"
  118. default n
  119. help
  120. Fourth bit-banged SPI bus entry. Leave disabled to save
  121. resources if not wired.
  122. if RT_USING_SOFT_SPI3
  123. config RT_SOFT_SPI3_SCK_PIN
  124. int "SCK pin number"
  125. range 0 32767
  126. default 10
  127. config RT_SOFT_SPI3_MISO_PIN
  128. int "MISO pin number"
  129. range 0 32767
  130. default 11
  131. config RT_SOFT_SPI3_MOSI_PIN
  132. int "MOSI pin number"
  133. range 0 32767
  134. default 12
  135. config RT_SOFT_SPI3_BUS_NAME
  136. string "Bus name"
  137. default "spi3"
  138. config RT_SOFT_SPI3_TIMING_DELAY
  139. int "Timing delay (us)"
  140. range 0 32767
  141. default 1
  142. endif
  143. menuconfig RT_USING_SOFT_SPI4
  144. bool "Enable SPI4 Bus (software simulation)"
  145. default n
  146. help
  147. Provide a fifth software SPI bus; adds static data for the
  148. pin descriptors even when unused.
  149. if RT_USING_SOFT_SPI4
  150. config RT_SOFT_SPI4_SCK_PIN
  151. int "SCK pin number"
  152. range 0 32767
  153. default 13
  154. config RT_SOFT_SPI4_MISO_PIN
  155. int "MISO pin number"
  156. range 0 32767
  157. default 14
  158. config RT_SOFT_SPI4_MOSI_PIN
  159. int "MOSI pin number"
  160. range 0 32767
  161. default 15
  162. config RT_SOFT_SPI4_BUS_NAME
  163. string "Bus name"
  164. default "spi4"
  165. config RT_SOFT_SPI4_TIMING_DELAY
  166. int "Timing delay (us)"
  167. range 0 32767
  168. default 1
  169. endif
  170. menuconfig RT_USING_SOFT_SPI5
  171. bool "Enable SPI5 Bus (software simulation)"
  172. default n
  173. help
  174. Optional sixth software bus for complex designs with many
  175. discrete chips.
  176. if RT_USING_SOFT_SPI5
  177. config RT_SOFT_SPI5_SCK_PIN
  178. int "SCK pin number"
  179. range 0 32767
  180. default 16
  181. config RT_SOFT_SPI5_MISO_PIN
  182. int "MISO pin number"
  183. range 0 32767
  184. default 17
  185. config RT_SOFT_SPI5_MOSI_PIN
  186. int "MOSI pin number"
  187. range 0 32767
  188. default 18
  189. config RT_SOFT_SPI5_BUS_NAME
  190. string "Bus name"
  191. default "spi5"
  192. config RT_SOFT_SPI5_TIMING_DELAY
  193. int "Timing delay (us)"
  194. range 0 32767
  195. default 1
  196. endif
  197. menuconfig RT_USING_SOFT_SPI6
  198. bool "Enable SPI6 Bus (software simulation)"
  199. default n
  200. help
  201. Enable a seventh software SPI controller if more GPIO-only
  202. buses are necessary.
  203. if RT_USING_SOFT_SPI6
  204. config RT_SOFT_SPI6_SCK_PIN
  205. int "SCK pin number"
  206. range 0 32767
  207. default 19
  208. config RT_SOFT_SPI6_MISO_PIN
  209. int "MISO pin number"
  210. range 0 32767
  211. default 20
  212. config RT_SOFT_SPI6_MOSI_PIN
  213. int "MOSI pin number"
  214. range 0 32767
  215. default 21
  216. config RT_SOFT_SPI6_BUS_NAME
  217. string "Bus name"
  218. default "spi6"
  219. config RT_SOFT_SPI6_TIMING_DELAY
  220. int "Timing delay (us)"
  221. range 0 32767
  222. default 1
  223. endif
  224. endif
  225. config RT_SPI_BITOPS_DEBUG
  226. bool "Use simulate SPI debug message"
  227. depends on RT_USING_SOFT_SPI
  228. default n
  229. help
  230. Print the edge-level toggling performed by the software SPI
  231. backend. Useful when verifying custom wiring, but it slows down
  232. transfers considerably.
  233. config RT_USING_QSPI
  234. bool "Enable QSPI mode"
  235. default n
  236. help
  237. Adds Quad-SPI support to the SPI core so flash drivers can switch
  238. MISO/MOSI pins into quad data mode and use controller-specific
  239. QSPI ops. Enable this when your SoC exposes a QSPI controller or
  240. you plan to run SFUD in quad mode.
  241. config RT_USING_SPI_MSD
  242. bool "Using SD/TF card driver with spi"
  243. select RT_USING_DFS
  244. default n
  245. help
  246. Build the SPI-based block driver for SD/TF cards (Mass Storage
  247. Device). Select this when your design wires SD cards to an SPI
  248. bus instead of a dedicated SDIO host; it pulls in DFS for the
  249. filesystem layer.
  250. config RT_USING_SFUD
  251. bool "Using Serial Flash Universal Driver"
  252. default n
  253. help
  254. Pull in the Serial Flash Universal Driver which speaks the JEDEC
  255. SFDP standard, auto-detects parameters, and exposes SPI NOR chips
  256. through the RT-Thread MTD interface. Enable this for off-chip SPI
  257. NOR/QSPI flash storage; disable it if you rely on SoC-specific
  258. flash drivers instead.
  259. if RT_USING_SFUD
  260. config RT_SFUD_USING_SFDP
  261. bool "Using auto probe flash JEDEC SFDP parameter"
  262. default y
  263. help
  264. Parse the flash SFDP tables at runtime for sizing, erase
  265. commands, and quad support. Disable only if your flash lacks
  266. SFDP and you prefer hard-coded settings.
  267. config RT_SFUD_USING_FLASH_INFO_TABLE
  268. bool "Using defined supported flash chip information table"
  269. default y
  270. help
  271. Keep the built-in flash info table so chips without valid SFDP
  272. headers can still be recognized. You can turn it off to reduce
  273. the binary when you know SFDP probing always succeeds.
  274. config RT_SFUD_USING_QSPI
  275. bool "Using QSPI mode support"
  276. select RT_USING_QSPI
  277. default n
  278. help
  279. Allow SFUD to drive flashes via Quad-SPI instructions. Requires
  280. a QSPI-capable controller and board routing.
  281. config RT_SFUD_SPI_MAX_HZ
  282. int "Default spi maximum speed(HZ)"
  283. range 0 50000000
  284. default 50000000
  285. help
  286. Default maximum bus frequency SFUD will request when
  287. probing flashes. Keep it at or below 50 MHz for SFDP per
  288. the JEDEC spec; runtime drivers may still lower it with
  289. `rt_spi_configure()`.
  290. config RT_DEBUG_SFUD
  291. bool "Show more SFUD debug information"
  292. default n
  293. help
  294. Verbosely log SFUD operations (probe, erase, write). Enable
  295. when bringing up new flash parts; keep disabled in production.
  296. endif
  297. config RT_USING_ENC28J60
  298. bool "Using ENC28J60 SPI Ethernet network interface"
  299. select RT_USING_LWIP
  300. default n
  301. help
  302. Build the ENC28J60 Ethernet driver which talks to Microchip's SPI
  303. MAC+PHY and registers a netif on top of lwIP. Enable it when your
  304. board uses the ENC28J60; otherwise it adds dead code.
  305. config RT_USING_SPI_WIFI
  306. bool "Using RW009/007 SPI Wi-Fi wireless interface"
  307. select RT_USING_LWIP
  308. default n
  309. help
  310. Include the RW009/RW007 Wi-Fi driver that exchanges frames via
  311. SPI. Requires lwIP and a matching module connected to the bus.
  312. endif
  313. if RT_USING_DM && RT_USING_SPI
  314. osource "$(SOC_DM_SPI_DIR)/Kconfig"
  315. endif