drv_gpio.h 1.6 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-02 FMD-AE first version
  9. * 2025-12-31 FMD-AE add ft32f4 support
  10. */
  11. #ifndef __DRV_GPIO_H__
  12. #define __DRV_GPIO_H__
  13. #include <board.h>
  14. #ifdef __cplusplus
  15. extern "C" {
  16. #endif
  17. #if defined(SOC_SERIES_FT32F0)
  18. #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
  19. ((__GPIOx__) == (GPIOB))? 1U :\
  20. ((__GPIOx__) == (GPIOC))? 2U :\
  21. ((__GPIOx__) == (GPIOD))? 3U :\
  22. ((__GPIOx__) == (GPIOF))? 5U : 4U)
  23. #elif defined(SOC_SERIES_FT32F4)
  24. #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
  25. ((__GPIOx__) == (GPIOB))? 1U :\
  26. ((__GPIOx__) == (GPIOC))? 2U :\
  27. ((__GPIOx__) == (GPIOD))? 3U :\
  28. ((__GPIOx__) == (GPIOE))? 4U : 5U)
  29. #else
  30. #error "Unsupported SOC series"
  31. #endif
  32. #define __GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
  33. #define __GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
  34. #define __FT32_PORT(port) GPIO##port##_BASE
  35. #define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__FT32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
  36. struct pin_irq_map
  37. {
  38. rt_uint16_t pinbit;
  39. IRQn_Type irqno;
  40. };
  41. int rt_hw_pin_init(void);
  42. #ifdef __cplusplus
  43. }
  44. #endif
  45. #endif /* __DRV_GPIO_H__ */