drv_usart.c 16 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-02 FMD-AE first version
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2)
  18. #error "Please define at least one BSP_USING_UARTx"
  19. /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
  20. #endif
  21. enum
  22. {
  23. #ifdef BSP_USING_UART1
  24. UART1_INDEX,
  25. #endif
  26. #ifdef BSP_USING_UART2
  27. UART2_INDEX,
  28. #endif
  29. };
  30. static struct ft32_uart_config uart_config[] =
  31. {
  32. #ifdef BSP_USING_UART1
  33. UART1_CONFIG,
  34. #endif
  35. #ifdef BSP_USING_UART2
  36. UART2_CONFIG,
  37. #endif
  38. };
  39. static struct ft32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  40. void UART_MspInit(USART_TypeDef *USARTx)
  41. {
  42. GPIO_InitTypeDef GPIO_InitStruct;
  43. if (USARTx == USART1)
  44. {
  45. #if defined(SOC_SERIES_FT32F0)
  46. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
  47. #endif
  48. #if defined(SOC_SERIES_FT32F4)
  49. RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
  50. #endif
  51. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
  52. /*GPIO INIT*/
  53. GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10;
  54. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  55. GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  56. GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  57. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
  58. GPIO_Init(GPIOA, &GPIO_InitStruct);
  59. #if defined(SOC_SERIES_FT32F0)
  60. GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_1);
  61. GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_1);
  62. #endif
  63. #if defined(SOC_SERIES_FT32F4)
  64. GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7);
  65. GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7);
  66. #endif
  67. /* USART1 interrupt Init */
  68. NVIC_SetPriority(USART1_IRQn, 5);
  69. NVIC_EnableIRQ(USART1_IRQn);
  70. }
  71. else if (USARTx == USART2)
  72. {
  73. #if defined(SOC_SERIES_FT32F0)
  74. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
  75. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  76. #endif
  77. #if defined(SOC_SERIES_FT32F4)
  78. RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
  79. RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART2, ENABLE);
  80. #endif
  81. /*GPIO INIT*/
  82. GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3;
  83. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
  84. GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  85. GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  86. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
  87. GPIO_Init(GPIOA, &GPIO_InitStruct);
  88. #if defined(SOC_SERIES_FT32F0)
  89. GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_1);
  90. GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_1);
  91. #endif
  92. #if defined(SOC_SERIES_FT32F4)
  93. GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_7);
  94. GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_7);
  95. #endif
  96. /* USART2 interrupt Init */
  97. NVIC_SetPriority(USART2_IRQn, 5);
  98. NVIC_EnableIRQ(USART2_IRQn);
  99. }
  100. }
  101. static rt_err_t ft32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  102. {
  103. struct ft32_uart *uart;
  104. RT_ASSERT(serial != RT_NULL);
  105. RT_ASSERT(cfg != RT_NULL);
  106. uart = rt_container_of(serial, struct ft32_uart, serial);
  107. uart->Init.USART_BaudRate = cfg->baud_rate;
  108. #if defined(SOC_SERIES_FT32F0)
  109. uart->Init.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
  110. #endif
  111. #if defined(SOC_SERIES_FT32F4)
  112. uart->Init.USART_Mode = USART_MODE_TX_RX;
  113. #endif
  114. switch (cfg->flowcontrol)
  115. {
  116. case RT_SERIAL_FLOWCONTROL_NONE:
  117. uart->Init.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  118. break;
  119. case RT_SERIAL_FLOWCONTROL_CTSRTS:
  120. #if defined(SOC_SERIES_FT32F0)
  121. uart->Init.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_CTS;
  122. #endif
  123. #if defined(SOC_SERIES_FT32F4)
  124. uart->Init.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_DTR;
  125. #endif
  126. break;
  127. default:
  128. uart->Init.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  129. break;
  130. }
  131. switch (cfg->data_bits)
  132. {
  133. #if defined(SOC_SERIES_FT32F0)
  134. case DATA_BITS_8:
  135. if (cfg->parity == PARITY_ODD || cfg->parity == PARITY_EVEN)
  136. uart->Init.USART_WordLength = USART_WordLength_9b;
  137. else
  138. uart->Init.USART_WordLength = USART_WordLength_8b;
  139. break;
  140. case DATA_BITS_9:
  141. uart->Init.USART_WordLength = USART_WordLength_9b;
  142. break;
  143. default:
  144. uart->Init.USART_WordLength = USART_WordLength_8b;
  145. break;
  146. #endif
  147. #if defined(SOC_SERIES_FT32F4)
  148. case DATA_BITS_9:
  149. uart->Init.USART_WordLength = USART_CHAR_LENGTH9_ENABLE;
  150. break;
  151. case DATA_BITS_8:
  152. uart->Init.USART_WordLength = USART_CHAR_LENGTH_8BIT;
  153. break;
  154. case DATA_BITS_7:
  155. uart->Init.USART_WordLength = USART_CHAR_LENGTH_7BIT;
  156. break;
  157. case DATA_BITS_6:
  158. uart->Init.USART_WordLength = USART_CHAR_LENGTH_6BIT;
  159. break;
  160. case DATA_BITS_5:
  161. uart->Init.USART_WordLength = USART_CHAR_LENGTH_5BIT;
  162. break;
  163. default:
  164. uart->Init.USART_WordLength = USART_CHAR_LENGTH_8BIT;
  165. break;
  166. #endif
  167. }
  168. switch (cfg->stop_bits)
  169. {
  170. #if defined(SOC_SERIES_FT32F0)
  171. case STOP_BITS_1:
  172. uart->Init.USART_StopBits = USART_StopBits_1;
  173. break;
  174. case STOP_BITS_2:
  175. uart->Init.USART_StopBits = USART_StopBits_2;
  176. break;
  177. default:
  178. uart->Init.USART_StopBits = USART_StopBits_1;
  179. break;
  180. #endif
  181. #if defined(SOC_SERIES_FT32F4)
  182. case STOP_BITS_1:
  183. uart->Init.USART_StopBits = USART_STOPBITS_1;
  184. break;
  185. case STOP_BITS_2:
  186. uart->Init.USART_StopBits = USART_STOPBITS_2;
  187. break;
  188. default:
  189. uart->Init.USART_StopBits = USART_STOPBITS_1;
  190. break;
  191. #endif
  192. }
  193. switch (cfg->parity)
  194. {
  195. #if defined(SOC_SERIES_FT32F0)
  196. case PARITY_NONE:
  197. uart->Init.USART_Parity = USART_Parity_No;
  198. break;
  199. case PARITY_ODD:
  200. uart->Init.USART_Parity = USART_Parity_Odd;
  201. break;
  202. case PARITY_EVEN:
  203. uart->Init.USART_Parity = USART_Parity_Even;
  204. break;
  205. default:
  206. uart->Init.USART_Parity = USART_Parity_No;
  207. break;
  208. #endif
  209. #if defined(SOC_SERIES_FT32F4)
  210. case PARITY_NONE:
  211. uart->Init.USART_Parity = USART_PARITY_NONE;
  212. break;
  213. case PARITY_ODD:
  214. uart->Init.USART_Parity = USART_PARITY_ODD;
  215. break;
  216. case PARITY_EVEN:
  217. uart->Init.USART_Parity = USART_PARITY_EVEN;
  218. break;
  219. default:
  220. uart->Init.USART_Parity = USART_PARITY_NONE;
  221. break;
  222. #endif
  223. }
  224. UART_MspInit(uart->config->Instance);
  225. USART_Init(uart->config->Instance, &(uart->Init));
  226. USART_Cmd(uart->config->Instance, ENABLE);
  227. return RT_EOK;
  228. }
  229. static rt_err_t ft32_control(struct rt_serial_device *serial, int cmd, void *arg)
  230. {
  231. struct ft32_uart *uart;
  232. RT_ASSERT(serial != RT_NULL);
  233. uart = rt_container_of(serial, struct ft32_uart, serial);
  234. switch (cmd)
  235. {
  236. /* disable interrupt */
  237. case RT_DEVICE_CTRL_CLR_INT:
  238. /* disable rx irq */
  239. NVIC_DisableIRQ(uart->config->irq_type);
  240. /* disable interrupt */
  241. #if defined(SOC_SERIES_FT32F0)
  242. /* enable interrupt */
  243. USART_ITConfig(uart->config->Instance, USART_IT_RXNE, DISABLE);
  244. break;
  245. #endif
  246. #if defined(SOC_SERIES_FT32F4)
  247. /* enable interrupt */
  248. USART_ITConfig(uart->config->Instance, USART_IT_RXRDY, DISABLE);
  249. break;
  250. #endif
  251. break;
  252. /* enable interrupt */
  253. case RT_DEVICE_CTRL_SET_INT:
  254. /* enable rx irq */
  255. NVIC_SetPriority(uart->config->irq_type, 1);
  256. NVIC_EnableIRQ(uart->config->irq_type);
  257. #if defined(SOC_SERIES_FT32F0)
  258. /* enable interrupt */
  259. USART_ITConfig(uart->config->Instance, USART_IT_RXNE, ENABLE);
  260. break;
  261. #endif
  262. #if defined(SOC_SERIES_FT32F4)
  263. /* enable interrupt */
  264. USART_ITConfig(uart->config->Instance, USART_IT_RXRDY, ENABLE);
  265. break;
  266. #endif
  267. break;
  268. case RT_DEVICE_CTRL_CLOSE:
  269. USART_DeInit(uart->config->Instance);
  270. break;
  271. }
  272. return RT_EOK;
  273. }
  274. #if defined(SOC_SERIES_FT32F0)
  275. rt_uint32_t ft32_uart_get_mask(rt_uint32_t word_length, rt_uint32_t parity)
  276. {
  277. rt_uint32_t mask;
  278. if (word_length == USART_WordLength_8b)
  279. {
  280. if (parity == USART_Parity_No)
  281. {
  282. mask = 0x00FFU ;
  283. }
  284. else
  285. {
  286. mask = 0x007FU ;
  287. }
  288. }
  289. else if (word_length == USART_WordLength_9b)
  290. {
  291. if (parity == USART_Parity_No)
  292. {
  293. mask = 0x01FFU ;
  294. }
  295. else
  296. {
  297. mask = 0x00FFU ;
  298. }
  299. }
  300. else if (word_length == USART_WordLength_7b)
  301. {
  302. if (parity == USART_Parity_No)
  303. {
  304. mask = 0x007FU ;
  305. }
  306. else
  307. {
  308. mask = 0x003FU ;
  309. }
  310. }
  311. else
  312. {
  313. mask = 0x0000U;
  314. }
  315. return mask;
  316. }
  317. #endif
  318. static int ft32_putc(struct rt_serial_device *serial, char c)
  319. {
  320. struct ft32_uart *uart;
  321. RT_ASSERT(serial != RT_NULL);
  322. uart = rt_container_of(serial, struct ft32_uart, serial);
  323. #if defined(SOC_SERIES_FT32F0)
  324. UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_TC);
  325. uart->config->Instance->TDR = c;
  326. #elif defined(SOC_SERIES_FT32F4)
  327. USART_Transmit(uart->config->Instance, c);
  328. #else
  329. uart->config->Instance->DR = c;
  330. #endif
  331. #if defined(SOC_SERIES_FT32F0)
  332. while (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TC) == RESET);
  333. #endif
  334. #if defined(SOC_SERIES_FT32F4)
  335. while (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TXRDY) == RESET);
  336. #endif
  337. return 1;
  338. }
  339. static int ft32_getc(struct rt_serial_device *serial)
  340. {
  341. int ch;
  342. struct ft32_uart *uart;
  343. RT_ASSERT(serial != RT_NULL);
  344. uart = rt_container_of(serial, struct ft32_uart, serial);
  345. ch = -1;
  346. #if defined(SOC_SERIES_FT32F0)
  347. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE) != RESET)
  348. #endif
  349. #if defined(SOC_SERIES_FT32F4)
  350. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXRDY) != RESET)
  351. #endif
  352. {
  353. #if defined(SOC_SERIES_FT32F0)
  354. ch = uart->config->Instance->RDR & ft32_uart_get_mask(uart->Init.USART_WordLength, uart->Init.USART_Parity);
  355. #elif defined(SOC_SERIES_FT32F4)
  356. ch = USART_Receive(uart->config->Instance);
  357. #else
  358. ch = uart->config->Instance->DR & ft32_uart_get_mask(uart->Init.USART_WordLength, uart->Init.USART_Parity);
  359. #endif
  360. }
  361. return ch;
  362. }
  363. static rt_ssize_t ft32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  364. {
  365. RT_ASSERT(serial != RT_NULL);
  366. RT_ASSERT(buf != RT_NULL);
  367. if (size == 0)
  368. {
  369. return 0;
  370. }
  371. if (RT_SERIAL_DMA_TX == direction)
  372. {
  373. return size;
  374. }
  375. return 0;
  376. }
  377. /**
  378. * Uart common interrupt process. This need add to uart ISR.
  379. *
  380. * @param serial serial device
  381. */
  382. static void uart_isr(struct rt_serial_device *serial)
  383. {
  384. struct ft32_uart *uart;
  385. RT_ASSERT(serial != RT_NULL);
  386. uart = rt_container_of(serial, struct ft32_uart, serial);
  387. #if defined(SOC_SERIES_FT32F0)
  388. /* UART in mode Receiver -------------------------------------------------*/
  389. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE) != RESET)
  390. {
  391. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  392. }
  393. #endif
  394. #if defined(SOC_SERIES_FT32F4)
  395. /* UART in mode Receiver -------------------------------------------------*/
  396. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXRDY) != RESET)
  397. {
  398. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  399. }
  400. #endif
  401. #if defined (SOC_SERIES_FT32F0)
  402. else
  403. {
  404. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_ORE) != RESET)
  405. {
  406. USART_ClearFlag(uart->config->Instance, USART_FLAG_ORE);
  407. }
  408. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_NE) != RESET)
  409. {
  410. USART_ClearFlag(uart->config->Instance, USART_FLAG_NE);
  411. }
  412. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_FE) != RESET)
  413. {
  414. USART_ClearFlag(uart->config->Instance, USART_FLAG_FE);
  415. }
  416. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_PE) != RESET)
  417. {
  418. USART_ClearFlag(uart->config->Instance, USART_FLAG_PE);
  419. }
  420. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_CTS) != RESET)
  421. {
  422. UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_CTS);
  423. }
  424. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TXE) != RESET)
  425. {
  426. UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_TXE);
  427. }
  428. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TC) != RESET)
  429. {
  430. UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_TC);
  431. }
  432. if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE) != RESET)
  433. {
  434. UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_RXNE);
  435. }
  436. }
  437. #endif
  438. #if defined (SOC_SERIES_FT32F4)
  439. else
  440. {
  441. }
  442. #endif
  443. }
  444. #if defined(SOC_SERIES_FT32F0)
  445. #if defined(BSP_USING_UART1)
  446. void USART1_IRQHandler(void)
  447. {
  448. /* enter interrupt */
  449. rt_interrupt_enter();
  450. uart_isr(&(uart_obj[UART1_INDEX].serial));
  451. /* leave interrupt */
  452. rt_interrupt_leave();
  453. }
  454. #endif /* BSP_USING_UART1 */
  455. #if defined(BSP_USING_UART2)
  456. void USART2_IRQHandler(void)
  457. {
  458. /* enter interrupt */
  459. rt_interrupt_enter();
  460. uart_isr(&(uart_obj[UART2_INDEX].serial));
  461. /* leave interrupt */
  462. rt_interrupt_leave();
  463. }
  464. #endif /* BSP_USING_UART2 */
  465. #endif
  466. #if defined(SOC_SERIES_FT32F4)
  467. #if defined(BSP_USING_UART1)
  468. void USART1_Handler(void)
  469. {
  470. /* enter interrupt */
  471. rt_interrupt_enter();
  472. uart_isr(&(uart_obj[UART1_INDEX].serial));
  473. /* leave interrupt */
  474. rt_interrupt_leave();
  475. }
  476. #endif /* BSP_USING_UART1 */
  477. #if defined(BSP_USING_UART2)
  478. void USART2_Handler(void)
  479. {
  480. /* enter interrupt */
  481. rt_interrupt_enter();
  482. uart_isr(&(uart_obj[UART2_INDEX].serial));
  483. /* leave interrupt */
  484. rt_interrupt_leave();
  485. }
  486. #endif /* BSP_USING_UART2 */
  487. #endif
  488. static void ft32_uart_get_dma_config(void)
  489. {
  490. #ifdef BSP_USING_UART1
  491. uart_obj[UART1_INDEX].uart_dma_flag = 0;
  492. #endif
  493. #ifdef BSP_USING_UART2
  494. uart_obj[UART2_INDEX].uart_dma_flag = 0;
  495. #endif
  496. }
  497. static const struct rt_uart_ops ft32_uart_ops =
  498. {
  499. .configure = ft32_configure,
  500. .control = ft32_control,
  501. .putc = ft32_putc,
  502. .getc = ft32_getc,
  503. .dma_transmit = ft32_dma_transmit
  504. };
  505. int rt_hw_usart_init(void)
  506. {
  507. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ft32_uart);
  508. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  509. rt_err_t result = 0;
  510. ft32_uart_get_dma_config();
  511. for (int i = 0; i < obj_num; i++)
  512. {
  513. /* init UART object */
  514. uart_obj[i].config = &uart_config[i];
  515. uart_obj[i].serial.ops = &ft32_uart_ops;
  516. uart_obj[i].serial.config = config;
  517. /* register UART device */
  518. result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
  519. RT_DEVICE_FLAG_RDWR
  520. | RT_DEVICE_FLAG_INT_RX
  521. | RT_DEVICE_FLAG_INT_TX
  522. | uart_obj[i].uart_dma_flag
  523. , NULL);
  524. RT_ASSERT(result == RT_EOK);
  525. }
  526. return result;
  527. }
  528. #endif /* RT_USING_SERIAL */