mpu.c 15 KB

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  1. //*****************************************************************************
  2. //
  3. // mpu.c - Driver for the Cortex-M3 memory protection unit (MPU).
  4. //
  5. // Copyright (c) 2007-2011 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 8049 of the Stellaris Peripheral Driver Library.
  22. //
  23. //*****************************************************************************
  24. //*****************************************************************************
  25. //
  26. //! \addtogroup mpu_api
  27. //! @{
  28. //
  29. //*****************************************************************************
  30. #include "inc/hw_ints.h"
  31. #include "inc/hw_nvic.h"
  32. #include "inc/hw_types.h"
  33. #include "driverlib/debug.h"
  34. #include "driverlib/interrupt.h"
  35. #include "driverlib/mpu.h"
  36. //*****************************************************************************
  37. //
  38. //! Enables and configures the MPU for use.
  39. //!
  40. //! \param ulMPUConfig is the logical OR of the possible configurations.
  41. //!
  42. //! This function enables the Cortex-M3 memory protection unit. It also
  43. //! configures the default behavior when in privileged mode and while handling
  44. //! a hard fault or NMI. Prior to enabling the MPU, at least one region must
  45. //! be set by calling MPURegionSet() or else by enabling the default region for
  46. //! privileged mode by passing the \b MPU_CONFIG_PRIV_DEFAULT flag to
  47. //! MPUEnable(). Once the MPU is enabled, a memory management fault are
  48. //! generated for any memory access violations.
  49. //!
  50. //! The \e ulMPUConfig parameter should be the logical OR of any of the
  51. //! following:
  52. //!
  53. //! - \b MPU_CONFIG_PRIV_DEFAULT enables the default memory map when in
  54. //! privileged mode and when no other regions are defined. If this option
  55. //! is not enabled, then there must be at least one valid region already
  56. //! defined when the MPU is enabled.
  57. //! - \b MPU_CONFIG_HARDFLT_NMI enables the MPU while in a hard fault or NMI
  58. //! exception handler. If this option is not enabled, then the MPU is
  59. //! disabled while in one of these exception handlers and the default
  60. //! memory map is applied.
  61. //! - \b MPU_CONFIG_NONE chooses none of the above options. In this case,
  62. //! no default memory map is provided in privileged mode, and the MPU will
  63. //! not be enabled in the fault handlers.
  64. //!
  65. //! \return None.
  66. //
  67. //*****************************************************************************
  68. void
  69. MPUEnable(unsigned long ulMPUConfig)
  70. {
  71. //
  72. // Check the arguments.
  73. //
  74. ASSERT(!(ulMPUConfig & ~(MPU_CONFIG_PRIV_DEFAULT |
  75. MPU_CONFIG_HARDFLT_NMI)));
  76. //
  77. // Set the MPU control bits according to the flags passed by the user,
  78. // and also set the enable bit.
  79. //
  80. HWREG(NVIC_MPU_CTRL) = ulMPUConfig | NVIC_MPU_CTRL_ENABLE;
  81. }
  82. //*****************************************************************************
  83. //
  84. //! Disables the MPU for use.
  85. //!
  86. //! This function disables the Cortex-M3 memory protection unit. When the
  87. //! MPU is disabled, the default memory map is used and memory management
  88. //! faults are not generated.
  89. //!
  90. //! \return None.
  91. //
  92. //*****************************************************************************
  93. void
  94. MPUDisable(void)
  95. {
  96. //
  97. // Turn off the MPU enable bit.
  98. //
  99. HWREG(NVIC_MPU_CTRL) &= ~NVIC_MPU_CTRL_ENABLE;
  100. }
  101. //*****************************************************************************
  102. //
  103. //! Gets the count of regions supported by the MPU.
  104. //!
  105. //! This function is used to get the number of regions that are supported by
  106. //! the MPU. This is the total number that are supported, including regions
  107. //! that are already programmed.
  108. //!
  109. //! \return The number of memory protection regions that are available
  110. //! for programming using MPURegionSet().
  111. //
  112. //*****************************************************************************
  113. unsigned long
  114. MPURegionCountGet(void)
  115. {
  116. //
  117. // Read the DREGION field of the MPU type register, and mask off
  118. // the bits of interest to get the count of regions.
  119. //
  120. return((HWREG(NVIC_MPU_TYPE) & NVIC_MPU_TYPE_DREGION_M)
  121. >> NVIC_MPU_TYPE_DREGION_S);
  122. }
  123. //*****************************************************************************
  124. //
  125. //! Enables a specific region.
  126. //!
  127. //! \param ulRegion is the region number to enable.
  128. //!
  129. //! This function is used to enable a memory protection region. The region
  130. //! should already be set up with the MPURegionSet() function. Once enabled,
  131. //! the memory protection rules of the region are applied and access violations
  132. //! will cause a memory management fault.
  133. //!
  134. //! \return None.
  135. //
  136. //*****************************************************************************
  137. void
  138. MPURegionEnable(unsigned long ulRegion)
  139. {
  140. //
  141. // Check the arguments.
  142. //
  143. ASSERT(ulRegion < 8);
  144. //
  145. // Select the region to modify.
  146. //
  147. HWREG(NVIC_MPU_NUMBER) = ulRegion;
  148. //
  149. // Modify the enable bit in the region attributes.
  150. //
  151. HWREG(NVIC_MPU_ATTR) |= NVIC_MPU_ATTR_ENABLE;
  152. }
  153. //*****************************************************************************
  154. //
  155. //! Disables a specific region.
  156. //!
  157. //! \param ulRegion is the region number to disable.
  158. //!
  159. //! This function is used to disable a previously enabled memory protection
  160. //! region. The region will remain configured if it is not overwritten with
  161. //! another call to MPURegionSet(), and can be enabled again by calling
  162. //! MPURegionEnable().
  163. //!
  164. //! \return None.
  165. //
  166. //*****************************************************************************
  167. void
  168. MPURegionDisable(unsigned long ulRegion)
  169. {
  170. //
  171. // Check the arguments.
  172. //
  173. ASSERT(ulRegion < 8);
  174. //
  175. // Select the region to modify.
  176. //
  177. HWREG(NVIC_MPU_NUMBER) = ulRegion;
  178. //
  179. // Modify the enable bit in the region attributes.
  180. //
  181. HWREG(NVIC_MPU_ATTR) &= ~NVIC_MPU_ATTR_ENABLE;
  182. }
  183. //*****************************************************************************
  184. //
  185. //! Sets up the access rules for a specific region.
  186. //!
  187. //! \param ulRegion is the region number to set up.
  188. //! \param ulAddr is the base address of the region. It must be aligned
  189. //! according to the size of the region specified in ulFlags.
  190. //! \param ulFlags is a set of flags to define the attributes of the region.
  191. //!
  192. //! This function sets up the protection rules for a region. The region has
  193. //! a base address and a set of attributes including the size, which must
  194. //! be a power of 2. The base address parameter, \e ulAddr, must be aligned
  195. //! according to the size.
  196. //!
  197. //! The \e ulFlags parameter is the logical OR of all of the attributes
  198. //! of the region. It is a combination of choices for region size,
  199. //! execute permission, read/write permissions, disabled sub-regions,
  200. //! and a flag to determine if the region is enabled.
  201. //!
  202. //! The size flag determines the size of a region, and must be one of the
  203. //! following:
  204. //!
  205. //! - \b MPU_RGN_SIZE_32B
  206. //! - \b MPU_RGN_SIZE_64B
  207. //! - \b MPU_RGN_SIZE_128B
  208. //! - \b MPU_RGN_SIZE_256B
  209. //! - \b MPU_RGN_SIZE_512B
  210. //! - \b MPU_RGN_SIZE_1K
  211. //! - \b MPU_RGN_SIZE_2K
  212. //! - \b MPU_RGN_SIZE_4K
  213. //! - \b MPU_RGN_SIZE_8K
  214. //! - \b MPU_RGN_SIZE_16K
  215. //! - \b MPU_RGN_SIZE_32K
  216. //! - \b MPU_RGN_SIZE_64K
  217. //! - \b MPU_RGN_SIZE_128K
  218. //! - \b MPU_RGN_SIZE_256K
  219. //! - \b MPU_RGN_SIZE_512K
  220. //! - \b MPU_RGN_SIZE_1M
  221. //! - \b MPU_RGN_SIZE_2M
  222. //! - \b MPU_RGN_SIZE_4M
  223. //! - \b MPU_RGN_SIZE_8M
  224. //! - \b MPU_RGN_SIZE_16M
  225. //! - \b MPU_RGN_SIZE_32M
  226. //! - \b MPU_RGN_SIZE_64M
  227. //! - \b MPU_RGN_SIZE_128M
  228. //! - \b MPU_RGN_SIZE_256M
  229. //! - \b MPU_RGN_SIZE_512M
  230. //! - \b MPU_RGN_SIZE_1G
  231. //! - \b MPU_RGN_SIZE_2G
  232. //! - \b MPU_RGN_SIZE_4G
  233. //!
  234. //! The execute permission flag must be one of the following:
  235. //!
  236. //! - \b MPU_RGN_PERM_EXEC enables the region for execution of code
  237. //! - \b MPU_RGN_PERM_NOEXEC disables the region for execution of code
  238. //!
  239. //! The read/write access permissions are applied separately for the
  240. //! privileged and user modes. The read/write access flags must be one
  241. //! of the following:
  242. //!
  243. //! - \b MPU_RGN_PERM_PRV_NO_USR_NO - no access in privileged or user mode
  244. //! - \b MPU_RGN_PERM_PRV_RW_USR_NO - privileged read/write, user no access
  245. //! - \b MPU_RGN_PERM_PRV_RW_USR_RO - privileged read/write, user read-only
  246. //! - \b MPU_RGN_PERM_PRV_RW_USR_RW - privileged read/write, user read/write
  247. //! - \b MPU_RGN_PERM_PRV_RO_USR_NO - privileged read-only, user no access
  248. //! - \b MPU_RGN_PERM_PRV_RO_USR_RO - privileged read-only, user read-only
  249. //!
  250. //! The region is automatically divided into 8 equally-sized sub-regions by
  251. //! the MPU. Sub-regions can only be used in regions of size 256 bytes
  252. //! or larger. Any of these 8 sub-regions can be disabled. This allows
  253. //! for creation of ``holes'' in a region which can be left open, or overlaid
  254. //! by another region with different attributes. Any of the 8 sub-regions
  255. //! can be disabled with a logical OR of any of the following flags:
  256. //!
  257. //! - \b MPU_SUB_RGN_DISABLE_0
  258. //! - \b MPU_SUB_RGN_DISABLE_1
  259. //! - \b MPU_SUB_RGN_DISABLE_2
  260. //! - \b MPU_SUB_RGN_DISABLE_3
  261. //! - \b MPU_SUB_RGN_DISABLE_4
  262. //! - \b MPU_SUB_RGN_DISABLE_5
  263. //! - \b MPU_SUB_RGN_DISABLE_6
  264. //! - \b MPU_SUB_RGN_DISABLE_7
  265. //!
  266. //! Finally, the region can be initially enabled or disabled with one of
  267. //! the following flags:
  268. //!
  269. //! - \b MPU_RGN_ENABLE
  270. //! - \b MPU_RGN_DISABLE
  271. //!
  272. //! As an example, to set a region with the following attributes: size of
  273. //! 32 KB, execution enabled, read-only for both privileged and user, one
  274. //! sub-region disabled, and initially enabled; the \e ulFlags parameter would
  275. //! have the following value:
  276. //!
  277. //! <code>
  278. //! (MPU_RG_SIZE_32K | MPU_RGN_PERM_EXEC | MPU_RGN_PERM_PRV_RO_USR_RO |
  279. //! MPU_SUB_RGN_DISABLE_2 | MPU_RGN_ENABLE)
  280. //! </code>
  281. //!
  282. //! \note This function will write to multiple registers and is not protected
  283. //! from interrupts. It is possible that an interrupt which accesses a
  284. //! region may occur while that region is in the process of being changed.
  285. //! The safest way to handle this is to disable a region before changing it.
  286. //! Refer to the discussion of this in the API Detailed Description section.
  287. //!
  288. //! \return None.
  289. //
  290. //*****************************************************************************
  291. void
  292. MPURegionSet(unsigned long ulRegion, unsigned long ulAddr,
  293. unsigned long ulFlags)
  294. {
  295. //
  296. // Check the arguments.
  297. //
  298. ASSERT(ulRegion < 8);
  299. ASSERT((ulAddr & ~0 << (((ulFlags & NVIC_MPU_ATTR_SIZE_M) >> 1) + 1))
  300. == ulAddr);
  301. //
  302. // Program the base address, use the region field to select the
  303. // region at the same time.
  304. //
  305. HWREG(NVIC_MPU_BASE) = ulAddr | ulRegion | NVIC_MPU_BASE_VALID;
  306. //
  307. // Program the region attributes. Set the TEX field and the S, C,
  308. // and B bits to fixed values that are suitable for all Stellaris
  309. // memory.
  310. //
  311. HWREG(NVIC_MPU_ATTR) = (ulFlags & ~(NVIC_MPU_ATTR_TEX_M |
  312. NVIC_MPU_ATTR_CACHEABLE)) |
  313. NVIC_MPU_ATTR_SHAREABLE |
  314. NVIC_MPU_ATTR_BUFFRABLE;
  315. }
  316. //*****************************************************************************
  317. //
  318. //! Gets the current settings for a specific region.
  319. //!
  320. //! \param ulRegion is the region number to get.
  321. //! \param pulAddr points to storage for the base address of the region.
  322. //! \param pulFlags points to the attribute flags for the region.
  323. //!
  324. //! This function retrieves the configuration of a specific region. The
  325. //! meanings and format of the parameters is the same as that of the
  326. //! MPURegionSet() function.
  327. //!
  328. //! This function can be used to save the configuration of a region for later
  329. //! use with the MPURegionSet() function. The region's enable state is
  330. //! preserved in the attributes that are saved.
  331. //!
  332. //! \return None.
  333. //
  334. //*****************************************************************************
  335. void
  336. MPURegionGet(unsigned long ulRegion, unsigned long *pulAddr,
  337. unsigned long *pulFlags)
  338. {
  339. //
  340. // Check the arguments.
  341. //
  342. ASSERT(ulRegion < 8);
  343. ASSERT(pulAddr);
  344. ASSERT(pulFlags);
  345. //
  346. // Select the region to get.
  347. //
  348. HWREG(NVIC_MPU_NUMBER) = ulRegion;
  349. //
  350. // Read and store the base address for the region.
  351. //
  352. *pulAddr = HWREG(NVIC_MPU_BASE);
  353. //
  354. // Read and store the region attributes.
  355. //
  356. *pulFlags = HWREG(NVIC_MPU_ATTR);
  357. }
  358. //*****************************************************************************
  359. //
  360. //! Registers an interrupt handler for the memory management fault.
  361. //!
  362. //! \param pfnHandler is a pointer to the function to be called when the
  363. //! memory management fault occurs.
  364. //!
  365. //! This sets and enables the handler to be called when the MPU generates
  366. //! a memory management fault due to a protection region access violation.
  367. //!
  368. //! \sa IntRegister() for important information about registering interrupt
  369. //! handlers.
  370. //!
  371. //! \return None.
  372. //
  373. //*****************************************************************************
  374. void
  375. MPUIntRegister(void (*pfnHandler)(void))
  376. {
  377. //
  378. // Check the arguments.
  379. //
  380. ASSERT(pfnHandler);
  381. //
  382. // Register the interrupt handler.
  383. //
  384. IntRegister(FAULT_MPU, pfnHandler);
  385. //
  386. // Enable the memory management fault.
  387. //
  388. IntEnable(FAULT_MPU);
  389. }
  390. //*****************************************************************************
  391. //
  392. //! Unregisters an interrupt handler for the memory management fault.
  393. //!
  394. //! This function will disable and clear the handler to be called when a
  395. //! memory management fault occurs.
  396. //!
  397. //! \sa IntRegister() for important information about registering interrupt
  398. //! handlers.
  399. //!
  400. //! \return None.
  401. //
  402. //*****************************************************************************
  403. void
  404. MPUIntUnregister(void)
  405. {
  406. //
  407. // Disable the interrupt.
  408. //
  409. IntDisable(FAULT_MPU);
  410. //
  411. // Unregister the interrupt handler.
  412. //
  413. IntUnregister(FAULT_MPU);
  414. }
  415. //*****************************************************************************
  416. //
  417. // Close the Doxygen group.
  418. //! @}
  419. //
  420. //*****************************************************************************