drv_spi.c 8.9 KB

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  1. /*
  2. * Copyright (c) 2006-2024 RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-07-18 Rbb666 first version
  9. * 2023-03-30 Rbb666 update spi driver
  10. * 2025-04-27 Hydevcode update spi driver
  11. */
  12. #include <drv_spi.h>
  13. #ifdef RT_USING_SPI
  14. /*#define DRV_DEBUG*/
  15. #define DBG_TAG "drv.spi"
  16. #ifdef DRV_DEBUG
  17. #define DBG_LVL DBG_LOG
  18. #else
  19. #define DBG_LVL DBG_INFO
  20. #endif /* DRV_DEBUG */
  21. #include <rtdbg.h>
  22. #ifdef BSP_USING_SPI0
  23. static struct rt_spi_bus spi_bus0;
  24. #endif
  25. #ifdef BSP_USING_SPI3
  26. static struct rt_spi_bus spi_bus3;
  27. #endif
  28. #ifdef BSP_USING_SPI5
  29. static struct rt_spi_bus spi_bus5;
  30. #endif
  31. #ifdef BSP_USING_SPI6
  32. static struct rt_spi_bus spi_bus6;
  33. #endif
  34. static struct ifx_spi_handle spi_bus_obj[] =
  35. {
  36. #if defined(BSP_USING_SPI0)
  37. #if defined(SOC_XMC7100D_F144K4160AA)
  38. {
  39. .bus_name = "spi0",
  40. .sck_pin = GET_PIN(0, 2),
  41. .miso_pin = GET_PIN(1, 0),
  42. .mosi_pin = GET_PIN(1, 1),
  43. },
  44. #else
  45. {
  46. .bus_name = "spi0",
  47. .sck_pin = GET_PIN(0, 4),
  48. .miso_pin = GET_PIN(0, 3),
  49. .mosi_pin = GET_PIN(0, 2),
  50. },
  51. #endif
  52. #endif
  53. #if defined(BSP_USING_SPI3)
  54. {
  55. .bus_name = "spi3",
  56. .sck_pin = GET_PIN(6, 2),
  57. .miso_pin = GET_PIN(6, 1),
  58. .mosi_pin = GET_PIN(6, 0),
  59. },
  60. #endif
  61. #if defined(BSP_USING_SPI5)
  62. {
  63. .bus_name = "spi5",
  64. .sck_pin = GET_PIN(7, 2),
  65. .miso_pin = GET_PIN(7, 0),
  66. .mosi_pin = GET_PIN(7, 1),
  67. },
  68. #endif
  69. #if defined(BSP_USING_SPI6)
  70. {
  71. .bus_name = "spi6",
  72. .sck_pin = GET_PIN(12, 2),
  73. .miso_pin = GET_PIN(12, 1),
  74. .mosi_pin = GET_PIN(12, 0),
  75. },
  76. #endif
  77. };
  78. static struct ifx_spi spi_config[sizeof(spi_bus_obj) / sizeof(spi_bus_obj[0])] =
  79. {0};
  80. /* private rt-thread spi ops function */
  81. static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
  82. static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message);
  83. static struct rt_spi_ops ifx_spi_ops =
  84. {
  85. .configure = spi_configure,
  86. .xfer = spixfer,
  87. };
  88. static void spi_interrupt_callback(void *arg, cyhal_spi_event_t event)
  89. {
  90. struct ifx_spi *spi_drv = (struct ifx_spi *)arg;
  91. rt_interrupt_enter();
  92. if ((event & CYHAL_SPI_IRQ_DONE) != 0u)
  93. {
  94. /* Transmission is complete. Handle Event */
  95. rt_completion_done(&spi_drv->cpt);
  96. }
  97. rt_interrupt_leave();
  98. }
  99. static void ifx_spi_init(struct ifx_spi *spi_device)
  100. {
  101. RT_ASSERT(spi_device != RT_NULL);
  102. rt_err_t result = RT_EOK;
  103. static uint8_t init_flag = 1;
  104. if (init_flag)
  105. {
  106. result = cyhal_spi_init(spi_device->spi_handle_t->spi_obj, spi_device->spi_handle_t->mosi_pin, spi_device->spi_handle_t->miso_pin,
  107. spi_device->spi_handle_t->sck_pin, NC, NULL, spi_device->spi_handle_t->spi_obj->data_bits,
  108. spi_device->spi_handle_t->spi_obj->mode, false);
  109. if (result != RT_EOK)
  110. {
  111. LOG_E("spi%s init fail", spi_device->spi_handle_t->bus_name);
  112. return;
  113. }
  114. result = cyhal_spi_set_frequency(spi_device->spi_handle_t->spi_obj, spi_device->spi_handle_t->freq);
  115. if (result == CYHAL_SPI_RSLT_CLOCK_ERROR)
  116. {
  117. LOG_E("%s set frequency fail", spi_device->spi_handle_t->bus_name);
  118. return;
  119. }
  120. LOG_I("[%s] freq:[%d]HZ\n", spi_device->spi_handle_t->bus_name, spi_device->spi_handle_t->freq);
  121. /* Register a callback function to be called when the interrupt fires */
  122. cyhal_spi_register_callback(spi_device->spi_handle_t->spi_obj, spi_interrupt_callback, spi_device);
  123. /* Enable the events that will trigger the call back function */
  124. cyhal_spi_enable_event(spi_device->spi_handle_t->spi_obj, CYHAL_SPI_IRQ_DONE, 4, true);
  125. }
  126. init_flag = 0;
  127. }
  128. static rt_err_t spi_configure(struct rt_spi_device *device,
  129. struct rt_spi_configuration *configuration)
  130. {
  131. RT_ASSERT(device != RT_NULL);
  132. RT_ASSERT(configuration != RT_NULL);
  133. struct ifx_spi *spi_device = rt_container_of(device->bus, struct ifx_spi, spi_bus);
  134. /* data_width */
  135. if (configuration->data_width <= 8)
  136. {
  137. spi_device->spi_handle_t->spi_obj->data_bits = 8;
  138. }
  139. else if (configuration->data_width <= 16)
  140. {
  141. spi_device->spi_handle_t->spi_obj->data_bits = 16;
  142. }
  143. else
  144. {
  145. return -RT_EIO;
  146. }
  147. uint32_t max_hz;
  148. max_hz = configuration->max_hz;
  149. spi_device->spi_handle_t->freq = max_hz;
  150. /* MSB or LSB */
  151. switch (configuration->mode & RT_SPI_MODE_3)
  152. {
  153. case RT_SPI_MODE_0:
  154. spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_00_MSB;
  155. break;
  156. case RT_SPI_MODE_1:
  157. spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_01_MSB;
  158. break;
  159. case RT_SPI_MODE_2:
  160. spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_10_MSB;
  161. break;
  162. case RT_SPI_MODE_3:
  163. spi_device->spi_handle_t->spi_obj->mode = CYHAL_SPI_MODE_11_MSB;
  164. break;
  165. }
  166. ifx_spi_init(spi_device);
  167. return RT_EOK;
  168. }
  169. static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  170. {
  171. RT_ASSERT(device != NULL);
  172. RT_ASSERT(message != NULL);
  173. struct ifx_spi *spi_device = rt_container_of(device->bus, struct ifx_spi, spi_bus);
  174. /* take CS */
  175. if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  176. {
  177. if (device->config.mode & RT_SPI_CS_HIGH)
  178. {
  179. cyhal_gpio_write(device->cs_pin, PIN_HIGH);
  180. }
  181. else
  182. {
  183. cyhal_gpio_write(device->cs_pin, PIN_LOW);
  184. }
  185. LOG_D("spi take cs\n");
  186. }
  187. int result = RT_EOK;
  188. if (message->length > 0)
  189. {
  190. if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
  191. {
  192. /**< receive message */
  193. result = cyhal_spi_transfer(spi_device->spi_handle_t->spi_obj, RT_NULL, 0x00, message->recv_buf, message->length, 0x00);
  194. }
  195. else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
  196. {
  197. /**< send message */
  198. result = cyhal_spi_transfer(spi_device->spi_handle_t->spi_obj, message->send_buf, message->length, RT_NULL, 0x00, 0x00);
  199. }
  200. else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
  201. {
  202. /**< send and receive message */
  203. result = cyhal_spi_transfer(spi_device->spi_handle_t->spi_obj, message->send_buf, message->length, message->recv_buf, message->length, 0x00);
  204. }
  205. /* blocking the thread,and the other tasks can run */
  206. rt_completion_wait(&spi_device->cpt, RT_WAITING_FOREVER);
  207. }
  208. if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  209. {
  210. if (device->config.mode & RT_SPI_CS_HIGH)
  211. cyhal_gpio_write(device->cs_pin, PIN_LOW);
  212. else
  213. cyhal_gpio_write(device->cs_pin, PIN_HIGH);
  214. }
  215. return message->length;
  216. }
  217. /**
  218. * Attach the spi device to SPI bus, this function must be used after initialization.
  219. */
  220. rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
  221. {
  222. RT_ASSERT(bus_name != RT_NULL);
  223. RT_ASSERT(device_name != RT_NULL);
  224. rt_err_t result;
  225. struct rt_spi_device *spi_device;
  226. /* attach the device to spi bus*/
  227. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  228. RT_ASSERT(spi_device != RT_NULL);
  229. result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
  230. if (result != RT_EOK)
  231. {
  232. LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
  233. }
  234. RT_ASSERT(result == RT_EOK);
  235. LOG_D("%s attach to %s done", device_name, bus_name);
  236. return result;
  237. }
  238. int rt_hw_spi_init(void)
  239. {
  240. int result = RT_EOK;
  241. for (int spi_index = 0; spi_index < sizeof(spi_bus_obj) / sizeof(spi_bus_obj[0]); spi_index++)
  242. {
  243. spi_bus_obj[spi_index].spi_obj = rt_malloc(sizeof(cyhal_spi_t));
  244. RT_ASSERT(spi_bus_obj[spi_index].spi_obj != RT_NULL);
  245. spi_config[spi_index].spi_handle_t = &spi_bus_obj[spi_index];
  246. rt_err_t err = rt_spi_bus_register(&spi_config[spi_index].spi_bus, spi_bus_obj[spi_index].bus_name, &ifx_spi_ops);
  247. if (RT_EOK != err)
  248. {
  249. LOG_E("%s bus register failed.", spi_config[spi_index].spi_handle_t->bus_name);
  250. return -RT_ERROR;
  251. }
  252. LOG_D("MOSI PIN:[%d], MISO PIN[%d], CLK PIN[%d]\n",
  253. spi_bus_obj[spi_index].mosi_pin, spi_bus_obj[spi_index].miso_pin,
  254. spi_bus_obj[spi_index].sck_pin);
  255. /* initialize completion object */
  256. rt_completion_init(&spi_config[spi_index].cpt);
  257. }
  258. return result;
  259. }
  260. INIT_BOARD_EXPORT(rt_hw_spi_init);
  261. #endif /* RT_USING_SPI */