timer_config.h 4.9 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2024-02-20 CDT first version
  10. */
  11. #ifndef __TMR_CONFIG_H__
  12. #define __TMR_CONFIG_H__
  13. #include <rtthread.h>
  14. #ifdef __cplusplus
  15. extern "C" {
  16. #endif
  17. #ifdef BSP_USING_TMRA_1
  18. #ifndef TMRA_1_CONFIG
  19. #define TMRA_1_CONFIG \
  20. { \
  21. .tmr_handle = CM_TMRA_1, \
  22. .clock_source = CLK_BUS_PCLK0, \
  23. .clock = FCG2_PERIPH_TMRA_1, \
  24. .flag = TMRA_FLAG_OVF, \
  25. .isr = \
  26. { \
  27. .enIntSrc = INT_SRC_TMRA_1_OVF, \
  28. .enIRQn = BSP_USING_TMRA_1_IRQ_NUM, \
  29. .u8Int_Prio = BSP_USING_TMRA_1_IRQ_PRIO, \
  30. }, \
  31. .name = "tmra_1" \
  32. }
  33. #endif /* TMRA_1_CONFIG */
  34. #endif /* BSP_USING_TMRA_1 */
  35. #ifdef BSP_USING_TMRA_2
  36. #ifndef TMRA_2_CONFIG
  37. #define TMRA_2_CONFIG \
  38. { \
  39. .tmr_handle = CM_TMRA_2, \
  40. .clock_source = CLK_BUS_PCLK0, \
  41. .clock = FCG2_PERIPH_TMRA_2, \
  42. .flag = TMRA_FLAG_OVF, \
  43. .isr = \
  44. { \
  45. .enIntSrc = INT_SRC_TMRA_2_OVF, \
  46. .enIRQn = BSP_USING_TMRA_2_IRQ_NUM, \
  47. .u8Int_Prio = BSP_USING_TMRA_2_IRQ_PRIO, \
  48. }, \
  49. .name = "tmra_2" \
  50. }
  51. #endif /* TMRA_2_CONFIG */
  52. #endif /* BSP_USING_TMRA_2 */
  53. #ifdef BSP_USING_TMRA_3
  54. #ifndef TMRA_3_CONFIG
  55. #define TMRA_3_CONFIG \
  56. { \
  57. .tmr_handle = CM_TMRA_3, \
  58. .clock_source = CLK_BUS_PCLK0, \
  59. .clock = FCG2_PERIPH_TMRA_3, \
  60. .flag = TMRA_FLAG_OVF, \
  61. .isr = \
  62. { \
  63. .enIntSrc = INT_SRC_TMRA_3_OVF, \
  64. .enIRQn = BSP_USING_TMRA_3_IRQ_NUM, \
  65. .u8Int_Prio = BSP_USING_TMRA_3_IRQ_PRIO, \
  66. }, \
  67. .name = "tmra_3" \
  68. }
  69. #endif /* TMRA_3_CONFIG */
  70. #endif /* BSP_USING_TMRA_3 */
  71. #ifdef BSP_USING_TMRA_4
  72. #ifndef TMRA_4_CONFIG
  73. #define TMRA_4_CONFIG \
  74. { \
  75. .tmr_handle = CM_TMRA_4, \
  76. .clock_source = CLK_BUS_PCLK0, \
  77. .clock = FCG2_PERIPH_TMRA_4, \
  78. .flag = TMRA_FLAG_OVF, \
  79. .isr = \
  80. { \
  81. .enIntSrc = INT_SRC_TMRA_4_OVF, \
  82. .enIRQn = BSP_USING_TMRA_4_IRQ_NUM, \
  83. .u8Int_Prio = BSP_USING_TMRA_4_IRQ_PRIO, \
  84. }, \
  85. .name = "tmra_4" \
  86. }
  87. #endif /* TMRA_4_CONFIG */
  88. #endif /* BSP_USING_TMRA_4 */
  89. #ifdef BSP_USING_TMRA_5
  90. #ifndef TMRA_5_CONFIG
  91. #define TMRA_5_CONFIG \
  92. { \
  93. .tmr_handle = CM_TMRA_5, \
  94. .clock_source = CLK_BUS_PCLK1, \
  95. .clock = FCG2_PERIPH_TMRA_5, \
  96. .flag = TMRA_FLAG_OVF, \
  97. .isr = \
  98. { \
  99. .enIntSrc = INT_SRC_TMRA_5_OVF, \
  100. .enIRQn = BSP_USING_TMRA_5_IRQ_NUM, \
  101. .u8Int_Prio = BSP_USING_TMRA_5_IRQ_PRIO, \
  102. }, \
  103. .name = "tmra_5" \
  104. }
  105. #endif /* TMRA_5_CONFIG */
  106. #endif /* BSP_USING_TMRA_5 */
  107. #endif /* __TMR_CONFIG_H__ */