.secure_xml 6.5 KB

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  1. <?xml version="1.0" encoding="UTF-8" standalone="no"?>
  2. <raConfiguration version="9">
  3. <generalSettings>
  4. <option key="#Board#" value="board.ra6e2fpb"/>
  5. <option key="CPU" value="RA6E2"/>
  6. <option key="Core" value="CM33"/>
  7. <option key="#TargetName#" value="R7FA6E2BB3CFM"/>
  8. <option key="#TargetARCHITECTURE#" value="cortex-m33"/>
  9. <option key="#DeviceCommand#" value="R7FA6E2BB"/>
  10. <option key="#RTOS#" value="_none"/>
  11. <option key="#pinconfiguration#" value="R7FA6E2BB3CFM.pincfg"/>
  12. <option key="#FSPVersion#" value="5.5.0"/>
  13. <option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra6e2_fpb##"/>
  14. <option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
  15. </generalSettings>
  16. <raBspConfiguration/>
  17. <raClockConfiguration>
  18. <node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
  19. <node id="board.clock.hoco.freq" option="board.clock.hoco.freq.20m"/>
  20. <node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
  21. <node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
  22. <node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
  23. <node id="board.clock.pll.source" option="board.clock.pll.source.hoco"/>
  24. <node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
  25. <node id="board.clock.pll.mul" option="board.clock.pll.mul.100"/>
  26. <node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
  27. <node id="board.clock.clock.source" option="board.clock.clock.source.pll"/>
  28. <node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
  29. <node id="board.clock.uclk.source" option="board.clock.uclk.source.disabled"/>
  30. <node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
  31. <node id="board.clock.cecclk.source" option="board.clock.cecclk.source.disabled"/>
  32. <node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
  33. <node id="board.clock.iclk.div" option="board.clock.iclk.div.1"/>
  34. <node id="board.clock.pclka.div" option="board.clock.pclka.div.2"/>
  35. <node id="board.clock.pclkb.div" option="board.clock.pclkb.div.4"/>
  36. <node id="board.clock.pclkc.div" option="board.clock.pclkc.div.4"/>
  37. <node id="board.clock.pclkd.div" option="board.clock.pclkd.div.2"/>
  38. <node id="board.clock.fclk.div" option="board.clock.fclk.div.4"/>
  39. <node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
  40. <node id="board.clock.uclk.div" option="board.clock.uclk.div.5"/>
  41. <node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.6"/>
  42. <node id="board.clock.cecclk.div" option="board.clock.cecclk.div.1"/>
  43. <node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.1"/>
  44. <node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
  45. <node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
  46. <node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
  47. <node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
  48. <node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
  49. <node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
  50. <node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
  51. <node id="board.clock.uclk.display" option="board.clock.uclk.display.value"/>
  52. <node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
  53. <node id="board.clock.cecclk.display" option="board.clock.cecclk.display.value"/>
  54. <node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
  55. </raClockConfiguration>
  56. <raPinConfiguration>
  57. <pincfg active="true" name="" symbol="">
  58. <configSetting altId="adc0.an000.p000" configurationId="adc0.an000"/>
  59. <configSetting altId="adc0.an001.p001" configurationId="adc0.an001"/>
  60. <configSetting altId="adc0.an002.p002" configurationId="adc0.an002"/>
  61. <configSetting altId="adc0.an004.p004" configurationId="adc0.an004"/>
  62. <configSetting altId="adc0.an007.p003" configurationId="adc0.an007"/>
  63. <configSetting altId="adc0.an011.p013" configurationId="adc0.an011"/>
  64. <configSetting altId="i3c_fslash_iic.i3c_scl.p100" configurationId="i3c_fslash_iic.i3c_scl"/>
  65. <configSetting altId="i3c_fslash_iic.i3c_sda.p101" configurationId="i3c_fslash_iic.i3c_sda"/>
  66. <configSetting altId="irq.irq9.p304" configurationId="irq.irq9"/>
  67. <configSetting altId="jtag_fslash_swd.swclk.p300" configurationId="jtag_fslash_swd.swclk"/>
  68. <configSetting altId="jtag_fslash_swd.swdio.p108" configurationId="jtag_fslash_swd.swdio"/>
  69. <configSetting altId="p005.input" configurationId="p005"/>
  70. <configSetting altId="p006.input" configurationId="p006"/>
  71. <configSetting altId="p008.input" configurationId="p008"/>
  72. <configSetting altId="p014.input" configurationId="p014"/>
  73. <configSetting altId="p015.input" configurationId="p015"/>
  74. <configSetting altId="p105.input" configurationId="p105"/>
  75. <configSetting altId="p106.input" configurationId="p106"/>
  76. <configSetting altId="p107.input" configurationId="p107"/>
  77. <configSetting altId="p111.input" configurationId="p111"/>
  78. <configSetting altId="p113.input" configurationId="p113"/>
  79. <configSetting altId="p205.input" configurationId="p205"/>
  80. <configSetting altId="p206.output.low" configurationId="p206"/>
  81. <configSetting altId="p207.output.low" configurationId="p207"/>
  82. <configSetting altId="p208.input" configurationId="p208"/>
  83. <configSetting altId="p301.input" configurationId="p301"/>
  84. <configSetting altId="p400.output.high" configurationId="p400"/>
  85. <configSetting altId="p401.output.high" configurationId="p401"/>
  86. <configSetting altId="p402.input" configurationId="p402"/>
  87. <configSetting altId="p403.input" configurationId="p403"/>
  88. <configSetting altId="p407.input" configurationId="p407"/>
  89. <configSetting altId="p408.input" configurationId="p408"/>
  90. <configSetting altId="p409.input" configurationId="p409"/>
  91. <configSetting altId="p500.input" configurationId="p500"/>
  92. <configSetting altId="sci0.rxd0.p410" configurationId="sci0.rxd0" isUsedByDriver="true"/>
  93. <configSetting altId="sci0.sck0.p102" configurationId="sci0.sck0"/>
  94. <configSetting altId="sci0.txd0.p411" configurationId="sci0.txd0" isUsedByDriver="true"/>
  95. <configSetting altId="sci9.rxd9.p110" configurationId="sci9.rxd9"/>
  96. <configSetting altId="sci9.txd9.p109" configurationId="sci9.txd9"/>
  97. </pincfg>
  98. </raPinConfiguration>
  99. </raConfiguration>