.secure_xml 18 KB

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  1. <?xml version="1.0" encoding="UTF-8" standalone="no"?>
  2. <raConfiguration version="8">
  3. <generalSettings>
  4. <option key="#Board#" value="board.ra8d1ek"/>
  5. <option key="CPU" value="RA8D1"/>
  6. <option key="Core" value="CM85"/>
  7. <option key="#TargetName#" value="R7FA8D1BHECBD"/>
  8. <option key="#TargetARCHITECTURE#" value="cortex-m85"/>
  9. <option key="#DeviceCommand#" value="R7FA8D1BH"/>
  10. <option key="#RTOS#" value="_none"/>
  11. <option key="#pinconfiguration#" value="R7FA8M1AHECBD.pincfg"/>
  12. <option key="#FSPVersion#" value="5.1.0"/>
  13. <option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra8m1_ek##|Renesas##BSP##Board##ra8d1_ek##"/>
  14. <option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
  15. </generalSettings>
  16. <raBspConfiguration/>
  17. <raClockConfiguration>
  18. <node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
  19. <node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
  20. <node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
  21. <node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
  22. <node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
  23. <node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
  24. <node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
  25. <node id="board.clock.pll.mul" option="board.clock.pll.mul.48_00"/>
  26. <node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
  27. <node id="board.clock.pll1p.div" option="board.clock.pll1p.div.2"/>
  28. <node id="board.clock.pll1p.display" option="board.clock.pll1p.display.value"/>
  29. <node id="board.clock.pll1q.div" option="board.clock.pll1q.div.4"/>
  30. <node id="board.clock.pll1q.display" option="board.clock.pll1q.display.value"/>
  31. <node id="board.clock.pll1r.div" option="board.clock.pll1r.div.2"/>
  32. <node id="board.clock.pll1r.display" option="board.clock.pll1r.display.value"/>
  33. <node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
  34. <node id="board.clock.pll2.div" option="board.clock.pll2.div.1"/>
  35. <node id="board.clock.pll2.mul" option="board.clock.pll2.mul.48_00"/>
  36. <node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
  37. <node id="board.clock.pll2p.div" option="board.clock.pll2p.div.2"/>
  38. <node id="board.clock.pll2p.display" option="board.clock.pll2p.display.value"/>
  39. <node id="board.clock.pll2q.div" option="board.clock.pll2q.div.2"/>
  40. <node id="board.clock.pll2q.display" option="board.clock.pll2q.display.value"/>
  41. <node id="board.clock.pll2r.div" option="board.clock.pll2r.div.2"/>
  42. <node id="board.clock.pll2r.display" option="board.clock.pll2r.display.value"/>
  43. <node id="board.clock.clock.source" option="board.clock.clock.source.pll1p"/>
  44. <node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
  45. <node id="board.clock.sciclk.source" option="board.clock.sciclk.source.pll1p"/>
  46. <node id="board.clock.spiclk.source" option="board.clock.spiclk.source.disabled"/>
  47. <node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
  48. <node id="board.clock.lcdclk.source" option="board.clock.lcdclk.source.pll1p"/>
  49. <node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
  50. <node id="board.clock.uck.source" option="board.clock.uck.source.pll1q"/>
  51. <node id="board.clock.u60ck.source" option="board.clock.u60ck.source.disabled"/>
  52. <node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
  53. <node id="board.clock.cpuclk.div" option="board.clock.cpuclk.div.1"/>
  54. <node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
  55. <node id="board.clock.pclka.div" option="board.clock.pclka.div.4"/>
  56. <node id="board.clock.pclkb.div" option="board.clock.pclkb.div.8"/>
  57. <node id="board.clock.pclkc.div" option="board.clock.pclkc.div.8"/>
  58. <node id="board.clock.pclkd.div" option="board.clock.pclkd.div.4"/>
  59. <node id="board.clock.pclke.div" option="board.clock.pclke.div.2"/>
  60. <node id="board.clock.sdclkout.enable" option="board.clock.sdclkout.enable.enabled"/>
  61. <node id="board.clock.bclk.div" option="board.clock.bclk.div.4"/>
  62. <node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
  63. <node id="board.clock.fclk.div" option="board.clock.fclk.div.8"/>
  64. <node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
  65. <node id="board.clock.sciclk.div" option="board.clock.sciclk.div.4"/>
  66. <node id="board.clock.spiclk.div" option="board.clock.spiclk.div.4"/>
  67. <node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.8"/>
  68. <node id="board.clock.lcdclk.div" option="board.clock.lcdclk.div.2"/>
  69. <node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.3"/>
  70. <node id="board.clock.uck.div" option="board.clock.uck.div.5"/>
  71. <node id="board.clock.u60ck.div" option="board.clock.u60ck.div.5"/>
  72. <node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.4"/>
  73. <node id="board.clock.cpuclk.display" option="board.clock.cpuclk.display.value"/>
  74. <node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
  75. <node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
  76. <node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
  77. <node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
  78. <node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
  79. <node id="board.clock.pclke.display" option="board.clock.pclke.display.value"/>
  80. <node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
  81. <node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
  82. <node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
  83. <node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
  84. <node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
  85. <node id="board.clock.sciclk.display" option="board.clock.sciclk.display.value"/>
  86. <node id="board.clock.spiclk.display" option="board.clock.spiclk.display.value"/>
  87. <node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
  88. <node id="board.clock.lcdclk.display" option="board.clock.lcdclk.display.value"/>
  89. <node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
  90. <node id="board.clock.uck.display" option="board.clock.uck.display.value"/>
  91. <node id="board.clock.u60ck.display" option="board.clock.u60ck.display.value"/>
  92. <node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
  93. </raClockConfiguration>
  94. <raPinConfiguration>
  95. <pincfg active="true" name="" symbol="">
  96. <configSetting altId="adc0.an000.p004" configurationId="adc0.an000"/>
  97. <configSetting altId="adc0.an001.p005" configurationId="adc0.an001"/>
  98. <configSetting altId="adc0.an004.p007" configurationId="adc0.an004"/>
  99. <configSetting altId="adc0.an007.p014" configurationId="adc0.an007"/>
  100. <configSetting altId="adc1.an102.p002" configurationId="adc1.an102"/>
  101. <configSetting altId="adc1.an104.p003" configurationId="adc1.an104"/>
  102. <configSetting altId="adc1.an105.p015" configurationId="adc1.an105"/>
  103. <configSetting altId="adc1.an106.p011" configurationId="adc1.an106"/>
  104. <configSetting altId="ceu.vio_clk.p708" configurationId="ceu.vio_clk"/>
  105. <configSetting altId="ceu.vio_d0.p400" configurationId="ceu.vio_d0"/>
  106. <configSetting altId="ceu.vio_d12.p415" configurationId="ceu.vio_d12"/>
  107. <configSetting altId="ceu.vio_hd.p709" configurationId="ceu.vio_hd"/>
  108. <configSetting altId="ceu.vio_vd.p710" configurationId="ceu.vio_vd"/>
  109. <configSetting altId="ether_rmii.et0_linksta.p403" configurationId="ether_rmii.et0_linksta"/>
  110. <configSetting altId="ether_rmii.et0_mdc.p401" configurationId="ether_rmii.et0_mdc"/>
  111. <configSetting altId="ether_rmii.et0_mdio.p402" configurationId="ether_rmii.et0_mdio"/>
  112. <configSetting altId="ether_rmii.ref50ck0.p701" configurationId="ether_rmii.ref50ck0"/>
  113. <configSetting altId="ether_rmii.rmii0_crs_dv.p705" configurationId="ether_rmii.rmii0_crs_dv"/>
  114. <configSetting altId="ether_rmii.rmii0_rx_er.p704" configurationId="ether_rmii.rmii0_rx_er"/>
  115. <configSetting altId="ether_rmii.rmii0_rxd0.p702" configurationId="ether_rmii.rmii0_rxd0"/>
  116. <configSetting altId="ether_rmii.rmii0_rxd1.p703" configurationId="ether_rmii.rmii0_rxd1"/>
  117. <configSetting altId="ether_rmii.rmii0_txd0.p700" configurationId="ether_rmii.rmii0_txd0"/>
  118. <configSetting altId="ether_rmii.rmii0_txd1.p406" configurationId="ether_rmii.rmii0_txd1"/>
  119. <configSetting altId="ether_rmii.rmii0_txd_en.p405" configurationId="ether_rmii.rmii0_txd_en"/>
  120. <configSetting altId="glcd.lcd_clk.p806" configurationId="glcd.lcd_clk"/>
  121. <configSetting altId="glcd.lcd_data0.p914" configurationId="glcd.lcd_data0"/>
  122. <configSetting altId="glcd.lcd_data1.p915" configurationId="glcd.lcd_data1"/>
  123. <configSetting altId="glcd.lcd_data10.p711" configurationId="glcd.lcd_data10"/>
  124. <configSetting altId="glcd.lcd_data11.p712" configurationId="glcd.lcd_data11"/>
  125. <configSetting altId="glcd.lcd_data12.p713" configurationId="glcd.lcd_data12"/>
  126. <configSetting altId="glcd.lcd_data13.p714" configurationId="glcd.lcd_data13"/>
  127. <configSetting altId="glcd.lcd_data14.p715" configurationId="glcd.lcd_data14"/>
  128. <configSetting altId="glcd.lcd_data15.pb07" configurationId="glcd.lcd_data15"/>
  129. <configSetting altId="glcd.lcd_data16.pb06" configurationId="glcd.lcd_data16"/>
  130. <configSetting altId="glcd.lcd_data17.pb05" configurationId="glcd.lcd_data17"/>
  131. <configSetting altId="glcd.lcd_data18.pb01" configurationId="glcd.lcd_data18"/>
  132. <configSetting altId="glcd.lcd_data19.pb04" configurationId="glcd.lcd_data19"/>
  133. <configSetting altId="glcd.lcd_data2.p910" configurationId="glcd.lcd_data2"/>
  134. <configSetting altId="glcd.lcd_data20.pb03" configurationId="glcd.lcd_data20"/>
  135. <configSetting altId="glcd.lcd_data21.pb02" configurationId="glcd.lcd_data21"/>
  136. <configSetting altId="glcd.lcd_data22.pb00" configurationId="glcd.lcd_data22"/>
  137. <configSetting altId="glcd.lcd_data23.p707" configurationId="glcd.lcd_data23"/>
  138. <configSetting altId="glcd.lcd_data3.p911" configurationId="glcd.lcd_data3"/>
  139. <configSetting altId="glcd.lcd_data4.p912" configurationId="glcd.lcd_data4"/>
  140. <configSetting altId="glcd.lcd_data5.p913" configurationId="glcd.lcd_data5"/>
  141. <configSetting altId="glcd.lcd_data6.p904" configurationId="glcd.lcd_data6"/>
  142. <configSetting altId="glcd.lcd_data7.p903" configurationId="glcd.lcd_data7"/>
  143. <configSetting altId="glcd.lcd_data8.p902" configurationId="glcd.lcd_data8"/>
  144. <configSetting altId="glcd.lcd_data9.p207" configurationId="glcd.lcd_data9"/>
  145. <configSetting altId="glcd.lcd_extclk.p514" configurationId="glcd.lcd_extclk"/>
  146. <configSetting altId="glcd.lcd_tcon0.p805" configurationId="glcd.lcd_tcon0"/>
  147. <configSetting altId="glcd.lcd_tcon1.p807" configurationId="glcd.lcd_tcon1"/>
  148. <configSetting altId="glcd.lcd_tcon2.p513" configurationId="glcd.lcd_tcon2"/>
  149. <configSetting altId="glcd.lcd_tcon3.p515" configurationId="glcd.lcd_tcon3"/>
  150. <configSetting altId="iic1.scl1.p512" configurationId="iic1.scl1"/>
  151. <configSetting altId="iic1.sda1.p511" configurationId="iic1.sda1"/>
  152. <configSetting altId="jtag_fslash_swd.tck.p211" configurationId="jtag_fslash_swd.tck"/>
  153. <configSetting altId="jtag_fslash_swd.tdi.p208" configurationId="jtag_fslash_swd.tdi"/>
  154. <configSetting altId="jtag_fslash_swd.tdo.p209" configurationId="jtag_fslash_swd.tdo"/>
  155. <configSetting altId="jtag_fslash_swd.tms.p210" configurationId="jtag_fslash_swd.tms"/>
  156. <configSetting altId="mipi.dsi_te.p206" configurationId="mipi.dsi_te"/>
  157. <configSetting altId="ospi.om_cs1.p104" configurationId="ospi.om_cs1"/>
  158. <configSetting altId="ospi.om_dqs.p801" configurationId="ospi.om_dqs"/>
  159. <configSetting altId="ospi.om_ecsint1.p105" configurationId="ospi.om_ecsint1"/>
  160. <configSetting altId="ospi.om_reset.p106" configurationId="ospi.om_reset"/>
  161. <configSetting altId="ospi.om_sclk.p808" configurationId="ospi.om_sclk"/>
  162. <configSetting altId="ospi.om_sio0.p100" configurationId="ospi.om_sio0"/>
  163. <configSetting altId="ospi.om_sio1.p803" configurationId="ospi.om_sio1"/>
  164. <configSetting altId="ospi.om_sio2.p103" configurationId="ospi.om_sio2"/>
  165. <configSetting altId="ospi.om_sio3.p101" configurationId="ospi.om_sio3"/>
  166. <configSetting altId="ospi.om_sio4.p102" configurationId="ospi.om_sio4"/>
  167. <configSetting altId="ospi.om_sio5.p800" configurationId="ospi.om_sio5"/>
  168. <configSetting altId="ospi.om_sio6.p802" configurationId="ospi.om_sio6"/>
  169. <configSetting altId="ospi.om_sio7.p804" configurationId="ospi.om_sio7"/>
  170. <configSetting altId="p107.output.low" configurationId="p107"/>
  171. <configSetting altId="p414.output.low" configurationId="p414"/>
  172. <configSetting altId="p504.input" configurationId="p504"/>
  173. <configSetting altId="p505.input" configurationId="p505"/>
  174. <configSetting altId="p506.input" configurationId="p506"/>
  175. <configSetting altId="p507.output.low" configurationId="p507"/>
  176. <configSetting altId="p600.output.low" configurationId="p600"/>
  177. <configSetting altId="p706.output.low" configurationId="p706"/>
  178. <configSetting altId="p809.output.low" configurationId="p809"/>
  179. <configSetting altId="p810.input" configurationId="p810"/>
  180. <configSetting altId="p811.input" configurationId="p811"/>
  181. <configSetting altId="p813.output.low" configurationId="p813"/>
  182. <configSetting altId="p907.input" configurationId="p907"/>
  183. <configSetting altId="pa01.input" configurationId="pa01"/>
  184. <configSetting altId="pa06.input" configurationId="pa06"/>
  185. <configSetting altId="pa07.input" configurationId="pa07"/>
  186. <configSetting altId="pa11.input" configurationId="pa11"/>
  187. <configSetting altId="pa13.output.low" configurationId="pa13"/>
  188. <configSetting altId="sci2.cts_rts2.pa05" configurationId="sci2.cts_rts2"/>
  189. <configSetting altId="sci2.rxd2.pa02" configurationId="sci2.rxd2"/>
  190. <configSetting altId="sci2.sck2.pa04" configurationId="sci2.sck2"/>
  191. <configSetting altId="sci2.txd2.pa03" configurationId="sci2.txd2"/>
  192. <configSetting altId="sci3.rxd3.p408" configurationId="sci3.rxd3"/>
  193. <configSetting altId="sci3.txd3.p409" configurationId="sci3.txd3"/>
  194. <configSetting altId="sci9.rxd9.pa15" configurationId="sci9.rxd9" isUsedByDriver="true"/>
  195. <configSetting altId="sci9.txd9.pa14" configurationId="sci9.txd9" isUsedByDriver="true"/>
  196. <configSetting altId="sdram.a1.p300" configurationId="sdram.a1"/>
  197. <configSetting altId="sdram.a10.p309" configurationId="sdram.a10"/>
  198. <configSetting altId="sdram.a11.p310" configurationId="sdram.a11"/>
  199. <configSetting altId="sdram.a12.p311" configurationId="sdram.a12"/>
  200. <configSetting altId="sdram.a13.p312" configurationId="sdram.a13"/>
  201. <configSetting altId="sdram.a14.p905" configurationId="sdram.a14"/>
  202. <configSetting altId="sdram.a15.p906" configurationId="sdram.a15"/>
  203. <configSetting altId="sdram.a2.p301" configurationId="sdram.a2"/>
  204. <configSetting altId="sdram.a3.p302" configurationId="sdram.a3"/>
  205. <configSetting altId="sdram.a4.p303" configurationId="sdram.a4"/>
  206. <configSetting altId="sdram.a5.p304" configurationId="sdram.a5"/>
  207. <configSetting altId="sdram.a6.p305" configurationId="sdram.a6"/>
  208. <configSetting altId="sdram.a7.p306" configurationId="sdram.a7"/>
  209. <configSetting altId="sdram.a8.p307" configurationId="sdram.a8"/>
  210. <configSetting altId="sdram.a9.p308" configurationId="sdram.a9"/>
  211. <configSetting altId="sdram.cas.p909" configurationId="sdram.cas"/>
  212. <configSetting altId="sdram.cke.p113" configurationId="sdram.cke"/>
  213. <configSetting altId="sdram.dq0.p601" configurationId="sdram.dq0"/>
  214. <configSetting altId="sdram.dq1.p602" configurationId="sdram.dq1"/>
  215. <configSetting altId="sdram.dq10.p611" configurationId="sdram.dq10"/>
  216. <configSetting altId="sdram.dq11.p612" configurationId="sdram.dq11"/>
  217. <configSetting altId="sdram.dq12.p613" configurationId="sdram.dq12"/>
  218. <configSetting altId="sdram.dq13.p614" configurationId="sdram.dq13"/>
  219. <configSetting altId="sdram.dq14.p615" configurationId="sdram.dq14"/>
  220. <configSetting altId="sdram.dq15.pa08" configurationId="sdram.dq15"/>
  221. <configSetting altId="sdram.dq2.p603" configurationId="sdram.dq2"/>
  222. <configSetting altId="sdram.dq3.p604" configurationId="sdram.dq3"/>
  223. <configSetting altId="sdram.dq4.p605" configurationId="sdram.dq4"/>
  224. <configSetting altId="sdram.dq5.p606" configurationId="sdram.dq5"/>
  225. <configSetting altId="sdram.dq6.p607" configurationId="sdram.dq6"/>
  226. <configSetting altId="sdram.dq7.pa00" configurationId="sdram.dq7"/>
  227. <configSetting altId="sdram.dq8.p609" configurationId="sdram.dq8"/>
  228. <configSetting altId="sdram.dq9.p610" configurationId="sdram.dq9"/>
  229. <configSetting altId="sdram.dqm0.pa10" configurationId="sdram.dqm0"/>
  230. <configSetting altId="sdram.dqm1.p112" configurationId="sdram.dqm1"/>
  231. <configSetting altId="sdram.ras.p908" configurationId="sdram.ras"/>
  232. <configSetting altId="sdram.sdclk.pa09" configurationId="sdram.sdclk"/>
  233. <configSetting altId="sdram.sdcs.p115" configurationId="sdram.sdcs"/>
  234. <configSetting altId="sdram.we.p114" configurationId="sdram.we"/>
  235. <configSetting altId="spi1.miso1.p410" configurationId="spi1.miso1"/>
  236. <configSetting altId="spi1.mosi1.p411" configurationId="spi1.mosi1"/>
  237. <configSetting altId="spi1.rspck1.p412" configurationId="spi1.rspck1"/>
  238. <configSetting altId="spi1.sslb0.p413" configurationId="spi1.sslb0"/>
  239. <configSetting altId="usbfs.usb_dm.p815" configurationId="usbfs.usb_dm"/>
  240. <configSetting altId="usbfs.usb_dp.p814" configurationId="usbfs.usb_dp"/>
  241. <configSetting altId="usbfs.usb_ovrcura.p501" configurationId="usbfs.usb_ovrcura"/>
  242. <configSetting altId="usbfs.usb_vbus.p407" configurationId="usbfs.usb_vbus"/>
  243. <configSetting altId="usbfs.usb_vbusen.p500" configurationId="usbfs.usb_vbusen"/>
  244. </pincfg>
  245. </raPinConfiguration>
  246. </raConfiguration>