bypass_conflict.c 6.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224
  1. /*
  2. * Copyright (c) 2006-2024 RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024-11-20 zhujiale the first version
  9. * 2025-11-24 ChuanN-sudo add standardized utest documentation block
  10. */
  11. /**
  12. * Test Case Name: Serial Bypass Conflict Test
  13. *
  14. * Test Objectives:
  15. * - Validate serial device bypass mechanism under high-concurrency RX interrupt scenarios.
  16. * - Verify thread-safe registration/unregistration of upper and lower bypass handlers.
  17. * - Ensure correct data reception counting across concurrent ISR triggers and workqueue processing.
  18. * - Test core APIs: rt_bypass_upper_register(), rt_bypass_upper_unregister(),
  19. * rt_bypass_lower_register(), rt_bypass_lower_unregister(), rt_hw_serial_isr().
  20. *
  21. * Test Scenarios:
  22. * - bypass_rx_stress_001: Two threads simultaneously trigger RX ISRs with upper bypass handler registered.
  23. * Each thread generates 10 ISR events, expecting 200 total character receptions (10 chars per ISR × 10 ISRs × 2 threads).
  24. * - bypass_rx_stress_002: Concurrent ISR triggering and workqueue processing with lower bypass handler.
  25. * Tests interaction between interrupt context and work queue context, expecting 100 total receptions.
  26. * - bypass_rx_stress_003: High-priority thread (priority 15, numerically lower = higher priority) dynamically
  27. * registers/unregisters bypass handlers while low-priority thread (priority 20) continuously triggers RX ISRs.
  28. *
  29. * Verification Metrics:
  30. * - Character reception counter matches expected values (200 for test_001, 100 for test_002, 200 for test_003).
  31. * - No data loss occurs during concurrent handler registration/unregistration operations.
  32. * - Atomic operations ensure thread-safe counter increments without race conditions.
  33. * - Mock UART getc function correctly limits character generation to 10 per call sequence.
  34. * - System remains stable during priority inversion scenarios (priority 15 vs 20 threads).
  35. *
  36. * Dependencies:
  37. * - Hardware requirements: Platform with serial console device (UART) support.
  38. * - Software configuration:
  39. * - RT_USING_UTESTCASES must be enabled (select "RT-Thread Utestcases" in menuconfig).
  40. * - RT_UTEST_SERIAL_BYPASS must be enabled (enable via: RT-Thread Utestcases -> Kernel Components -> Drivers -> Serial Test -> Serial Bypass Test).
  41. * - Environmental Assumptions: Serial device initialized and operational before test execution.
  42. *
  43. * Expected Results:
  44. * - Final output: "[ PASSED ] [ result ] testcase (components.drivers.serial.bypass_rx_stress)"
  45. * - All atomic counter assertions pass with exact expected values.
  46. */
  47. #include <rtthread.h>
  48. #include <rtdevice.h>
  49. #include "utest.h"
  50. static struct rt_serial_device* _serial0;
  51. static struct rt_spinlock lock;
  52. static int cnt = 0;
  53. #define __REG32(x) (*((volatile unsigned int*)((rt_ubase_t)x)))
  54. #define UART_FR(base) __REG32(base + 0x18)
  55. #define UART_DR(base) __REG32(base + 0x00)
  56. #define UARTFR_TXFF 0x20
  57. static rt_err_t utest_get_c(struct rt_serial_device* serial, char ch, void* data)
  58. {
  59. rt_atomic_add(&cnt, 1);
  60. return RT_EOK;
  61. }
  62. static int utest_getc(struct rt_serial_device* serial)
  63. {
  64. static int num = 0;
  65. rt_spin_lock(&lock);
  66. if (rt_atomic_load(&num) == 10)
  67. {
  68. rt_atomic_flag_clear(&num);
  69. rt_spin_unlock(&lock);
  70. return -1;
  71. }
  72. rt_atomic_add(&num, 1);
  73. rt_spin_unlock(&lock);
  74. return 'a';
  75. }
  76. struct hw_uart_device
  77. {
  78. rt_size_t hw_base;
  79. rt_size_t irqno;
  80. };
  81. static int uart_putc(struct rt_serial_device* serial, char c)
  82. {
  83. struct hw_uart_device* uart;
  84. RT_ASSERT(serial != RT_NULL);
  85. uart = (struct hw_uart_device*)serial->parent.user_data;
  86. while (UART_FR(uart->hw_base) & UARTFR_TXFF);
  87. UART_DR(uart->hw_base) = c;
  88. return 1;
  89. }
  90. static const struct rt_uart_ops _utest_ops =
  91. {
  92. RT_NULL,
  93. RT_NULL,
  94. uart_putc,
  95. utest_getc,
  96. };
  97. static void thread_rx1(void* parameter)
  98. {
  99. for (int i = 0; i < 10; i++)
  100. {
  101. rt_hw_serial_isr(_serial0, RT_SERIAL_EVENT_RX_IND);
  102. }
  103. }
  104. static void thread_rx2(void* parameter)
  105. {
  106. for (int i = 0; i < 10; i++)
  107. {
  108. rt_workqueue_dowork(_serial0->bypass->lower_workq, &_serial0->bypass->work);
  109. }
  110. }
  111. static void thread_high_priority(void* parameter)
  112. {
  113. for (int i = 1; i < 10; i++)
  114. {
  115. rt_bypass_upper_register(_serial0, "test", i, utest_get_c, RT_NULL);
  116. rt_bypass_upper_unregister(_serial0, i);
  117. }
  118. }
  119. static void thread_low_priority(void* parameter)
  120. {
  121. for (int i = 0; i < 20; i++)
  122. {
  123. rt_hw_serial_isr(_serial0, RT_SERIAL_EVENT_RX_IND);
  124. }
  125. }
  126. static void bypass_rx_stress_003(void)
  127. {
  128. const struct rt_uart_ops* tmp = _serial0->ops;
  129. rt_thread_t high = rt_thread_create("high_prio", thread_high_priority, RT_NULL, 2048, 15, 10);
  130. rt_thread_t low = rt_thread_create("low_prio", thread_low_priority, RT_NULL, 2048, 20, 10);
  131. rt_atomic_flag_clear(&cnt);
  132. _serial0->ops = &_utest_ops;
  133. rt_bypass_upper_register(_serial0, "test", 0, utest_get_c, RT_NULL);
  134. rt_thread_startup(high);
  135. rt_thread_startup(low);
  136. rt_thread_mdelay(1000);
  137. _serial0->ops = tmp;
  138. rt_bypass_upper_unregister(_serial0, 0);
  139. uassert_true(rt_atomic_load(&cnt) == 200);
  140. }
  141. static void bypass_rx_stress_002(void)
  142. {
  143. const struct rt_uart_ops* tmp = _serial0->ops;
  144. rt_thread_t rx2 = rt_thread_create("rx2", thread_rx1, RT_NULL, 2048, RT_THREAD_PRIORITY_MAX - 5, 10);
  145. rt_thread_t rx3 = rt_thread_create("rx3", thread_rx2, RT_NULL, 2048, RT_THREAD_PRIORITY_MAX - 5, 10);
  146. rt_atomic_flag_clear(&cnt);
  147. _serial0->ops = &_utest_ops;
  148. rt_bypass_lower_register(_serial0, "utest", 0, utest_get_c, RT_NULL);
  149. rt_thread_startup(rx2);
  150. rt_thread_startup(rx3);
  151. rt_thread_mdelay(1000);
  152. uassert_true(rt_atomic_load(&cnt) == 100);
  153. _serial0->ops = tmp;
  154. rt_bypass_lower_unregister(_serial0, 0);
  155. }
  156. static void bypass_rx_stress_001(void)
  157. {
  158. const struct rt_uart_ops* tmp = _serial0->ops;
  159. rt_thread_t rx1 = rt_thread_create("rx1", thread_rx1, RT_NULL, 2048, RT_THREAD_PRIORITY_MAX - 5, 10);
  160. rt_thread_t rx2 = rt_thread_create("rx1", thread_rx1, RT_NULL, 2048, RT_THREAD_PRIORITY_MAX - 5, 10);
  161. cnt = 0;
  162. _serial0->ops = &_utest_ops;
  163. rt_bypass_upper_register(_serial0, "utest", 0, utest_get_c, RT_NULL);
  164. rt_thread_startup(rx1);
  165. rt_thread_startup(rx2);
  166. rt_thread_mdelay(1000);
  167. uassert_true(rt_atomic_load(&cnt) == 200);
  168. _serial0->ops = tmp;
  169. rt_bypass_upper_unregister(_serial0, 0);
  170. }
  171. static rt_err_t utest_tc_init(void)
  172. {
  173. _serial0 = (struct rt_serial_device*)rt_console_get_device();
  174. rt_spin_lock_init(&lock);
  175. return RT_EOK;
  176. }
  177. static rt_err_t utest_tc_cleanup(void)
  178. {
  179. return RT_EOK;
  180. }
  181. static void _testcase(void)
  182. {
  183. UTEST_UNIT_RUN(bypass_rx_stress_001);
  184. UTEST_UNIT_RUN(bypass_rx_stress_002);
  185. UTEST_UNIT_RUN(bypass_rx_stress_003);
  186. }
  187. UTEST_TC_EXPORT(_testcase, "components.drivers.serial.bypass_rx_stress", utest_tc_init, utest_tc_cleanup, 10);