hal_miiphyutil.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613
  1. /*
  2. * Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
  3. *
  4. * Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
  5. * the the People's Republic of China and other countries.
  6. * All Allwinner Technology Co.,Ltd. trademarks are used with permission.
  7. *
  8. * DISCLAIMER
  9. * THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
  10. * IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
  11. * IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
  12. * ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
  13. * ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
  14. * COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
  15. * YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
  16. *
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
  19. * PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
  20. * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
  21. * THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
  22. * OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  23. * IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  26. * LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
  27. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  28. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  30. * OF THE POSSIBILITY OF SUCH DAMAGE.
  31. */
  32. //#include <common.h>
  33. #include <typedef.h>
  34. #include <stdio.h>
  35. #include <stdlib.h>
  36. #include <stdint.h>
  37. #include <string.h>
  38. #include <hal_thread.h>
  39. #include <sunxi_hal_common.h>
  40. #include <sunxi_hal_miiphy.h>
  41. #include <sunxi_hal_phy.h>
  42. //#include <asm/types.h>
  43. //#include <list.h>
  44. #include <hal_mem.h>
  45. //#include <net.h>
  46. /* local debug macro */
  47. #undef MII_DEBUG
  48. #undef debug
  49. #ifdef MII_DEBUG
  50. #define debug(fmt, args...) printf(fmt, ##args)
  51. #else
  52. #define debug(fmt, args...)
  53. #endif /* MII_DEBUG */
  54. static struct list_head mii_devs;
  55. static struct mii_dev *current_mii;
  56. /*
  57. * Lookup the mii_dev struct by the registered device name.
  58. */
  59. struct mii_dev *miiphy_get_dev_by_name(const char *devname)
  60. {
  61. struct list_head *entry;
  62. struct mii_dev *dev;
  63. if (!devname) {
  64. printf("NULL device name!\n");
  65. return NULL;
  66. }
  67. list_for_each(entry, &mii_devs) {
  68. dev = list_entry(entry, struct mii_dev, link);
  69. if (strcmp(dev->name, devname) == 0)
  70. return dev;
  71. }
  72. return NULL;
  73. }
  74. /*****************************************************************************
  75. *
  76. * Initialize global data. Need to be called before any other miiphy routine.
  77. */
  78. void miiphy_init(void)
  79. {
  80. INIT_LIST_HEAD(&mii_devs);
  81. current_mii = NULL;
  82. }
  83. static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
  84. {
  85. unsigned short val;
  86. int ret;
  87. struct legacy_mii_dev *ldev = bus->priv;
  88. ret = ldev->read(bus->name, addr, reg, &val);
  89. return ret ? -1 : (int)val;
  90. }
  91. static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
  92. int reg, uint16_t val)
  93. {
  94. struct legacy_mii_dev *ldev = bus->priv;
  95. return ldev->write(bus->name, addr, reg, val);
  96. }
  97. /*****************************************************************************
  98. *
  99. * Register read and write MII access routines for the device <name>.
  100. * This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
  101. */
  102. void miiphy_register(const char *name,
  103. int (*read)(const char *devname, unsigned char addr,
  104. unsigned char reg, unsigned short *value),
  105. int (*write)(const char *devname, unsigned char addr,
  106. unsigned char reg, unsigned short value))
  107. {
  108. struct mii_dev *new_dev;
  109. struct legacy_mii_dev *ldev;
  110. BUG_ON(strlen(name) >= MDIO_NAME_LEN);
  111. /* check if we have unique name */
  112. new_dev = miiphy_get_dev_by_name(name);
  113. if (new_dev) {
  114. printf("miiphy_register: non unique device name '%s'\n", name);
  115. return;
  116. }
  117. /* allocate memory */
  118. new_dev = mdio_alloc();
  119. ldev = malloc(sizeof(*ldev));
  120. if (new_dev == NULL || ldev == NULL) {
  121. printf("miiphy_register: cannot allocate memory for '%s'\n",
  122. name);
  123. return;
  124. }
  125. /* initalize mii_dev struct fields */
  126. new_dev->read = legacy_miiphy_read;
  127. new_dev->write = legacy_miiphy_write;
  128. strncpy(new_dev->name, name, MDIO_NAME_LEN);
  129. new_dev->name[MDIO_NAME_LEN - 1] = 0;
  130. ldev->read = read;
  131. ldev->write = write;
  132. new_dev->priv = ldev;
  133. printf("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
  134. new_dev->name, ldev->read, ldev->write);
  135. /* add it to the list */
  136. list_add_tail(&new_dev->link, &mii_devs);
  137. if (!current_mii)
  138. current_mii = new_dev;
  139. }
  140. struct mii_dev *mdio_alloc(void)
  141. {
  142. struct mii_dev *bus;
  143. bus = malloc(sizeof(*bus));
  144. if (!bus)
  145. return bus;
  146. memset(bus, 0, sizeof(*bus));
  147. /* initalize mii_dev struct fields */
  148. INIT_LIST_HEAD(&bus->link);
  149. return bus;
  150. }
  151. int mdio_register(struct mii_dev *bus)
  152. {
  153. if (!bus || !bus->name || !bus->read || !bus->write)
  154. return -1;
  155. /* check if we have unique name */
  156. if (miiphy_get_dev_by_name(bus->name)) {
  157. printf("mdio_register: non unique device name '%s'\n",
  158. bus->name);
  159. return -1;
  160. }
  161. /* add it to the list */
  162. list_add_tail(&bus->link, &mii_devs);
  163. if (!current_mii)
  164. current_mii = bus;
  165. return 0;
  166. }
  167. void mdio_list_devices(void)
  168. {
  169. struct list_head *entry;
  170. list_for_each(entry, &mii_devs) {
  171. int i;
  172. struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
  173. printf("%s:\n", bus->name);
  174. for (i = 0; i < PHY_MAX_ADDR; i++) {
  175. struct phy_device *phydev = bus->phymap[i];
  176. if (phydev) {
  177. printf("%d - %s", i, phydev->drv->name);
  178. if (phydev->dev)
  179. printf(" <--> %s\n", "eth0");
  180. else
  181. printf("\n");
  182. }
  183. }
  184. }
  185. }
  186. int miiphy_set_current_dev(const char *devname)
  187. {
  188. struct mii_dev *dev;
  189. dev = miiphy_get_dev_by_name(devname);
  190. if (dev) {
  191. current_mii = dev;
  192. return 0;
  193. }
  194. printf("No such device: %s\n", devname);
  195. return 1;
  196. }
  197. struct mii_dev *mdio_get_current_dev(void)
  198. {
  199. return current_mii;
  200. }
  201. struct phy_device *mdio_phydev_for_ethname(const char *ethname)
  202. {
  203. struct list_head *entry;
  204. struct mii_dev *bus;
  205. list_for_each(entry, &mii_devs) {
  206. int i;
  207. bus = list_entry(entry, struct mii_dev, link);
  208. for (i = 0; i < PHY_MAX_ADDR; i++) {
  209. if (!bus->phymap[i] || !bus->phymap[i]->dev)
  210. continue;
  211. /*if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
  212. return bus->phymap[i];*/
  213. }
  214. }
  215. printf("%s is not a known ethernet\n", ethname);
  216. return NULL;
  217. }
  218. const char *miiphy_get_current_dev(void)
  219. {
  220. if (current_mii)
  221. return current_mii->name;
  222. return NULL;
  223. }
  224. static struct mii_dev *miiphy_get_active_dev(const char *devname)
  225. {
  226. /* If the current mii is the one we want, return it */
  227. if (current_mii)
  228. if (strcmp(current_mii->name, devname) == 0)
  229. return current_mii;
  230. /* Otherwise, set the active one to the one we want */
  231. if (miiphy_set_current_dev(devname))
  232. return NULL;
  233. else
  234. return current_mii;
  235. }
  236. /*****************************************************************************
  237. *
  238. * Read to variable <value> from the PHY attached to device <devname>,
  239. * use PHY address <addr> and register <reg>.
  240. *
  241. * This API is deprecated. Use phy_read on a phy_device found via phy_connect
  242. *
  243. * Returns:
  244. * 0 on success
  245. */
  246. int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
  247. unsigned short *value)
  248. {
  249. struct mii_dev *bus;
  250. int ret;
  251. bus = miiphy_get_active_dev(devname);
  252. if (!bus)
  253. return 1;
  254. ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
  255. if (ret < 0)
  256. return 1;
  257. *value = (unsigned short)ret;
  258. return 0;
  259. }
  260. /*****************************************************************************
  261. *
  262. * Write <value> to the PHY attached to device <devname>,
  263. * use PHY address <addr> and register <reg>.
  264. *
  265. * This API is deprecated. Use phy_write on a phy_device found by phy_connect
  266. *
  267. * Returns:
  268. * 0 on success
  269. */
  270. int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
  271. unsigned short value)
  272. {
  273. struct mii_dev *bus;
  274. bus = miiphy_get_active_dev(devname);
  275. if (bus)
  276. return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
  277. return 1;
  278. }
  279. /*****************************************************************************
  280. *
  281. * Print out list of registered MII capable devices.
  282. */
  283. void miiphy_listdev(void)
  284. {
  285. struct list_head *entry;
  286. struct mii_dev *dev;
  287. puts("MII devices: ");
  288. list_for_each(entry, &mii_devs) {
  289. dev = list_entry(entry, struct mii_dev, link);
  290. printf("'%s' ", dev->name);
  291. }
  292. puts("\n");
  293. if (current_mii)
  294. printf("Current device: '%s'\n", current_mii->name);
  295. }
  296. /*****************************************************************************
  297. *
  298. * Read the OUI, manufacture's model number, and revision number.
  299. *
  300. * OUI: 22 bits (unsigned int)
  301. * Model: 6 bits (unsigned char)
  302. * Revision: 4 bits (unsigned char)
  303. *
  304. * This API is deprecated.
  305. *
  306. * Returns:
  307. * 0 on success
  308. */
  309. int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
  310. unsigned char *model, unsigned char *rev)
  311. {
  312. unsigned int reg = 0;
  313. unsigned short tmp;
  314. if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
  315. printf("PHY ID register 2 read failed\n");
  316. return -1;
  317. }
  318. reg = tmp;
  319. printf("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
  320. if (reg == 0xFFFF) {
  321. /* No physical device present at this address */
  322. return -1;
  323. }
  324. if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
  325. printf("PHY ID register 1 read failed\n");
  326. return -1;
  327. }
  328. reg |= tmp << 16;
  329. printf("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  330. *oui = (reg >> 10);
  331. *model = (unsigned char)((reg >> 4) & 0x0000003F);
  332. *rev = (unsigned char)(reg & 0x0000000F);
  333. return 0;
  334. }
  335. #ifndef CONFIG_PHYLIB
  336. /*****************************************************************************
  337. *
  338. * Reset the PHY.
  339. *
  340. * This API is deprecated. Use PHYLIB.
  341. *
  342. * Returns:
  343. * 0 on success
  344. */
  345. #if 0
  346. int miiphy_reset(const char *devname, unsigned char addr)
  347. {
  348. unsigned short reg;
  349. int timeout = 500;
  350. if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
  351. printf("PHY status read failed\n");
  352. return -1;
  353. }
  354. if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
  355. printf("PHY reset failed\n");
  356. return -1;
  357. }
  358. #ifdef CONFIG_PHY_RESET_DELAY
  359. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  360. #endif
  361. /*
  362. * Poll the control register for the reset bit to go to 0 (it is
  363. * auto-clearing). This should happen within 0.5 seconds per the
  364. * IEEE spec.
  365. */
  366. reg = 0x8000;
  367. while (((reg & 0x8000) != 0) && timeout--) {
  368. if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
  369. printf("PHY status read failed\n");
  370. return -1;
  371. }
  372. udelay(1000);
  373. }
  374. if ((reg & 0x8000) == 0) {
  375. return 0;
  376. } else {
  377. printf("PHY reset timed out\n");
  378. return -1;
  379. }
  380. return 0;
  381. }
  382. #endif
  383. #endif /* !PHYLIB */
  384. /*****************************************************************************
  385. *
  386. * Determine the ethernet speed (10/100/1000). Return 10 on error.
  387. */
  388. int miiphy_speed(const char *devname, unsigned char addr)
  389. {
  390. uint16_t bmcr, anlpar;
  391. #if defined(CONFIG_PHY_GIGE)
  392. uint16_t btsr;
  393. /*
  394. * Check for 1000BASE-X. If it is supported, then assume that the speed
  395. * is 1000.
  396. */
  397. if (miiphy_is_1000base_x(devname, addr))
  398. return _1000BASET;
  399. /*
  400. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  401. */
  402. /* Check for 1000BASE-T. */
  403. if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
  404. printf("PHY 1000BT status");
  405. goto miiphy_read_failed;
  406. }
  407. if (btsr != 0xFFFF &&
  408. (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
  409. return _1000BASET;
  410. #endif /* CONFIG_PHY_GIGE */
  411. /* Check Basic Management Control Register first. */
  412. if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
  413. printf("PHY speed");
  414. goto miiphy_read_failed;
  415. }
  416. /* Check if auto-negotiation is on. */
  417. if (bmcr & BMCR_ANENABLE) {
  418. /* Get auto-negotiation results. */
  419. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  420. printf("PHY AN speed");
  421. goto miiphy_read_failed;
  422. }
  423. return (anlpar & LPA_100) ? _100BASET : _10BASET;
  424. }
  425. /* Get speed from basic control settings. */
  426. return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
  427. miiphy_read_failed:
  428. printf(" read failed, assuming 10BASE-T\n");
  429. return _10BASET;
  430. }
  431. /*****************************************************************************
  432. *
  433. * Determine full/half duplex. Return half on error.
  434. */
  435. int miiphy_duplex(const char *devname, unsigned char addr)
  436. {
  437. uint16_t bmcr, anlpar;
  438. #if defined(CONFIG_PHY_GIGE)
  439. uint16_t btsr;
  440. /* Check for 1000BASE-X. */
  441. if (miiphy_is_1000base_x(devname, addr)) {
  442. /* 1000BASE-X */
  443. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  444. printf("1000BASE-X PHY AN duplex");
  445. goto miiphy_read_failed;
  446. }
  447. }
  448. /*
  449. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  450. */
  451. /* Check for 1000BASE-T. */
  452. if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
  453. printf("PHY 1000BT status");
  454. goto miiphy_read_failed;
  455. }
  456. if (btsr != 0xFFFF) {
  457. if (btsr & PHY_1000BTSR_1000FD) {
  458. return FULL;
  459. } else if (btsr & PHY_1000BTSR_1000HD) {
  460. return HALF;
  461. }
  462. }
  463. #endif /* CONFIG_PHY_GIGE */
  464. /* Check Basic Management Control Register first. */
  465. if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
  466. printf("PHY duplex");
  467. goto miiphy_read_failed;
  468. }
  469. /* Check if auto-negotiation is on. */
  470. if (bmcr & BMCR_ANENABLE) {
  471. /* Get auto-negotiation results. */
  472. if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
  473. printf("PHY AN duplex");
  474. goto miiphy_read_failed;
  475. }
  476. return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
  477. FULL : HALF;
  478. }
  479. /* Get speed from basic control settings. */
  480. return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
  481. miiphy_read_failed:
  482. printf(" read failed, assuming half duplex\n");
  483. return HALF;
  484. }
  485. /*****************************************************************************
  486. *
  487. * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
  488. * 1000BASE-T, or on error.
  489. */
  490. int miiphy_is_1000base_x(const char *devname, unsigned char addr)
  491. {
  492. #if defined(CONFIG_PHY_GIGE)
  493. uint16_t exsr;
  494. if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
  495. printf("PHY extended status read failed, assuming no "
  496. "1000BASE-X\n");
  497. return 0;
  498. }
  499. return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
  500. #else
  501. return 0;
  502. #endif
  503. }
  504. #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  505. /*****************************************************************************
  506. *
  507. * Determine link status
  508. */
  509. int miiphy_link(const char *devname, unsigned char addr)
  510. {
  511. unsigned short reg;
  512. /* dummy read; needed to latch some phys */
  513. (void)miiphy_read(devname, addr, MII_BMSR, &reg);
  514. if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
  515. printf("MII_BMSR read failed, assuming no link\n");
  516. return 0;
  517. }
  518. /* Determine if a link is active */
  519. if ((reg & BMSR_LSTATUS) != 0) {
  520. return 1;
  521. } else {
  522. return 0;
  523. }
  524. }
  525. #endif