ehci-timer.c 16 KB

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  1. /*
  2. * Copyright (C) 2012 by Alan Stern
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. */
  14. /* This file is part of ehci-hcd.c */
  15. /*-------------------------------------------------------------------------*/
  16. /* Set a bit in the USBCMD register */
  17. static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit)
  18. {
  19. ehci->command |= bit;
  20. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  21. /* unblock posted write */
  22. ehci_readl(ehci, &ehci->regs->command);
  23. }
  24. /* Clear a bit in the USBCMD register */
  25. static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit)
  26. {
  27. ehci->command &= ~bit;
  28. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  29. /* unblock posted write */
  30. ehci_readl(ehci, &ehci->regs->command);
  31. }
  32. /*-------------------------------------------------------------------------*/
  33. /*
  34. * EHCI timer support... Now using hrtimers.
  35. *
  36. * Lots of different events are triggered from ehci->hrtimer. Whenever
  37. * the timer routine runs, it checks each possible event; events that are
  38. * currently enabled and whose expiration time has passed get handled.
  39. * The set of enabled events is stored as a collection of bitflags in
  40. * ehci->enabled_hrtimer_events, and they are numbered in order of
  41. * increasing delay values (ranging between 1 ms and 100 ms).
  42. *
  43. * Rather than implementing a sorted list or tree of all pending events,
  44. * we keep track only of the lowest-numbered pending event, in
  45. * ehci->next_hrtimer_event. Whenever ehci->hrtimer gets restarted, its
  46. * expiration time is set to the timeout value for this event.
  47. *
  48. * As a result, events might not get handled right away; the actual delay
  49. * could be anywhere up to twice the requested delay. This doesn't
  50. * matter, because none of the events are especially time-critical. The
  51. * ones that matter most all have a delay of 1 ms, so they will be
  52. * handled after 2 ms at most, which is okay. In addition to this, we
  53. * allow for an expiration range of 1 ms.
  54. */
  55. /*
  56. * Delay lengths for the hrtimer event types.
  57. * Keep this list sorted by delay length, in the same order as
  58. * the event types indexed by enum ehci_hrtimer_event in ehci.h.
  59. */
  60. #if 0
  61. #define NSEC_PER_MSEC 1000000L
  62. #else
  63. #define NSEC_PER_MSEC 1L
  64. #endif
  65. #ifndef BIT
  66. #define BIT(n) (1UL << (n))
  67. #endif
  68. static unsigned long event_delays_ns[] = {
  69. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_ASS */
  70. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_PSS */
  71. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */
  72. // 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */
  73. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_UNLINK_INTR */
  74. 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */
  75. 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ACTIVE_UNLINK */
  76. 5 * NSEC_PER_MSEC, /* EHCI_HRTIMER_START_UNLINK_INTR */
  77. 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */
  78. 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */
  79. 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_PERIODIC */
  80. 15 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_ASYNC */
  81. 100 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IO_WATCHDOG */
  82. };
  83. /* Enable a pending hrtimer event */
  84. //高精度定时器,插入一个定时事件
  85. static void ehci_enable_event(struct ehci_hcd *ehci, unsigned event,
  86. bool resched)
  87. {
  88. unsigned long *timeout = &ehci->hr_timeouts[event];
  89. unsigned long time_interval = 0;
  90. if (resched)
  91. {
  92. // *timeout = ktime_add(ktime_get(), ktime_set(0, event_delays_ns[event]));
  93. time_interval = rt_tick_from_millisecond(event_delays_ns[event]);
  94. *timeout = rt_tick_get() + time_interval;
  95. }
  96. ehci->enabled_hrtimer_events |= (1 << event);
  97. /* Track only the lowest-numbered pending event */
  98. if (event < ehci->next_hrtimer_event) {
  99. unsigned long get_time=0;
  100. ehci->next_hrtimer_event = event;
  101. // hrtimer_start_range_ns(&ehci->hrtimer, *timeout,
  102. // NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  103. osal_timer_control(ehci->hrtimer, OSAL_TIMER_CTRL_SET_TIME, &time_interval);
  104. osal_timer_start(ehci->hrtimer);//ehci_hrtimer_func
  105. }
  106. }
  107. /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
  108. static void ehci_poll_ASS(struct ehci_hcd *ehci)
  109. {
  110. unsigned actual, want;
  111. /* Don't enable anything if the controller isn't running (e.g., died) */
  112. if (ehci->rh_state != EHCI_RH_RUNNING)
  113. return;
  114. want = (ehci->command & CMD_ASE) ? STS_ASS : 0;
  115. actual = ehci_readl(ehci, &ehci->regs->status) & STS_ASS;
  116. if (want != actual) {
  117. /* Poll again later, but give up after about 2-4 ms */
  118. if (ehci->ASS_poll_count++ < 2) {
  119. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_ASS, true);
  120. return;
  121. }
  122. // ehci_dbg(ehci, "Waited too long for the async schedule status (%x/%x), giving up\n",
  123. // want, actual);
  124. }
  125. ehci->ASS_poll_count = 0;
  126. /* The status is up-to-date; restart or stop the schedule as needed */
  127. if (want == 0)
  128. { /* Stopped */
  129. if (ehci->async_count > 0)
  130. {
  131. // ehci_set_command_bit(ehci, CMD_ASE);
  132. // mdelay(1000);
  133. int cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_ASE;
  134. ehci_writel(ehci, cmd, &ehci->regs->command);
  135. if (ehci_handshake(ehci, (uint32_t *)&ehci->regs->status, STS_ASS, STS_ASS, 100 * 1000) < 0)
  136. {
  137. hal_log_err("EHCI fail timeout STS_ASS set.\n");
  138. }
  139. }
  140. }
  141. else
  142. { /* Running */
  143. if (ehci->async_count == 0)
  144. {
  145. /* Turn off the schedule after a while */
  146. ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_ASYNC,
  147. true);
  148. }
  149. }
  150. }
  151. /* Turn off the async schedule after a brief delay */
  152. static void ehci_disable_ASE(struct ehci_hcd *ehci)
  153. {
  154. ehci_clear_command_bit(ehci, CMD_ASE);
  155. }
  156. /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
  157. static void ehci_poll_PSS(struct ehci_hcd *ehci)
  158. {
  159. unsigned actual, want;
  160. /* Don't do anything if the controller isn't running (e.g., died) */
  161. if (ehci->rh_state != EHCI_RH_RUNNING)
  162. return;
  163. want = (ehci->command & CMD_PSE) ? STS_PSS : 0;
  164. actual = ehci_readl(ehci, &ehci->regs->status) & STS_PSS;
  165. if (want != actual) {
  166. /* Poll again later, but give up after about 2-4 ms */
  167. if (ehci->PSS_poll_count++ < 2) {
  168. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_PSS, true);
  169. return;
  170. }
  171. // ehci_dbg(ehci, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
  172. // want, actual);
  173. }
  174. ehci->PSS_poll_count = 0;
  175. /* The status is up-to-date; restart or stop the schedule as needed */
  176. if (want == 0) { /* Stopped */
  177. if (ehci->periodic_count > 0)
  178. ehci_set_command_bit(ehci, CMD_PSE);
  179. } else { /* Running */
  180. if (ehci->periodic_count == 0) {
  181. /* Turn off the schedule after a while */
  182. ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_PERIODIC,
  183. true);
  184. }
  185. }
  186. }
  187. /* Turn off the periodic schedule after a brief delay */
  188. static void ehci_disable_PSE(struct ehci_hcd *ehci)
  189. {
  190. ehci_clear_command_bit(ehci, CMD_PSE);
  191. }
  192. /* Poll the STS_HALT status bit; see when a dead controller stops */
  193. static void ehci_handle_controller_death(struct ehci_hcd *ehci)
  194. {
  195. if (!(ehci_readl(ehci, &ehci->regs->status) & STS_HALT)) {
  196. /* Give up after a few milliseconds */
  197. if (ehci->died_poll_count++ < 5) {
  198. /* Try again later */
  199. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_DEAD, true);
  200. return;
  201. }
  202. // ehci_warn(ehci, "Waited too long for the controller to stop, giving up\n");
  203. }
  204. /* Clean up the mess */
  205. ehci->rh_state = EHCI_RH_HALTED;
  206. ehci_writel(ehci, 0, &ehci->regs->configured_flag);
  207. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  208. ehci_work(ehci);
  209. end_unlink_async(ehci);
  210. /* Not in process context, so don't try to reset the controller */
  211. }
  212. /* start to unlink interrupt QHs */
  213. static void ehci_handle_start_intr_unlinks(struct ehci_hcd *ehci)
  214. {
  215. bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
  216. /*
  217. * Process all the QHs on the intr_unlink list that were added
  218. * before the current unlink cycle began. The list is in
  219. * temporal order, so stop when we reach the first entry in the
  220. * current cycle. But if the root hub isn't running then
  221. * process all the QHs on the list.
  222. */
  223. while (!list_empty(&ehci->intr_unlink_wait)) {
  224. struct ehci_qh *qh;
  225. qh = list_first_entry(&ehci->intr_unlink_wait,
  226. struct ehci_qh, unlink_node);
  227. if (!stopped && (qh->unlink_cycle ==
  228. ehci->intr_unlink_wait_cycle))
  229. break;
  230. list_del_init(&qh->unlink_node);
  231. qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
  232. start_unlink_intr(ehci, qh);
  233. }
  234. /* Handle remaining entries later */
  235. if (!list_empty(&ehci->intr_unlink_wait)) {
  236. ehci_enable_event(ehci, EHCI_HRTIMER_START_UNLINK_INTR, true);
  237. ++ehci->intr_unlink_wait_cycle;
  238. }
  239. }
  240. /* Handle unlinked interrupt QHs once they are gone from the hardware */
  241. static void ehci_handle_intr_unlinks(struct ehci_hcd *ehci)
  242. {
  243. bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
  244. /*
  245. * Process all the QHs on the intr_unlink list that were added
  246. * before the current unlink cycle began. The list is in
  247. * temporal order, so stop when we reach the first entry in the
  248. * current cycle. But if the root hub isn't running then
  249. * process all the QHs on the list.
  250. */
  251. ehci->intr_unlinking = true;
  252. while (!list_empty(&ehci->intr_unlink)) {
  253. struct ehci_qh *qh;
  254. qh = list_first_entry(&ehci->intr_unlink, struct ehci_qh,
  255. unlink_node);
  256. if (!stopped && qh->unlink_cycle == ehci->intr_unlink_cycle)
  257. break;
  258. list_del_init(&qh->unlink_node);
  259. end_unlink_intr(ehci, qh);
  260. }
  261. /* Handle remaining entries later */
  262. if (!list_empty(&ehci->intr_unlink)) {
  263. ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
  264. ++ehci->intr_unlink_cycle;
  265. }
  266. ehci->intr_unlinking = false;
  267. }
  268. /* Start another free-iTDs/siTDs cycle */
  269. static void start_free_itds(struct ehci_hcd *ehci)
  270. {
  271. if (!(ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_FREE_ITDS))) {
  272. ehci->last_itd_to_free = list_entry(
  273. ehci->cached_itd_list.prev,
  274. struct ehci_itd, itd_list);
  275. ehci->last_sitd_to_free = list_entry(
  276. ehci->cached_sitd_list.prev,
  277. struct ehci_sitd, sitd_list);
  278. ehci_enable_event(ehci, EHCI_HRTIMER_FREE_ITDS, true);
  279. }
  280. }
  281. /* Wait for controller to stop using old iTDs and siTDs */
  282. static void end_free_itds(struct ehci_hcd *ehci)
  283. {
  284. struct ehci_itd *itd, *n;
  285. struct ehci_sitd *sitd, *sn;
  286. if (ehci->rh_state < EHCI_RH_RUNNING) {
  287. ehci->last_itd_to_free = NULL;
  288. ehci->last_sitd_to_free = NULL;
  289. }
  290. list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
  291. list_del(&itd->itd_list);
  292. // dma_pool_free(ehci->itd_pool, itd, itd->itd_dma);//akira 20202020
  293. usb_dma_free(itd, itd->itd_dma);
  294. if (itd == ehci->last_itd_to_free)
  295. break;
  296. }
  297. list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
  298. list_del(&sitd->sitd_list);
  299. // dma_pool_free(ehci->sitd_pool, sitd, sitd->sitd_dma);//akira 20202020
  300. usb_dma_free(sitd, sitd->sitd_dma);
  301. if (sitd == ehci->last_sitd_to_free)
  302. break;
  303. }
  304. if (!list_empty(&ehci->cached_itd_list) ||
  305. !list_empty(&ehci->cached_sitd_list))
  306. start_free_itds(ehci);
  307. }
  308. /* Handle lost (or very late) IAA interrupts */
  309. static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
  310. {
  311. u32 cmd, status;
  312. /*
  313. * Lost IAA irqs wedge things badly; seen first with a vt8235.
  314. * So we need this watchdog, but must protect it against both
  315. * (a) SMP races against real IAA firing and retriggering, and
  316. * (b) clean HC shutdown, when IAA watchdog was pending.
  317. */
  318. if (!ehci->iaa_in_progress || ehci->rh_state != EHCI_RH_RUNNING)
  319. return;
  320. /* If we get here, IAA is *REALLY* late. It's barely
  321. * conceivable that the system is so busy that CMD_IAAD
  322. * is still legitimately set, so let's be sure it's
  323. * clear before we read STS_IAA. (The HC should clear
  324. * CMD_IAAD when it sets STS_IAA.)
  325. */
  326. cmd = ehci_readl(ehci, &ehci->regs->command);
  327. /*
  328. * If IAA is set here it either legitimately triggered
  329. * after the watchdog timer expired (_way_ late, so we'll
  330. * still count it as lost) ... or a silicon erratum:
  331. * - VIA seems to set IAA without triggering the IRQ;
  332. * - IAAD potentially cleared without setting IAA.
  333. */
  334. status = ehci_readl(ehci, &ehci->regs->status);
  335. if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
  336. COUNT(ehci->stats.lost_iaa);
  337. ehci_writel(ehci, STS_IAA, &ehci->regs->status);
  338. }
  339. // ehci_dbg(ehci, "IAA watchdog: status %x cmd %x\n", status, cmd);
  340. end_iaa_cycle(ehci);
  341. }
  342. /* Enable the I/O watchdog, if appropriate */
  343. static void turn_on_io_watchdog(struct ehci_hcd *ehci)
  344. {
  345. /* Not needed if the controller isn't running or it's already enabled */
  346. if (ehci->rh_state != EHCI_RH_RUNNING ||
  347. (ehci->enabled_hrtimer_events &
  348. BIT(EHCI_HRTIMER_IO_WATCHDOG)))
  349. return;
  350. /*
  351. * Isochronous transfers always need the watchdog.
  352. * For other sorts we use it only if the flag is set.
  353. */
  354. if (ehci->isoc_count > 0 || (ehci->need_io_watchdog &&
  355. ehci->async_count + ehci->intr_count > 0))
  356. {
  357. ehci_enable_event(ehci, EHCI_HRTIMER_IO_WATCHDOG, true);
  358. }
  359. }
  360. /*
  361. * Handler functions for the hrtimer event types.
  362. * Keep this array in the same order as the event types indexed by
  363. * enum ehci_hrtimer_event in ehci.h.
  364. */
  365. static void (*event_handlers[])(struct ehci_hcd *) = {
  366. ehci_poll_ASS, /* EHCI_HRTIMER_POLL_ASS */
  367. ehci_poll_PSS, /* EHCI_HRTIMER_POLL_PSS */
  368. ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */
  369. ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */
  370. end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */
  371. end_unlink_async, /* EHCI_HRTIMER_ACTIVE_UNLINK */
  372. ehci_handle_start_intr_unlinks, /* EHCI_HRTIMER_START_UNLINK_INTR */
  373. unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */
  374. ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */
  375. ehci_disable_PSE, /* EHCI_HRTIMER_DISABLE_PERIODIC */
  376. ehci_disable_ASE, /* EHCI_HRTIMER_DISABLE_ASYNC */
  377. ehci_work, /* EHCI_HRTIMER_IO_WATCHDOG */
  378. };
  379. // ehci_enable_event
  380. void ehci_hrtimer_func(void *t)
  381. // static enum hrtimer_restart ehci_hrtimer_func(struct hrtimer *t)
  382. {
  383. // struct ehci_hcd *ehci = container_of(t, struct ehci_hcd, hrtimer);
  384. struct ehci_hcd *ehci = (struct ehci_hcd *)t;
  385. // ktime_t now;
  386. unsigned long now;
  387. unsigned long events;
  388. unsigned long flags;
  389. unsigned e;
  390. // spin_lock_irqsave(&ehci->lock, flags);//akira 20202020
  391. hal_spin_lock(&ehci->lock);
  392. events = ehci->enabled_hrtimer_events;
  393. ehci->enabled_hrtimer_events = 0;
  394. ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
  395. /*
  396. * Check each pending event. If its time has expired, handle
  397. * the event; otherwise re-enable it.
  398. */
  399. now = rt_tick_get();
  400. // now = HAL_GetTimeNs();
  401. // for_each_set_bit(e, &events, EHCI_HRTIMER_NUM_EVENTS)//akira 20202020
  402. for (int e = 0; e < EHCI_HRTIMER_NUM_EVENTS; e++)
  403. {
  404. if (events & BIT(e))
  405. {
  406. if (now >= ehci->hr_timeouts[e]) // if (now.tv64 >= ehci->hr_timeouts[e].tv64)
  407. {
  408. event_handlers[e](ehci);
  409. }
  410. else
  411. {
  412. ehci_enable_event(ehci, e, false);
  413. }
  414. }
  415. }
  416. hal_spin_unlock(&ehci->lock);
  417. // spin_unlock_irqrestore(&ehci->lock, flags);//akira 20202020
  418. // return HRTIMER_NORESTART;//akira 20202020
  419. }