nu_timer_pwm.h 40 KB

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  1. /**************************************************************************//**
  2. * @file timer.h
  3. * @version V3.00
  4. * @brief Timer PWM Controller(Timer PWM) driver header file
  5. *
  6. * @copyright SPDX-License-Identifier: Apache-2.0
  7. * @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
  8. *****************************************************************************/
  9. #ifndef __NU_TIMER_PWM_H__
  10. #define __NU_TIMER_PWM_H__
  11. #ifdef __cplusplus
  12. extern "C"
  13. {
  14. #endif
  15. /** @addtogroup Standard_Driver Standard Driver
  16. @{
  17. */
  18. /** @addtogroup TIMER_PWM_Driver TIMER PWM Driver
  19. @{
  20. */
  21. /** @addtogroup TIMER_PWM_EXPORTED_CONSTANTS TIMER PWM Exported Constants
  22. @{
  23. */
  24. /*---------------------------------------------------------------------------------------------------------*/
  25. /* Output Channel Constant Definitions */
  26. /*---------------------------------------------------------------------------------------------------------*/
  27. #define TPWM_CH0 (BIT0) /*!< Indicate PWMx_CH0 \hideinitializer */
  28. #define TPWM_CH1 (BIT1) /*!< Indicate PWMx_CH1 \hideinitializer */
  29. /*---------------------------------------------------------------------------------------------------------*/
  30. /* Counter Type Constant Definitions */
  31. /*---------------------------------------------------------------------------------------------------------*/
  32. #define TPWM_UP_COUNT (0UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up count type \hideinitializer */
  33. #define TPWM_DOWN_COUNT (1UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Down count type \hideinitializer */
  34. #define TPWM_UP_DOWN_COUNT (2UL << TIMER_PWMCTL_CNTTYPE_Pos) /*!< Up-Down count type \hideinitializer */
  35. /*---------------------------------------------------------------------------------------------------------*/
  36. /* Counter Mode Constant Definitions */
  37. /*---------------------------------------------------------------------------------------------------------*/
  38. #define TPWM_AUTO_RELOAD_MODE (0UL) /*!< Auto-reload mode \hideinitializer */
  39. #define TPWM_ONE_SHOT_MODE (TIMER_PWMCTL_CNTMODE_Msk) /*!< One-shot mode \hideinitializer */
  40. /*---------------------------------------------------------------------------------------------------------*/
  41. /* Output Level Constant Definitions */
  42. /*---------------------------------------------------------------------------------------------------------*/
  43. #define TPWM_OUTPUT_TOGGLE (0UL) /*!< Timer PWM output toggle \hideinitializer */
  44. #define TPWM_OUTPUT_NOTHING (1UL) /*!< Timer PWM output nothing \hideinitializer */
  45. #define TPWM_OUTPUT_LOW (2UL) /*!< Timer PWM output low \hideinitializer */
  46. #define TPWM_OUTPUT_HIGH (3UL) /*!< Timer PWM output high \hideinitializer */
  47. /*---------------------------------------------------------------------------------------------------------*/
  48. /* Trigger Event Source Select Constant Definitions */
  49. /*---------------------------------------------------------------------------------------------------------*/
  50. #define TPWM_TRIGGER_EVENT_AT_ZERO_POINT (0UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger event while counter zero point event occurred \hideinitializer */
  51. #define TPWM_TRIGGER_EVENT_AT_PERIOD_POINT (1UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger event while counter period point event occurred \hideinitializer */
  52. #define TPWM_TRIGGER_EVENT_AT_ZERO_OR_PERIOD_POINT (2UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger event while counter zero or period point event occurred \hideinitializer */
  53. #define TPWM_TRIGGER_EVENT_AT_COMPARE_UP_POINT (3UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger event while counter up count compare point event occurred \hideinitializer */
  54. #define TPWM_TRIGGER_EVENT_AT_COMPARE_DOWN_POINT (4UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger event while counter down count compare point event occurred \hideinitializer */
  55. #define TPWM_TRIGGER_EVENT_AT_PERIOD_OR_COMPARE_UP_POINT (5UL << TIMER_PWMTRGCTL_TRGSEL_Pos) /*!< Timer PWM trigger event while counter period or up count compare point event occurred \hideinitializer */
  56. /*---------------------------------------------------------------------------------------------------------*/
  57. /* Brake Control Constant Definitions */
  58. /*---------------------------------------------------------------------------------------------------------*/
  59. #define TPWM_BRAKE_SOURCE_EDGE_ACMP0 (TIMER_PWMBRKCTL_CPO0EBEN_Msk) /*!< Comparator 0 as edge-detect fault brake source \hideinitializer */
  60. #define TPWM_BRAKE_SOURCE_EDGE_ACMP1 (TIMER_PWMBRKCTL_CPO1EBEN_Msk) /*!< Comparator 1 as edge-detect fault brake source \hideinitializer */
  61. #define TPWM_BRAKE_SOURCE_EDGE_BKPIN (TIMER_PWMBRKCTL_BRKPEEN_Msk) /*!< Brake pin as edge-detect fault brake source \hideinitializer */
  62. #define TPWM_BRAKE_SOURCE_EDGE_SYS_CSS (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as edge-detect fault brake source \hideinitializer */
  63. #define TPWM_BRAKE_SOURCE_EDGE_SYS_BOD (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as edge-detect fault brake source \hideinitializer */
  64. #define TPWM_BRAKE_SOURCE_EDGE_SYS_COR (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as edge-detect fault brake source \hideinitializer */
  65. #define TPWM_BRAKE_SOURCE_EDGE_SYS_RAM (TIMER_PWMBRKCTL_SYSEBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as edge-detect fault brake source \hideinitializer */
  66. #define TPWM_BRAKE_SOURCE_LEVEL_ACMP0 (TIMER_PWMBRKCTL_CPO0LBEN_Msk) /*!< Comparator 0 as level-detect fault brake source \hideinitializer */
  67. #define TPWM_BRAKE_SOURCE_LEVEL_ACMP1 (TIMER_PWMBRKCTL_CPO1LBEN_Msk) /*!< Comparator 1 as level-detect fault brake source \hideinitializer */
  68. #define TPWM_BRAKE_SOURCE_LEVEL_BKPIN (TIMER_PWMBRKCTL_BRKPLEN_Msk) /*!< Brake pin as level-detect fault brake source \hideinitializer */
  69. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_CSS (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CSSBRKEN_Msk << 16)) /*!< System fail condition: clock security system detection as level-detect fault brake source \hideinitializer */
  70. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_BOD (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_BODBRKEN_Msk << 16)) /*!< System fail condition: brown-out detection as level-detect fault brake source \hideinitializer */
  71. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_COR (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_CORBRKEN_Msk << 16)) /*!< System fail condition: core lockup detection as level-detect fault brake source \hideinitializer */
  72. #define TPWM_BRAKE_SOURCE_LEVEL_SYS_RAM (TIMER_PWMBRKCTL_SYSLBEN_Msk | (TIMER_PWMFAILBRK_RAMBRKEN_Msk << 16)) /*!< System fail condition: SRAM parity error detection as level-detect fault brake source \hideinitializer */
  73. #define TPWM_BRAKE_EDGE (TIMER_PWMSWBRK_BRKETRG_Msk) /*!< Edge-detect fault brake \hideinitializer */
  74. #define TPWM_BRAKE_LEVEL (TIMER_PWMSWBRK_BRKLTRG_Msk) /*!< Level-detect fault brake \hideinitializer */
  75. /*---------------------------------------------------------------------------------------------------------*/
  76. /* Load Mode Constant Definitions */
  77. /*---------------------------------------------------------------------------------------------------------*/
  78. #define TPWM_LOAD_MODE_PERIOD (0UL) /*!< Timer PWM period load mode \hideinitializer */
  79. #define TPWM_LOAD_MODE_IMMEDIATE (TIMER_PWMCTL_IMMLDEN_Msk) /*!< Timer PWM immediately load mode \hideinitializer */
  80. #define TPWM_LOAD_MODE_CENTER (TIMER_PWMCTL_CTRLD_Msk) /*!< Timer PWM center load mode \hideinitializer */
  81. /*---------------------------------------------------------------------------------------------------------*/
  82. /* Brake Pin De-bounce Clock Source Select Constant Definitions */
  83. /*---------------------------------------------------------------------------------------------------------*/
  84. #define TPWM_BKP_DBCLK_PCLK_DIV_1 (0UL) /*!< De-bounce clock is PCLK divide by 1 \hideinitializer */
  85. #define TPWM_BKP_DBCLK_PCLK_DIV_2 (1UL) /*!< De-bounce clock is PCLK divide by 2 \hideinitializer */
  86. #define TPWM_BKP_DBCLK_PCLK_DIV_4 (2UL) /*!< De-bounce clock is PCLK divide by 4 \hideinitializer */
  87. #define TPWM_BKP_DBCLK_PCLK_DIV_8 (3UL) /*!< De-bounce clock is PCLK divide by 8 \hideinitializer */
  88. #define TPWM_BKP_DBCLK_PCLK_DIV_16 (4UL) /*!< De-bounce clock is PCLK divide by 16 \hideinitializer */
  89. #define TPWM_BKP_DBCLK_PCLK_DIV_32 (5UL) /*!< De-bounce clock is PCLK divide by 32 \hideinitializer */
  90. #define TPWM_BKP_DBCLK_PCLK_DIV_64 (6UL) /*!< De-bounce clock is PCLK divide by 64 \hideinitializer */
  91. #define TPWM_BKP_DBCLK_PCLK_DIV_128 (7UL) /*!< De-bounce clock is PCLK divide by 128 \hideinitializer */
  92. /*---------------------------------------------------------------------------------------------------------*/
  93. /* Brake Pin Source Select Constant Definitions */
  94. /*---------------------------------------------------------------------------------------------------------*/
  95. #define TPWM_TM_BRAKE0 (0UL) /*!< Brake pin source comes from TM_BRAKE0 \hideinitializer */
  96. #define TPWM_TM_BRAKE1 (1UL) /*!< Brake pin source comes from TM_BRAKE1 \hideinitializer */
  97. #define TPWM_TM_BRAKE2 (2UL) /*!< Brake pin source comes from TM_BRAKE2 \hideinitializer */
  98. #define TPWM_TM_BRAKE3 (3UL) /*!< Brake pin source comes from TM_BRAKE3 \hideinitializer */
  99. /*---------------------------------------------------------------------------------------------------------*/
  100. /* Counter Clock Source Select Constant Definitions */
  101. /*---------------------------------------------------------------------------------------------------------*/
  102. #define TPWM_CNTR_CLKSRC_TMR_CLK (0UL) /*!< Timer PWM Clock source selects to TMR_CLK \hideinitializer */
  103. #define TPWM_CNTR_CLKSRC_TIMER0_INT (1UL) /*!< Timer PWM Clock source selects to TIMER0 interrupt event \hideinitializer */
  104. #define TPWM_CNTR_CLKSRC_TIMER1_INT (2UL) /*!< Timer PWM Clock source selects to TIMER1 interrupt event \hideinitializer */
  105. #define TPWM_CNTR_CLKSRC_TIMER2_INT (3UL) /*!< Timer PWM Clock source selects to TIMER2 interrupt event \hideinitializer */
  106. #define TPWM_CNTR_CLKSRC_TIMER3_INT (4UL) /*!< Timer PWM Clock source selects to TIMER3 interrupt event \hideinitializer */
  107. /*---------------------------------------------------------------------------------------------------------*/
  108. /* Counter Synchronous Mode Constant Definitions */
  109. /*---------------------------------------------------------------------------------------------------------*/
  110. #define TPWM_CNTR_SYNC_DISABLE (0UL) /*!< Disable TIMER PWM synchronous function \hideinitializer */
  111. #define TPWM_CNTR_SYNC_START_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER0 PWM \hideinitializer */
  112. #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER0 ((0<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER0 PWM \hideinitializer */
  113. #define TPWM_CNTR_SYNC_START_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (1<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous start by TIMER2 PWM \hideinitializer */
  114. #define TPWM_CNTR_SYNC_CLEAR_BY_TIMER2 ((1<<TIMER_PWMSCTL_SYNCSRC_Pos) | (3<<TIMER_PWMSCTL_SYNCMODE_Pos)) /*!< PWM counter synchronous clear by TIMER2 PWM \hideinitializer */
  115. /**@}*/ /* end of group TIMER_PWM_EXPORTED_CONSTANTS */
  116. /** @addtogroup TIMER_PWM_EXPORTED_FUNCTIONS TIMER PWM Exported Functions
  117. @{
  118. */
  119. /**
  120. * @brief Enable PWM Counter Mode
  121. *
  122. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  123. *
  124. * @return None
  125. *
  126. * @details This macro is used to enable specified Timer channel as PWM counter mode, then timer counter mode is invalid.
  127. * @note All registers about time counter function will be cleared to 0 and timer clock source will be changed to PCLKx automatically after executing this macro.
  128. * \hideinitializer
  129. */
  130. #define TPWM_ENABLE_PWM_MODE(timer) \
  131. do{ \
  132. if(((uint32_t)&((timer)->PWMCTL) & TMR45_BASE) == TMR45_BASE) { \
  133. (timer)->CTL |= TIMER_CTL_FUNCSEL_Msk; \
  134. while(((timer)->CTL & TIMER_CTL_FUNCSEL_Msk) == 0) {} \
  135. } else { \
  136. (timer)->ALTCTL = TIMER_ALTCTL_FUNCSEL_Msk; \
  137. while(((timer)->ALTCTL & TIMER_ALTCTL_FUNCSEL_Msk) == 0) {} \
  138. } \
  139. }while(0)
  140. /**
  141. * @brief Disable PWM Counter Mode
  142. *
  143. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  144. *
  145. * @return None
  146. *
  147. * @details This macro is used to disable specified Timer channel as PWM counter mode, then timer counter mode is available.
  148. * @note All registers about PWM counter function will be cleared to 0 after executing this macro.
  149. * \hideinitializer
  150. */
  151. #define TPWM_DISABLE_PWM_MODE(timer) \
  152. do{ \
  153. if(((uint32_t)&((timer)->PWMCTL) & TMR45_BASE) == TMR45_BASE) { \
  154. (timer)->CTL &= ~TIMER_CTL_FUNCSEL_Msk; \
  155. while(((timer)->CTL & TIMER_CTL_FUNCSEL_Msk) == TIMER_CTL_FUNCSEL_Msk) {} \
  156. } else { \
  157. (timer)->ALTCTL &= ~TIMER_ALTCTL_FUNCSEL_Msk; \
  158. while(((timer)->ALTCTL & TIMER_ALTCTL_FUNCSEL_Msk) == TIMER_ALTCTL_FUNCSEL_Msk) {} \
  159. } \
  160. }while(0)
  161. /**
  162. * @brief Enable Independent Mode
  163. *
  164. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  165. *
  166. * @return None
  167. *
  168. * @details This macro is used to enable independent mode of TIMER PWM module and complementary mode will be disabled.
  169. * @note NOT available on TIMER4 and TIMER5.
  170. * \hideinitializer
  171. */
  172. #define TPWM_ENABLE_INDEPENDENT_MODE(timer) ((timer)->PWMCTL &= ~(1ul << TIMER_PWMCTL_OUTMODE_Pos))
  173. /**
  174. * @brief Enable Complementary Mode
  175. *
  176. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  177. *
  178. * @return None
  179. *
  180. * @details This macro is used to enable complementary mode of Timer PWM module and independent mode will be disabled.
  181. * @note NOT available on TIMER4 and TIMER5.
  182. * \hideinitializer
  183. */
  184. #define TPWM_ENABLE_COMPLEMENTARY_MODE(timer) ((timer)->PWMCTL |= (1 << TIMER_PWMCTL_OUTMODE_Pos))
  185. /**
  186. * @brief Set Counter Type
  187. *
  188. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  189. * @param[in] type Timer PWM count type, could be one of the following type
  190. * - \ref TPWM_UP_COUNT
  191. * - \ref TPWM_DOWN_COUNT
  192. * - \ref TPWM_UP_DOWN_COUNT
  193. *
  194. * @return None
  195. *
  196. * @details This macro is used to set Timer PWM counter type.
  197. * @note NOT available on TIMER4 and TIMER5. Both TIMER4 and TIMER5 are only support count up.
  198. * \hideinitializer
  199. */
  200. #define TPWM_SET_COUNTER_TYPE(timer, type) ((timer)->PWMCTL = ((timer)->PWMCTL & ~TIMER_PWMCTL_CNTTYPE_Msk) | (type))
  201. /**
  202. * @brief Start PWM Counter
  203. *
  204. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  205. *
  206. * @return None
  207. *
  208. * @details This macro is used to enable PWM generator and start counter counting.
  209. * \hideinitializer
  210. */
  211. #define TPWM_START_COUNTER(timer) ((timer)->PWMCTL |= TIMER_PWMCTL_CNTEN_Msk)
  212. /**
  213. * @brief Stop PWM Counter
  214. *
  215. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  216. *
  217. * @return None
  218. *
  219. * @details This macro is used to stop PWM counter after current period is completed.
  220. * \hideinitializer
  221. */
  222. #define TPWM_STOP_COUNTER(timer) ((timer)->PWMPERIOD = 0x0)
  223. /**
  224. * @brief Set Counter Clock Prescaler
  225. *
  226. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  227. *
  228. * @param[in] prescaler Clock prescaler of specified channel.
  229. * Valid values are between 0x0~0xFFF for TIMER0, TIMER1, TIMER2, TIMER3, and
  230. * valid values are between 0x0~0xFF for TIMER4 and TIMER5.
  231. *
  232. * @return None
  233. *
  234. * @details This macro is used to set the prescaler of specified TIMER PWM.
  235. * @note If prescaler is 0, then there is no scaling in counter clock source.
  236. * \hideinitializer
  237. */
  238. #define TPWM_SET_PRESCALER(timer, prescaler) ((timer)->PWMCLKPSC = (prescaler))
  239. /**
  240. * @brief Get Counter Clock Prescaler
  241. *
  242. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  243. *
  244. * @return Target prescaler setting, CLKPSC (TIMERx_PWMCLKPSC[11:0])
  245. *
  246. * @details Get the prescaler setting, the target counter clock divider is (CLKPSC + 1).
  247. * \hideinitializer
  248. */
  249. #define TPWM_GET_PRESCALER(timer) ((timer)->PWMCLKPSC)
  250. /**
  251. * @brief Set Couner Period
  252. *
  253. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  254. *
  255. * @param[in] period Period of specified channel. Valid values are between 0x0~0xFFFF.
  256. *
  257. * @return None
  258. *
  259. * @details This macro is used to set the period of specified TIMER PWM.
  260. * \hideinitializer
  261. */
  262. #define TPWM_SET_PERIOD(timer, period) ((timer)->PWMPERIOD = (period))
  263. /**
  264. * @brief Get Couner Period
  265. *
  266. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  267. *
  268. * @return Target period setting, PERIOD (TIMERx_PWMPERIOD[15:0])
  269. *
  270. * @details This macro is used to get the period of specified TIMER PWM.
  271. * \hideinitializer
  272. */
  273. #define TPWM_GET_PERIOD(timer) ((timer)->PWMPERIOD)
  274. /**
  275. * @brief Set Comparator Value
  276. *
  277. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  278. *
  279. * @param[in] cmp Comparator of specified channel. Valid values are between 0x0~0xFFFF.
  280. *
  281. * @return None
  282. *
  283. * @details This macro is used to set the comparator value of specified TIMER PWM.
  284. * \hideinitializer
  285. */
  286. #define TPWM_SET_CMPDAT(timer, cmp) ((timer)->PWMCMPDAT = (cmp))
  287. /**
  288. * @brief Get Comparator Value
  289. *
  290. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  291. *
  292. * @return Target comparator setting, CMPDAT (TIMERx_PWMCMPDAT[15:0])
  293. *
  294. * @details This macro is used to get the comparator value of specified TIMER PWM.
  295. * \hideinitializer
  296. */
  297. #define TPWM_GET_CMPDAT(timer) ((timer)->PWMCMPDAT)
  298. /**
  299. * @brief Clear Counter
  300. *
  301. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  302. *
  303. * @return None
  304. *
  305. * @details This macro is used to clear counter of specified TIMER PWM.
  306. * \hideinitializer
  307. */
  308. #define TPWM_CLEAR_COUNTER(timer) ((timer)->PWMCNTCLR = TIMER_PWMCNTCLR_CNTCLR_Msk)
  309. /**
  310. * @brief Software Trigger Brake Event
  311. *
  312. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  313. *
  314. * @param[in] type Type of brake trigger. Valid values are:
  315. * - \ref TPWM_BRAKE_EDGE
  316. * - \ref TPWM_BRAKE_LEVEL
  317. *
  318. * @return None
  319. *
  320. * @details This macro is used to trigger brake event by writing PWMSWBRK register.
  321. * @note NOT available on TIMER4 and TIMER5.
  322. * \hideinitializer
  323. */
  324. #define TPWM_SW_TRIGGER_BRAKE(timer, type) ((timer)->PWMSWBRK = (type))
  325. /**
  326. * @brief Enable Output Function
  327. *
  328. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  329. *
  330. * @param[in] ch Enable specified channel output function. Valid values are:
  331. * For TIMER0 ~ TIMER3, the valid value could be a combination of \ref TPWM_CH0 and \ref TPWM_CH1.
  332. * For TIMER4, TIMER5, the valid value could be \ref TPWM_CH0 or \ref TPWM_CH1.
  333. *
  334. * @return None
  335. *
  336. * @details This macro is used to enable output function of specified output pins.
  337. * \hideinitializer
  338. */
  339. #define TPWM_ENABLE_OUTPUT(timer, ch) \
  340. do{ \
  341. if(((uint32_t)&((timer)->PWMCTL) & TMR45_BASE) == TMR45_BASE) { \
  342. if((ch) == BIT0) \
  343. (timer)->PWMPOEN = BIT0; \
  344. else \
  345. (timer)->PWMPOEN = (BIT0 | BIT8); \
  346. } else { \
  347. (timer)->PWMPOEN = (ch); \
  348. } \
  349. }while(0)
  350. /**
  351. * @brief Set Output Inverse
  352. *
  353. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  354. *
  355. * @param[in] ch Set specified channel output is inversed or not.
  356. * For TIMER0 ~ TIMER3, the valid value could be a combination of \ref TPWM_CH0 and \ref TPWM_CH1.
  357. * But this parameter is no effect on TIMER4 and TIMER5.
  358. *
  359. * @return None
  360. *
  361. * @details This macro is used to enable output inverse of specified output pins.
  362. * \hideinitializer
  363. */
  364. #define TPWM_SET_OUTPUT_INVERSE(timer, ch) \
  365. do{ \
  366. if(((uint32_t)&((timer)->PWMCTL) & TMR45_BASE) == TMR45_BASE) { \
  367. (timer)->PWMPOLCTL = BIT0; \
  368. } else { \
  369. (timer)->PWMPOLCTL = (ch); \
  370. } \
  371. }while(0)
  372. /**
  373. * @brief Enable Output Mask Function
  374. *
  375. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  376. *
  377. * @param[in] ch Enable specified channel output mask function. Valid value could be a combination of \ref TPWM_CH0 and \ref TPWM_CH1.
  378. *
  379. * @param[in] level Output to high or low on specified mask channel.
  380. *
  381. * @return None
  382. *
  383. * @details This macro is used to enable output mask function of specified output pins.
  384. * @note NOT available on TIMER4 and TIMER5.
  385. * \hideinitializer
  386. */
  387. #define TPWM_SET_MASK_OUTPUT(timer, ch, level) do {(timer)->PWMMSKEN = (ch); (timer)->PWMMSK = (level); }while(0)
  388. /**
  389. * @brief Set Counter Synchronous Mode
  390. *
  391. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  392. *
  393. * @param[in] mode Synchronous mode. Possible options are:
  394. * - \ref TPWM_CNTR_SYNC_DISABLE
  395. * - \ref TPWM_CNTR_SYNC_START_BY_TIMER0
  396. * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER0
  397. * - \ref TPWM_CNTR_SYNC_START_BY_TIMER2
  398. * - \ref TPWM_CNTR_SYNC_CLEAR_BY_TIMER2
  399. *
  400. * @return None
  401. *
  402. * @details This macro is used to set counter synchronous mode of specified Timer PWM module.
  403. * @note Only support all PWM counters are synchronous by TIMER0 PWM or TIMER0~1 PWM counter synchronous by TIMER0 PWM and
  404. * TIMER2~3 PWM counter synchronous by TIMER2 PWM.
  405. * @note NOT available on TIMER4 and TIMER5.
  406. * \hideinitializer
  407. */
  408. #define TPWM_SET_COUNTER_SYNC_MODE(timer, mode) ((timer)->PWMSCTL = (mode))
  409. /**
  410. * @brief Trigger Counter Synchronous
  411. *
  412. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  413. *
  414. * @return None
  415. *
  416. * @details This macro is used to trigger synchronous event by specified TIMER PWM.
  417. * @note 1. This macro is only available for TIMER0 PWM and TIMER2 PWM. \n
  418. * 2. STRGEN (PWMSTRG[0]) is write only and always read as 0.
  419. * @note NOT available on TIMER4 and TIMER5.
  420. * \hideinitializer
  421. */
  422. #define TPWM_TRIGGER_COUNTER_SYNC(timer) ((timer)->PWMSTRG = TIMER_PWMSTRG_STRGEN_Msk)
  423. /**
  424. * @brief Enable Timer PWM Interrupt Wake-up Function
  425. *
  426. * @param[in] timer The pointer of the specified Timer module. It could be TIMER4 or TIMER5.
  427. *
  428. * @return None
  429. *
  430. * @details This macro is used to enable the timer pwm interrupt wake-up function.
  431. * @note Only available on TIMER4 and TIMER5.
  432. * \hideinitializer
  433. */
  434. #define TPWM_ENABLE_PWMINT_WAKEUP(timer) ((timer)->PWMCTL |= TIMER_PWMCTL_WKEN_Msk)
  435. /**
  436. * @brief Disable Timer PWM Interrupt Wake-up Function
  437. *
  438. * @param[in] timer The pointer of the specified Timer module. It could be TIMER4 or TIMER5.
  439. *
  440. * @return None
  441. *
  442. * @details This macro is used to disable the timer pwm interrupt wake-up function.
  443. * @note Only available on TIMER4 and TIMER5.
  444. * \hideinitializer
  445. */
  446. #define TPWM_DISABLE_PWMINT_WAKEUP(timer) ((timer)->PWMCTL &= ~TIMER_PWMCTL_WKEN_Msk)
  447. /**
  448. * @brief Enable Zero Event Interrupt
  449. *
  450. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  451. *
  452. * @return None
  453. *
  454. * @details This macro is used to enable the zero event interrupt function.
  455. * @note NOT available on TIMER4 and TIMER5.
  456. * \hideinitializer
  457. */
  458. #define TPWM_ENABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_ZIEN_Msk)
  459. /**
  460. * @brief Disable Zero Event Interrupt
  461. *
  462. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  463. *
  464. * @return None
  465. *
  466. * @details This macro is used to disable the zero event interrupt function.
  467. * @note NOT available on TIMER4 and TIMER5.
  468. * \hideinitializer
  469. */
  470. #define TPWM_DISABLE_ZERO_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_ZIEN_Msk)
  471. /**
  472. * @brief Get Zero Event Interrupt Flag
  473. *
  474. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  475. *
  476. * @retval 0 Zero event interrupt did not occur
  477. * @retval 1 Zero event interrupt occurred
  478. *
  479. * @details This macro indicates zero event occurred or not.
  480. * @note NOT available on TIMER4 and TIMER5.
  481. * \hideinitializer
  482. */
  483. #define TPWM_GET_ZERO_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_ZIF_Msk)? 1 : 0)
  484. /**
  485. * @brief Clear Zero Event Interrupt Flag
  486. *
  487. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  488. *
  489. * @return None
  490. *
  491. * @details This macro clears zero event interrupt flag.
  492. * @note NOT available on TIMER4 and TIMER5.
  493. * \hideinitializer
  494. */
  495. #define TPWM_CLEAR_ZERO_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_ZIF_Msk)
  496. /**
  497. * @brief Enable Period Event Interrupt
  498. *
  499. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  500. *
  501. * @return None
  502. *
  503. * @details This macro is used to enable the period event interrupt function.
  504. * \hideinitializer
  505. */
  506. #define TPWM_ENABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_PIEN_Msk)
  507. /**
  508. * @brief Disable Period Event Interrupt
  509. *
  510. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  511. *
  512. * @return None
  513. *
  514. * @details This macro is used to disable the period event interrupt function.
  515. * \hideinitializer
  516. */
  517. #define TPWM_DISABLE_PERIOD_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_PIEN_Msk)
  518. /**
  519. * @brief Get Period Event Interrupt Flag
  520. *
  521. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  522. *
  523. * @retval 0 Period event interrupt did not occur
  524. * @retval 1 Period event interrupt occurred
  525. *
  526. * @details This macro indicates period event occurred or not.
  527. * \hideinitializer
  528. */
  529. #define TPWM_GET_PERIOD_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_PIF_Msk)? 1 : 0)
  530. /**
  531. * @brief Clear Period Event Interrupt Flag
  532. *
  533. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  534. *
  535. * @return None
  536. *
  537. * @details This macro clears period event interrupt flag.
  538. * \hideinitializer
  539. */
  540. #define TPWM_CLEAR_PERIOD_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_PIF_Msk)
  541. /**
  542. * @brief Enable Compare Up Event Interrupt
  543. *
  544. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  545. *
  546. * @return None
  547. *
  548. * @details This macro is used to enable the compare up event interrupt function.
  549. * \hideinitializer
  550. */
  551. #define TPWM_ENABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPUIEN_Msk)
  552. /**
  553. * @brief Disable Compare Up Event Interrupt
  554. *
  555. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  556. *
  557. * @return None
  558. *
  559. * @details This macro is used to disable the compare up event interrupt function.
  560. * \hideinitializer
  561. */
  562. #define TPWM_DISABLE_CMP_UP_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPUIEN_Msk)
  563. /**
  564. * @brief Get Compare Up Event Interrupt Flag
  565. *
  566. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  567. *
  568. * @retval 0 Compare up event interrupt did not occur
  569. * @retval 1 Compare up event interrupt occurred
  570. *
  571. * @details This macro indicates compare up event occurred or not.
  572. * \hideinitializer
  573. */
  574. #define TPWM_GET_CMP_UP_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPUIF_Msk)? 1 : 0)
  575. /**
  576. * @brief Clear Compare Up Event Interrupt Flag
  577. *
  578. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  579. *
  580. * @return None
  581. *
  582. * @details This macro clears compare up event interrupt flag.
  583. * \hideinitializer
  584. */
  585. #define TPWM_CLEAR_CMP_UP_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPUIF_Msk)
  586. /**
  587. * @brief Enable Compare Down Event Interrupt
  588. *
  589. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  590. *
  591. * @return None
  592. *
  593. * @details This macro is used to enable the compare down event interrupt function.
  594. * @note NOT available on TIMER4 and TIMER5.
  595. * \hideinitializer
  596. */
  597. #define TPWM_ENABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 |= TIMER_PWMINTEN0_CMPDIEN_Msk)
  598. /**
  599. * @brief Disable Compare Down Event Interrupt
  600. *
  601. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  602. *
  603. * @return None
  604. *
  605. * @details This macro is used to disable the compare down event interrupt function.
  606. * @note NOT available on TIMER4 and TIMER5.
  607. * \hideinitializer
  608. */
  609. #define TPWM_DISABLE_CMP_DOWN_INT(timer) ((timer)->PWMINTEN0 &= ~TIMER_PWMINTEN0_CMPDIEN_Msk)
  610. /**
  611. * @brief Get Compare Down Event Interrupt Flag
  612. *
  613. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  614. *
  615. * @retval 0 Compare down event interrupt did not occur
  616. * @retval 1 Compare down event interrupt occurred
  617. *
  618. * @details This macro indicates compare down event occurred or not.
  619. * @note NOT available on TIMER4 and TIMER5.
  620. * \hideinitializer
  621. */
  622. #define TPWM_GET_CMP_DOWN_INT_FLAG(timer) (((timer)->PWMINTSTS0 & TIMER_PWMINTSTS0_CMPDIF_Msk)? 1 : 0)
  623. /**
  624. * @brief Clear Compare Down Event Interrupt Flag
  625. *
  626. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  627. *
  628. * @return None
  629. *
  630. * @details This macro clears compare down event interrupt flag.
  631. * @note NOT available on TIMER4 and TIMER5.
  632. * \hideinitializer
  633. */
  634. #define TPWM_CLEAR_CMP_DOWN_INT_FLAG(timer) ((timer)->PWMINTSTS0 = TIMER_PWMINTSTS0_CMPDIF_Msk)
  635. /**
  636. * @brief Get Counter Reach Maximum Count Status
  637. *
  638. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  639. *
  640. * @retval 0 Timer PWM counter never counts to maximum value
  641. * @retval 1 Timer PWM counter counts to maximum value, 0xFFFF
  642. *
  643. * @details This macro indicates Timer PWM counter has count to 0xFFFF or not.
  644. * \hideinitializer
  645. */
  646. #define TPWM_GET_REACH_MAX_CNT_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_CNTMAXF_Msk)? 1 : 0)
  647. /**
  648. * @brief Clear Counter Reach Maximum Count Status
  649. *
  650. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  651. *
  652. * @return None
  653. *
  654. * @details This macro clears reach maximum count status.
  655. * \hideinitializer
  656. */
  657. #define TPWM_CLEAR_REACH_MAX_CNT_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_CNTMAXF_Msk)
  658. /**
  659. * @brief Get Trigger ADC Status
  660. *
  661. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  662. *
  663. * @retval 0 Trigger ADC start conversion is not occur
  664. * @retval 1 Specified counter compare event has trigger ADC start conversion
  665. *
  666. * @details This macro is used to indicate PWM counter compare event has triggered ADC start conversion.
  667. * \hideinitializer
  668. */
  669. #define TPWM_GET_TRG_ADC_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_EADCTRGF_Msk)? 1 : 0)
  670. /**
  671. * @brief Clear Trigger ADC Status
  672. *
  673. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0 ~ TIMER5.
  674. *
  675. * @return None
  676. *
  677. * @details This macro is used to clear PWM counter compare event trigger ADC status.
  678. * \hideinitializer
  679. */
  680. #define TPWM_CLEAR_TRG_ADC_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_EADCTRGF_Msk)
  681. /**
  682. * @brief Get Trigger PDMA Status
  683. *
  684. * @param[in] timer The pointer of the specified Timer module. It could be TIMER4 ~ TIMER5.
  685. *
  686. * @retval 0 Trigger PDMA transfer data is not occur
  687. * @retval 1 Specified counter compare event has trigger PDMA transfer data
  688. *
  689. * @details This macro is used to indicate PWM counter compare event has triggered PDMA start transfer data.
  690. * @note Only available on TIMER4 and TIMER5.
  691. * \hideinitializer
  692. */
  693. #define TPWM_GET_TRG_PDMA_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_PDMATRGF_Msk)? 1 : 0)
  694. /**
  695. * @brief Clear Trigger PDMA Status
  696. *
  697. * @param[in] timer The pointer of the specified Timer module. It could be TIMER4 ~ TIMER5.
  698. *
  699. * @return None
  700. *
  701. * @details This macro is used to clear PWM counter compare event trigger PDMA status.
  702. * @note Only available on TIMER4 and TIMER5.
  703. * \hideinitializer
  704. */
  705. #define TPWM_CLEAR_TRG_PDMA_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_PDMATRGF_Msk)
  706. /**
  707. * @brief Get PWM Interrupt Wake-up Flag
  708. *
  709. * @param[in] timer The pointer of the specified Timer module. It could be TIMER4 ~ TIMER5.
  710. *
  711. * @retval 0 PWM does not cause CPU wake-up
  712. * @retval 1 PWM interrupt event cause CPU wake-up
  713. *
  714. * @details This function indicates PWM interrupt event has waked up system or not.
  715. * @note Only available on TIMER4 and TIMER5.
  716. */
  717. #define TPWM_GET_PWMINT_WAKEUP_STATUS(timer) (((timer)->PWMSTATUS & TIMER_PWMSTATUS_WKF_Msk)? 1 : 0)
  718. /**
  719. * @brief Clear PWM Interrupt Wake-up Flag
  720. *
  721. * @param[in] timer The pointer of the specified Timer module. It could be TIMER4 ~ TIMER5.
  722. *
  723. * @return None
  724. *
  725. * @details This macro is used to clear PWM interrupt wakeup status.
  726. * @note Only available on TIMER4 and TIMER5.
  727. * \hideinitializer
  728. */
  729. #define TPWM_CLEAR_PWMINT_WAKEUP_STATUS(timer) ((timer)->PWMSTATUS = TIMER_PWMSTATUS_WKF_Msk)
  730. /**
  731. * @brief Set Brake Event at Brake Pin High or Low-to-High
  732. *
  733. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  734. *
  735. * @return None
  736. *
  737. * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high.
  738. * @note The default brake pin detection is high level or from low to high.
  739. * @note NOT available on TIMER4 and TIMER5.
  740. * \hideinitializer
  741. */
  742. #define TPWM_SET_BRAKE_PIN_HIGH_DETECT(timer) ((timer)->PWMBNF &= ~TIMER_PWMBNF_BRKPINV_Msk)
  743. /**
  744. * @brief Set Brake Event at Brake Pin Low or High-to-Low
  745. *
  746. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  747. *
  748. * @return None
  749. *
  750. * @details This macro is used to set detect brake event when external brake pin at low level or transfer from high to low.
  751. * @note NOT available on TIMER4 and TIMER5.
  752. * \hideinitializer
  753. */
  754. #define TPWM_SET_BRAKE_PIN_LOW_DETECT(timer) ((timer)->PWMBNF |= TIMER_PWMBNF_BRKPINV_Msk)
  755. /**
  756. * @brief Set External Brake Pin Source
  757. *
  758. * @param[in] timer The pointer of the specified Timer module. It could be TIMER0, TIMER1, TIMER2, TIMER3.
  759. * @param[in] pin The external brake pin source, could be one of following source
  760. * - \ref TPWM_TM_BRAKE0
  761. * - \ref TPWM_TM_BRAKE1
  762. * - \ref TPWM_TM_BRAKE2
  763. * - \ref TPWM_TM_BRAKE3
  764. *
  765. * @return None
  766. *
  767. * @details This macro is used to set detect brake event when external brake pin at high level or transfer from low to high.
  768. * @note NOT available on TIMER4 and TIMER5.
  769. * \hideinitializer
  770. */
  771. #define TPWM_SET_BRAKE_PIN_SOURCE(timer, pin) ((timer)->PWMBNF = ((timer)->PWMBNF & ~TIMER_PWMBNF_BKPINSRC_Msk) | ((pin)<<TIMER_PWMBNF_BKPINSRC_Pos))
  772. void TPWM_SetCounterClockSource(TIMER_T *timer, uint32_t u32CntClkSrc);
  773. uint32_t TPWM_ConfigOutputFreqAndDuty(TIMER_T *timer, uint32_t u32Frequency, uint32_t u32DutyCycle);
  774. void TPWM_EnableDeadTime(TIMER_T *timer, uint32_t u32DTCount);
  775. void TPWM_EnableDeadTimeWithPrescale(TIMER_T *timer, uint32_t u32DTCount);
  776. void TPWM_DisableDeadTime(TIMER_T *timer);
  777. void TPWM_EnableCounter(TIMER_T *timer);
  778. void TPWM_DisableCounter(TIMER_T *timer);
  779. void TPWM_EnableTriggerADC(TIMER_T *timer, uint32_t u32Condition);
  780. void TPWM_DisableTriggerADC(TIMER_T *timer);
  781. void TPWM_EnableTriggerPDMA(TIMER_T *timer, uint32_t u32Condition);
  782. void TPWM_DisableTriggerPDMA(TIMER_T *timer);
  783. void TPWM_EnableFaultBrake(TIMER_T *timer, uint32_t u32CH0Level, uint32_t u32CH1Level, uint32_t u32BrakeSource);
  784. void TPWM_EnableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource);
  785. void TPWM_DisableFaultBrakeInt(TIMER_T *timer, uint32_t u32IntSource);
  786. uint32_t TPWM_GetFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource);
  787. void TPWM_ClearFaultBrakeIntFlag(TIMER_T *timer, uint32_t u32IntSource);
  788. void TPWM_SetLoadMode(TIMER_T *timer, uint32_t u32LoadMode);
  789. void TPWM_EnableBrakePinDebounce(TIMER_T *timer, uint32_t u32BrakePinSrc, uint32_t u32DebounceCnt, uint32_t u32ClkSrcSel);
  790. void TPWM_DisableBrakePinDebounce(TIMER_T *timer);
  791. void TPWM_EnableBrakePinInverse(TIMER_T *timer);
  792. void TPWM_DisableBrakePinInverse(TIMER_T *timer);
  793. void TPWM_SetBrakePinSource(TIMER_T *timer, uint32_t u32BrakePinNum);
  794. /**@}*/ /* end of group TIMER_PWM_EXPORTED_FUNCTIONS */
  795. /**@}*/ /* end of group TIMER_PWM_Driver */
  796. /**@}*/ /* end of group Standard_Driver */
  797. #ifdef __cplusplus
  798. }
  799. #endif
  800. #endif /* __NU_TIMER_PWM_H__ */