fiopad_comm.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572
  1. /*
  2. * Copyright : (C) 2022 Phytium Information Technology, Inc.
  3. * All Rights Reserved.
  4. *
  5. * This program is OPEN SOURCE software: you can redistribute it and/or modify it
  6. * under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
  7. * either version 1.0 of the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
  10. * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11. * See the Phytium Public License for more details.
  12. *
  13. *
  14. * FilePath: fiopad_comm.c
  15. * Date: 2022-02-10 14:53:42
  16. * LastEditTime: 2022-02-18 08:25:29
  17. * Description:  This files is for io-pad function definition
  18. *
  19. * Modify History:
  20. * Ver   Who        Date         Changes
  21. * ----- ------     --------    --------------------------------------
  22. * 1.0 huanghe 2021/11/5 init commit
  23. * 1.1 zhugengyu 2022/3/21 adopt to lastest tech spec.
  24. */
  25. /***************************** Include Files *********************************/
  26. #include "fparameters.h"
  27. #include "fio.h"
  28. #include "fkernel.h"
  29. #include "fassert.h"
  30. #include "fdebug.h"
  31. #include "stdio.h"
  32. #include "fpinctrl.h"
  33. /************************** Constant Definitions *****************************/
  34. /** @name IO PAD Control Register
  35. */
  36. #define FIOPAD_X_REG0_BEG_OFFSET 0x0 /* 上下拉/驱动能力/复用功能配置 */
  37. #define FIOPAD_X_REG0_END_OFFSET 0x24c
  38. #define FIOPAD_X_REG1_BEG_OFFSET 0x1024 /* 输入/输出延时配置 */
  39. #define FIOPAD_X_REG1_END_OFFSET 0x124c
  40. /** @name X_reg0 Register
  41. */
  42. #define FIOPAD_X_REG0_PULL_MASK GENMASK(9, 8) /* 上下拉配置 */
  43. #define FIOPAD_X_REG0_PULL_GET(x) GET_REG32_BITS((x), 9, 8)
  44. #define FIOPAD_X_REG0_PULL_SET(x) SET_REG32_BITS((x), 9, 8)
  45. #define FIOPAD_X_REG0_DRIVE_MASK GENMASK(7, 4) /* 驱动能力配置 */
  46. #define FIOPAD_X_REG0_DRIVE_GET(x) GET_REG32_BITS((x), 7, 4)
  47. #define FIOPAD_X_REG0_DRIVE_SET(x) SET_REG32_BITS((x), 7, 4)
  48. #define FIOPAD_X_REG0_FUNC_MASK GENMASK(2, 0) /* 引脚复用配置 */
  49. #define FIOPAD_X_REG0_FUNC_GET(x) GET_REG32_BITS((x), 2, 0)
  50. #define FIOPAD_X_REG0_FUNC_SET(x) SET_REG32_BITS((x), 2, 0)
  51. /** @name X_reg1 Register
  52. */
  53. #define FIOPAD_X_REG1_OUT_DELAY_EN BIT(8)
  54. #define FIOPAD_X_REG1_OUT_DELAY_DELICATE_MASK GENMASK(11, 9)
  55. #define FIOPAD_X_REG1_OUT_DELAY_DELICATE_GET(x) GET_REG32_BITS((x), 11, 9) /* 延时精调 */
  56. #define FIOPAD_X_REG1_OUT_DELAY_DELICATE_SET(x) SET_REG32_BITS((x), 11, 9)
  57. #define FIOPAD_X_REG1_OUT_DELAY_ROUGH_MASK GENMASK(14, 12)
  58. #define FIOPAD_X_REG1_OUT_DELAY_ROUGH_GET(x) GET_REG32_BITS((x), 14, 12) /* 延时粗调 */
  59. #define FIOPAD_X_REG1_OUT_DELAY_ROUGH_SET(x) SET_REG32_BITS((x), 14, 12)
  60. #define FIOPAD_X_REG1_IN_DELAY_EN BIT(0)
  61. #define FIOPAD_X_REG1_IN_DELAY_DELICATE_MASK GENMASK(3, 1)
  62. #define FIOPAD_X_REG1_IN_DELAY_DELICATE_GET(x) GET_REG32_BITS((x), 3, 1) /* 延时精调 */
  63. #define FIOPAD_X_REG1_IN_DELAY_DELICATE_SET(x) SET_REG32_BITS((x), 3, 1)
  64. #define FIOPAD_X_REG1_IN_DELAY_ROUGH_MASK GENMASK(6, 4)
  65. #define FIOPAD_X_REG1_IN_DELAY_ROUGH_GET(x) GET_REG32_BITS((x), 6, 4) /* 延时粗调 */
  66. #define FIOPAD_X_REG1_IN_DELAY_ROUGH_SET(x) SET_REG32_BITS((x), 6, 4)
  67. #define FIOPAD_DELAY_MAX 15
  68. /**************************** Type Definitions *******************************/
  69. /***************** Macros (Inline Functions) Definitions *********************/
  70. static inline u32 FIOPadRead(FPinIndex pin)
  71. {
  72. return FtIn32(FIOPAD_BASE_ADDR + pin.reg_off);
  73. }
  74. static inline void FIOPadWrite(FPinIndex pin, u32 reg_val)
  75. {
  76. FtOut32(FIOPAD_BASE_ADDR + pin.reg_off, reg_val);
  77. return;
  78. }
  79. #define FIOPAD_ASSERT_REG0_OFF(pin) FASSERT_MSG((FIOPAD_X_REG0_END_OFFSET >= pin.reg_off), "invalid reg0 offset @0x%x\r\n", (pin.reg_off))
  80. #define FIOPAD_ASSERT_FUNC(func) FASSERT_MSG((func < FPIN_NUM_OF_FUNC), "invalid func as %d\r\n", (func))
  81. #define FIOPAD_ASSERT_PULL(pull) FASSERT_MSG((pull < FPIN_NUM_OF_PULL), "invalid pull as %d\r\n", (pull))
  82. #define FIOPAD_ASSERT_DRIVE(drive) FASSERT_MSG((drive < FPIN_NUM_OF_DRIVE), "invalid pull as %d\r\n", (drive))
  83. #define FIOPAD_ASSERT_REG1_OFF(pin) FASSERT_MSG(((FIOPAD_X_REG1_BEG_OFFSET <= pin.reg_off) && (FIOPAD_X_REG1_END_OFFSET >= pin.reg_off)), "invalid reg1 offset @0x%x\r\n", (pin.reg_off))
  84. #define FIOPAD_ASSERT_DELAY(delay) FASSERT_MSG((delay < FPIN_NUM_OF_DELAY), "invalid delay as %d\r\n", (delay))
  85. #define FIOPAD_DEBUG_TAG "FIOPAD"
  86. #define FIOPAD_ERROR(format, ...) FT_DEBUG_PRINT_E(FIOPAD_DEBUG_TAG, format, ##__VA_ARGS__)
  87. #define FIOPAD_WARN(format, ...) FT_DEBUG_PRINT_W(FIOPAD_DEBUG_TAG, format, ##__VA_ARGS__)
  88. #define FIOPAD_INFO(format, ...) FT_DEBUG_PRINT_I(FIOPAD_DEBUG_TAG, format, ##__VA_ARGS__)
  89. #define FIOPAD_DEBUG(format, ...) FT_DEBUG_PRINT_D(FIOPAD_DEBUG_TAG, format, ##__VA_ARGS__)
  90. /************************** Function Prototypes ******************************/
  91. /**
  92. * @name: FPinGetFunc
  93. * @msg: 获取IO引脚当前的复用功能
  94. * @return {FPinFunc} 当前的复用功能
  95. * @param {FPinIndex} pin IO引脚索引
  96. * @note 参考编程手册,使用 FIOPAD_INDEX 宏定义index的值
  97. */
  98. FPinFunc FPinGetFunc(const FPinIndex pin)
  99. {
  100. FIOPAD_ASSERT_REG0_OFF(pin);
  101. u32 func = FIOPAD_X_REG0_FUNC_GET(FIOPadRead(pin));
  102. FIOPAD_ASSERT_FUNC(func);
  103. return (FPinFunc)func;
  104. }
  105. /**
  106. * @name: FPinSetFunc
  107. * @msg: 设置IO引脚复用功能
  108. * @return {*}
  109. * @param {FPinIndex} pin IO引脚索引
  110. * @param {FPinFunc} func IO复用功能
  111. * @note 参考编程手册,使用 FIOPAD_INDEX 宏定义index的值
  112. */
  113. void FPinSetFunc(const FPinIndex pin, FPinFunc func)
  114. {
  115. FIOPAD_ASSERT_REG0_OFF(pin);
  116. FIOPAD_ASSERT_FUNC(func);
  117. u32 reg_val = FIOPadRead(pin);
  118. u32 test_val = 0;
  119. reg_val &= ~FIOPAD_X_REG0_FUNC_MASK;
  120. reg_val |= FIOPAD_X_REG0_FUNC_SET(func);
  121. FIOPadWrite(pin, reg_val);
  122. test_val = FIOPadRead(pin);
  123. if (reg_val != test_val)
  124. {
  125. FIOPAD_ERROR("ERROR: FIOPad write is failed ,pin is %x\n, 0x%x != 0x%x",
  126. pin.reg_off, reg_val, test_val);
  127. }
  128. return;
  129. }
  130. /**
  131. * @name: FPinGetDrive
  132. * @msg: 获取IO引脚的驱动能力
  133. * @return {FPinDrive} 引脚的当前的驱动能力
  134. * @param {FPinIndex} pin IO引脚索引
  135. */
  136. FPinDrive FPinGetDrive(const FPinIndex pin)
  137. {
  138. FIOPAD_ASSERT_REG0_OFF(pin);
  139. u32 drive = FIOPAD_X_REG0_DRIVE_GET(FIOPadRead(pin));
  140. FIOPAD_ASSERT_DRIVE(drive);
  141. return (FPinDrive)drive;
  142. }
  143. /**
  144. * @name: FPinSetDrive
  145. * @msg: 设置IO引脚的驱动能力
  146. * @return {*}
  147. * @param {FPinIndex} pin, IO引脚索引
  148. * @param {FPinDrive} drive, 引脚驱动能力设置
  149. */
  150. void FPinSetDrive(const FPinIndex pin, FPinDrive drive)
  151. {
  152. FIOPAD_ASSERT_REG0_OFF(pin);
  153. FIOPAD_ASSERT_DRIVE(drive);
  154. u32 reg_val = FIOPadRead(pin);
  155. reg_val &= ~FIOPAD_X_REG0_DRIVE_MASK;
  156. reg_val |= FIOPAD_X_REG0_DRIVE_SET(drive);
  157. FIOPadWrite(pin, reg_val);
  158. return;
  159. }
  160. void FPinGetConfig(const FPinIndex pin, FPinFunc *func, FPinPull *pull, FPinDrive *drive)
  161. {
  162. FIOPAD_ASSERT_REG0_OFF(pin);
  163. u32 reg_val = FIOPadRead(pin);
  164. if (func)
  165. {
  166. *func = FIOPAD_X_REG0_FUNC_GET(reg_val);
  167. }
  168. if (pull)
  169. {
  170. *pull = FIOPAD_X_REG0_PULL_GET(reg_val);
  171. }
  172. if (drive)
  173. {
  174. *pull = FIOPAD_X_REG0_DRIVE_GET(reg_val);
  175. }
  176. return;
  177. }
  178. void FPinSetConfig(const FPinIndex pin, FPinFunc func, FPinPull pull, FPinDrive drive)
  179. {
  180. FIOPAD_ASSERT_REG0_OFF(pin);
  181. u32 reg_val = FIOPadRead(pin);
  182. reg_val &= ~FIOPAD_X_REG0_FUNC_MASK;
  183. reg_val |= FIOPAD_X_REG0_FUNC_SET(func);
  184. reg_val &= ~FIOPAD_X_REG0_PULL_MASK;
  185. reg_val |= FIOPAD_X_REG0_PULL_SET(pull);
  186. reg_val &= ~FIOPAD_X_REG0_DRIVE_MASK;
  187. reg_val |= FIOPAD_X_REG0_DRIVE_SET(drive);
  188. FIOPadWrite(pin, reg_val);
  189. return;
  190. }
  191. /**
  192. * @name: FPinGetPull
  193. * @msg: 获取IO引脚当前的上下拉设置
  194. * @return {*}
  195. * @param {FPinIndex} pin IO引脚索引
  196. * @note 参考编程手册,使用 FIOPAD_INDEX 宏定义index的值
  197. */
  198. FPinPull FPinGetPull(const FPinIndex pin)
  199. {
  200. FIOPAD_ASSERT_REG0_OFF(pin);
  201. u32 pull = FIOPAD_X_REG0_PULL_GET(FIOPadRead(pin));
  202. FIOPAD_ASSERT_PULL(pull);
  203. return (FPinPull)pull;
  204. }
  205. /**
  206. * @name: FPinSetPull
  207. * @msg: 设置IO引脚当前的上下拉
  208. * @return {*}
  209. * @param {FPinIndex} pin IO引脚索引
  210. * @param {FPinPull} pull 上下拉设置
  211. */
  212. void FPinSetPull(const FPinIndex pin, FPinPull pull)
  213. {
  214. FIOPAD_ASSERT_REG0_OFF(pin);
  215. FIOPAD_ASSERT_PULL(pull);
  216. u32 reg_val = FIOPadRead(pin);
  217. reg_val &= ~FIOPAD_X_REG0_PULL_MASK;
  218. reg_val |= FIOPAD_X_REG0_PULL_SET(pull);
  219. FIOPadWrite(pin, reg_val);
  220. return;
  221. }
  222. /**
  223. * @name: FPinGetDelay
  224. * @msg: 获取IO引脚当前的延时设置
  225. * @return {FPinDelay} 当前的延时设置
  226. * @param {FPinIndex} pin IO引脚延时设置索引
  227. * @param {FPinDelayDir} dir 输入/输出延时
  228. * @param {FPinDelayType} type 精调/粗调延时
  229. */
  230. FPinDelay FPinGetDelay(const FPinIndex pin, FPinDelayDir dir, FPinDelayType type)
  231. {
  232. FIOPAD_ASSERT_REG1_OFF(pin);
  233. const u32 reg_val = FIOPadRead(pin);
  234. u8 delay = 0;
  235. if (FPIN_OUTPUT_DELAY == dir)
  236. {
  237. if (FPIN_DELAY_FINE_TUNING == type)
  238. {
  239. delay = FIOPAD_X_REG1_OUT_DELAY_DELICATE_GET(reg_val);
  240. }
  241. else if (FPIN_DELAY_COARSE_TUNING == type)
  242. {
  243. delay = FIOPAD_X_REG1_OUT_DELAY_ROUGH_GET(reg_val);
  244. }
  245. else
  246. {
  247. FASSERT(0);
  248. }
  249. }
  250. else if (FPIN_INPUT_DELAY == dir)
  251. {
  252. if (FPIN_DELAY_FINE_TUNING == type)
  253. {
  254. delay = FIOPAD_X_REG1_IN_DELAY_DELICATE_GET(reg_val);
  255. }
  256. else if (FPIN_DELAY_COARSE_TUNING == type)
  257. {
  258. delay = FIOPAD_X_REG1_IN_DELAY_ROUGH_GET(reg_val);
  259. }
  260. else
  261. {
  262. FASSERT(0);
  263. }
  264. }
  265. else
  266. {
  267. FASSERT(0);
  268. }
  269. FIOPAD_ASSERT_DELAY(delay);
  270. return (FPinDelay)delay;
  271. }
  272. /**
  273. * @name: FPinGetDelayEn
  274. * @msg: 获取IO引脚当前的延时使能标志位
  275. * @return {*}
  276. * @param {FPinIndex} pin IO引脚延时设置索引
  277. * @param {FPinDelayDir} dir 输入/输出延时
  278. */
  279. boolean FPinGetDelayEn(const FPinIndex pin, FPinDelayDir dir)
  280. {
  281. FIOPAD_ASSERT_REG1_OFF(pin);
  282. const u32 reg_val = FIOPadRead(pin);
  283. boolean enabled = FALSE;
  284. if (FPIN_OUTPUT_DELAY == dir)
  285. {
  286. if (FIOPAD_X_REG1_OUT_DELAY_EN & reg_val)
  287. enabled = TRUE;
  288. else
  289. enabled = FALSE;
  290. }
  291. else if (FPIN_INPUT_DELAY == dir)
  292. {
  293. if (FIOPAD_X_REG1_IN_DELAY_EN & reg_val)
  294. enabled = TRUE;
  295. else
  296. enabled = FALSE;
  297. }
  298. else
  299. {
  300. FASSERT(0);
  301. }
  302. return enabled;
  303. }
  304. /**
  305. * @name: FPinSetDelay
  306. * @msg: 设置IO引脚延时
  307. * @return {*}
  308. * @param {FPinIndex} pin IO引脚延时设置索引
  309. * @param {FPinDelayDir} dir 输入/输出延时
  310. * @param {FPinDelayType} type 精调/粗调延时
  311. * @param {FPinDelay} delay 延时设置
  312. */
  313. void FPinSetDelay(const FPinIndex pin, FPinDelayDir dir, FPinDelayType type, FPinDelay delay)
  314. {
  315. FIOPAD_ASSERT_REG1_OFF(pin);
  316. FIOPAD_ASSERT_DELAY(delay);
  317. u32 reg_val = FIOPadRead(pin);
  318. if (FPIN_OUTPUT_DELAY == dir)
  319. {
  320. if (FPIN_DELAY_FINE_TUNING == type)
  321. {
  322. reg_val &= ~FIOPAD_X_REG1_OUT_DELAY_DELICATE_MASK;
  323. reg_val |= FIOPAD_X_REG1_OUT_DELAY_DELICATE_SET(delay);
  324. }
  325. else if (FPIN_DELAY_COARSE_TUNING == type)
  326. {
  327. reg_val &= ~FIOPAD_X_REG1_OUT_DELAY_ROUGH_MASK;
  328. reg_val |= FIOPAD_X_REG1_OUT_DELAY_ROUGH_SET(delay);
  329. }
  330. else
  331. {
  332. FASSERT(0);
  333. }
  334. }
  335. else if (FPIN_INPUT_DELAY == dir)
  336. {
  337. if (FPIN_DELAY_FINE_TUNING == type)
  338. {
  339. reg_val &= ~FIOPAD_X_REG1_IN_DELAY_DELICATE_MASK;
  340. reg_val |= FIOPAD_X_REG1_IN_DELAY_DELICATE_SET(delay);
  341. }
  342. else if (FPIN_DELAY_COARSE_TUNING == type)
  343. {
  344. reg_val &= ~FIOPAD_X_REG1_IN_DELAY_ROUGH_MASK;
  345. reg_val |= FIOPAD_X_REG1_IN_DELAY_ROUGH_SET(delay);
  346. }
  347. else
  348. {
  349. FASSERT(0);
  350. }
  351. }
  352. else
  353. {
  354. FASSERT(0);
  355. }
  356. FIOPadWrite(pin, reg_val);
  357. return;
  358. }
  359. /**
  360. * @name: FPinSetDelayEn
  361. * @msg: 使能/去使能IO引脚延时
  362. * @return {*}
  363. * @param {FPinIndex} pin IO引脚延时设置索引
  364. * @param {FPinDelayDir} dir 输入/输出延时
  365. * @param {boolean} enable TRUE: 使能, FALSE: 去使能
  366. */
  367. void FPinSetDelayEn(const FPinIndex pin, FPinDelayDir dir, boolean enable)
  368. {
  369. FIOPAD_ASSERT_REG1_OFF(pin);
  370. u32 reg_val = FIOPadRead(pin);
  371. if (FPIN_OUTPUT_DELAY == dir)
  372. {
  373. if (enable)
  374. reg_val |= FIOPAD_X_REG1_OUT_DELAY_EN;
  375. else
  376. reg_val &= ~FIOPAD_X_REG1_OUT_DELAY_EN;
  377. }
  378. else if (FPIN_INPUT_DELAY == dir)
  379. {
  380. if (enable)
  381. reg_val |= FIOPAD_X_REG1_IN_DELAY_EN;
  382. else
  383. reg_val &= ~FIOPAD_X_REG1_IN_DELAY_EN;
  384. }
  385. else
  386. {
  387. FASSERT(0);
  388. }
  389. FIOPadWrite(pin, reg_val);
  390. return;
  391. }
  392. /**
  393. * @name: FPinSetDelayConfig
  394. * @msg: Update and enable common IO pin delay config
  395. * @return {NONE}
  396. * @param {FPinIndex} pin, IO pin index
  397. * @param {FPinDelayIOType} in_out_type, Select the input and output types ,
  398. * @param {FPinDelay} roungh_delay, delay rough setting
  399. * @param {FPinDelay} delicate_delay, delay delicate setting
  400. * @param {boolean} enable, enable delay
  401. */
  402. void FPinSetDelayConfig(const FPinIndex pin, FPinDelayIOType in_out_type, FPinDelay roungh_delay, FPinDelay delicate_delay, boolean enable)
  403. {
  404. FIOPAD_ASSERT_REG1_OFF(pin);
  405. u32 reg_val = FIOPadRead(pin);
  406. if (in_out_type == FPIN_DELAY_IN_TYPE)
  407. {
  408. reg_val = FIOPadRead(pin);
  409. /* update delicate input delay */
  410. reg_val &= ~FIOPAD_X_REG1_IN_DELAY_DELICATE_MASK;
  411. reg_val |= FIOPAD_X_REG1_IN_DELAY_DELICATE_SET(delicate_delay);
  412. /* update rough input delay */
  413. reg_val &= ~FIOPAD_X_REG1_IN_DELAY_ROUGH_MASK;
  414. reg_val |= FIOPAD_X_REG1_IN_DELAY_ROUGH_SET(roungh_delay);
  415. /* enable input delay */
  416. if (enable)
  417. {
  418. reg_val |= FIOPAD_X_REG1_IN_DELAY_EN;
  419. }
  420. else
  421. {
  422. reg_val &= ~FIOPAD_X_REG1_IN_DELAY_EN;
  423. }
  424. }
  425. else
  426. {
  427. /* update delicate output delay */
  428. reg_val &= ~FIOPAD_X_REG1_OUT_DELAY_DELICATE_MASK;
  429. reg_val |= FIOPAD_X_REG1_OUT_DELAY_DELICATE_SET(delicate_delay);
  430. /* update rough output delay */
  431. reg_val &= ~FIOPAD_X_REG1_OUT_DELAY_ROUGH_MASK;
  432. reg_val |= FIOPAD_X_REG1_OUT_DELAY_ROUGH_SET(roungh_delay);
  433. /* enable output delay */
  434. if (enable)
  435. {
  436. reg_val |= FIOPAD_X_REG1_OUT_DELAY_EN;
  437. }
  438. else
  439. {
  440. reg_val &= ~FIOPAD_X_REG1_OUT_DELAY_EN;
  441. }
  442. }
  443. FIOPadWrite(pin, reg_val);
  444. return;
  445. }
  446. /**
  447. * @name: FPinGetDelayConfig
  448. * @msg: Get current common IO pin delay config
  449. * @return {NONE}
  450. * @param {FPinIndex} pin, IO pin index
  451. * @param {FPinDelay} *in_roungh_delay, input delay rough setting (输入粗调)
  452. * @param {FPinDelay} *in_delicate_delay, input delay delicate setting (输入精调)
  453. * @param {FPinDelay} *out_roungh_delay, output delay rough setting (输出粗调)
  454. * @param {FPinDelay} *out_delicate_delay, output delay delicate setting (输出精调)
  455. */
  456. void FPinGetDelayConfig(const FPinIndex pin, FPinDelay *in_roungh_delay, FPinDelay *in_delicate_delay,
  457. FPinDelay *out_roungh_delay, FPinDelay *out_delicate_delay)
  458. {
  459. FIOPAD_ASSERT_REG1_OFF(pin);
  460. u32 reg_val = FIOPadRead(pin);
  461. if (out_delicate_delay)
  462. {
  463. *out_delicate_delay = FIOPAD_X_REG1_OUT_DELAY_DELICATE_GET(reg_val);
  464. }
  465. if (out_roungh_delay)
  466. {
  467. *out_roungh_delay = FIOPAD_X_REG1_OUT_DELAY_ROUGH_GET(reg_val);
  468. }
  469. if (in_delicate_delay)
  470. {
  471. *in_delicate_delay = FIOPAD_X_REG1_IN_DELAY_DELICATE_GET(reg_val);
  472. }
  473. if (in_roungh_delay)
  474. {
  475. *in_roungh_delay = FIOPAD_X_REG1_IN_DELAY_ROUGH_GET(reg_val);
  476. }
  477. return;
  478. }
  479. /**
  480. * @name: FIOPadDumpPadFunc
  481. * @msg: print information of all iopad
  482. * @return {*}
  483. */
  484. void FIOPadDumpPadFunc(void)
  485. {
  486. uintptr beg_off = FIOPAD_0_FUNC_OFFSET;
  487. uintptr end_off = FIOPAD_147_FUNC_OFFSET;
  488. uintptr off;
  489. FPinIndex pin;
  490. const char *pull_state[FPIN_NUM_OF_PULL] = {"none", "down", "up"};
  491. FIOPAD_DEBUG("Pad Func Info...");
  492. for (off = beg_off; off <= end_off; off += 4U)
  493. {
  494. pin.reg_off = off;
  495. FIOPAD_DEBUG(" [0x%x] func: %d, ds: %d, pull: %s ",
  496. pin.reg_off,
  497. FPinGetFunc(pin),
  498. FPinGetDrive(pin),
  499. pull_state[FPinGetPull(pin)]);
  500. }
  501. }