port.c 8.5 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /*-----------------------------------------------------------
  29. * Implementation of functions defined in portable.h for the ARM7 port.
  30. *
  31. * Components that can be compiled to either ARM or THUMB mode are
  32. * contained in this file. The ISR routines, which can only be compiled
  33. * to ARM mode are contained in portISR.c.
  34. *----------------------------------------------------------*/
  35. /* Standard includes. */
  36. #include <stdlib.h>
  37. /* Scheduler includes. */
  38. #include "FreeRTOS.h"
  39. #include "task.h"
  40. /* Constants required to setup the task context. */
  41. #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
  42. #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
  43. #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
  44. #define portNO_CRITICAL_SECTION_NESTING ( ( StackType_t ) 0 )
  45. /* Constants required to setup the tick ISR. */
  46. #define portENABLE_TIMER ( ( uint8_t ) 0x01 )
  47. #define portPRESCALE_VALUE 0x00
  48. #define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 )
  49. #define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 )
  50. /* Constants required to setup the VIC for the tick ISR. */
  51. #define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 )
  52. #define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 )
  53. #define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 )
  54. /*-----------------------------------------------------------*/
  55. /* Setup the timer to generate the tick interrupts. */
  56. static void prvSetupTimerInterrupt( void );
  57. /*
  58. * The scheduler can only be started from ARM mode, so
  59. * vPortISRStartFirstSTask() is defined in portISR.c.
  60. */
  61. extern void vPortISRStartFirstTask( void );
  62. /*-----------------------------------------------------------*/
  63. /*
  64. * Initialise the stack of a task to look exactly as if a call to
  65. * portSAVE_CONTEXT had been called.
  66. *
  67. * See header file for description.
  68. */
  69. StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
  70. TaskFunction_t pxCode,
  71. void * pvParameters )
  72. {
  73. StackType_t * pxOriginalTOS;
  74. pxOriginalTOS = pxTopOfStack;
  75. /* To ensure asserts in tasks.c don't fail, although in this case the assert
  76. * is not really required. */
  77. pxTopOfStack--;
  78. /* Setup the initial stack of the task. The stack is set exactly as
  79. * expected by the portRESTORE_CONTEXT() macro. */
  80. /* First on the stack is the return address - which in this case is the
  81. * start of the task. The offset is added to make the return address appear
  82. * as it would within an IRQ ISR. */
  83. *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
  84. pxTopOfStack--;
  85. *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */
  86. pxTopOfStack--;
  87. *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
  88. pxTopOfStack--;
  89. *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
  90. pxTopOfStack--;
  91. *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
  92. pxTopOfStack--;
  93. *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
  94. pxTopOfStack--;
  95. *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
  96. pxTopOfStack--;
  97. *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
  98. pxTopOfStack--;
  99. *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
  100. pxTopOfStack--;
  101. *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
  102. pxTopOfStack--;
  103. *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
  104. pxTopOfStack--;
  105. *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
  106. pxTopOfStack--;
  107. *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
  108. pxTopOfStack--;
  109. *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
  110. pxTopOfStack--;
  111. *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
  112. pxTopOfStack--;
  113. /* When the task starts is will expect to find the function parameter in
  114. * R0. */
  115. *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
  116. pxTopOfStack--;
  117. /* The last thing onto the stack is the status register, which is set for
  118. * system mode, with interrupts enabled. */
  119. *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
  120. if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )
  121. {
  122. /* We want the task to start in thumb mode. */
  123. *pxTopOfStack |= portTHUMB_MODE_BIT;
  124. }
  125. pxTopOfStack--;
  126. /* Some optimisation levels use the stack differently to others. This
  127. * means the interrupt flags cannot always be stored on the stack and will
  128. * instead be stored in a variable, which is then saved as part of the
  129. * tasks context. */
  130. *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
  131. return pxTopOfStack;
  132. }
  133. /*-----------------------------------------------------------*/
  134. BaseType_t xPortStartScheduler( void )
  135. {
  136. /* Start the timer that generates the tick ISR. Interrupts are disabled
  137. * here already. */
  138. prvSetupTimerInterrupt();
  139. /* Start the first task. */
  140. vPortISRStartFirstTask();
  141. /* Should not get here! */
  142. return 0;
  143. }
  144. /*-----------------------------------------------------------*/
  145. void vPortEndScheduler( void )
  146. {
  147. /* It is unlikely that the ARM port will require this function as there
  148. * is nothing to return to. */
  149. }
  150. /*-----------------------------------------------------------*/
  151. /*
  152. * Setup the timer 0 to generate the tick interrupts at the required frequency.
  153. */
  154. static void prvSetupTimerInterrupt( void )
  155. {
  156. uint32_t ulCompareMatch;
  157. PCLKSEL0 = ( PCLKSEL0 & ( ~( 0x3 << 2 ) ) ) | ( 0x01 << 2 );
  158. T0TCR = 2; /* Stop and reset the timer */
  159. T0CTCR = 0; /* Timer mode */
  160. /* A 1ms tick does not require the use of the timer prescale. This is
  161. * defaulted to zero but can be used if necessary. */
  162. T0PR = portPRESCALE_VALUE;
  163. /* Calculate the match value required for our wanted tick rate. */
  164. ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
  165. /* Protect against divide by zero. Using an if() statement still results
  166. * in a warning - hence the #if. */
  167. #if portPRESCALE_VALUE != 0
  168. {
  169. ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
  170. }
  171. #endif
  172. T0MR1 = ulCompareMatch;
  173. /* Generate tick with timer 0 compare match. */
  174. T0MCR = ( 3 << 3 ); /* Reset timer on match and generate interrupt */
  175. /* Setup the VIC for the timer. */
  176. VICIntEnable = 0x00000010;
  177. /* The ISR installed depends on whether the preemptive or cooperative
  178. * scheduler is being used. */
  179. #if configUSE_PREEMPTION == 1
  180. {
  181. extern void( vPreemptiveTick )( void );
  182. VICVectAddr4 = ( int32_t ) vPreemptiveTick;
  183. }
  184. #else
  185. {
  186. extern void( vNonPreemptiveTick )( void );
  187. VICVectAddr4 = ( int32_t ) vNonPreemptiveTick;
  188. }
  189. #endif
  190. VICVectCntl4 = 1;
  191. /* Start the timer - interrupts are disabled when this function is called
  192. * so it is okay to do this here. */
  193. T0TCR = portENABLE_TIMER;
  194. }
  195. /*-----------------------------------------------------------*/