portmacro.h 10 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. #ifndef PORTMACRO_H
  29. #define PORTMACRO_H
  30. /* *INDENT-OFF* */
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /* *INDENT-ON* */
  35. /*-----------------------------------------------------------
  36. * Port specific definitions.
  37. *
  38. * The settings in this file configure FreeRTOS correctly for the
  39. * given hardware and compiler.
  40. *
  41. * These settings should not be altered.
  42. *-----------------------------------------------------------
  43. */
  44. /* Type definitions. */
  45. #define portCHAR char
  46. #define portFLOAT float
  47. #define portDOUBLE double
  48. #define portLONG long
  49. #define portSHORT short
  50. #define portSTACK_TYPE uint32_t
  51. #define portBASE_TYPE long
  52. typedef portSTACK_TYPE StackType_t;
  53. typedef long BaseType_t;
  54. typedef unsigned long UBaseType_t;
  55. #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
  56. typedef uint16_t TickType_t;
  57. #define portMAX_DELAY ( TickType_t ) 0xffff
  58. #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
  59. typedef uint32_t TickType_t;
  60. #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
  61. /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
  62. * not need to be guarded with a critical section. */
  63. #define portTICK_TYPE_IS_ATOMIC 1
  64. #else
  65. #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
  66. #endif
  67. /*-----------------------------------------------------------*/
  68. /* Architecture specifics. */
  69. #define portSTACK_GROWTH ( -1 )
  70. #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
  71. #define portBYTE_ALIGNMENT 8
  72. #define portDONT_DISCARD __attribute__( ( used ) )
  73. /*-----------------------------------------------------------*/
  74. /* Scheduler utilities. */
  75. #define portYIELD() \
  76. { \
  77. /* Set a PendSV to request a context switch. */ \
  78. portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
  79. \
  80. /* Barriers are normally not required but do ensure the code is completely \
  81. * within the specified behaviour for the architecture. */ \
  82. __asm volatile ( "dsb" ::: "memory" ); \
  83. __asm volatile ( "isb" ); \
  84. }
  85. #define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
  86. #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
  87. #define portEND_SWITCHING_ISR( xSwitchRequired ) \
  88. do \
  89. { \
  90. if( xSwitchRequired != pdFALSE ) \
  91. { \
  92. traceISR_EXIT_TO_SCHEDULER(); \
  93. portYIELD(); \
  94. } \
  95. else \
  96. { \
  97. traceISR_EXIT(); \
  98. } \
  99. } while( 0 )
  100. #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
  101. /*-----------------------------------------------------------*/
  102. /* Critical section management. */
  103. extern void vPortEnterCritical( void );
  104. extern void vPortExitCritical( void );
  105. #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
  106. #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortSetBASEPRI( x )
  107. #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
  108. #define portENABLE_INTERRUPTS() vPortSetBASEPRI( 0 )
  109. #define portENTER_CRITICAL() vPortEnterCritical()
  110. #define portEXIT_CRITICAL() vPortExitCritical()
  111. /*-----------------------------------------------------------*/
  112. /* Task function macros as described on the FreeRTOS.org WEB site. These are
  113. * not necessary for to use this port. They are defined so the common demo files
  114. * (which build with all the ports) will build. */
  115. #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
  116. #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
  117. /*-----------------------------------------------------------*/
  118. /* Tickless idle/low power functionality. */
  119. #ifndef portSUPPRESS_TICKS_AND_SLEEP
  120. extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
  121. #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
  122. #endif
  123. /*-----------------------------------------------------------*/
  124. /* Architecture specific optimisations. */
  125. #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
  126. #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
  127. #endif
  128. #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
  129. /* Generic helper function. */
  130. __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
  131. {
  132. uint8_t ucReturn;
  133. __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
  134. return ucReturn;
  135. }
  136. /* Check the configuration. */
  137. #if ( configMAX_PRIORITIES > 32 )
  138. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
  139. #endif
  140. /* Store/clear the ready priorities in a bit map. */
  141. #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
  142. #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
  143. /*-----------------------------------------------------------*/
  144. #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
  145. #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
  146. /*-----------------------------------------------------------*/
  147. #if ( configASSERT_DEFINED == 1 )
  148. void vPortValidateInterruptPriority( void );
  149. #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
  150. #endif
  151. /* portNOP() is not required by this port. */
  152. #define portNOP()
  153. #define portINLINE __inline
  154. #ifndef portFORCE_INLINE
  155. #define portFORCE_INLINE inline __attribute__( ( always_inline ) )
  156. #endif
  157. /*-----------------------------------------------------------*/
  158. portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
  159. {
  160. uint32_t ulCurrentInterrupt;
  161. BaseType_t xReturn;
  162. /* Obtain the number of the currently executing interrupt. */
  163. __asm volatile ( "mrs %0, ipsr" : "=r" ( ulCurrentInterrupt )::"memory" );
  164. if( ulCurrentInterrupt == 0 )
  165. {
  166. xReturn = pdFALSE;
  167. }
  168. else
  169. {
  170. xReturn = pdTRUE;
  171. }
  172. return xReturn;
  173. }
  174. /*-----------------------------------------------------------*/
  175. portFORCE_INLINE static void vPortRaiseBASEPRI( void )
  176. {
  177. uint32_t ulNewBASEPRI;
  178. __asm volatile
  179. (
  180. " mov %0, %1 \n" \
  181. " msr basepri, %0 \n" \
  182. " isb \n" \
  183. " dsb \n" \
  184. : "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
  185. );
  186. }
  187. /*-----------------------------------------------------------*/
  188. portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
  189. {
  190. uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
  191. __asm volatile
  192. (
  193. " mrs %0, basepri \n" \
  194. " mov %1, %2 \n" \
  195. " msr basepri, %1 \n" \
  196. " isb \n" \
  197. " dsb \n" \
  198. : "=r" ( ulOriginalBASEPRI ), "=r" ( ulNewBASEPRI ) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
  199. );
  200. /* This return will not be reached but is necessary to prevent compiler
  201. * warnings. */
  202. return ulOriginalBASEPRI;
  203. }
  204. /*-----------------------------------------------------------*/
  205. portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
  206. {
  207. __asm volatile
  208. (
  209. " msr basepri, %0 " ::"r" ( ulNewMaskValue ) : "memory"
  210. );
  211. }
  212. /*-----------------------------------------------------------*/
  213. #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
  214. /* *INDENT-OFF* */
  215. #ifdef __cplusplus
  216. }
  217. #endif
  218. /* *INDENT-ON* */
  219. #endif /* PORTMACRO_H */