port.c 9.2 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /* Scheduler includes. */
  29. #include "FreeRTOS.h"
  30. #include "task.h"
  31. /*-----------------------------------------------------------
  32. * Implementation of functions defined in portable.h for the H8S port.
  33. *----------------------------------------------------------*/
  34. /*-----------------------------------------------------------*/
  35. /* When the task starts interrupts should be enabled. */
  36. #define portINITIAL_CCR ( ( StackType_t ) 0x00 )
  37. /* Hardware specific constants used to generate the RTOS tick from the TPU. */
  38. #define portCLEAR_ON_TGRA_COMPARE_MATCH ( ( uint8_t ) 0x20 )
  39. #define portCLOCK_DIV_64 ( ( uint8_t ) 0x03 )
  40. #define portCLOCK_DIV ( ( uint32_t ) 64 )
  41. #define portTGRA_INTERRUPT_ENABLE ( ( uint8_t ) 0x01 )
  42. #define portTIMER_CHANNEL ( ( uint8_t ) 0x02 )
  43. #define portMSTP13 ( ( uint16_t ) 0x2000 )
  44. /*
  45. * Setup TPU channel one for the RTOS tick at the requested frequency.
  46. */
  47. static void prvSetupTimerInterrupt( void );
  48. /*
  49. * The ISR used by portYIELD(). This is installed as a trap handler.
  50. */
  51. void vPortYield( void ) __attribute__( ( saveall, interrupt_handler ) );
  52. /*-----------------------------------------------------------*/
  53. /*
  54. * See header file for description.
  55. */
  56. StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
  57. TaskFunction_t pxCode,
  58. void * pvParameters )
  59. {
  60. uint32_t ulValue;
  61. /* This requires an even address. */
  62. ulValue = ( uint32_t ) pxTopOfStack;
  63. if( ulValue & 1UL )
  64. {
  65. pxTopOfStack = pxTopOfStack - 1;
  66. }
  67. /* Place a few bytes of known values on the bottom of the stack.
  68. * This is just useful for debugging. */
  69. pxTopOfStack--;
  70. *pxTopOfStack = 0xaa;
  71. pxTopOfStack--;
  72. *pxTopOfStack = 0xbb;
  73. pxTopOfStack--;
  74. *pxTopOfStack = 0xcc;
  75. pxTopOfStack--;
  76. *pxTopOfStack = 0xdd;
  77. /* The initial stack mimics an interrupt stack. First there is the program
  78. * counter (24 bits). */
  79. ulValue = ( uint32_t ) pxCode;
  80. pxTopOfStack--;
  81. *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
  82. pxTopOfStack--;
  83. ulValue >>= 8UL;
  84. *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
  85. pxTopOfStack--;
  86. ulValue >>= 8UL;
  87. *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
  88. /* Followed by the CCR. */
  89. pxTopOfStack--;
  90. *pxTopOfStack = portINITIAL_CCR;
  91. /* Next all the general purpose registers - with the parameters being passed
  92. * in ER0. The parameter order must match that used by the compiler when the
  93. * "saveall" function attribute is used. */
  94. /* ER6 */
  95. pxTopOfStack--;
  96. *pxTopOfStack = 0x66;
  97. pxTopOfStack--;
  98. *pxTopOfStack = 0x66;
  99. pxTopOfStack--;
  100. *pxTopOfStack = 0x66;
  101. pxTopOfStack--;
  102. *pxTopOfStack = 0x66;
  103. /* ER0 */
  104. ulValue = ( uint32_t ) pvParameters;
  105. pxTopOfStack--;
  106. *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
  107. pxTopOfStack--;
  108. ulValue >>= 8UL;
  109. *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
  110. pxTopOfStack--;
  111. ulValue >>= 8UL;
  112. *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
  113. pxTopOfStack--;
  114. ulValue >>= 8UL;
  115. *pxTopOfStack = ( StackType_t ) ( ulValue & 0xff );
  116. /* ER1 */
  117. pxTopOfStack--;
  118. *pxTopOfStack = 0x11;
  119. pxTopOfStack--;
  120. *pxTopOfStack = 0x11;
  121. pxTopOfStack--;
  122. *pxTopOfStack = 0x11;
  123. pxTopOfStack--;
  124. *pxTopOfStack = 0x11;
  125. /* ER2 */
  126. pxTopOfStack--;
  127. *pxTopOfStack = 0x22;
  128. pxTopOfStack--;
  129. *pxTopOfStack = 0x22;
  130. pxTopOfStack--;
  131. *pxTopOfStack = 0x22;
  132. pxTopOfStack--;
  133. *pxTopOfStack = 0x22;
  134. /* ER3 */
  135. pxTopOfStack--;
  136. *pxTopOfStack = 0x33;
  137. pxTopOfStack--;
  138. *pxTopOfStack = 0x33;
  139. pxTopOfStack--;
  140. *pxTopOfStack = 0x33;
  141. pxTopOfStack--;
  142. *pxTopOfStack = 0x33;
  143. /* ER4 */
  144. pxTopOfStack--;
  145. *pxTopOfStack = 0x44;
  146. pxTopOfStack--;
  147. *pxTopOfStack = 0x44;
  148. pxTopOfStack--;
  149. *pxTopOfStack = 0x44;
  150. pxTopOfStack--;
  151. *pxTopOfStack = 0x44;
  152. /* ER5 */
  153. pxTopOfStack--;
  154. *pxTopOfStack = 0x55;
  155. pxTopOfStack--;
  156. *pxTopOfStack = 0x55;
  157. pxTopOfStack--;
  158. *pxTopOfStack = 0x55;
  159. pxTopOfStack--;
  160. *pxTopOfStack = 0x55;
  161. return pxTopOfStack;
  162. }
  163. /*-----------------------------------------------------------*/
  164. BaseType_t xPortStartScheduler( void )
  165. {
  166. extern void * pxCurrentTCB;
  167. /* Setup the hardware to generate the tick. */
  168. prvSetupTimerInterrupt();
  169. /* Restore the context of the first task that is going to run. This
  170. * mirrors the function epilogue code generated by the compiler when the
  171. * "saveall" function attribute is used. */
  172. asm volatile (
  173. "MOV.L @_pxCurrentTCB, ER6 \n\t"
  174. "MOV.L @ER6, ER7 \n\t"
  175. "LDM.L @SP+, (ER4-ER5) \n\t"
  176. "LDM.L @SP+, (ER0-ER3) \n\t"
  177. "MOV.L @ER7+, ER6 \n\t"
  178. "RTE \n\t"
  179. );
  180. ( void ) pxCurrentTCB;
  181. /* Should not get here. */
  182. return pdTRUE;
  183. }
  184. /*-----------------------------------------------------------*/
  185. void vPortEndScheduler( void )
  186. {
  187. /* It is unlikely that the h8 port will get stopped. */
  188. }
  189. /*-----------------------------------------------------------*/
  190. /*
  191. * Manual context switch. This is a trap handler. The "saveall" function
  192. * attribute is used so the context is saved by the compiler prologue. All
  193. * we have to do is save the stack pointer.
  194. */
  195. void vPortYield( void )
  196. {
  197. portSAVE_STACK_POINTER();
  198. vTaskSwitchContext();
  199. portRESTORE_STACK_POINTER();
  200. }
  201. /*-----------------------------------------------------------*/
  202. /*
  203. * The interrupt handler installed for the RTOS tick depends on whether the
  204. * preemptive or cooperative scheduler is being used.
  205. */
  206. #if ( configUSE_PREEMPTION == 1 )
  207. /*
  208. * The preemptive scheduler is used so the ISR calls vTaskSwitchContext().
  209. * The function prologue saves the context so all we have to do is save
  210. * the stack pointer.
  211. */
  212. void vTickISR( void ) __attribute__( ( saveall, interrupt_handler ) );
  213. void vTickISR( void )
  214. {
  215. portSAVE_STACK_POINTER();
  216. if( xTaskIncrementTick() != pdFALSE )
  217. {
  218. vTaskSwitchContext();
  219. }
  220. /* Clear the interrupt. */
  221. TSR1 &= ~0x01;
  222. portRESTORE_STACK_POINTER();
  223. }
  224. #else /* if ( configUSE_PREEMPTION == 1 ) */
  225. /*
  226. * The cooperative scheduler is being used so all we have to do is
  227. * periodically increment the tick. This can just be a normal ISR and
  228. * the "saveall" attribute is not required.
  229. */
  230. void vTickISR( void ) __attribute__( ( interrupt_handler ) );
  231. void vTickISR( void )
  232. {
  233. xTaskIncrementTick();
  234. /* Clear the interrupt. */
  235. TSR1 &= ~0x01;
  236. }
  237. #endif /* if ( configUSE_PREEMPTION == 1 ) */
  238. /*-----------------------------------------------------------*/
  239. /*
  240. * Setup timer 1 compare match to generate a tick interrupt.
  241. */
  242. static void prvSetupTimerInterrupt( void )
  243. {
  244. const uint32_t ulCompareMatch = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) / portCLOCK_DIV;
  245. /* Turn the module on. */
  246. MSTPCR &= ~portMSTP13;
  247. /* Configure timer 1. */
  248. TCR1 = portCLEAR_ON_TGRA_COMPARE_MATCH | portCLOCK_DIV_64;
  249. /* Configure the compare match value for a tick of configTICK_RATE_HZ. */
  250. TGR1A = ulCompareMatch;
  251. /* Start the timer and enable the interrupt - we can do this here as
  252. * interrupts are globally disabled when this function is called. */
  253. TIER1 |= portTGRA_INTERRUPT_ENABLE;
  254. TSTR |= portTIMER_CHANNEL;
  255. }
  256. /*-----------------------------------------------------------*/