portmacro.h 16 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. #ifndef PORTMACRO_H
  29. #define PORTMACRO_H
  30. /* *INDENT-OFF* */
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /* *INDENT-ON* */
  35. /* BSP includes. */
  36. #include <mb_interface.h>
  37. #include <xparameters.h>
  38. /*-----------------------------------------------------------
  39. * Port specific definitions.
  40. *
  41. * The settings in this file configure FreeRTOS correctly for the
  42. * given hardware and compiler.
  43. *
  44. * These settings should not be altered.
  45. *-----------------------------------------------------------
  46. */
  47. /* Type definitions. */
  48. #define portCHAR char
  49. #define portFLOAT float
  50. #define portDOUBLE double
  51. #define portLONG long
  52. #define portSHORT short
  53. #define portSTACK_TYPE uint32_t
  54. #define portBASE_TYPE long
  55. typedef portSTACK_TYPE StackType_t;
  56. typedef long BaseType_t;
  57. typedef unsigned long UBaseType_t;
  58. #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
  59. typedef uint16_t TickType_t;
  60. #define portMAX_DELAY ( TickType_t ) 0xffff
  61. #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
  62. typedef uint32_t TickType_t;
  63. #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
  64. /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
  65. * not need to be guarded with a critical section. */
  66. #define portTICK_TYPE_IS_ATOMIC 1
  67. #else
  68. #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
  69. #endif
  70. /*-----------------------------------------------------------*/
  71. /* Interrupt control macros and functions. */
  72. void microblaze_disable_interrupts( void );
  73. void microblaze_enable_interrupts( void );
  74. #define portDISABLE_INTERRUPTS() microblaze_disable_interrupts()
  75. #define portENABLE_INTERRUPTS() microblaze_enable_interrupts()
  76. /*-----------------------------------------------------------*/
  77. /* Critical section macros. */
  78. void vPortEnterCritical( void );
  79. void vPortExitCritical( void );
  80. #define portENTER_CRITICAL() \
  81. { \
  82. extern volatile UBaseType_t uxCriticalNesting; \
  83. microblaze_disable_interrupts(); \
  84. uxCriticalNesting++; \
  85. }
  86. #define portEXIT_CRITICAL() \
  87. { \
  88. extern volatile UBaseType_t uxCriticalNesting; \
  89. /* Interrupts are disabled, so we can */ \
  90. /* access the variable directly. */ \
  91. uxCriticalNesting--; \
  92. if( uxCriticalNesting == 0 ) \
  93. { \
  94. /* The nesting has unwound and we \
  95. * can enable interrupts again. */ \
  96. portENABLE_INTERRUPTS(); \
  97. } \
  98. }
  99. /*-----------------------------------------------------------*/
  100. /* The yield macro maps directly to the vPortYield() function. */
  101. void vPortYield( void );
  102. #define portYIELD() vPortYield()
  103. /* portYIELD_FROM_ISR() does not directly call vTaskSwitchContext(), but instead
  104. * sets a flag to say that a yield has been requested. The interrupt exit code
  105. * then checks this flag, and calls vTaskSwitchContext() before restoring a task
  106. * context, if the flag is not false. This is done to prevent multiple calls to
  107. * vTaskSwitchContext() being made from a single interrupt, as a single interrupt
  108. * can result in multiple peripherals being serviced. */
  109. extern volatile uint32_t ulTaskSwitchRequested;
  110. #define portYIELD_FROM_ISR( x ) \
  111. do { if( ( x ) != pdFALSE ) ulTaskSwitchRequested = 1; } \
  112. while( 0 )
  113. #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
  114. /* Generic helper function. */
  115. __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
  116. {
  117. uint8_t ucReturn;
  118. __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
  119. return ucReturn;
  120. }
  121. /* Check the configuration. */
  122. #if ( configMAX_PRIORITIES > 32 )
  123. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
  124. #endif
  125. /* Store/clear the ready priorities in a bit map. */
  126. #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
  127. #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
  128. /*-----------------------------------------------------------*/
  129. #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
  130. #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
  131. /*-----------------------------------------------------------*/
  132. /* Hardware specifics. */
  133. #define portBYTE_ALIGNMENT 4
  134. #define portSTACK_GROWTH ( -1 )
  135. #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
  136. #define portNOP() asm volatile ( "NOP" )
  137. #define portMEMORY_BARRIER() asm volatile ( "" ::: "memory" )
  138. /*-----------------------------------------------------------*/
  139. /* Task function macros as described on the FreeRTOS.org WEB site. */
  140. #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
  141. #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
  142. /*-----------------------------------------------------------*/
  143. /* The following structure is used by the FreeRTOS exception handler. It is
  144. * filled with the MicroBlaze context as it was at the time the exception occurred.
  145. * This is done as an aid to debugging exception occurrences. */
  146. typedef struct PORT_REGISTER_DUMP
  147. {
  148. /* The following structure members hold the values of the MicroBlaze
  149. * registers at the time the exception was raised. */
  150. uint32_t ulR1_SP;
  151. uint32_t ulR2_small_data_area;
  152. uint32_t ulR3;
  153. uint32_t ulR4;
  154. uint32_t ulR5;
  155. uint32_t ulR6;
  156. uint32_t ulR7;
  157. uint32_t ulR8;
  158. uint32_t ulR9;
  159. uint32_t ulR10;
  160. uint32_t ulR11;
  161. uint32_t ulR12;
  162. uint32_t ulR13_read_write_small_data_area;
  163. uint32_t ulR14_return_address_from_interrupt;
  164. uint32_t ulR15_return_address_from_subroutine;
  165. uint32_t ulR16_return_address_from_trap;
  166. uint32_t ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */
  167. uint32_t ulR18;
  168. uint32_t ulR19;
  169. uint32_t ulR20;
  170. uint32_t ulR21;
  171. uint32_t ulR22;
  172. uint32_t ulR23;
  173. uint32_t ulR24;
  174. uint32_t ulR25;
  175. uint32_t ulR26;
  176. uint32_t ulR27;
  177. uint32_t ulR28;
  178. uint32_t ulR29;
  179. uint32_t ulR30;
  180. uint32_t ulR31;
  181. uint32_t ulPC;
  182. uint32_t ulESR;
  183. uint32_t ulMSR;
  184. uint32_t ulEAR;
  185. uint32_t ulFSR;
  186. uint32_t ulEDR;
  187. /* A human readable description of the exception cause. The strings used
  188. * are the same as the #define constant names found in the
  189. * microblaze_exceptions_i.h header file */
  190. int8_t * pcExceptionCause;
  191. /* The human readable name of the task that was running at the time the
  192. * exception occurred. This is the name that was given to the task when the
  193. * task was created using the FreeRTOS xTaskCreate() API function. */
  194. char * pcCurrentTaskName;
  195. /* The handle of the task that was running a the time the exception
  196. * occurred. */
  197. void * xCurrentTaskHandle;
  198. } xPortRegisterDump;
  199. /*
  200. * Installs pxHandler as the interrupt handler for the peripheral specified by
  201. * the ucInterruptID parameter.
  202. *
  203. * ucInterruptID:
  204. *
  205. * The ID of the peripheral that will have pxHandler assigned as its interrupt
  206. * handler. Peripheral IDs are defined in the xparameters.h header file, which
  207. * is itself part of the BSP project. For example, in the official demo
  208. * application for this port, xparameters.h defines the following IDs for the
  209. * four possible interrupt sources:
  210. *
  211. * XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
  212. * XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
  213. * XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
  214. * XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
  215. *
  216. *
  217. * pxHandler:
  218. *
  219. * A pointer to the interrupt handler function itself. This must be a void
  220. * function that takes a (void *) parameter.
  221. *
  222. *
  223. * pvCallBackRef:
  224. *
  225. * The parameter passed into the handler function. In many cases this will not
  226. * be used and can be NULL. Some times it is used to pass in a reference to
  227. * the peripheral instance variable, so it can be accessed from inside the
  228. * handler function.
  229. *
  230. *
  231. * pdPASS is returned if the function executes successfully. Any other value
  232. * being returned indicates that the function did not execute correctly.
  233. */
  234. BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID,
  235. XInterruptHandler pxHandler,
  236. void * pvCallBackRef );
  237. /*
  238. * Enables the interrupt, within the interrupt controller, for the peripheral
  239. * specified by the ucInterruptID parameter.
  240. *
  241. * ucInterruptID:
  242. *
  243. * The ID of the peripheral that will have its interrupt enabled in the
  244. * interrupt controller. Peripheral IDs are defined in the xparameters.h header
  245. * file, which is itself part of the BSP project. For example, in the official
  246. * demo application for this port, xparameters.h defines the following IDs for
  247. * the four possible interrupt sources:
  248. *
  249. * XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
  250. * XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
  251. * XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
  252. * XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
  253. *
  254. */
  255. void vPortEnableInterrupt( uint8_t ucInterruptID );
  256. /*
  257. * Disables the interrupt, within the interrupt controller, for the peripheral
  258. * specified by the ucInterruptID parameter.
  259. *
  260. * ucInterruptID:
  261. *
  262. * The ID of the peripheral that will have its interrupt disabled in the
  263. * interrupt controller. Peripheral IDs are defined in the xparameters.h header
  264. * file, which is itself part of the BSP project. For example, in the official
  265. * demo application for this port, xparameters.h defines the following IDs for
  266. * the four possible interrupt sources:
  267. *
  268. * XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
  269. * XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
  270. * XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
  271. * XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
  272. *
  273. */
  274. void vPortDisableInterrupt( uint8_t ucInterruptID );
  275. /*
  276. * This is an application defined callback function used to install the tick
  277. * interrupt handler. It is provided as an application callback because the
  278. * kernel will run on lots of different MicroBlaze and FPGA configurations - not
  279. * all of which will have the same timer peripherals defined or available. This
  280. * example uses the AXI Timer 0. If that is available on your hardware platform
  281. * then this example callback implementation should not require modification.
  282. * The name of the interrupt handler that should be installed is vPortTickISR(),
  283. * which the function below declares as an extern.
  284. */
  285. void vApplicationSetupTimerInterrupt( void );
  286. /*
  287. * This is an application defined callback function used to clear whichever
  288. * interrupt was installed by the the vApplicationSetupTimerInterrupt() callback
  289. * function - in this case the interrupt generated by the AXI timer. It is
  290. * provided as an application callback because the kernel will run on lots of
  291. * different MicroBlaze and FPGA configurations - not all of which will have the
  292. * same timer peripherals defined or available. This example uses the AXI Timer 0.
  293. * If that is available on your hardware platform then this example callback
  294. * implementation should not require modification provided the example definition
  295. * of vApplicationSetupTimerInterrupt() is also not modified.
  296. */
  297. void vApplicationClearTimerInterrupt( void );
  298. /*
  299. * vPortExceptionsInstallHandlers() is only available when the MicroBlaze
  300. * is configured to include exception functionality, and
  301. * configINSTALL_EXCEPTION_HANDLERS is set to 1 in FreeRTOSConfig.h.
  302. *
  303. * vPortExceptionsInstallHandlers() installs the FreeRTOS exception handler
  304. * for every possible exception cause.
  305. *
  306. * vPortExceptionsInstallHandlers() can be called explicitly from application
  307. * code. After that is done, the default FreeRTOS exception handler that will
  308. * have been installed can be replaced for any specific exception cause by using
  309. * the standard Xilinx library function microblaze_register_exception_handler().
  310. *
  311. * If vPortExceptionsInstallHandlers() is not called explicitly by the
  312. * application, it will be called automatically by the kernel the first time
  313. * xPortInstallInterruptHandler() is called. At that time, any exception
  314. * handlers that may have already been installed will be replaced.
  315. *
  316. * See the description of vApplicationExceptionRegisterDump() for information
  317. * on the processing performed by the FreeRTOS exception handler.
  318. */
  319. void vPortExceptionsInstallHandlers( void );
  320. /*
  321. * The FreeRTOS exception handler fills an xPortRegisterDump structure (defined
  322. * in portmacro.h) with the MicroBlaze context, as it was at the time the
  323. * exception occurred. The exception handler then calls
  324. * vApplicationExceptionRegisterDump(), passing in the completed
  325. * xPortRegisterDump structure as its parameter.
  326. *
  327. * The FreeRTOS kernel provides its own implementation of
  328. * vApplicationExceptionRegisterDump(), but the kernel provided implementation
  329. * is declared as being 'weak'. The weak definition allows the application
  330. * writer to provide their own implementation, should they wish to use the
  331. * register dump information. For example, an implementation could be provided
  332. * that wrote the register dump data to a display, or a UART port.
  333. */
  334. void vApplicationExceptionRegisterDump( xPortRegisterDump * xRegisterDump );
  335. /* *INDENT-OFF* */
  336. #ifdef __cplusplus
  337. }
  338. #endif
  339. /* *INDENT-ON* */
  340. #endif /* PORTMACRO_H */