port_exceptions.c 13 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /* Scheduler includes. */
  29. #include "FreeRTOS.h"
  30. #include "task.h"
  31. /* Hardware includes. */
  32. #include <microblaze_exceptions_i.h>
  33. #include <microblaze_exceptions_g.h>
  34. /* The Xilinx library defined exception entry point stacks a number of
  35. * registers. These definitions are offsets from the stack pointer to the various
  36. * stacked register values. */
  37. #define portexR3_STACK_OFFSET 4
  38. #define portexR4_STACK_OFFSET 5
  39. #define portexR5_STACK_OFFSET 6
  40. #define portexR6_STACK_OFFSET 7
  41. #define portexR7_STACK_OFFSET 8
  42. #define portexR8_STACK_OFFSET 9
  43. #define portexR9_STACK_OFFSET 10
  44. #define portexR10_STACK_OFFSET 11
  45. #define portexR11_STACK_OFFSET 12
  46. #define portexR12_STACK_OFFSET 13
  47. #define portexR15_STACK_OFFSET 16
  48. #define portexR18_STACK_OFFSET 19
  49. #define portexMSR_STACK_OFFSET 20
  50. #define portexR19_STACK_OFFSET -1
  51. /* This is defined to equal the size, in bytes, of the stack frame generated by
  52. * the Xilinx standard library exception entry point. It is required to determine
  53. * the stack pointer value prior to the exception being entered. */
  54. #define portexASM_HANDLER_STACK_FRAME_SIZE 84UL
  55. /* The number of bytes a MicroBlaze instruction consumes. */
  56. #define portexINSTRUCTION_SIZE 4
  57. /* Exclude this entire file if the MicroBlaze is not configured to handle
  58. * exceptions, or the application defined configuration constant
  59. * configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
  60. #if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )
  61. /* This variable is set in the exception entry code, before
  62. * vPortExceptionHandler is called. */
  63. UINTPTR *pulStackPointerOnFunctionEntry = NULL;
  64. /* This is the structure that is filled with the MicroBlaze context as it
  65. * existed immediately prior to the exception occurrence. A pointer to this
  66. * structure is passed into the vApplicationExceptionRegisterDump() callback
  67. * function, if one is defined. */
  68. static xPortRegisterDump xRegisterDump;
  69. /* This is the FreeRTOS exception handler that is installed for all exception
  70. * types. It is called from vPortExceptionHandlerEntry() - which is itself defined
  71. * in portasm.S. */
  72. void vPortExceptionHandler( void * pvExceptionID );
  73. extern void vPortExceptionHandlerEntry( void * pvExceptionID );
  74. /*-----------------------------------------------------------*/
  75. /* vApplicationExceptionRegisterDump() is a callback function that the
  76. * application can optionally define to receive a populated xPortRegisterDump
  77. * structure. If the application chooses not to define a version of
  78. * vApplicationExceptionRegisterDump() then this weekly defined default
  79. * implementation will be called instead. */
  80. extern void vApplicationExceptionRegisterDump( xPortRegisterDump * xRegisterDump ) __attribute__( ( weak ) );
  81. void vApplicationExceptionRegisterDump( xPortRegisterDump * xRegisterDump )
  82. {
  83. ( void ) xRegisterDump;
  84. for( ; ; )
  85. {
  86. portNOP();
  87. }
  88. }
  89. /*-----------------------------------------------------------*/
  90. void vPortExceptionHandler( void * pvExceptionID )
  91. {
  92. extern void * pxCurrentTCB;
  93. /* Fill an xPortRegisterDump structure with the MicroBlaze context as it
  94. * was immediately before the exception occurrence. */
  95. /* First fill in the name and handle of the task that was in the Running
  96. * state when the exception occurred. */
  97. xRegisterDump.xCurrentTaskHandle = pxCurrentTCB;
  98. xRegisterDump.pcCurrentTaskName = pcTaskGetName( NULL );
  99. configASSERT( pulStackPointerOnFunctionEntry );
  100. /* Obtain the values of registers that were stacked prior to this function
  101. * being called, and may have changed since they were stacked. */
  102. xRegisterDump.ulR3 = pulStackPointerOnFunctionEntry[ portexR3_STACK_OFFSET ];
  103. xRegisterDump.ulR4 = pulStackPointerOnFunctionEntry[ portexR4_STACK_OFFSET ];
  104. xRegisterDump.ulR5 = pulStackPointerOnFunctionEntry[ portexR5_STACK_OFFSET ];
  105. xRegisterDump.ulR6 = pulStackPointerOnFunctionEntry[ portexR6_STACK_OFFSET ];
  106. xRegisterDump.ulR7 = pulStackPointerOnFunctionEntry[ portexR7_STACK_OFFSET ];
  107. xRegisterDump.ulR8 = pulStackPointerOnFunctionEntry[ portexR8_STACK_OFFSET ];
  108. xRegisterDump.ulR9 = pulStackPointerOnFunctionEntry[ portexR9_STACK_OFFSET ];
  109. xRegisterDump.ulR10 = pulStackPointerOnFunctionEntry[ portexR10_STACK_OFFSET ];
  110. xRegisterDump.ulR11 = pulStackPointerOnFunctionEntry[ portexR11_STACK_OFFSET ];
  111. xRegisterDump.ulR12 = pulStackPointerOnFunctionEntry[ portexR12_STACK_OFFSET ];
  112. xRegisterDump.ulR15_return_address_from_subroutine = pulStackPointerOnFunctionEntry[ portexR15_STACK_OFFSET ];
  113. xRegisterDump.ulR18 = pulStackPointerOnFunctionEntry[ portexR18_STACK_OFFSET ];
  114. xRegisterDump.ulR19 = pulStackPointerOnFunctionEntry[ portexR19_STACK_OFFSET ];
  115. xRegisterDump.ulMSR = pulStackPointerOnFunctionEntry[ portexMSR_STACK_OFFSET ];
  116. /* Obtain the value of all other registers. */
  117. xRegisterDump.ulR2_small_data_area = mfgpr( R2 );
  118. xRegisterDump.ulR13_read_write_small_data_area = mfgpr( R13 );
  119. xRegisterDump.ulR14_return_address_from_interrupt = mfgpr( R14 );
  120. xRegisterDump.ulR16_return_address_from_trap = mfgpr( R16 );
  121. xRegisterDump.ulR17_return_address_from_exceptions = mfgpr( R17 );
  122. xRegisterDump.ulR20 = mfgpr( R20 );
  123. xRegisterDump.ulR21 = mfgpr( R21 );
  124. xRegisterDump.ulR22 = mfgpr( R22 );
  125. xRegisterDump.ulR23 = mfgpr( R23 );
  126. xRegisterDump.ulR24 = mfgpr( R24 );
  127. xRegisterDump.ulR25 = mfgpr( R25 );
  128. xRegisterDump.ulR26 = mfgpr( R26 );
  129. xRegisterDump.ulR27 = mfgpr( R27 );
  130. xRegisterDump.ulR28 = mfgpr( R28 );
  131. xRegisterDump.ulR29 = mfgpr( R29 );
  132. xRegisterDump.ulR30 = mfgpr( R30 );
  133. xRegisterDump.ulR31 = mfgpr( R31 );
  134. xRegisterDump.ulR1_SP = ( ( UINTPTR ) pulStackPointerOnFunctionEntry ) + portexASM_HANDLER_STACK_FRAME_SIZE;
  135. xRegisterDump.ulEAR = mfear();
  136. xRegisterDump.ulESR = mfesr();
  137. xRegisterDump.ulEDR = mfedr();
  138. /* Move the saved program counter back to the instruction that was executed
  139. * when the exception occurred. This is only valid for certain types of
  140. * exception. */
  141. xRegisterDump.ulPC = xRegisterDump.ulR17_return_address_from_exceptions - portexINSTRUCTION_SIZE;
  142. #if ( XPAR_MICROBLAZE_USE_FPU != 0 )
  143. {
  144. xRegisterDump.ulFSR = mffsr();
  145. }
  146. #else
  147. {
  148. xRegisterDump.ulFSR = 0UL;
  149. }
  150. #endif
  151. /* Also fill in a string that describes what type of exception this is.
  152. * The string uses the same ID names as defined in the MicroBlaze standard
  153. * library exception header files. */
  154. switch( ( uint32_t ) pvExceptionID )
  155. {
  156. case XEXC_ID_FSL:
  157. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FSL";
  158. break;
  159. case XEXC_ID_UNALIGNED_ACCESS:
  160. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_UNALIGNED_ACCESS";
  161. break;
  162. case XEXC_ID_ILLEGAL_OPCODE:
  163. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_ILLEGAL_OPCODE";
  164. break;
  165. case XEXC_ID_M_AXI_I_EXCEPTION:
  166. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_I_EXCEPTION or XEXC_ID_IPLB_EXCEPTION";
  167. break;
  168. case XEXC_ID_M_AXI_D_EXCEPTION:
  169. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_M_AXI_D_EXCEPTION or XEXC_ID_DPLB_EXCEPTION";
  170. break;
  171. case XEXC_ID_DIV_BY_ZERO:
  172. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_DIV_BY_ZERO";
  173. break;
  174. case XEXC_ID_STACK_VIOLATION:
  175. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_STACK_VIOLATION or XEXC_ID_MMU";
  176. break;
  177. #if ( XPAR_MICROBLAZE_USE_FPU != 0 )
  178. case XEXC_ID_FPU:
  179. xRegisterDump.pcExceptionCause = ( int8_t * const ) "XEXC_ID_FPU see ulFSR value";
  180. break;
  181. #endif /* XPAR_MICROBLAZE_USE_FPU */
  182. }
  183. /* vApplicationExceptionRegisterDump() is a callback function that the
  184. * application can optionally define to receive the populated xPortRegisterDump
  185. * structure. If the application chooses not to define a version of
  186. * vApplicationExceptionRegisterDump() then the weekly defined default
  187. * implementation within this file will be called instead. */
  188. vApplicationExceptionRegisterDump( &xRegisterDump );
  189. /* Must not attempt to leave this function! */
  190. for( ; ; )
  191. {
  192. portNOP();
  193. }
  194. }
  195. /*-----------------------------------------------------------*/
  196. void vPortExceptionsInstallHandlers( void )
  197. {
  198. static uint32_t ulHandlersAlreadyInstalled = pdFALSE;
  199. if( ulHandlersAlreadyInstalled == pdFALSE )
  200. {
  201. ulHandlersAlreadyInstalled = pdTRUE;
  202. #if XPAR_MICROBLAZE_UNALIGNED_EXCEPTIONS == 1
  203. microblaze_register_exception_handler( XEXC_ID_UNALIGNED_ACCESS, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_UNALIGNED_ACCESS );
  204. #endif /* XPAR_MICROBLAZE_UNALIGNED_EXCEPTIONS*/
  205. #if XPAR_MICROBLAZE_ILL_OPCODE_EXCEPTION == 1
  206. microblaze_register_exception_handler( XEXC_ID_ILLEGAL_OPCODE, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_ILLEGAL_OPCODE );
  207. #endif /* XPAR_MICROBLAZE_ILL_OPCODE_EXCEPTION */
  208. #if XPAR_MICROBLAZE_M_AXI_I_BUS_EXCEPTION == 1
  209. microblaze_register_exception_handler( XEXC_ID_M_AXI_I_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_I_EXCEPTION );
  210. #endif /* XPAR_MICROBLAZE_M_AXI_I_BUS_EXCEPTION */
  211. #if XPAR_MICROBLAZE_M_AXI_D_BUS_EXCEPTION == 1
  212. microblaze_register_exception_handler( XEXC_ID_M_AXI_D_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_M_AXI_D_EXCEPTION );
  213. #endif /* XPAR_MICROBLAZE_M_AXI_D_BUS_EXCEPTION */
  214. #if XPAR_MICROBLAZE_IPLB_BUS_EXCEPTION == 1
  215. microblaze_register_exception_handler( XEXC_ID_IPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_IPLB_EXCEPTION );
  216. #endif /* XPAR_MICROBLAZE_IPLB_BUS_EXCEPTION */
  217. #if XPAR_MICROBLAZE_DPLB_BUS_EXCEPTION == 1
  218. microblaze_register_exception_handler( XEXC_ID_DPLB_EXCEPTION, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DPLB_EXCEPTION );
  219. #endif /* XPAR_MICROBLAZE_DPLB_BUS_EXCEPTION */
  220. #if XPAR_MICROBLAZE_DIV_ZERO_EXCEPTION == 1
  221. microblaze_register_exception_handler( XEXC_ID_DIV_BY_ZERO, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_DIV_BY_ZERO );
  222. #endif /* XPAR_MICROBLAZE_DIV_ZERO_EXCEPTION */
  223. #if XPAR_MICROBLAZE_FPU_EXCEPTION == 1
  224. microblaze_register_exception_handler( XEXC_ID_FPU, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FPU );
  225. #endif /* XPAR_MICROBLAZE_FPU_EXCEPTION */
  226. #if XPAR_MICROBLAZE_FSL_EXCEPTION == 1
  227. microblaze_register_exception_handler( XEXC_ID_FSL, vPortExceptionHandlerEntry, ( void * ) XEXC_ID_FSL );
  228. #endif /* XPAR_MICROBLAZE_FSL_EXCEPTION */
  229. microblaze_enable_exceptions();
  230. }
  231. }
  232. /* Exclude the entire file if the MicroBlaze is not configured to handle
  233. * exceptions, or the application defined configuration item
  234. * configINSTALL_EXCEPTION_HANDLERS is not set to 1. */
  235. #endif /* ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 ) */