portmacro.h 16 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. #ifndef PORTMACRO_H
  29. #define PORTMACRO_H
  30. /* *INDENT-OFF* */
  31. #ifdef __cplusplus
  32. extern "C" {
  33. #endif
  34. /* *INDENT-ON* */
  35. /* BSP includes. */
  36. #include <mb_interface.h>
  37. #include <xparameters.h>
  38. /*-----------------------------------------------------------
  39. * Port specific definitions.
  40. *
  41. * The settings in this file configure FreeRTOS correctly for the
  42. * given hardware and compiler.
  43. *
  44. * These settings should not be altered.
  45. *-----------------------------------------------------------
  46. */
  47. /* Type definitions. */
  48. #define portCHAR char
  49. #define portFLOAT float
  50. #define portDOUBLE double
  51. #define portLONG long
  52. #define portSHORT short
  53. #ifdef __arch64__
  54. #define portSTACK_TYPE size_t
  55. typedef uint64_t UBaseType_t;
  56. #else
  57. #define portSTACK_TYPE uint32_t
  58. typedef unsigned long UBaseType_t;
  59. #endif
  60. #define portBASE_TYPE long
  61. typedef portSTACK_TYPE StackType_t;
  62. typedef long BaseType_t;
  63. #if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
  64. typedef uint16_t TickType_t;
  65. #define portMAX_DELAY ( TickType_t ) 0xffff
  66. #elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
  67. typedef uint32_t TickType_t;
  68. #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
  69. /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
  70. * not need to be guarded with a critical section. */
  71. #define portTICK_TYPE_IS_ATOMIC 1
  72. #else
  73. #error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
  74. #endif
  75. /*-----------------------------------------------------------*/
  76. /* Interrupt control macros and functions. */
  77. void microblaze_disable_interrupts( void );
  78. void microblaze_enable_interrupts( void );
  79. #define portDISABLE_INTERRUPTS() microblaze_disable_interrupts()
  80. #define portENABLE_INTERRUPTS() microblaze_enable_interrupts()
  81. /*-----------------------------------------------------------*/
  82. /* Critical section macros. */
  83. void vPortEnterCritical( void );
  84. void vPortExitCritical( void );
  85. #define portENTER_CRITICAL() \
  86. { \
  87. extern volatile UBaseType_t uxCriticalNesting; \
  88. microblaze_disable_interrupts(); \
  89. uxCriticalNesting++; \
  90. }
  91. #define portEXIT_CRITICAL() \
  92. { \
  93. extern volatile UBaseType_t uxCriticalNesting; \
  94. /* Interrupts are disabled, so we can */ \
  95. /* access the variable directly. */ \
  96. uxCriticalNesting--; \
  97. if( uxCriticalNesting == 0 ) \
  98. { \
  99. /* The nesting has unwound and we \
  100. * can enable interrupts again. */ \
  101. portENABLE_INTERRUPTS(); \
  102. } \
  103. }
  104. /*-----------------------------------------------------------*/
  105. /* The yield macro maps directly to the vPortYield() function. */
  106. void vPortYield( void );
  107. #define portYIELD() vPortYield()
  108. /* portYIELD_FROM_ISR() does not directly call vTaskSwitchContext(), but instead
  109. * sets a flag to say that a yield has been requested. The interrupt exit code
  110. * then checks this flag, and calls vTaskSwitchContext() before restoring a task
  111. * context, if the flag is not false. This is done to prevent multiple calls to
  112. * vTaskSwitchContext() being made from a single interrupt, as a single interrupt
  113. * can result in multiple peripherals being serviced. */
  114. extern volatile uint32_t ulTaskSwitchRequested;
  115. #define portYIELD_FROM_ISR( x ) \
  116. do { if( ( x ) != pdFALSE ) ulTaskSwitchRequested = 1; } \
  117. while( 0 )
  118. #if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 1 )
  119. /* Generic helper function. */
  120. __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
  121. {
  122. uint8_t ucReturn;
  123. __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) );
  124. return ucReturn;
  125. }
  126. /* Check the configuration. */
  127. #if ( configMAX_PRIORITIES > 32 )
  128. #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
  129. #endif
  130. /* Store/clear the ready priorities in a bit map. */
  131. #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
  132. #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
  133. /*-----------------------------------------------------------*/
  134. #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
  135. #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
  136. /*-----------------------------------------------------------*/
  137. /* Hardware specifics. */
  138. #ifdef __arch64__
  139. #define portBYTE_ALIGNMENT 8
  140. #else
  141. #define portBYTE_ALIGNMENT 4
  142. #endif
  143. #define portSTACK_GROWTH ( -1 )
  144. #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
  145. #define portNOP() asm volatile ( "NOP" )
  146. #define portMEMORY_BARRIER() asm volatile ( "" ::: "memory" )
  147. /*-----------------------------------------------------------*/
  148. #if ( XPAR_MICROBLAZE_USE_STACK_PROTECTION )
  149. #define portHAS_STACK_OVERFLOW_CHECKING 1
  150. #endif
  151. /*-----------------------------------------------------------*/
  152. /* Task function macros as described on the FreeRTOS.org WEB site. */
  153. #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
  154. #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
  155. /*-----------------------------------------------------------*/
  156. /* The following structure is used by the FreeRTOS exception handler. It is
  157. * filled with the MicroBlaze context as it was at the time the exception occurred.
  158. * This is done as an aid to debugging exception occurrences. */
  159. typedef struct PORT_REGISTER_DUMP
  160. {
  161. /* The following structure members hold the values of the MicroBlaze
  162. * registers at the time the exception was raised. */
  163. UINTPTR ulR1_SP;
  164. UINTPTR ulR2_small_data_area;
  165. UINTPTR ulR3;
  166. UINTPTR ulR4;
  167. UINTPTR ulR5;
  168. UINTPTR ulR6;
  169. UINTPTR ulR7;
  170. UINTPTR ulR8;
  171. UINTPTR ulR9;
  172. UINTPTR ulR10;
  173. UINTPTR ulR11;
  174. UINTPTR ulR12;
  175. UINTPTR ulR13_read_write_small_data_area;
  176. UINTPTR ulR14_return_address_from_interrupt;
  177. UINTPTR ulR15_return_address_from_subroutine;
  178. UINTPTR ulR16_return_address_from_trap;
  179. UINTPTR ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */
  180. UINTPTR ulR18;
  181. UINTPTR ulR19;
  182. UINTPTR ulR20;
  183. UINTPTR ulR21;
  184. UINTPTR ulR22;
  185. UINTPTR ulR23;
  186. UINTPTR ulR24;
  187. UINTPTR ulR25;
  188. UINTPTR ulR26;
  189. UINTPTR ulR27;
  190. UINTPTR ulR28;
  191. UINTPTR ulR29;
  192. UINTPTR ulR30;
  193. UINTPTR ulR31;
  194. UINTPTR ulPC;
  195. UINTPTR ulESR;
  196. UINTPTR ulMSR;
  197. UINTPTR ulEAR;
  198. UINTPTR ulFSR;
  199. UINTPTR ulEDR;
  200. /* A human readable description of the exception cause. The strings used
  201. * are the same as the #define constant names found in the
  202. * microblaze_exceptions_i.h header file */
  203. int8_t * pcExceptionCause;
  204. /* The human readable name of the task that was running at the time the
  205. * exception occurred. This is the name that was given to the task when the
  206. * task was created using the FreeRTOS xTaskCreate() API function. */
  207. char * pcCurrentTaskName;
  208. /* The handle of the task that was running a the time the exception
  209. * occurred. */
  210. void * xCurrentTaskHandle;
  211. } xPortRegisterDump;
  212. /*
  213. * Installs pxHandler as the interrupt handler for the peripheral specified by
  214. * the ucInterruptID parameter.
  215. *
  216. * ucInterruptID:
  217. *
  218. * The ID of the peripheral that will have pxHandler assigned as its interrupt
  219. * handler. Peripheral IDs are defined in the xparameters.h header file, which
  220. * is itself part of the BSP project. For example, in the official demo
  221. * application for this port, xparameters.h defines the following IDs for the
  222. * four possible interrupt sources:
  223. *
  224. * XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
  225. * XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
  226. * XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
  227. * XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
  228. *
  229. *
  230. * pxHandler:
  231. *
  232. * A pointer to the interrupt handler function itself. This must be a void
  233. * function that takes a (void *) parameter.
  234. *
  235. *
  236. * pvCallBackRef:
  237. *
  238. * The parameter passed into the handler function. In many cases this will not
  239. * be used and can be NULL. Some times it is used to pass in a reference to
  240. * the peripheral instance variable, so it can be accessed from inside the
  241. * handler function.
  242. *
  243. *
  244. * pdPASS is returned if the function executes successfully. Any other value
  245. * being returned indicates that the function did not execute correctly.
  246. */
  247. BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID,
  248. XInterruptHandler pxHandler,
  249. void * pvCallBackRef );
  250. /*
  251. * Enables the interrupt, within the interrupt controller, for the peripheral
  252. * specified by the ucInterruptID parameter.
  253. *
  254. * ucInterruptID:
  255. *
  256. * The ID of the peripheral that will have its interrupt enabled in the
  257. * interrupt controller. Peripheral IDs are defined in the xparameters.h header
  258. * file, which is itself part of the BSP project. For example, in the official
  259. * demo application for this port, xparameters.h defines the following IDs for
  260. * the four possible interrupt sources:
  261. *
  262. * XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
  263. * XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
  264. * XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
  265. * XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
  266. *
  267. */
  268. void vPortEnableInterrupt( uint8_t ucInterruptID );
  269. /*
  270. * Disables the interrupt, within the interrupt controller, for the peripheral
  271. * specified by the ucInterruptID parameter.
  272. *
  273. * ucInterruptID:
  274. *
  275. * The ID of the peripheral that will have its interrupt disabled in the
  276. * interrupt controller. Peripheral IDs are defined in the xparameters.h header
  277. * file, which is itself part of the BSP project. For example, in the official
  278. * demo application for this port, xparameters.h defines the following IDs for
  279. * the four possible interrupt sources:
  280. *
  281. * XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.
  282. * XPAR_INTC_0_TMRCTR_0_VEC_ID - for the AXI Timer 0 peripheral.
  283. * XPAR_INTC_0_EMACLITE_0_VEC_ID - for the Ethernet lite peripheral.
  284. * XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.
  285. *
  286. */
  287. void vPortDisableInterrupt( uint8_t ucInterruptID );
  288. /*
  289. * This is an application defined callback function used to install the tick
  290. * interrupt handler. It is provided as an application callback because the
  291. * kernel will run on lots of different MicroBlaze and FPGA configurations - not
  292. * all of which will have the same timer peripherals defined or available. This
  293. * example uses the AXI Timer 0. If that is available on your hardware platform
  294. * then this example callback implementation should not require modification.
  295. * The name of the interrupt handler that should be installed is vPortTickISR(),
  296. * which the function below declares as an extern.
  297. */
  298. void vApplicationSetupTimerInterrupt( void );
  299. /*
  300. * This is an application defined callback function used to clear whichever
  301. * interrupt was installed by the the vApplicationSetupTimerInterrupt() callback
  302. * function - in this case the interrupt generated by the AXI timer. It is
  303. * provided as an application callback because the kernel will run on lots of
  304. * different MicroBlaze and FPGA configurations - not all of which will have the
  305. * same timer peripherals defined or available. This example uses the AXI Timer 0.
  306. * If that is available on your hardware platform then this example callback
  307. * implementation should not require modification provided the example definition
  308. * of vApplicationSetupTimerInterrupt() is also not modified.
  309. */
  310. void vApplicationClearTimerInterrupt( void );
  311. /*
  312. * vPortExceptionsInstallHandlers() is only available when the MicroBlaze
  313. * is configured to include exception functionality, and
  314. * configINSTALL_EXCEPTION_HANDLERS is set to 1 in FreeRTOSConfig.h.
  315. *
  316. * vPortExceptionsInstallHandlers() installs the FreeRTOS exception handler
  317. * for every possible exception cause.
  318. *
  319. * vPortExceptionsInstallHandlers() can be called explicitly from application
  320. * code. After that is done, the default FreeRTOS exception handler that will
  321. * have been installed can be replaced for any specific exception cause by using
  322. * the standard Xilinx library function microblaze_register_exception_handler().
  323. *
  324. * If vPortExceptionsInstallHandlers() is not called explicitly by the
  325. * application, it will be called automatically by the kernel the first time
  326. * xPortInstallInterruptHandler() is called. At that time, any exception
  327. * handlers that may have already been installed will be replaced.
  328. *
  329. * See the description of vApplicationExceptionRegisterDump() for information
  330. * on the processing performed by the FreeRTOS exception handler.
  331. */
  332. void vPortExceptionsInstallHandlers( void );
  333. /*
  334. * The FreeRTOS exception handler fills an xPortRegisterDump structure (defined
  335. * in portmacro.h) with the MicroBlaze context, as it was at the time the
  336. * exception occurred. The exception handler then calls
  337. * vApplicationExceptionRegisterDump(), passing in the completed
  338. * xPortRegisterDump structure as its parameter.
  339. *
  340. * The FreeRTOS kernel provides its own implementation of
  341. * vApplicationExceptionRegisterDump(), but the kernel provided implementation
  342. * is declared as being 'weak'. The weak definition allows the application
  343. * writer to provide their own implementation, should they wish to use the
  344. * register dump information. For example, an implementation could be provided
  345. * that wrote the register dump data to a display, or a UART port.
  346. */
  347. void vApplicationExceptionRegisterDump( xPortRegisterDump * xRegisterDump );
  348. /* *INDENT-OFF* */
  349. #ifdef __cplusplus
  350. }
  351. #endif
  352. /* *INDENT-ON* */
  353. #endif /* PORTMACRO_H */