port.c 9.1 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /*-----------------------------------------------------------
  29. * Implementation of functions defined in portable.h for the PPC440 port.
  30. *----------------------------------------------------------*/
  31. /* Scheduler includes. */
  32. #include "FreeRTOS.h"
  33. #include "task.h"
  34. /* Library includes. */
  35. #include "xtime_l.h"
  36. #include "xintc.h"
  37. #include "xintc_i.h"
  38. /*-----------------------------------------------------------*/
  39. /* Definitions to set the initial MSR of each task. */
  40. #define portCRITICAL_INTERRUPT_ENABLE ( 1UL << 17UL )
  41. #define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL )
  42. #define portMACHINE_CHECK_ENABLE ( 1UL << 12UL )
  43. #if configUSE_FPU == 1
  44. #define portAPU_PRESENT ( 1UL << 25UL )
  45. #define portFCM_FPU_PRESENT ( 1UL << 13UL )
  46. #else
  47. #define portAPU_PRESENT ( 0UL )
  48. #define portFCM_FPU_PRESENT ( 0UL )
  49. #endif
  50. #define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE | portAPU_PRESENT | portFCM_FPU_PRESENT )
  51. extern const unsigned _SDA_BASE_;
  52. extern const unsigned _SDA2_BASE_;
  53. /*-----------------------------------------------------------*/
  54. /*
  55. * Setup the system timer to generate the tick interrupt.
  56. */
  57. static void prvSetupTimerInterrupt( void );
  58. /*
  59. * The handler for the tick interrupt - defined in portasm.s.
  60. */
  61. extern void vPortTickISR( void );
  62. /*
  63. * The handler for the yield function - defined in portasm.s.
  64. */
  65. extern void vPortYield( void );
  66. /*
  67. * Function to start the scheduler running by starting the highest
  68. * priority task that has thus far been created.
  69. */
  70. extern void vPortStartFirstTask( void );
  71. /*-----------------------------------------------------------*/
  72. /* Structure used to hold the state of the interrupt controller. */
  73. static XIntc xInterruptController;
  74. /*-----------------------------------------------------------*/
  75. /*
  76. * Initialise the stack of a task to look exactly as if the task had been
  77. * interrupted.
  78. *
  79. * See the header file portable.h.
  80. */
  81. StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
  82. TaskFunction_t pxCode,
  83. void * pvParameters )
  84. {
  85. /* Place a known value at the bottom of the stack for debugging. */
  86. *pxTopOfStack = 0xDEADBEEF;
  87. pxTopOfStack--;
  88. /* EABI stack frame. */
  89. pxTopOfStack -= 20; /* Previous backchain and LR, R31 to R4 inclusive. */
  90. /* Parameters in R13. */
  91. *pxTopOfStack = ( StackType_t ) &_SDA_BASE_; /* address of the first small data area */
  92. pxTopOfStack -= 10;
  93. /* Parameters in R3. */
  94. *pxTopOfStack = ( StackType_t ) pvParameters;
  95. pxTopOfStack--;
  96. /* Parameters in R2. */
  97. *pxTopOfStack = ( StackType_t ) &_SDA2_BASE_; /* address of the second small data area */
  98. pxTopOfStack--;
  99. /* R1 is the stack pointer so is omitted. */
  100. *pxTopOfStack = 0x10000001UL; /* R0. */
  101. pxTopOfStack--;
  102. *pxTopOfStack = 0x00000000UL; /* USPRG0. */
  103. pxTopOfStack--;
  104. *pxTopOfStack = 0x00000000UL; /* CR. */
  105. pxTopOfStack--;
  106. *pxTopOfStack = 0x00000000UL; /* XER. */
  107. pxTopOfStack--;
  108. *pxTopOfStack = 0x00000000UL; /* CTR. */
  109. pxTopOfStack--;
  110. *pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* LR. */
  111. pxTopOfStack--;
  112. *pxTopOfStack = ( StackType_t ) pxCode; /* SRR0. */
  113. pxTopOfStack--;
  114. *pxTopOfStack = portINITIAL_MSR; /* SRR1. */
  115. pxTopOfStack--;
  116. *pxTopOfStack = ( StackType_t ) vPortEndScheduler; /* Next LR. */
  117. pxTopOfStack--;
  118. *pxTopOfStack = 0x00000000UL; /* Backchain. */
  119. return pxTopOfStack;
  120. }
  121. /*-----------------------------------------------------------*/
  122. BaseType_t xPortStartScheduler( void )
  123. {
  124. prvSetupTimerInterrupt();
  125. XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 );
  126. vPortStartFirstTask();
  127. /* Should not get here as the tasks are now running! */
  128. return pdFALSE;
  129. }
  130. /*-----------------------------------------------------------*/
  131. void vPortEndScheduler( void )
  132. {
  133. /* Not implemented. */
  134. for( ; ; )
  135. {
  136. }
  137. }
  138. /*-----------------------------------------------------------*/
  139. /*
  140. * Hardware initialisation to generate the RTOS tick.
  141. */
  142. static void prvSetupTimerInterrupt( void )
  143. {
  144. const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
  145. XTime_DECClearInterrupt();
  146. XTime_FITClearInterrupt();
  147. XTime_WDTClearInterrupt();
  148. XTime_WDTDisableInterrupt();
  149. XTime_FITDisableInterrupt();
  150. XExc_RegisterHandler( XEXC_ID_DEC_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );
  151. XTime_DECEnableAutoReload();
  152. XTime_DECSetInterval( ulInterval );
  153. XTime_DECEnableInterrupt();
  154. }
  155. /*-----------------------------------------------------------*/
  156. void vPortISRHandler( void * pvNullDoNotUse )
  157. {
  158. uint32_t ulInterruptStatus, ulInterruptMask = 1UL;
  159. BaseType_t xInterruptNumber;
  160. XIntc_Config * pxInterruptController;
  161. XIntc_VectorTableEntry * pxTable;
  162. /* Just to remove compiler warning. */
  163. ( void ) pvNullDoNotUse;
  164. /* Get the configuration by using the device ID - in this case it is
  165. * assumed that only one interrupt controller is being used. */
  166. pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
  167. /* Which interrupts are pending? */
  168. ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
  169. for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
  170. {
  171. if( ulInterruptStatus & 0x01UL )
  172. {
  173. /* Clear the pending interrupt. */
  174. XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
  175. /* Call the registered handler. */
  176. pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
  177. pxTable->Handler( pxTable->CallBackRef );
  178. }
  179. /* Check the next interrupt. */
  180. ulInterruptMask <<= 0x01UL;
  181. ulInterruptStatus >>= 0x01UL;
  182. /* Have we serviced all interrupts? */
  183. if( ulInterruptStatus == 0UL )
  184. {
  185. break;
  186. }
  187. }
  188. }
  189. /*-----------------------------------------------------------*/
  190. void vPortSetupInterruptController( void )
  191. {
  192. extern void vPortISRWrapper( void );
  193. /* Perform all library calls necessary to initialise the exception table
  194. * and interrupt controller. This assumes only one interrupt controller is in
  195. * use. */
  196. XExc_mDisableExceptions( XEXC_NON_CRITICAL );
  197. XExc_Init();
  198. /* The library functions save the context - we then jump to a wrapper to
  199. * save the stack into the TCB. The wrapper then calls the handler defined
  200. * above. */
  201. XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, ( XExceptionHandler ) vPortISRWrapper, NULL );
  202. XIntc_Initialize( &xInterruptController, XPAR_XPS_INTC_0_DEVICE_ID );
  203. XIntc_Start( &xInterruptController, XIN_REAL_MODE );
  204. }
  205. /*-----------------------------------------------------------*/
  206. BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID,
  207. XInterruptHandler pxHandler,
  208. void * pvCallBackRef )
  209. {
  210. BaseType_t xReturn = pdFAIL;
  211. /* This function is defined here so the scope of xInterruptController can
  212. * remain within this file. */
  213. if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) )
  214. {
  215. XIntc_Enable( &xInterruptController, ucInterruptID );
  216. xReturn = pdPASS;
  217. }
  218. return xReturn;
  219. }