port.c 9.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. /*-----------------------------------------------------------
  29. * Implementation of functions defined in portable.h for the RISC-V port.
  30. *----------------------------------------------------------*/
  31. /* Scheduler includes. */
  32. #include "FreeRTOS.h"
  33. #include "task.h"
  34. #include "portmacro.h"
  35. /* Standard includes. */
  36. #include "string.h"
  37. #ifdef configCLINT_BASE_ADDRESS
  38. #warning "The configCLINT_BASE_ADDRESS constant has been deprecated. configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS are currently being derived from the (possibly 0) configCLINT_BASE_ADDRESS setting. Please update to define configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS directly in place of configCLINT_BASE_ADDRESS. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
  39. #endif
  40. #ifndef configMTIME_BASE_ADDRESS
  41. #warning "configMTIME_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtime register then set configMTIME_BASE_ADDRESS to the mapped address. Otherwise set configMTIME_BASE_ADDRESS to 0. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
  42. #endif
  43. #ifndef configMTIMECMP_BASE_ADDRESS
  44. #warning "configMTIMECMP_BASE_ADDRESS must be defined in FreeRTOSConfig.h. If the target chip includes a memory-mapped mtimecmp register then set configMTIMECMP_BASE_ADDRESS to the mapped address. Otherwise set configMTIMECMP_BASE_ADDRESS to 0. See www.FreeRTOS.org/Using-FreeRTOS-on-RISC-V.html"
  45. #endif
  46. /* Let the user override the pre-loading of the initial RA. */
  47. #ifdef configTASK_RETURN_ADDRESS
  48. #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
  49. #else
  50. #define portTASK_RETURN_ADDRESS 0
  51. #endif
  52. /* The stack used by interrupt service routines. Set configISR_STACK_SIZE_WORDS
  53. * to use a statically allocated array as the interrupt stack. Alternative leave
  54. * configISR_STACK_SIZE_WORDS undefined and update the linker script so that a
  55. * linker variable names __freertos_irq_stack_top has the same value as the top
  56. * of the stack used by main. Using the linker script method will repurpose the
  57. * stack that was used by main before the scheduler was started for use as the
  58. * interrupt stack after the scheduler has started. */
  59. #ifdef configISR_STACK_SIZE_WORDS
  60. static __attribute__( ( aligned( 16 ) ) ) StackType_t xISRStack[ configISR_STACK_SIZE_WORDS ] = { 0 };
  61. const StackType_t xISRStackTop = ( StackType_t ) &( xISRStack[ configISR_STACK_SIZE_WORDS & ~portBYTE_ALIGNMENT_MASK ] );
  62. /* Don't use 0xa5 as the stack fill bytes as that is used by the kernel for
  63. * the task stacks, and so will legitimately appear in many positions within
  64. * the ISR stack. */
  65. #define portISR_STACK_FILL_BYTE 0xee
  66. #else
  67. extern const uint32_t __freertos_irq_stack_top[];
  68. const StackType_t xISRStackTop = ( StackType_t ) __freertos_irq_stack_top;
  69. #endif
  70. /*
  71. * Setup the timer to generate the tick interrupts. The implementation in this
  72. * file is weak to allow application writers to change the timer used to
  73. * generate the tick interrupt.
  74. */
  75. void vPortSetupTimerInterrupt( void ) __attribute__( ( weak ) );
  76. /*-----------------------------------------------------------*/
  77. /* Used to program the machine timer compare register. */
  78. uint64_t ullNextTime = 0ULL;
  79. const uint64_t * pullNextTime = &ullNextTime;
  80. const size_t uxTimerIncrementsForOneTick = ( size_t ) ( ( configCPU_CLOCK_HZ ) / ( configTICK_RATE_HZ ) ); /* Assumes increment won't go over 32-bits. */
  81. UBaseType_t const ullMachineTimerCompareRegisterBase = configMTIMECMP_BASE_ADDRESS;
  82. volatile uint64_t * pullMachineTimerCompareRegister = NULL;
  83. /* Holds the critical nesting value - deliberately non-zero at start up to
  84. * ensure interrupts are not accidentally enabled before the scheduler starts. */
  85. size_t xCriticalNesting = ( size_t ) 0xaaaaaaaa;
  86. size_t * pxCriticalNesting = &xCriticalNesting;
  87. /* Used to catch tasks that attempt to return from their implementing function. */
  88. size_t xTaskReturnAddress = ( size_t ) portTASK_RETURN_ADDRESS;
  89. /* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task
  90. * stack checking. A problem in the ISR stack will trigger an assert, not call
  91. * the stack overflow hook function (because the stack overflow hook is specific
  92. * to a task stack, not the ISR stack). */
  93. #if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 )
  94. #warning "This path not tested, or even compiled yet."
  95. static const uint8_t ucExpectedStackBytes[] =
  96. {
  97. portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
  98. portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
  99. portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
  100. portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \
  101. portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE
  102. }; \
  103. #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )
  104. #else /* if defined( configISR_STACK_SIZE_WORDS ) && ( configCHECK_FOR_STACK_OVERFLOW > 2 ) */
  105. /* Define the function away. */
  106. #define portCHECK_ISR_STACK()
  107. #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */
  108. /*-----------------------------------------------------------*/
  109. #if ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 )
  110. void vPortSetupTimerInterrupt( void )
  111. {
  112. uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
  113. volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( ( configMTIME_BASE_ADDRESS ) + 4UL ); /* 8-byte type so high 32-bit word is 4 bytes up. */
  114. volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configMTIME_BASE_ADDRESS );
  115. volatile uint32_t ulHartId;
  116. __asm volatile ( "csrr %0, mhartid" : "=r" ( ulHartId ) );
  117. pullMachineTimerCompareRegister = ( volatile uint64_t * ) ( ullMachineTimerCompareRegisterBase + ( ulHartId * sizeof( uint64_t ) ) );
  118. do
  119. {
  120. ulCurrentTimeHigh = *pulTimeHigh;
  121. ulCurrentTimeLow = *pulTimeLow;
  122. } while( ulCurrentTimeHigh != *pulTimeHigh );
  123. ullNextTime = ( uint64_t ) ulCurrentTimeHigh;
  124. ullNextTime <<= 32ULL; /* High 4-byte word is 32-bits up. */
  125. ullNextTime |= ( uint64_t ) ulCurrentTimeLow;
  126. ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
  127. *pullMachineTimerCompareRegister = ullNextTime;
  128. /* Prepare the time to use after the next tick interrupt. */
  129. ullNextTime += ( uint64_t ) uxTimerIncrementsForOneTick;
  130. }
  131. #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIME_BASE_ADDRESS != 0 ) */
  132. /*-----------------------------------------------------------*/
  133. BaseType_t xPortStartScheduler( void )
  134. {
  135. extern void xPortStartFirstTask( void );
  136. #if ( configASSERT_DEFINED == 1 )
  137. {
  138. /* Check alignment of the interrupt stack - which is the same as the
  139. * stack that was being used by main() prior to the scheduler being
  140. * started. */
  141. configASSERT( ( xISRStackTop & portBYTE_ALIGNMENT_MASK ) == 0 );
  142. #ifdef configISR_STACK_SIZE_WORDS
  143. {
  144. memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );
  145. }
  146. #endif /* configISR_STACK_SIZE_WORDS */
  147. }
  148. #endif /* configASSERT_DEFINED */
  149. /* If there is a CLINT then it is ok to use the default implementation
  150. * in this file, otherwise vPortSetupTimerInterrupt() must be implemented to
  151. * configure whichever clock is to be used to generate the tick interrupt. */
  152. vPortSetupTimerInterrupt();
  153. #if ( ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) )
  154. {
  155. /* Enable mtime and external interrupts. 1<<7 for timer interrupt,
  156. * 1<<11 for external interrupt. _RB_ What happens here when mtime is
  157. * not present as with pulpino? */
  158. __asm volatile ( "csrs mie, %0" ::"r" ( 0x880 ) );
  159. }
  160. #endif /* ( configMTIME_BASE_ADDRESS != 0 ) && ( configMTIMECMP_BASE_ADDRESS != 0 ) */
  161. xPortStartFirstTask();
  162. /* Should not get here as after calling xPortStartFirstTask() only tasks
  163. * should be executing. */
  164. return pdFAIL;
  165. }
  166. /*-----------------------------------------------------------*/
  167. void vPortEndScheduler( void )
  168. {
  169. /* Not implemented. */
  170. for( ; ; )
  171. {
  172. }
  173. }
  174. /*-----------------------------------------------------------*/