port.c 40 KB

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  1. /*
  2. * FreeRTOS Kernel <DEVELOPMENT BRANCH>
  3. * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
  4. *
  5. * SPDX-License-Identifier: MIT
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy of
  8. * this software and associated documentation files (the "Software"), to deal in
  9. * the Software without restriction, including without limitation the rights to
  10. * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11. * the Software, and to permit persons to whom the Software is furnished to do so,
  12. * subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in all
  15. * copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19. * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20. * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * https://www.FreeRTOS.org
  25. * https://github.com/FreeRTOS
  26. *
  27. */
  28. #include <stdlib.h>
  29. #include <avr/io.h>
  30. #include <avr/interrupt.h>
  31. #include <avr/wdt.h>
  32. #include "FreeRTOS.h"
  33. #include "task.h"
  34. /*-----------------------------------------------------------
  35. * Implementation of functions defined in portable.h for the AVR port.
  36. *----------------------------------------------------------*/
  37. /* Start tasks with interrupts enabled. */
  38. #define portFLAGS_INT_ENABLED ( ( StackType_t ) 0x80 )
  39. #if defined( portUSE_WDTO )
  40. #warning "Watchdog Timer used for scheduler."
  41. #define portSCHEDULER_ISR WDT_vect
  42. #elif defined( portUSE_TIMER0 )
  43. /* Hardware constants for Timer0. */
  44. #warning "Timer0 used for scheduler."
  45. #define portSCHEDULER_ISR TIMER0_COMPA_vect
  46. #define portCLEAR_COUNTER_ON_MATCH ( ( uint8_t ) _BV( WGM01 ) )
  47. #define portPRESCALE_1024 ( ( uint8_t ) ( _BV( CS02 ) | _BV( CS00 ) ) )
  48. #define portCLOCK_PRESCALER ( ( uint32_t ) 1024 )
  49. #define portCOMPARE_MATCH_A_INTERRUPT_ENABLE ( ( uint8_t ) _BV( OCIE0A ) )
  50. #define portOCRL OCR0A
  51. #define portTCCRa TCCR0A
  52. #define portTCCRb TCCR0B
  53. #define portTIMSK TIMSK0
  54. #define portTIFR TIFR0
  55. #else /* if defined( portUSE_WDTO ) */
  56. #error "No Timer defined for scheduler"
  57. #endif /* if defined( portUSE_WDTO ) */
  58. /*-----------------------------------------------------------*/
  59. /* We require the address of the pxCurrentTCB variable, but don't want to know
  60. * any details of its type. */
  61. typedef void TCB_t;
  62. extern volatile TCB_t * volatile pxCurrentTCB;
  63. /*-----------------------------------------------------------*/
  64. /**
  65. * Enable the watchdog timer, configuring it for expire after
  66. * (value) timeout (which is a combination of the WDP0
  67. * through WDP3 bits).
  68. *
  69. * This function is derived from <avr/wdt.h> but enables only
  70. * the interrupt bit (WDIE), rather than the reset bit (WDE).
  71. *
  72. * Can't find it documented but the WDT, once enabled,
  73. * rolls over and fires a new interrupt each time.
  74. *
  75. * See also the symbolic constants WDTO_15MS et al.
  76. *
  77. * Updated to match avr-libc 2.0.0
  78. */
  79. #if defined( portUSE_WDTO )
  80. static __inline__
  81. __attribute__( ( __always_inline__ ) )
  82. void wdt_interrupt_enable( const uint8_t value )
  83. {
  84. if( _SFR_IO_REG_P( _WD_CONTROL_REG ) )
  85. {
  86. __asm__ __volatile__ (
  87. "in __tmp_reg__,__SREG__" "\n\t"
  88. "cli" "\n\t"
  89. "wdr" "\n\t"
  90. "out %0, %1" "\n\t"
  91. "out __SREG__,__tmp_reg__" "\n\t"
  92. "out %0, %2" "\n\t"
  93. : /* no outputs */
  94. : "I" ( _SFR_IO_ADDR( _WD_CONTROL_REG ) ),
  95. "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
  96. "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
  97. _BV( WDIF ) | _BV( WDIE ) | ( value & 0x07 ) ) )
  98. : "r0"
  99. );
  100. }
  101. else
  102. {
  103. __asm__ __volatile__ (
  104. "in __tmp_reg__,__SREG__" "\n\t"
  105. "cli" "\n\t"
  106. "wdr" "\n\t"
  107. "sts %0, %1" "\n\t"
  108. "out __SREG__,__tmp_reg__" "\n\t"
  109. "sts %0, %2" "\n\t"
  110. : /* no outputs */
  111. : "n" ( _SFR_MEM_ADDR( _WD_CONTROL_REG ) ),
  112. "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
  113. "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
  114. _BV( WDIF ) | _BV( WDIE ) | ( value & 0x07 ) ) )
  115. : "r0"
  116. );
  117. }
  118. }
  119. #endif /* if defined( portUSE_WDTO ) */
  120. /*-----------------------------------------------------------*/
  121. /**
  122. * Enable the watchdog timer, configuring it for expire after
  123. * (value) timeout (which is a combination of the WDP0
  124. * through WDP3 bits).
  125. *
  126. * This function is derived from <avr/wdt.h> but enables both
  127. * the reset bit (WDE), and the interrupt bit (WDIE).
  128. *
  129. * This will ensure that if the interrupt is not serviced
  130. * before the second timeout, the AVR will reset.
  131. *
  132. * Servicing the interrupt automatically clears it,
  133. * and ensures the AVR does not reset.
  134. *
  135. * Can't find it documented but the WDT, once enabled,
  136. * rolls over and fires a new interrupt each time.
  137. *
  138. * See also the symbolic constants WDTO_15MS et al.
  139. *
  140. * Updated to match avr-libc 2.0.0
  141. */
  142. #if defined( portUSE_WDTO )
  143. static __inline__
  144. __attribute__( ( __always_inline__ ) )
  145. void wdt_interrupt_reset_enable( const uint8_t value )
  146. {
  147. if( _SFR_IO_REG_P( _WD_CONTROL_REG ) )
  148. {
  149. __asm__ __volatile__ (
  150. "in __tmp_reg__,__SREG__" "\n\t"
  151. "cli" "\n\t"
  152. "wdr" "\n\t"
  153. "out %0, %1" "\n\t"
  154. "out __SREG__,__tmp_reg__" "\n\t"
  155. "out %0, %2" "\n\t"
  156. : /* no outputs */
  157. : "I" ( _SFR_IO_ADDR( _WD_CONTROL_REG ) ),
  158. "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
  159. "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
  160. _BV( WDIF ) | _BV( WDIE ) | _BV( WDE ) | ( value & 0x07 ) ) )
  161. : "r0"
  162. );
  163. }
  164. else
  165. {
  166. __asm__ __volatile__ (
  167. "in __tmp_reg__,__SREG__" "\n\t"
  168. "cli" "\n\t"
  169. "wdr" "\n\t"
  170. "sts %0, %1" "\n\t"
  171. "out __SREG__,__tmp_reg__" "\n\t"
  172. "sts %0, %2" "\n\t"
  173. : /* no outputs */
  174. : "n" ( _SFR_MEM_ADDR( _WD_CONTROL_REG ) ),
  175. "r" ( ( uint8_t ) ( _BV( _WD_CHANGE_BIT ) | _BV( WDE ) ) ),
  176. "r" ( ( uint8_t ) ( ( value & 0x08 ? _WD_PS3_MASK : 0x00 ) |
  177. _BV( WDIF ) | _BV( WDIE ) | _BV( WDE ) | ( value & 0x07 ) ) )
  178. : "r0"
  179. );
  180. }
  181. }
  182. #endif /* if defined( portUSE_WDTO ) */
  183. /*-----------------------------------------------------------*/
  184. /*
  185. * Macro to save all the general purpose registers, the save the stack pointer
  186. * into the TCB.
  187. *
  188. * The first thing we do is save the flags then disable interrupts. This is to
  189. * guard our stack against having a context switch interrupt after we have already
  190. * pushed the registers onto the stack - causing the 32 registers to be on the
  191. * stack twice.
  192. *
  193. * r1 is set to zero (__zero_reg__) as the compiler expects it to be thus, however
  194. * some of the math routines make use of R1.
  195. *
  196. * r0 is set to __tmp_reg__ as the compiler expects it to be thus.
  197. *
  198. * #if defined(__AVR_HAVE_RAMPZ__)
  199. * #define __RAMPZ__ 0x3B
  200. * #endif
  201. *
  202. * #if defined(__AVR_3_BYTE_PC__)
  203. * #define __EIND__ 0x3C
  204. * #endif
  205. *
  206. * The interrupts will have been disabled during the call to portSAVE_CONTEXT()
  207. * so we need not worry about reading/writing to the stack pointer.
  208. */
  209. #if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ )
  210. /* 3-Byte PC Save with RAMPZ */
  211. #define portSAVE_CONTEXT() \
  212. __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
  213. "in __tmp_reg__, __SREG__ \n\t" \
  214. "cli \n\t" \
  215. "push __tmp_reg__ \n\t" \
  216. "in __tmp_reg__, 0x3B \n\t" \
  217. "push __tmp_reg__ \n\t" \
  218. "in __tmp_reg__, 0x3C \n\t" \
  219. "push __tmp_reg__ \n\t" \
  220. "push __zero_reg__ \n\t" \
  221. "clr __zero_reg__ \n\t" \
  222. "push r2 \n\t" \
  223. "push r3 \n\t" \
  224. "push r4 \n\t" \
  225. "push r5 \n\t" \
  226. "push r6 \n\t" \
  227. "push r7 \n\t" \
  228. "push r8 \n\t" \
  229. "push r9 \n\t" \
  230. "push r10 \n\t" \
  231. "push r11 \n\t" \
  232. "push r12 \n\t" \
  233. "push r13 \n\t" \
  234. "push r14 \n\t" \
  235. "push r15 \n\t" \
  236. "push r16 \n\t" \
  237. "push r17 \n\t" \
  238. "push r18 \n\t" \
  239. "push r19 \n\t" \
  240. "push r20 \n\t" \
  241. "push r21 \n\t" \
  242. "push r22 \n\t" \
  243. "push r23 \n\t" \
  244. "push r24 \n\t" \
  245. "push r25 \n\t" \
  246. "push r26 \n\t" \
  247. "push r27 \n\t" \
  248. "push r28 \n\t" \
  249. "push r29 \n\t" \
  250. "push r30 \n\t" \
  251. "push r31 \n\t" \
  252. "lds r26, pxCurrentTCB \n\t" \
  253. "lds r27, pxCurrentTCB + 1 \n\t" \
  254. "in __tmp_reg__, __SP_L__ \n\t" \
  255. "st x+, __tmp_reg__ \n\t" \
  256. "in __tmp_reg__, __SP_H__ \n\t" \
  257. "st x+, __tmp_reg__ \n\t" \
  258. );
  259. #elif defined( __AVR_HAVE_RAMPZ__ )
  260. /* 2-Byte PC Save with RAMPZ */
  261. #define portSAVE_CONTEXT() \
  262. __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
  263. "in __tmp_reg__, __SREG__ \n\t" \
  264. "cli \n\t" \
  265. "push __tmp_reg__ \n\t" \
  266. "in __tmp_reg__, 0x3B \n\t" \
  267. "push __tmp_reg__ \n\t" \
  268. "push __zero_reg__ \n\t" \
  269. "clr __zero_reg__ \n\t" \
  270. "push r2 \n\t" \
  271. "push r3 \n\t" \
  272. "push r4 \n\t" \
  273. "push r5 \n\t" \
  274. "push r6 \n\t" \
  275. "push r7 \n\t" \
  276. "push r8 \n\t" \
  277. "push r9 \n\t" \
  278. "push r10 \n\t" \
  279. "push r11 \n\t" \
  280. "push r12 \n\t" \
  281. "push r13 \n\t" \
  282. "push r14 \n\t" \
  283. "push r15 \n\t" \
  284. "push r16 \n\t" \
  285. "push r17 \n\t" \
  286. "push r18 \n\t" \
  287. "push r19 \n\t" \
  288. "push r20 \n\t" \
  289. "push r21 \n\t" \
  290. "push r22 \n\t" \
  291. "push r23 \n\t" \
  292. "push r24 \n\t" \
  293. "push r25 \n\t" \
  294. "push r26 \n\t" \
  295. "push r27 \n\t" \
  296. "push r28 \n\t" \
  297. "push r29 \n\t" \
  298. "push r30 \n\t" \
  299. "push r31 \n\t" \
  300. "lds r26, pxCurrentTCB \n\t" \
  301. "lds r27, pxCurrentTCB + 1 \n\t" \
  302. "in __tmp_reg__, __SP_L__ \n\t" \
  303. "st x+, __tmp_reg__ \n\t" \
  304. "in __tmp_reg__, __SP_H__ \n\t" \
  305. "st x+, __tmp_reg__ \n\t" \
  306. );
  307. #else /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
  308. /* 2-Byte PC Save */
  309. #define portSAVE_CONTEXT() \
  310. __asm__ __volatile__ ( "push __tmp_reg__ \n\t" \
  311. "in __tmp_reg__, __SREG__ \n\t" \
  312. "cli \n\t" \
  313. "push __tmp_reg__ \n\t" \
  314. "push __zero_reg__ \n\t" \
  315. "clr __zero_reg__ \n\t" \
  316. "push r2 \n\t" \
  317. "push r3 \n\t" \
  318. "push r4 \n\t" \
  319. "push r5 \n\t" \
  320. "push r6 \n\t" \
  321. "push r7 \n\t" \
  322. "push r8 \n\t" \
  323. "push r9 \n\t" \
  324. "push r10 \n\t" \
  325. "push r11 \n\t" \
  326. "push r12 \n\t" \
  327. "push r13 \n\t" \
  328. "push r14 \n\t" \
  329. "push r15 \n\t" \
  330. "push r16 \n\t" \
  331. "push r17 \n\t" \
  332. "push r18 \n\t" \
  333. "push r19 \n\t" \
  334. "push r20 \n\t" \
  335. "push r21 \n\t" \
  336. "push r22 \n\t" \
  337. "push r23 \n\t" \
  338. "push r24 \n\t" \
  339. "push r25 \n\t" \
  340. "push r26 \n\t" \
  341. "push r27 \n\t" \
  342. "push r28 \n\t" \
  343. "push r29 \n\t" \
  344. "push r30 \n\t" \
  345. "push r31 \n\t" \
  346. "lds r26, pxCurrentTCB \n\t" \
  347. "lds r27, pxCurrentTCB + 1 \n\t" \
  348. "in __tmp_reg__, __SP_L__ \n\t" \
  349. "st x+, __tmp_reg__ \n\t" \
  350. "in __tmp_reg__, __SP_H__ \n\t" \
  351. "st x+, __tmp_reg__ \n\t" \
  352. );
  353. #endif /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
  354. /*
  355. * Opposite to portSAVE_CONTEXT(). Interrupts will have been disabled during
  356. * the context save so we can write to the stack pointer.
  357. */
  358. #if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ )
  359. /* 3-Byte PC Restore with RAMPZ */
  360. #define portRESTORE_CONTEXT() \
  361. __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
  362. "lds r27, pxCurrentTCB + 1 \n\t" \
  363. "ld r28, x+ \n\t" \
  364. "out __SP_L__, r28 \n\t" \
  365. "ld r29, x+ \n\t" \
  366. "out __SP_H__, r29 \n\t" \
  367. "pop r31 \n\t" \
  368. "pop r30 \n\t" \
  369. "pop r29 \n\t" \
  370. "pop r28 \n\t" \
  371. "pop r27 \n\t" \
  372. "pop r26 \n\t" \
  373. "pop r25 \n\t" \
  374. "pop r24 \n\t" \
  375. "pop r23 \n\t" \
  376. "pop r22 \n\t" \
  377. "pop r21 \n\t" \
  378. "pop r20 \n\t" \
  379. "pop r19 \n\t" \
  380. "pop r18 \n\t" \
  381. "pop r17 \n\t" \
  382. "pop r16 \n\t" \
  383. "pop r15 \n\t" \
  384. "pop r14 \n\t" \
  385. "pop r13 \n\t" \
  386. "pop r12 \n\t" \
  387. "pop r11 \n\t" \
  388. "pop r10 \n\t" \
  389. "pop r9 \n\t" \
  390. "pop r8 \n\t" \
  391. "pop r7 \n\t" \
  392. "pop r6 \n\t" \
  393. "pop r5 \n\t" \
  394. "pop r4 \n\t" \
  395. "pop r3 \n\t" \
  396. "pop r2 \n\t" \
  397. "pop __zero_reg__ \n\t" \
  398. "pop __tmp_reg__ \n\t" \
  399. "out 0x3C, __tmp_reg__ \n\t" \
  400. "pop __tmp_reg__ \n\t" \
  401. "out 0x3B, __tmp_reg__ \n\t" \
  402. "pop __tmp_reg__ \n\t" \
  403. "out __SREG__, __tmp_reg__ \n\t" \
  404. "pop __tmp_reg__ \n\t" \
  405. );
  406. #elif defined( __AVR_HAVE_RAMPZ__ )
  407. /* 2-Byte PC Restore with RAMPZ */
  408. #define portRESTORE_CONTEXT() \
  409. __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
  410. "lds r27, pxCurrentTCB + 1 \n\t" \
  411. "ld r28, x+ \n\t" \
  412. "out __SP_L__, r28 \n\t" \
  413. "ld r29, x+ \n\t" \
  414. "out __SP_H__, r29 \n\t" \
  415. "pop r31 \n\t" \
  416. "pop r30 \n\t" \
  417. "pop r29 \n\t" \
  418. "pop r28 \n\t" \
  419. "pop r27 \n\t" \
  420. "pop r26 \n\t" \
  421. "pop r25 \n\t" \
  422. "pop r24 \n\t" \
  423. "pop r23 \n\t" \
  424. "pop r22 \n\t" \
  425. "pop r21 \n\t" \
  426. "pop r20 \n\t" \
  427. "pop r19 \n\t" \
  428. "pop r18 \n\t" \
  429. "pop r17 \n\t" \
  430. "pop r16 \n\t" \
  431. "pop r15 \n\t" \
  432. "pop r14 \n\t" \
  433. "pop r13 \n\t" \
  434. "pop r12 \n\t" \
  435. "pop r11 \n\t" \
  436. "pop r10 \n\t" \
  437. "pop r9 \n\t" \
  438. "pop r8 \n\t" \
  439. "pop r7 \n\t" \
  440. "pop r6 \n\t" \
  441. "pop r5 \n\t" \
  442. "pop r4 \n\t" \
  443. "pop r3 \n\t" \
  444. "pop r2 \n\t" \
  445. "pop __zero_reg__ \n\t" \
  446. "pop __tmp_reg__ \n\t" \
  447. "out 0x3B, __tmp_reg__ \n\t" \
  448. "pop __tmp_reg__ \n\t" \
  449. "out __SREG__, __tmp_reg__ \n\t" \
  450. "pop __tmp_reg__ \n\t" \
  451. );
  452. #else /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
  453. /* 2-Byte PC Restore */
  454. #define portRESTORE_CONTEXT() \
  455. __asm__ __volatile__ ( "lds r26, pxCurrentTCB \n\t" \
  456. "lds r27, pxCurrentTCB + 1 \n\t" \
  457. "ld r28, x+ \n\t" \
  458. "out __SP_L__, r28 \n\t" \
  459. "ld r29, x+ \n\t" \
  460. "out __SP_H__, r29 \n\t" \
  461. "pop r31 \n\t" \
  462. "pop r30 \n\t" \
  463. "pop r29 \n\t" \
  464. "pop r28 \n\t" \
  465. "pop r27 \n\t" \
  466. "pop r26 \n\t" \
  467. "pop r25 \n\t" \
  468. "pop r24 \n\t" \
  469. "pop r23 \n\t" \
  470. "pop r22 \n\t" \
  471. "pop r21 \n\t" \
  472. "pop r20 \n\t" \
  473. "pop r19 \n\t" \
  474. "pop r18 \n\t" \
  475. "pop r17 \n\t" \
  476. "pop r16 \n\t" \
  477. "pop r15 \n\t" \
  478. "pop r14 \n\t" \
  479. "pop r13 \n\t" \
  480. "pop r12 \n\t" \
  481. "pop r11 \n\t" \
  482. "pop r10 \n\t" \
  483. "pop r9 \n\t" \
  484. "pop r8 \n\t" \
  485. "pop r7 \n\t" \
  486. "pop r6 \n\t" \
  487. "pop r5 \n\t" \
  488. "pop r4 \n\t" \
  489. "pop r3 \n\t" \
  490. "pop r2 \n\t" \
  491. "pop __zero_reg__ \n\t" \
  492. "pop __tmp_reg__ \n\t" \
  493. "out __SREG__, __tmp_reg__ \n\t" \
  494. "pop __tmp_reg__ \n\t" \
  495. );
  496. #endif /* if defined( __AVR_3_BYTE_PC__ ) && defined( __AVR_HAVE_RAMPZ__ ) */
  497. /*-----------------------------------------------------------*/
  498. /*
  499. * Perform hardware setup to enable ticks from relevant Timer.
  500. */
  501. static void prvSetupTimerInterrupt( void );
  502. /*-----------------------------------------------------------*/
  503. /*
  504. * See header file for description.
  505. */
  506. StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
  507. TaskFunction_t pxCode,
  508. void * pvParameters )
  509. {
  510. uint16_t usAddress;
  511. /* Simulate how the stack would look after a call to vPortYield() generated by
  512. * the compiler. */
  513. /* The start of the task code will be popped off the stack last, so place
  514. * it on first. */
  515. usAddress = ( uint16_t ) pxCode;
  516. *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
  517. pxTopOfStack--;
  518. usAddress >>= 8;
  519. *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
  520. pxTopOfStack--;
  521. #if defined( __AVR_3_BYTE_PC__ )
  522. /* The AVR ATmega2560/ATmega2561 have 256KBytes of program memory and a 17-bit
  523. * program counter. When a code address is stored on the stack, it takes 3 bytes
  524. * instead of 2 for the other ATmega* chips.
  525. *
  526. * Store 0 as the top byte since we force all task routines to the bottom 128K
  527. * of flash. We do this by using the .lowtext label in the linker script.
  528. *
  529. * In order to do this properly, we would need to get a full 3-byte pointer to
  530. * pxCode. That requires a change to GCC. Not likely to happen any time soon.
  531. */
  532. *pxTopOfStack = 0;
  533. pxTopOfStack--;
  534. #endif
  535. /* Next simulate the stack as if after a call to portSAVE_CONTEXT().
  536. * portSAVE_CONTEXT places the flags on the stack immediately after r0
  537. * to ensure the interrupts get disabled as soon as possible, and so ensuring
  538. * the stack use is minimal should a context switch interrupt occur. */
  539. *pxTopOfStack = ( StackType_t ) 0x00; /* R0 */
  540. pxTopOfStack--;
  541. *pxTopOfStack = portFLAGS_INT_ENABLED;
  542. pxTopOfStack--;
  543. #if defined( __AVR_3_BYTE_PC__ )
  544. /* If we have an ATmega256x, we are also saving the EIND register.
  545. * We should default to 0.
  546. */
  547. *pxTopOfStack = ( StackType_t ) 0x00; /* EIND */
  548. pxTopOfStack--;
  549. #endif
  550. #if defined( __AVR_HAVE_RAMPZ__ )
  551. /* We are saving the RAMPZ register.
  552. * We should default to 0.
  553. */
  554. *pxTopOfStack = ( StackType_t ) 0x00; /* RAMPZ */
  555. pxTopOfStack--;
  556. #endif
  557. /* Now the remaining registers. The compiler expects R1 to be 0. */
  558. *pxTopOfStack = ( StackType_t ) 0x00; /* R1 */
  559. /* Leave R2 - R23 untouched */
  560. pxTopOfStack -= 23;
  561. /* Place the parameter on the stack in the expected location. */
  562. usAddress = ( uint16_t ) pvParameters;
  563. *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
  564. pxTopOfStack--;
  565. usAddress >>= 8;
  566. *pxTopOfStack = ( StackType_t ) ( usAddress & ( uint16_t ) 0x00ff );
  567. /* Leave register R26 - R31 untouched */
  568. pxTopOfStack -= 7;
  569. return pxTopOfStack;
  570. }
  571. /*-----------------------------------------------------------*/
  572. BaseType_t xPortStartScheduler( void )
  573. {
  574. /* Setup the relevant timer hardware to generate the tick. */
  575. prvSetupTimerInterrupt();
  576. /* Restore the context of the first task that is going to run. */
  577. portRESTORE_CONTEXT();
  578. /* Simulate a function call end as generated by the compiler. We will now
  579. * jump to the start of the task the context of which we have just restored. */
  580. __asm__ __volatile__ ( "ret" );
  581. /* Should not get here. */
  582. return pdTRUE;
  583. }
  584. /*-----------------------------------------------------------*/
  585. void vPortEndScheduler( void )
  586. {
  587. /* It is unlikely that the ATmega port will get stopped. */
  588. }
  589. /*-----------------------------------------------------------*/
  590. /*
  591. * Manual context switch. The first thing we do is save the registers so we
  592. * can use a naked attribute.
  593. */
  594. void vPortYield( void ) __attribute__( ( hot, flatten, naked ) );
  595. void vPortYield( void )
  596. {
  597. portSAVE_CONTEXT();
  598. vTaskSwitchContext();
  599. portRESTORE_CONTEXT();
  600. __asm__ __volatile__ ( "ret" );
  601. }
  602. /*-----------------------------------------------------------*/
  603. /*
  604. * Manual context switch callable from ISRs. The first thing we do is save
  605. * the registers so we can use a naked attribute.
  606. */
  607. void vPortYieldFromISR( void ) __attribute__( ( hot, flatten, naked ) );
  608. void vPortYieldFromISR( void )
  609. {
  610. portSAVE_CONTEXT();
  611. vTaskSwitchContext();
  612. portRESTORE_CONTEXT();
  613. __asm__ __volatile__ ( "reti" );
  614. }
  615. /*-----------------------------------------------------------*/
  616. /*
  617. * Context switch function used by the tick. This must be identical to
  618. * vPortYield() from the call to vTaskSwitchContext() onwards. The only
  619. * difference from vPortYield() is the tick count is incremented as the
  620. * call comes from the tick ISR.
  621. */
  622. void vPortYieldFromTick( void ) __attribute__( ( hot, flatten, naked ) );
  623. void vPortYieldFromTick( void )
  624. {
  625. portSAVE_CONTEXT();
  626. if( xTaskIncrementTick() != pdFALSE )
  627. {
  628. vTaskSwitchContext();
  629. }
  630. portRESTORE_CONTEXT();
  631. __asm__ __volatile__ ( "ret" );
  632. }
  633. /*-----------------------------------------------------------*/
  634. #if defined( portUSE_WDTO )
  635. /*
  636. * Setup WDT to generate a tick interrupt.
  637. */
  638. void prvSetupTimerInterrupt( void )
  639. {
  640. /* reset watchdog */
  641. wdt_reset();
  642. /* set up WDT Interrupt (rather than the WDT Reset). */
  643. wdt_interrupt_enable( portUSE_WDTO );
  644. }
  645. #elif defined( portUSE_TIMER0 )
  646. /*
  647. * Setup Timer0 compare match A to generate a tick interrupt.
  648. */
  649. static void prvSetupTimerInterrupt( void )
  650. {
  651. uint32_t ulCompareMatch;
  652. uint8_t ucLowByte;
  653. /* Using 8bit Timer0 to generate the tick. Correct fuses must be
  654. * selected for the configCPU_CLOCK_HZ clock.*/
  655. ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ;
  656. /* We only have 8 bits so have to scale 1024 to get our required tick rate. */
  657. ulCompareMatch /= portCLOCK_PRESCALER;
  658. /* Adjust for correct value. */
  659. ulCompareMatch -= ( uint32_t ) 1;
  660. /* Setup compare match value for compare match A. Interrupts are disabled
  661. * before this is called so we need not worry here. */
  662. ucLowByte = ( uint8_t ) ( ulCompareMatch & ( uint32_t ) 0xff );
  663. portOCRL = ucLowByte;
  664. /* Setup clock source and compare match behaviour. */
  665. portTCCRa = portCLEAR_COUNTER_ON_MATCH;
  666. portTCCRb = portPRESCALE_1024;
  667. /* Enable the interrupt - this is okay as interrupt are currently globally disabled. */
  668. ucLowByte = portTIMSK;
  669. ucLowByte |= portCOMPARE_MATCH_A_INTERRUPT_ENABLE;
  670. portTIMSK = ucLowByte;
  671. }
  672. #endif /* if defined( portUSE_WDTO ) */
  673. /*-----------------------------------------------------------*/
  674. #if configUSE_PREEMPTION == 1
  675. /*
  676. * Tick ISR for preemptive scheduler. We can use a naked attribute as
  677. * the context is saved at the start of vPortYieldFromTick(). The tick
  678. * count is incremented after the context is saved.
  679. *
  680. * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
  681. *
  682. */
  683. ISR( portSCHEDULER_ISR, ISR_NAKED ) __attribute__( ( hot, flatten ) );
  684. /* ISR(portSCHEDULER_ISR, ISR_NAKED ISR_NOBLOCK) __attribute__ ((hot, flatten));
  685. */
  686. ISR( portSCHEDULER_ISR )
  687. {
  688. vPortYieldFromTick();
  689. __asm__ __volatile__ ( "reti" );
  690. }
  691. #else /* if configUSE_PREEMPTION == 1 */
  692. /*
  693. * Tick ISR for the cooperative scheduler. All this does is increment the
  694. * tick count. We don't need to switch context, this can only be done by
  695. * manual calls to taskYIELD();
  696. *
  697. * use ISR_NOBLOCK where there is an important timer running, that should preempt the scheduler.
  698. */
  699. ISR( portSCHEDULER_ISR ) __attribute__( ( hot, flatten ) );
  700. /* ISR(portSCHEDULER_ISR, ISR_NOBLOCK) __attribute__ ((hot, flatten));
  701. */
  702. ISR( portSCHEDULER_ISR )
  703. {
  704. xTaskIncrementTick();
  705. }
  706. #endif /* if configUSE_PREEMPTION == 1 */