Seeed_SHT35.cpp 7.5 KB

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  1. /*
  2. Seeed_SHT35.cpp
  3. Driver for SHT35
  4. Copyright (c) 2018 Seeed Technology Co., Ltd.
  5. Website : www.seeed.cc
  6. Author : downey
  7. Create Time: May 2018
  8. Change Log :
  9. The MIT License (MIT)
  10. Permission is hereby granted, free of charge, to any person obtaining a copy
  11. of this software and associated documentation files (the "Software"), to deal
  12. in the Software without restriction, including without limitation the rights
  13. to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  14. copies of the Software, and to permit persons to whom the Software is
  15. furnished to do so, subject to the following conditions:
  16. The above copyright notice and this permission notice shall be included in
  17. all copies or substantial portions of the Software.
  18. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23. OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24. THE SOFTWARE.
  25. */
  26. #include "Seeed_SHT35.h"
  27. SHT35::SHT35(u8 scl_pin, u8 IIC_ADDR) {
  28. set_iic_addr(IIC_ADDR);
  29. set_scl_pin(scl_pin);
  30. CLK_STRCH_STAT = CLK_STRETCH_DISABLE;
  31. }
  32. sht_err_t SHT35::init() {
  33. sht_err_t ret = NO_ERROR;
  34. IIC_begin();
  35. ret = soft_reset();
  36. return ret;
  37. }
  38. sht_err_t SHT35::soft_reset() {
  39. sht_err_t ret = NO_ERROR;
  40. ret = send_command(CMD_SOFT_RST);
  41. return ret;
  42. }
  43. sht_err_t SHT35::read_meas_data_single_shot(u16 cfg_cmd, float* temp, float* hum) {
  44. sht_err_t ret = NO_ERROR;
  45. u8 data[6] = {0};
  46. u16 temp_hex = 0, hum_hex = 0;
  47. CHECK_RESULT(ret, send_command(cfg_cmd));
  48. CHECK_RESULT(ret, read_bytes(data, sizeof(data), CLK_STRCH_STAT));
  49. temp_hex = (data[0] << 8) | data[1];
  50. hum_hex = (data[3] << 8) | data[4];
  51. *temp = get_temp(temp_hex);
  52. *hum = get_hum(hum_hex);
  53. return ret;
  54. }
  55. float SHT35::get_temp(u16 temp) {
  56. return (temp / 65535.00) * 175 - 45;
  57. }
  58. float SHT35::get_hum(u16 hum) {
  59. return (hum / 65535.0) * 100.0;
  60. }
  61. u16 SHT35::temp_to_hex(float temp) {
  62. return (u16)((temp + 45) * 65535.0 / 175);
  63. }
  64. u16 SHT35::hum_to_hex(float hum) {
  65. return (u16)(hum / 100.0 * 65535);
  66. }
  67. /******************************************************STATUS REG**************************************************/
  68. /******************************************************STATUS REG**************************************************/
  69. sht_err_t SHT35::read_reg_status(u16* value) {
  70. sht_err_t ret = NO_ERROR;
  71. *value = 0;
  72. u8 stat[3] = {0};
  73. CHECK_RESULT(ret, send_command(CMD_READ_SREG));
  74. CHECK_RESULT(ret, request_bytes(stat, sizeof(stat)));
  75. *value |= (u16)stat[0] << 8;
  76. *value |= stat[1];
  77. return ret;
  78. }
  79. sht_err_t SHT35::heaterStatus(u16 status, bool stat) {
  80. stat = ((status >> 13) & 0x01);
  81. return NO_ERROR;
  82. }
  83. sht_err_t SHT35::heaterStatus(bool stat) {
  84. sht_err_t ret = NO_ERROR;
  85. u16 status = 0;
  86. CHECK_RESULT(ret, read_reg_status(&status));
  87. stat = ((status >> 13) & 0x01);
  88. return ret;
  89. }
  90. /****************************************************/
  91. sht_err_t SHT35::reset_check(u16 status, bool stat) {
  92. stat = ((stat >> 4) & 0x01);
  93. return NO_ERROR;
  94. }
  95. sht_err_t SHT35::reset_check(bool stat) {
  96. sht_err_t ret = NO_ERROR;
  97. u16 status = 0;
  98. CHECK_RESULT(ret, read_reg_status(&status));
  99. stat = ((stat >> 4) & 0x01);
  100. return ret;
  101. }
  102. /****************************************************/
  103. sht_err_t SHT35::cmd_excu_stat(u16 status, bool stat) {
  104. stat = ((stat >> 1) & 0x01);
  105. return NO_ERROR;
  106. }
  107. sht_err_t SHT35::cmd_excu_stat(bool stat) {
  108. sht_err_t ret = NO_ERROR;
  109. u16 status = 0;
  110. CHECK_RESULT(ret, read_reg_status(&status));
  111. stat = ((stat >> 1) & 0x01);
  112. return ret;
  113. }
  114. /****************************************************/
  115. sht_err_t SHT35::last_write_checksum(u16 status, bool stat) {
  116. stat = ((status >> 0) & 0x01);
  117. return NO_ERROR;
  118. }
  119. sht_err_t SHT35::last_write_checksum(bool stat) {
  120. sht_err_t ret = NO_ERROR;
  121. u16 status = 0;
  122. CHECK_RESULT(ret, read_reg_status(&status));
  123. stat = ((stat >> 0) & 0x01);
  124. return ret;
  125. }
  126. /***********************************************************************************************/
  127. /**************************************EXEC COMMAND*********************************************/
  128. sht_err_t SHT35::change_heater_status(bool stat) {
  129. sht_err_t ret = NO_ERROR;
  130. if (stat) {
  131. ret = send_command(CMD_HEATER_ON);
  132. } else {
  133. ret = send_command(CMD_HEATER_OFF);
  134. }
  135. return ret;
  136. }
  137. /***********************************************************************************************/
  138. /*****************************************IIC OPRT**********************************************/
  139. u8 SHT_IIC_OPRTS::crc8(const u8* data, int len) {
  140. const u8 POLYNOMIAL = 0x31;
  141. u8 crc = 0xFF;
  142. for (int j = len; j; --j) {
  143. crc ^= *data++;
  144. for (int i = 8; i; --i) {
  145. crc = (crc & 0x80)
  146. ? (crc << 1) ^ POLYNOMIAL
  147. : (crc << 1);
  148. }
  149. }
  150. return crc;
  151. }
  152. sht_err_t SHT_IIC_OPRTS::send_command(u16 cmd) {
  153. s32 ret = 0;
  154. Wire.beginTransmission(_IIC_ADDR);
  155. Wire.write((cmd >> 8) & 0xFF);
  156. Wire.write(cmd & 0xFF);
  157. ret = Wire.endTransmission();
  158. if (!ret) {
  159. return NO_ERROR;
  160. } else {
  161. return ERROR_COMM;
  162. }
  163. }
  164. sht_err_t SHT_IIC_OPRTS::I2C_write_bytes(u16 cmd, u8* data, u32 len) {
  165. u8 crc = 0;
  166. s32 ret = 0;
  167. crc = crc8(data, len);
  168. Wire.beginTransmission(_IIC_ADDR);
  169. Wire.write((cmd >> 8) & 0xFF);
  170. Wire.write(cmd & 0xFF);
  171. //Wire.beginTransmission(_IIC_ADDR);
  172. for (int i = 0; i < len; i++) {
  173. Wire.write(data[i]);
  174. }
  175. Wire.write(crc);
  176. ret = Wire.endTransmission();
  177. if (!ret) {
  178. return NO_ERROR;
  179. } else {
  180. return ERROR_COMM;
  181. }
  182. }
  183. sht_err_t SHT_IIC_OPRTS::request_bytes(u8* data, u16 data_len) {
  184. sht_err_t ret = NO_ERROR;
  185. u32 time_out_count = 0;
  186. Wire.requestFrom(_IIC_ADDR, data_len);
  187. while (data_len != Wire.available()) {
  188. time_out_count++;
  189. if (time_out_count > 10) {
  190. return ERROR_COMM;
  191. }
  192. delay(1);
  193. }
  194. for (int i = 0; i < data_len; i++) {
  195. data[i] = Wire.read();
  196. }
  197. return NO_ERROR;
  198. }
  199. /*SHT3X device is different from other general IIC device.*/
  200. sht_err_t SHT_IIC_OPRTS::read_bytes(u8* data, u32 data_len, clk_skch_t clk_strch_stat) {
  201. sht_err_t ret = NO_ERROR;
  202. u32 time_out_count = 0;
  203. if (clk_strch_stat == CLK_STRETCH_ENABLE) {
  204. while (0 == digitalRead(SCK_PIN)) {
  205. yield();
  206. }
  207. } else {
  208. Wire.beginTransmission(_IIC_ADDR);
  209. while (Wire.endTransmission() == NACK_ON_ADDR) {
  210. Wire.beginTransmission(_IIC_ADDR);
  211. }
  212. }
  213. Wire.requestFrom(_IIC_ADDR, data_len);
  214. while (data_len != Wire.available()) {
  215. time_out_count++;
  216. if (time_out_count > 10) {
  217. return ERROR_COMM;
  218. }
  219. delay(1);
  220. }
  221. for (int i = 0; i < data_len; i++) {
  222. data[i] = Wire.read();
  223. }
  224. return NO_ERROR;
  225. }
  226. void SHT_IIC_OPRTS::set_scl_pin(u8 scl) {
  227. SCK_PIN = scl;
  228. }
  229. /** @brief change the I2C address from default.
  230. @param IIC_ADDR: I2C address to be set
  231. * */
  232. void SHT_IIC_OPRTS::set_iic_addr(u8 IIC_ADDR) {
  233. _IIC_ADDR = IIC_ADDR;
  234. }