Add thumb target, implement xtensa invokeNative asm code and update makefiles (#151)

core/iwasm/lib/native/libc/wasmtime-wasi-c/sandboxed-system-primitives/src/posix.c

@@ -557,6 +557,11 @@ static int fd_number(
   return number;
 }
 
+#define CLOSE_NON_STD_FD(fd) do {  \
+    if (fd > 2)                    \
+      close(fd);                   \
+  } while (0)
+
 // Lowers the reference count on a file descriptor object. When the
 // reference count reaches zero, its resources are cleaned up.
 static void fd_object_release(
@@ -569,13 +574,13 @@ static void fd_object_release(
         // closedir() on it also closes the underlying file descriptor.
         mutex_destroy(&fo->directory.lock);
         if (fo->directory.handle == NULL) {
-          close(fd_number(fo));
+          CLOSE_NON_STD_FD(fd_number(fo));
         } else {
           closedir(fo->directory.handle);
         }
         break;
       default:
-        close(fd_number(fo));
+        CLOSE_NON_STD_FD(fd_number(fo));
         break;
     }
     bh_free(fo);

core/iwasm/products/alios-things/iwasm.mk → core/iwasm/products/alios-things/aos.mk

@@ -5,6 +5,33 @@ NAME := iwasm
 IWASM_ROOT := iwasm
 SHARED_LIB_ROOT := shared-lib
 
+# Change it to THUMBV7M if you want to build for developerkit
+BUILD_TARGET := X86_32
+
+ifeq (${BUILD_TARGET}, X86_32)
+  GLOBAL_DEFINES += BUILD_TARGET_X86_32
+  INVOKE_NATIVE := invokeNative_ia32.s
+else ifeq (${BUILD_TARGET}, X86_64)
+  GLOBAL_DEFINES += BUILD_TARGET_X86_64
+  INVOKE_NATIVE := invokeNative_em64.s
+else ifeq ($(findstring ARM,$(BUILD_TARGET)), ARM)
+  GLOBAL_DEFINES += BUILD_TARGET_ARM
+  GLOBAL_DEFINES += BUILD_TARGET=${BUILD_TARGET}
+  INVOKE_NATIVE := invokeNative_arm.s
+else ifeq ($(findstring THUMB,$(BUILD_TARGET)), THUMB)
+  GLOBAL_DEFINES += BUILD_TARGET_THUMB
+  GLOBAL_DEFINES += BUILD_TARGET=${BUILD_TARGET}
+  INVOKE_NATIVE := invokeNative_thumb.s
+else ifeq (${BUILD_TARGET}, MIPS)
+  GLOBAL_DEFINES += BUILD_TARGET_MIPS
+  INVOKE_NATIVE := invokeNative_mips.s
+else ifeq (${BUILD_TARGET}, XTENSA)
+  GLOBAL_DEFINES += BUILD_TARGET_XTENSA
+  INVOKE_NATIVE := invokeNative_xtensa.s
+else
+  $(error Build target isn't set)
+endif
+
 GLOBAL_DEFINES += NVALGRIND
 GLOBAL_INCLUDES += ${IWASM_ROOT}/runtime/include \
                    ${IWASM_ROOT}/runtime/platform/include \
@@ -21,7 +48,7 @@ $(NAME)_SOURCES := ${IWASM_ROOT}/runtime/utils/wasm_hashmap.c \
                    ${IWASM_ROOT}/runtime/vmcore-wasm/wasm_interp.c \
                    ${IWASM_ROOT}/runtime/vmcore-wasm/wasm_loader.c \
                    ${IWASM_ROOT}/runtime/vmcore-wasm/wasm_runtime.c \
-                   ${IWASM_ROOT}/runtime/vmcore-wasm/invokeNative_general.c \
+                   ${IWASM_ROOT}/runtime/vmcore-wasm/${INVOKE_NATIVE} \
                    ${IWASM_ROOT}/lib/native/libc/libc_builtin_wrapper.c \
                    ${IWASM_ROOT}/lib/native/base/base_lib_export.c \
                    ${SHARED_LIB_ROOT}/platform/alios/bh_platform.c \

core/iwasm/products/darwin/CMakeLists.txt

@@ -16,7 +16,7 @@ if (NOT ("$ENV{VALGRIND}" STREQUAL "YES"))
 endif ()
 
 # Set BUILD_TARGET, currently values supported:
-# "X86_64", "AMD_64", "X86_32", "ARM_32", "MIPS_32", "XTENSA_32"
+# "X86_64", "AMD_64", "X86_32", "ARM[sub]", "THUMB[sub]", "MIPS", "XTENSA"
 if (NOT DEFINED BUILD_TARGET)
   if (CMAKE_SIZEOF_VOID_P EQUAL 8)
     # Build as X86_64 by default in 64-bit platform
@@ -36,12 +36,16 @@ elseif (BUILD_TARGET STREQUAL "AMD_64")
   add_definitions(-DBUILD_TARGET_AMD_64)
 elseif (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

core/iwasm/products/linux/CMakeLists.txt

@@ -16,7 +16,7 @@ if (NOT ("$ENV{VALGRIND}" STREQUAL "YES"))
 endif ()
 
 # Set BUILD_TARGET, currently values supported:
-# "X86_64", "AMD_64", "X86_32", "ARM_32", "MIPS_32", "XTENSA_32"
+# "X86_64", "AMD_64", "X86_32", "ARM[sub]", "THUMB[sub]", "MIPS", "XTENSA"
 if (NOT DEFINED BUILD_TARGET)
   if (CMAKE_SIZEOF_VOID_P EQUAL 8)
     # Build as X86_64 by default in 64-bit platform
@@ -36,12 +36,16 @@ elseif (BUILD_TARGET STREQUAL "AMD_64")
   add_definitions(-DBUILD_TARGET_AMD_64)
 elseif (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

core/iwasm/products/vxworks/CMakeLists.txt

@@ -21,7 +21,7 @@ if (NOT ("$ENV{VALGRIND}" STREQUAL "YES"))
 endif ()
 
 # Set BUILD_TARGET, currently values supported:
-# "X86_64", "AMD_64", "X86_32", "ARM_32", "MIPS_32", "XTENSA_32", "GENERAL"
+# "X86_64", "AMD_64", "X86_32", "ARM[sub]", "THUMB[sub]", "MIPS", "XTENSA"
 #set (BUILD_TARGET "X86_64")
 
 if (NOT DEFINED BUILD_TARGET)
@@ -45,20 +45,16 @@ elseif (BUILD_TARGET STREQUAL "AMD_64")
   add_definitions(-DBUILD_TARGET_AMD_64)
 elseif (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
-elseif (BUILD_TARGET STREQUAL "GENERAL")
-  # Will use invokeNative_general.c instead of assembly code,
-  # but the maximum number of native arguments is limited to 20,
-  # and there are possible issues when passing arguments to
-  # native function for some cpus, e.g. int64 and double arguments
-  # in arm and mips need to be 8-bytes aligned, and some arguments
-  # of x86_64 are passed by registers but not stack
-  add_definitions(-DBUILD_TARGET_GENERAL)
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

core/iwasm/products/zephyr/simple/CMakeLists.txt

@@ -12,8 +12,8 @@ set (PLATFORM "zephyr")
 
 add_definitions (-DNVALGRIND)
 
-# Build as X86_32 by default, change to "ARM_32", "MIPS_32" or "XTENSA_32"
-# if we want to support arm, mips or xtensa
+# Build as X86_32 by default, change to "ARM[sub]", "THUMB[sub]", "MIPS" or "XTENSA"
+# if we want to support arm, thumb, mips or xtensa
 if (NOT DEFINED BUILD_TARGET)
   set (BUILD_TARGET "X86_32")
 endif ()
@@ -22,12 +22,16 @@ string(TOUPPER ${BUILD_TARGET} BUILD_TARGET)
 
 if (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

core/iwasm/runtime/include/wasm_export.h

@@ -113,9 +113,9 @@ wasm_runtime_unload(wasm_module_t module);
 #if WASM_ENABLE_WASI != 0
 void
 wasm_runtime_set_wasi_args(wasm_module_t module,
-                           const char *dir_list[], uint32 dir_count,
-                           const char *map_dir_list[], uint32 map_dir_count,
-                           const char *env[], uint32 env_count,
+                           const char *dir_list[], uint32_t dir_count,
+                           const char *map_dir_list[], uint32_t map_dir_count,
+                           const char *env[], uint32_t env_count,
                            char *argv[], int argc);
 #endif
 

core/iwasm/runtime/vmcore-wasm/invokeNative_arm.s

@@ -10,54 +10,59 @@
 /*
  * Arguments passed in:
  *
- * r0 function pntr
+ * r0 function ptr
  * r1 argv
  * r2 argc
  */
 
 invokeNative:
         stmfd   sp!, {r4, r5, r6, r7, lr}
-        mov     ip, r0           /* get function ptr */
-        mov     r4, r1           /* get argv */
-        mov     r5, r2           /* get argc */
+        mov     ip, r0          /* ip = function ptr */
+        mov     r4, r1          /* r4 = argv */
+        mov     r5, r2          /* r5 = argc */
 
-        cmp     r5, #2           /* is argc < 2 ? */
+        cmp     r5, #1          /* at least one argument required: module_inst */
         blt     return
 
-        ldr     r0, [r4], #4     /* argv[0] */
-        ldr     r1, [r4], #4     /* argv[1] */
+        mov     r6, #0          /* increased stack size */
 
-        mov     r6, #0
+        ldr     r0, [r4], #4    /* r0 = argv[0] = module_inst */
+        cmp     r5, #1
+        beq     call_func
 
+        ldr     r1, [r4], #4    /* r1 = argv[1] */
         cmp     r5, #2
         beq     call_func
-        ldr     r2, [r4], #4
+
+        ldr     r2, [r4], #4    /* r2 = argv[2] */
         cmp     r5, #3
         beq     call_func
-        ldr     r3, [r4], #4
 
-        subs    r5, r5, #4       /* now we have r0 ~ r3 */
+        ldr     r3, [r4], #4    /* r3 = argv[3] */
+        cmp     r5, #4
+        beq     call_func
+
+        sub    r5, r5, #4       /* argc -= 4, now we have r0 ~ r3 */
 
         /* Ensure address is 8 byte aligned */
-        mov     r6, r5, lsl#2
-        add     r6, r6, #7
+        mov     r6, r5, lsl#2   /* r6 = argc * 4 */
+        add     r6, r6, #7      /* r6 = (r6 + 7) & ~7 */
         bic     r6, r6, #7
-        add     r6, r6, #4       /* +4 because only odd(5) registers are in stack */
-        subs    sp, sp, r6       /* for stacked args */
+        add     r6, r6, #4      /* +4 because odd(5) registers are in stack */
+        sub     sp, sp, r6      /* reserved stack space for left arguments */
         mov     r7, sp
 
-loop_args:
+loop_args:                      /* copy left arguments to stack */
         cmp     r5, #0
         beq     call_func
         ldr     lr, [r4], #4
         str     lr, [r7], #4
-        subs    r5, r5, #1
+        sub     r5, r5, #1
         b       loop_args
 
 call_func:
         blx     ip
-
-        add     sp, sp, r6       /* recover sp */
+        add     sp, sp, r6       /* restore sp */
 
 return:
         ldmfd   sp!, {r4, r5, r6, r7, lr}

core/iwasm/runtime/vmcore-wasm/invokeNative_thumb.s

@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2019 Intel Corporation.  All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ */
+        .text
+        .align  2
+        .global invokeNative
+        .type   invokeNative,function
+
+/*
+ * Arguments passed in:
+ *
+ * r0 function ptr
+ * r1 argv
+ * r2 argc
+ */
+
+invokeNative:
+        push    {r4, r5, r6, r7}
+        push    {lr}
+        mov     ip, r0          /* ip = function ptr */
+        mov     r4, r1          /* r4 = argv */
+        mov     r5, r2          /* r5 = argc */
+
+        cmp     r5, #1          /* at least one argument required: module_inst */
+        blt     return
+
+        mov     r6, #0          /* increased stack size */
+
+        ldr     r0, [r4]        /* r0 = argv[0] = module_inst */
+        add     r4, r4, #4      /* r4 += 4 */
+        cmp     r5, #1
+        beq     call_func
+
+        ldr     r1, [r4]        /* r1 = argv[1] */
+        add     r4, r4, #4
+        cmp     r5, #2
+        beq     call_func
+
+        ldr     r2, [r4]        /* r2 = argv[2] */
+        add     r4, r4, #4
+        cmp     r5, #3
+        beq     call_func
+
+        ldr     r3, [r4]        /* r3 = argv[3] */
+        add     r4, r4, #4
+        cmp     r5, #4
+        beq     call_func
+
+        sub    r5, r5, #4       /* argc -= 4, now we have r0 ~ r3 */
+
+        /* Ensure address is 8 byte aligned */
+        lsl     r6, r5, #2      /* r6 = argc * 4 */
+        mov     r7, #7
+        add     r6, r6, r7      /* r6 = (r6 + 7) & ~7 */
+        bic     r6, r6, r7
+        add     r6, r6, #4      /* +4 because odd(5) registers are in stack */
+        mov     r7, sp
+        sub     r7, r7, r6      /* reserved stack space for left arguments */
+        mov     sp, r7
+
+        mov     lr, r2          /* save r2 */
+loop_args:                      /* copy left arguments to stack */
+        cmp     r5, #0
+        beq     call_func1
+        ldr     r2, [r4]
+        add     r4, r4, #4
+        str     r2, [r7]
+        add     r7, r7, #4
+        sub     r5, r5, #1
+        b       loop_args
+
+call_func1:
+        mov     r2, lr          /* restore r2 */
+
+call_func:
+        blx     ip
+        add     sp, sp, r6       /* restore sp */
+
+return:
+        pop     {r3}
+        pop     {r4, r5, r6, r7}
+        mov     lr, r3
+        bx      lr

core/iwasm/runtime/vmcore-wasm/invokeNative_xtensa.s

@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2019 Intel Corporation.  All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ */
+        .text
+        .align  2
+        .global invokeNative
+        .type   invokeNative,function
+
+/*
+ * Arguments passed in:
+ *
+ * a2 function pntr
+ * a3 argv
+ * a4 argc
+ */
+
+invokeNative:
+        entry   a1, 256
+
+        blti    a4, 1, return   /* at least one argument required: module_inst */
+
+        /* register a10 ~ a15 are used to pass first 6 arguments */
+
+        l32i.n  a10, a3, 0
+        beqi    a4, 1, call_func
+
+        l32i.n  a11, a3, 4
+        beqi    a4, 2, call_func
+
+        l32i.n  a12, a3, 8
+        beqi    a4, 3, call_func
+
+        l32i.n  a13, a3, 12
+        beqi    a4, 4, call_func
+
+        l32i.n  a14, a3, 16
+        beqi    a4, 5, call_func
+
+        l32i.n  a15, a3, 20
+        beqi    a4, 6, call_func
+
+        /* left arguments are passed through stack */
+
+        addi    a4, a4, -6
+        addi    a3, a3, 24  /* move argv pointer */
+        mov.n   a6, a1      /* store stack pointer */
+        addi    a7, a1, 256 /* stack boundary */
+
+loop_args:
+        beqi    a4, 0,  call_func
+        bge     a6, a7, call_func  /* reach stack boundary */
+
+        l32i.n  a5, a3, 0   /* load argument to a5 */
+        s32i.n  a5, a6, 0   /* push data to stack */
+
+        addi    a4, a4, -1  /* decrease argc */
+        addi    a3, a3, 4   /* move argv pointer */
+        addi    a6, a6, 4   /* move stack pointer */
+
+        j       loop_args
+
+call_func:
+        mov.n   a8, a2
+        callx8  a8
+
+        /* the result returned from callee is stored in a2
+           mov the result to a10 so the caller of this function
+           can receive the value */
+        mov.n   a2, a10
+        mov.n   a3, a11
+
+return:
+        retw.n

core/iwasm/runtime/vmcore-wasm/vmcore.cmake

@@ -13,13 +13,21 @@ if (${BUILD_TARGET} STREQUAL "X86_64" OR ${BUILD_TARGET} STREQUAL "AMD_64")
   set (source_all ${c_source_all} ${VMCORE_LIB_DIR}/invokeNative_em64.s)
 elseif (${BUILD_TARGET} STREQUAL "X86_32")
   set (source_all ${c_source_all} ${VMCORE_LIB_DIR}/invokeNative_ia32.s)
-elseif (${BUILD_TARGET} STREQUAL "ARM_32")
+elseif (${BUILD_TARGET} MATCHES "ARM.*")
   set (source_all ${c_source_all} ${VMCORE_LIB_DIR}/invokeNative_arm.s)
-elseif (${BUILD_TARGET} STREQUAL "MIPS_32")
+elseif (${BUILD_TARGET} MATCHES "THUMB.*")
+  set (source_all ${c_source_all} ${VMCORE_LIB_DIR}/invokeNative_thumb.s)
+elseif (${BUILD_TARGET} STREQUAL "MIPS")
   set (source_all ${c_source_all} ${VMCORE_LIB_DIR}/invokeNative_mips.s)
-elseif (${BUILD_TARGET} STREQUAL "XTENSA_32")
+elseif (${BUILD_TARGET} STREQUAL "XTENSA")
   set (source_all ${c_source_all} ${VMCORE_LIB_DIR}/invokeNative_xtensa.s)
 elseif (${BUILD_TARGET} STREQUAL "GENERAL")
+  # Use invokeNative_general.c instead of assembly code,
+  # but the maximum number of native arguments is limited to 20,
+  # and there are possible issues when passing arguments to
+  # native function for some cpus, e.g. int64 and double arguments
+  # in arm and mips need to be 8-bytes aligned, and some arguments
+  # of x86_64 are passed by registers but not stack
   set (source_all ${c_source_all} ${VMCORE_LIB_DIR}/invokeNative_general.c)
 else ()
   message (FATAL_ERROR "Build target isn't set")

core/iwasm/runtime/vmcore-wasm/wasm_runtime.c

@@ -1680,7 +1680,8 @@ wasm_runtime_invoke_native(void *func_ptr, WASMType *func_type,
     uint32 argv_buf[32], *argv1 = argv_buf, argc1, i, j = 0;
     uint64 size;
 
-#if !defined(BUILD_TARGET_ARM_32) && !defined(BUILD_TARGET_MIPS_32)
+#if !defined(BUILD_TARGET_ARM) && !defined(BUILD_TARGET_MIPS) \
+    && !defined(BUILD_TARGET_THUMB) && !defined(BUILD_TARGET_XTENSA)
     argc1 = argc + 2;
 #else
     argc1 = func_type->param_count * 2 + 2;
@@ -1698,7 +1699,8 @@ wasm_runtime_invoke_native(void *func_ptr, WASMType *func_type,
     for (i = 0; i < sizeof(WASMModuleInstance*) / sizeof(uint32); i++)
         argv1[j++] = ((uint32*)&module_inst)[i];
 
-#if !defined(BUILD_TARGET_ARM_32) && !defined(BUILD_TARGET_MIPS_32)
+#if !defined(BUILD_TARGET_ARM) && !defined(BUILD_TARGET_MIPS) \
+    && !defined(BUILD_TARGET_THUMB) && !defined(BUILD_TARGET_XTENSA)
     word_copy(argv1 + j, argv, argc);
     j += argc;
 #else
@@ -1723,7 +1725,7 @@ wasm_runtime_invoke_native(void *func_ptr, WASMType *func_type,
                 break;
         }
     }
-#endif /* end of !defined(BUILD_TARGET_ARM_32) && !defined(BUILD_TARGET_MIPS_32) */
+#endif /* end of !defined(BUILD_TARGET_ARM) && !defined(BUILD_TARGET_MIPS) */
 
     argc1 = j;
     if (func_type->result_count == 0) {

core/iwasm/runtime/vmcore-wasm/wasm_runtime.h

@@ -330,9 +330,9 @@ wasm_runtime_addr_native_to_app(WASMModuleInstance *module_inst,
 /* See wasm_export.h for description */
 bool
 wasm_runtime_get_app_addr_range(WASMModuleInstance *module_inst,
-                                int32_t app_offset,
-                                int32_t *p_app_start_offset,
-                                int32_t *p_app_end_offset);
+                                int32 app_offset,
+                                int32 *p_app_start_offset,
+                                int32 *p_app_end_offset);
 
 /* See wasm_export.h for description */
 bool

core/shared-lib/include/config.h

@@ -9,19 +9,24 @@
 #if !defined(BUILD_TARGET_X86_64) \
     && !defined(BUILD_TARGET_AMD_64) \
     && !defined(BUILD_TARGET_X86_32) \
-    && !defined(BUILD_TARGET_ARM_32) \
-    && !defined(BUILD_TARGET_MIPS_32) \
-    && !defined(BUILD_TARGET_XTENSA_32)
+    && !defined(BUILD_TARGET_ARM) \
+    && !defined(BUILD_TARGET_THUMB) \
+    && !defined(BUILD_TARGET_MIPS) \
+    && !defined(BUILD_TARGET_XTENSA)
 #if defined(__x86_64__) || defined(__x86_64)
 #define BUILD_TARGET_X86_64
 #elif defined(__amd64__) || defined(__amd64)
 #define BUILD_TARGET_AMD_64
 #elif defined(__i386__) || defined(__i386) || defined(i386)
 #define BUILD_TARGET_X86_32
+#elif defined(__thumb__)
+#define BUILD_TARGET_THUMB
+#define BUILD_TARGET "THUMBV4T"
 #elif defined(__arm__)
-#define BUILD_TARGET_ARM_32
+#define BUILD_TARGET_ARM
+#define BUILD_TARGET "ARMV4T"
 #elif defined(__mips__) || defined(__mips) || defined(mips)
-#define BUILD_TARGET_MIPS_32
+#define BUILD_TARGET_MIPS
 #elif defined(__XTENSA__)
 #define BUILD_TARGET_XTENSA
 #else

core/shared-lib/platform/zephyr/bh_thread.c

@@ -199,7 +199,7 @@ static void vm_thread_cleanup(void)
         while (head) {
             bh_thread_wait_list next = head->next;
             k_sem_give(&head->sem);
-            bh_free(head);
+            /* head will be freed by joining thread */
             head = next;
         }
         thread_data->thread_wait_list = NULL;
@@ -333,6 +333,8 @@ int _vm_thread_join(korp_tid thread, void **value_ptr, int mills)
     /* Wait some time for the thread to be actually terminated */
     k_sleep(100);
 
+    /* Destroy resource */
+    bh_free(node);
     return BHT_OK;
 }
 

doc/build_wamr.md

@@ -150,7 +150,7 @@ AliOS-Things
    ```
 5. create a link to <shared-lib_root_dir> in middleware/iwasm/ and rename it to shared-lib
    ``` Bash
-   ln -s <shared-lib_root_dir> middle/iwasm/shared-lib
+   ln -s <shared-lib_root_dir> middleware/iwasm/shared-lib
    ```
 6. modify file app/example/helloworld/helloworld.c, patch as:
    ``` C
@@ -168,12 +168,25 @@ AliOS-Things
    ``` C
       $(NAME)_COMPONENTS := osal_aos iwasm
    ```
-8. build source code
+8. build source code and run
+   For linuxhost:
+   ``` Bash
+   aos make helloworld@linuxhost -c config
+   aos make
+   ./out/helloworld@linuxhost/binary/helloworld@linuxhost.elf
+   ```
+
+   For developerkit:
+   Modify file middleware/iwasm/aos.mk, patch as:
+   ``` C
+   BUILD_TARGET := THUMBV7M
+   ```
+
    ``` Bash
    aos make helloworld@developerkit -c config
    aos make
    ```
-9. download the binary to developerkit board, check the output from serial port
+   download the binary to developerkit board, check the output from serial port
 
 Docker
 -------------------------

samples/gui/wasm-runtime-wgl/linux-build/CMakeLists.txt

@@ -23,7 +23,7 @@ if (NOT ("$ENV{VALGRIND}" STREQUAL "YES"))
 endif ()
 
 # Set BUILD_TARGET, currently values supported:
-# "X86_64", "AMD_64", "X86_32", "ARM_32", "MIPS_32", "XTENSA_32"
+# "X86_64", "AMD_64", "X86_32", "ARM[sub]", "THUMB[sub]", "MIPS", "XTENSA"
 if (NOT DEFINED BUILD_TARGET)
   if (CMAKE_SIZEOF_VOID_P EQUAL 8)
     # Build as X86_64 by default in 64-bit platform
@@ -43,12 +43,16 @@ elseif (BUILD_TARGET STREQUAL "AMD_64")
   add_definitions(-DBUILD_TARGET_AMD_64)
 elseif (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

samples/gui/wasm-runtime-wgl/zephyr-build/CMakeLists.txt

@@ -16,29 +16,27 @@ zephyr_compile_definitions (-DNVALGRIND
     -Dattr_container_free=bh_free
     -DWASM_ENABLE_GUI=1)
 
-# Build as General by default, change to "ARM_32", "X86_32", "MIPS_32" or "XTENSA_32"
+# Build as THUMB by default
+# change to "ARM[sub]", "THUMB[sub]", "X86_32", "MIPS" or "XTENSA"
 # if we want to support arm_32, x86, mips or xtensa
 if (NOT DEFINED BUILD_TARGET)
-  set (BUILD_TARGET "General")
+  set (BUILD_TARGET "THUMB")
 endif ()
 
 string(TOUPPER ${BUILD_TARGET} BUILD_TARGET)
 
 if (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
-elseif (BUILD_TARGET STREQUAL "GENERAL")
-  # Will use invokeNative_general.c instead of assembly code,
-  # but the maximum number of native arguments is limited to 20,
-  # and there are possible issues when passing arguments to
-  # native function for some cpus, e.g. int64 and double arguments
-  # in arm and mips need to be 8-bytes aligned, and some arguments
-  # of x86_64 are passed by registers but not stack
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

samples/littlevgl/vgl-wasm-runtime/CMakeLists.txt

@@ -13,7 +13,7 @@ if (NOT ("$ENV{VALGRIND}" STREQUAL "YES"))
 endif ()
 
 # Set BUILD_TARGET, currently values supported:
-# "X86_64", "AMD_64", "X86_32", "ARM_32", "MIPS_32", "XTENSA_32"
+# "X86_64", "AMD_64", "X86_32", "ARM[sub]", "THUMB[sub]", "MIPS", "XTENSA"
 if (NOT DEFINED BUILD_TARGET)
   if (CMAKE_SIZEOF_VOID_P EQUAL 8)
     # Build as X86_64 by default in 64-bit platform
@@ -33,12 +33,16 @@ elseif (BUILD_TARGET STREQUAL "AMD_64")
   add_definitions(-DBUILD_TARGET_AMD_64)
 elseif (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

samples/littlevgl/vgl-wasm-runtime/zephyr-build/CMakeLists.txt

@@ -15,29 +15,27 @@ zephyr_compile_definitions (-DNVALGRIND
     -Dattr_container_malloc=bh_malloc
     -Dattr_container_free=bh_free)
 
-# Build as General by default, change to "ARM_32", "X86_32", "MIPS_32" or "XTENSA_32"
+# Build as THUMB by default
+# change to "ARM[sub]", "THUMB[sub]", "X86_32", "MIPS_32" or "XTENSA_32"
 # if we want to support arm_32, x86, mips or xtensa
 if (NOT DEFINED BUILD_TARGET)
-  set (BUILD_TARGET "General")
+  set (BUILD_TARGET "THUMB")
 endif ()
 
 string(TOUPPER ${BUILD_TARGET} BUILD_TARGET)
 
 if (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
-elseif (BUILD_TARGET STREQUAL "GENERAL")
-  # Will use invokeNative_general.c instead of assembly code,
-  # but the maximum number of native arguments is limited to 20,
-  # and there are possible issues when passing arguments to
-  # native function for some cpus, e.g. int64 and double arguments
-  # in arm and mips need to be 8-bytes aligned, and some arguments
-  # of x86_64 are passed by registers but not stack
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()

samples/simple/CMakeLists.txt

@@ -15,7 +15,7 @@ endif ()
 set (BUILD_AS_64BIT_SUPPORT "YES")
 
 # Set BUILD_TARGET, currently values supported:
-# "X86_64", "AMD_64", "X86_32", "ARM_32", "MIPS_32", "XTENSA_32"
+# "X86_64", "AMD_64", "X86_32", "ARM[sub]", "THUMB[sub]", "MIPS", "XTENSA"
 if (NOT DEFINED BUILD_TARGET)
   if (CMAKE_SIZEOF_VOID_P EQUAL 8)
     if (BUILD_AS_64BIT_SUPPORT STREQUAL "YES")
@@ -39,12 +39,16 @@ elseif (BUILD_TARGET STREQUAL "AMD_64")
   add_definitions(-DBUILD_TARGET_AMD_64)
 elseif (BUILD_TARGET STREQUAL "X86_32")
   add_definitions(-DBUILD_TARGET_X86_32)
-elseif (BUILD_TARGET STREQUAL "ARM_32")
-  add_definitions(-DBUILD_TARGET_ARM_32)
-elseif (BUILD_TARGET STREQUAL "MIPS_32")
-  add_definitions(-DBUILD_TARGET_MIPS_32)
-elseif (BUILD_TARGET STREQUAL "XTENSA_32")
-  add_definitions(-DBUILD_TARGET_XTENSA_32)
+elseif (BUILD_TARGET MATCHES "ARM.*")
+  add_definitions(-DBUILD_TARGET_ARM)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET MATCHES "THUMB.*")
+  add_definitions(-DBUILD_TARGET_THUMB)
+  add_definitions(-DBUILD_TARGET="${BUILD_TARGET}")
+elseif (BUILD_TARGET STREQUAL "MIPS")
+  add_definitions(-DBUILD_TARGET_MIPS)
+elseif (BUILD_TARGET STREQUAL "XTENSA")
+  add_definitions(-DBUILD_TARGET_XTENSA)
 else ()
   message (FATAL_ERROR "-- Build target isn't set")
 endif ()