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@@ -6110,7 +6110,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i8x16_lt_u:
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case SIMD_i8x16_lt_u:
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{
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|
{
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|
- SIMD_DOUBLE_OP(simde_wasm_i8x16_lt);
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+ SIMD_DOUBLE_OP(simde_wasm_u8x16_lt);
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break;
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break;
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}
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}
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case SIMD_i8x16_gt_s:
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case SIMD_i8x16_gt_s:
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@@ -6120,7 +6120,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i8x16_gt_u:
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case SIMD_i8x16_gt_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i8x16_gt);
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+ SIMD_DOUBLE_OP(simde_wasm_u8x16_gt);
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break;
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break;
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}
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}
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case SIMD_i8x16_le_s:
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case SIMD_i8x16_le_s:
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@@ -6130,7 +6130,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i8x16_le_u:
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case SIMD_i8x16_le_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i8x16_le);
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+ SIMD_DOUBLE_OP(simde_wasm_u8x16_le);
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break;
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break;
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}
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}
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case SIMD_i8x16_ge_s:
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case SIMD_i8x16_ge_s:
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@@ -6140,7 +6140,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i8x16_ge_u:
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case SIMD_i8x16_ge_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i8x16_ge);
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+ SIMD_DOUBLE_OP(simde_wasm_u8x16_ge);
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break;
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break;
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}
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}
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@@ -6162,7 +6162,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i16x8_lt_u:
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case SIMD_i16x8_lt_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i16x8_lt);
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+ SIMD_DOUBLE_OP(simde_wasm_u16x8_lt);
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break;
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break;
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}
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}
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case SIMD_i16x8_gt_s:
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case SIMD_i16x8_gt_s:
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@@ -6172,7 +6172,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i16x8_gt_u:
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case SIMD_i16x8_gt_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i16x8_gt);
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+ SIMD_DOUBLE_OP(simde_wasm_u16x8_gt);
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break;
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break;
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}
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}
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case SIMD_i16x8_le_s:
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case SIMD_i16x8_le_s:
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@@ -6182,7 +6182,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i16x8_le_u:
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case SIMD_i16x8_le_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i16x8_le);
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+ SIMD_DOUBLE_OP(simde_wasm_u16x8_le);
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break;
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break;
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}
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}
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case SIMD_i16x8_ge_s:
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case SIMD_i16x8_ge_s:
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@@ -6192,7 +6192,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i16x8_ge_u:
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case SIMD_i16x8_ge_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i16x8_ge);
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+ SIMD_DOUBLE_OP(simde_wasm_u16x8_ge);
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break;
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break;
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}
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}
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@@ -6214,7 +6214,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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}
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}
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case SIMD_i32x4_lt_u:
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case SIMD_i32x4_lt_u:
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{
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|
{
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- SIMD_DOUBLE_OP(simde_wasm_i32x4_lt);
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+ SIMD_DOUBLE_OP(simde_wasm_u32x4_lt);
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break;
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break;
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}
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}
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case SIMD_i32x4_gt_s:
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case SIMD_i32x4_gt_s:
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|
@@ -6224,7 +6224,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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|
}
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|
}
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case SIMD_i32x4_gt_u:
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|
case SIMD_i32x4_gt_u:
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{
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{
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- SIMD_DOUBLE_OP(simde_wasm_i32x4_gt);
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+ SIMD_DOUBLE_OP(simde_wasm_u32x4_gt);
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break;
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break;
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}
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}
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|
case SIMD_i32x4_le_s:
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|
case SIMD_i32x4_le_s:
|
|
@@ -6234,7 +6234,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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|
|
}
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|
}
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|
case SIMD_i32x4_le_u:
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|
case SIMD_i32x4_le_u:
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{
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|
{
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|
|
- SIMD_DOUBLE_OP(simde_wasm_i32x4_le);
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+ SIMD_DOUBLE_OP(simde_wasm_u32x4_le);
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break;
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break;
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|
}
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|
}
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|
|
case SIMD_i32x4_ge_s:
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|
case SIMD_i32x4_ge_s:
|
|
@@ -6244,7 +6244,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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|
|
}
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|
}
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|
|
case SIMD_i32x4_ge_u:
|
|
case SIMD_i32x4_ge_u:
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|
|
{
|
|
{
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|
|
- SIMD_DOUBLE_OP(simde_wasm_i32x4_ge);
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|
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+ SIMD_DOUBLE_OP(simde_wasm_u32x4_ge);
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|
break;
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|
break;
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|
}
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|
}
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|
@@ -6283,32 +6283,32 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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/* f64x2 comparison operations */
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/* f64x2 comparison operations */
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case SIMD_f64x2_eq:
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case SIMD_f64x2_eq:
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{
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|
{
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- SIMD_DOUBLE_OP(simde_wasm_f32x4_eq);
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+ SIMD_DOUBLE_OP(simde_wasm_f64x2_eq);
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break;
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break;
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|
}
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|
}
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|
case SIMD_f64x2_ne:
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|
case SIMD_f64x2_ne:
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{
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|
{
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|
- SIMD_DOUBLE_OP(simde_wasm_f32x4_ne);
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+ SIMD_DOUBLE_OP(simde_wasm_f64x2_ne);
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|
break;
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|
break;
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|
}
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|
}
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|
case SIMD_f64x2_lt:
|
|
case SIMD_f64x2_lt:
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|
|
{
|
|
{
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|
|
- SIMD_DOUBLE_OP(simde_wasm_f32x4_lt);
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|
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|
+ SIMD_DOUBLE_OP(simde_wasm_f64x2_lt);
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|
break;
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|
break;
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|
}
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|
}
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|
case SIMD_f64x2_gt:
|
|
case SIMD_f64x2_gt:
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|
|
{
|
|
{
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|
|
- SIMD_DOUBLE_OP(simde_wasm_f32x4_gt);
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|
|
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|
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+ SIMD_DOUBLE_OP(simde_wasm_f64x2_gt);
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|
break;
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|
break;
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|
|
}
|
|
}
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|
|
case SIMD_f64x2_le:
|
|
case SIMD_f64x2_le:
|
|
|
{
|
|
{
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|
- SIMD_DOUBLE_OP(simde_wasm_f32x4_le);
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|
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|
+ SIMD_DOUBLE_OP(simde_wasm_f64x2_le);
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|
break;
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|
break;
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|
|
}
|
|
}
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|
|
case SIMD_f64x2_ge:
|
|
case SIMD_f64x2_ge:
|
|
|
{
|
|
{
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|
|
- SIMD_DOUBLE_OP(simde_wasm_f32x4_ge);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_f64x2_ge);
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|
break;
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|
break;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
@@ -6563,7 +6563,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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|
|
}
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|
}
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|
|
case SIMD_i8x16_narrow_i16x8_u:
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|
case SIMD_i8x16_narrow_i16x8_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i8x16_narrow_i16x8);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u8x16_narrow_i16x8);
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|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_f32x4_ceil:
|
|
case SIMD_f32x4_ceil:
|
|
@@ -6613,7 +6613,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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|
|
}
|
|
}
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|
|
case SIMD_i8x16_shr_u:
|
|
case SIMD_i8x16_shr_u:
|
|
|
{
|
|
{
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|
|
- SIMD_LANE_SHIFT(simde_wasm_i8x16_shr);
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|
|
|
|
|
|
+ SIMD_LANE_SHIFT(simde_wasm_u8x16_shr);
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|
|
break;
|
|
break;
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|
|
}
|
|
}
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|
|
case SIMD_i8x16_add:
|
|
case SIMD_i8x16_add:
|
|
@@ -6628,7 +6628,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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|
|
}
|
|
}
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|
case SIMD_i8x16_add_sat_u:
|
|
case SIMD_i8x16_add_sat_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i8x16_add_sat);
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|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u8x16_add_sat);
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|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i8x16_sub:
|
|
case SIMD_i8x16_sub:
|
|
@@ -6643,7 +6643,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
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|
|
}
|
|
}
|
|
|
case SIMD_i8x16_sub_sat_u:
|
|
case SIMD_i8x16_sub_sat_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i8x16_sub_sat);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u8x16_sub_sat);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_f64x2_ceil:
|
|
case SIMD_f64x2_ceil:
|
|
@@ -6663,7 +6663,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i8x16_min_u:
|
|
case SIMD_i8x16_min_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i8x16_min);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u8x16_min);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i8x16_max_s:
|
|
case SIMD_i8x16_max_s:
|
|
@@ -6673,7 +6673,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i8x16_max_u:
|
|
case SIMD_i8x16_max_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i8x16_max);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u8x16_max);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_f64x2_trunc:
|
|
case SIMD_f64x2_trunc:
|
|
@@ -6693,7 +6693,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_extadd_pairwise_i8x16_u:
|
|
case SIMD_i16x8_extadd_pairwise_i8x16_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i16x8_extadd_pairwise_i8x16);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u16x8_extadd_pairwise_u8x16);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_extadd_pairwise_i16x8_s:
|
|
case SIMD_i32x4_extadd_pairwise_i16x8_s:
|
|
@@ -6703,7 +6703,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_extadd_pairwise_i16x8_u:
|
|
case SIMD_i32x4_extadd_pairwise_i16x8_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i32x4_extadd_pairwise_i16x8);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u32x4_extadd_pairwise_u16x8);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
@@ -6752,7 +6752,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_narrow_i32x4_u:
|
|
case SIMD_i16x8_narrow_i32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i16x8_narrow_i32x4);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u16x8_narrow_i32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_extend_low_i8x16_s:
|
|
case SIMD_i16x8_extend_low_i8x16_s:
|
|
@@ -6767,12 +6767,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_extend_low_i8x16_u:
|
|
case SIMD_i16x8_extend_low_i8x16_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i16x8_extend_low_i8x16);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u16x8_extend_low_u8x16);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_extend_high_i8x16_u:
|
|
case SIMD_i16x8_extend_high_i8x16_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i16x8_extend_high_i8x16);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u16x8_extend_high_u8x16);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_shl:
|
|
case SIMD_i16x8_shl:
|
|
@@ -6787,7 +6787,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_shr_u:
|
|
case SIMD_i16x8_shr_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_LANE_SHIFT(simde_wasm_i16x8_shr);
|
|
|
|
|
|
|
+ SIMD_LANE_SHIFT(simde_wasm_u16x8_shr);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_add:
|
|
case SIMD_i16x8_add:
|
|
@@ -6802,7 +6802,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_add_sat_u:
|
|
case SIMD_i16x8_add_sat_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i16x8_add_sat);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u16x8_add_sat);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_sub:
|
|
case SIMD_i16x8_sub:
|
|
@@ -6817,7 +6817,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_sub_sat_u:
|
|
case SIMD_i16x8_sub_sat_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i16x8_sub_sat);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u16x8_sub_sat);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_f64x2_nearest:
|
|
case SIMD_f64x2_nearest:
|
|
@@ -6837,7 +6837,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_min_u:
|
|
case SIMD_i16x8_min_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i16x8_min);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u16x8_min);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_max_s:
|
|
case SIMD_i16x8_max_s:
|
|
@@ -6847,7 +6847,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_max_u:
|
|
case SIMD_i16x8_max_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i16x8_max);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u16x8_max);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_avgr_u:
|
|
case SIMD_i16x8_avgr_u:
|
|
@@ -6867,12 +6867,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_extmul_low_i8x16_u:
|
|
case SIMD_i16x8_extmul_low_i8x16_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i16x8_extmul_low_i8x16);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u16x8_extmul_low_u8x16);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i16x8_extmul_high_i8x16_u:
|
|
case SIMD_i16x8_extmul_high_i8x16_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i16x8_extmul_high_i8x16);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u16x8_extmul_high_u8x16);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
@@ -6921,12 +6921,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_extend_low_i16x8_u:
|
|
case SIMD_i32x4_extend_low_i16x8_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i32x4_extend_low_i16x8);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u32x4_extend_low_u16x8);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_extend_high_i16x8_u:
|
|
case SIMD_i32x4_extend_high_i16x8_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i32x4_extend_high_i16x8);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u32x4_extend_high_u16x8);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_shl:
|
|
case SIMD_i32x4_shl:
|
|
@@ -6941,7 +6941,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_shr_u:
|
|
case SIMD_i32x4_shr_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_LANE_SHIFT(simde_wasm_i32x4_shr);
|
|
|
|
|
|
|
+ SIMD_LANE_SHIFT(simde_wasm_u32x4_shr);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_add:
|
|
case SIMD_i32x4_add:
|
|
@@ -6966,7 +6966,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_min_u:
|
|
case SIMD_i32x4_min_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i32x4_min);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u32x4_min);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_max_s:
|
|
case SIMD_i32x4_max_s:
|
|
@@ -6976,7 +6976,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_max_u:
|
|
case SIMD_i32x4_max_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i32x4_max);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u32x4_max);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_dot_i16x8_s:
|
|
case SIMD_i32x4_dot_i16x8_s:
|
|
@@ -6996,12 +6996,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_extmul_low_i16x8_u:
|
|
case SIMD_i32x4_extmul_low_i16x8_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i32x4_extmul_low_i16x8);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u32x4_extmul_low_u16x8);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_extmul_high_i16x8_u:
|
|
case SIMD_i32x4_extmul_high_i16x8_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i32x4_extmul_high_i16x8);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u32x4_extmul_high_u16x8);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
@@ -7050,12 +7050,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i64x2_extend_low_i32x4_u:
|
|
case SIMD_i64x2_extend_low_i32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i64x2_extend_low_i32x4);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u64x2_extend_low_u32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i64x2_extend_high_i32x4_u:
|
|
case SIMD_i64x2_extend_high_i32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i64x2_extend_high_i32x4);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u64x2_extend_high_u32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
@@ -7072,7 +7072,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i64x2_shr_u:
|
|
case SIMD_i64x2_shr_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_LANE_SHIFT(simde_wasm_i64x2_shr);
|
|
|
|
|
|
|
+ SIMD_LANE_SHIFT(simde_wasm_u64x2_shr);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i64x2_add:
|
|
case SIMD_i64x2_add:
|
|
@@ -7132,12 +7132,12 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i64x2_extmul_low_i32x4_u:
|
|
case SIMD_i64x2_extmul_low_i32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i64x2_extmul_low_i32x4);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u64x2_extmul_low_u32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i64x2_extmul_high_i32x4_u:
|
|
case SIMD_i64x2_extmul_high_i32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_DOUBLE_OP(simde_wasm_i64x2_extmul_high_i32x4);
|
|
|
|
|
|
|
+ SIMD_DOUBLE_OP(simde_wasm_u64x2_extmul_high_u32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
|
|
|
|
@@ -7263,7 +7263,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_trunc_sat_f32x4_u:
|
|
case SIMD_i32x4_trunc_sat_f32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i32x4_trunc_sat_f32x4);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u32x4_trunc_sat_f32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_f32x4_convert_i32x4_s:
|
|
case SIMD_f32x4_convert_i32x4_s:
|
|
@@ -7273,7 +7273,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_f32x4_convert_i32x4_u:
|
|
case SIMD_f32x4_convert_i32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_f32x4_convert_i32x4);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_f32x4_convert_u32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_trunc_sat_f64x2_s_zero:
|
|
case SIMD_i32x4_trunc_sat_f64x2_s_zero:
|
|
@@ -7283,7 +7283,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_i32x4_trunc_sat_f64x2_u_zero:
|
|
case SIMD_i32x4_trunc_sat_f64x2_u_zero:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_i32x4_trunc_sat_f64x2_zero);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_u32x4_trunc_sat_f64x2_zero);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
case SIMD_f64x2_convert_low_i32x4_s:
|
|
case SIMD_f64x2_convert_low_i32x4_s:
|
|
@@ -7293,7 +7293,7 @@ wasm_interp_call_func_bytecode(WASMModuleInstance *module,
|
|
|
}
|
|
}
|
|
|
case SIMD_f64x2_convert_low_i32x4_u:
|
|
case SIMD_f64x2_convert_low_i32x4_u:
|
|
|
{
|
|
{
|
|
|
- SIMD_SINGLE_OP(simde_wasm_f64x2_convert_low_i32x4);
|
|
|
|
|
|
|
+ SIMD_SINGLE_OP(simde_wasm_f64x2_convert_low_u32x4);
|
|
|
break;
|
|
break;
|
|
|
}
|
|
}
|
|
|
|
|
|