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@@ -514,7 +514,7 @@ add_intrinsic_capability(AOTCompContext *comp_ctx, uint64 flag)
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}
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static void
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-add_f32_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
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+add_f32_common_intrinsics(AOTCompContext *comp_ctx)
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{
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add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F32_FABS);
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add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F32_FADD);
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@@ -526,7 +526,7 @@ add_f32_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
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}
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static void
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-add_f64_common_intrinsics_for_thumb2_fpu(AOTCompContext *comp_ctx)
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+add_f64_common_intrinsics(AOTCompContext *comp_ctx)
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{
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add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F64_FABS);
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add_intrinsic_capability(comp_ctx, AOT_INTRINSIC_FLAG_F64_FADD);
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@@ -602,14 +602,23 @@ aot_intrinsic_fill_capability_flags(AOTCompContext *comp_ctx)
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if (!strncmp(comp_ctx->target_arch, "thumb", 5)) {
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if (!strcmp(comp_ctx->target_cpu, "cortex-m7")) {}
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else if (!strcmp(comp_ctx->target_cpu, "cortex-m4")) {
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- add_f64_common_intrinsics_for_thumb2_fpu(comp_ctx);
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+ add_f64_common_intrinsics(comp_ctx);
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}
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else {
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- add_f32_common_intrinsics_for_thumb2_fpu(comp_ctx);
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- add_f64_common_intrinsics_for_thumb2_fpu(comp_ctx);
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+ add_f32_common_intrinsics(comp_ctx);
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+ add_f64_common_intrinsics(comp_ctx);
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add_common_float_integer_convertion(comp_ctx);
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}
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}
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+ else if (!strncmp(comp_ctx->target_arch, "riscv", 5)) {
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+ /*
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+ * Note: Use builtin intrinsics since hardware float operation
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+ * will cause rodata relocation
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+ */
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+ add_f32_common_intrinsics(comp_ctx);
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+ add_f64_common_intrinsics(comp_ctx);
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+ add_common_float_integer_convertion(comp_ctx);
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+ }
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}
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#endif /* WASM_ENABLE_WAMR_COMPILER != 0 || WASM_ENABLE_JIT != 0 */
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