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@@ -0,0 +1,147 @@
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+/*
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+ * Copyright (C) 2019 Intel Corporation. All rights reserved.
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+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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+ */
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+
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+#include <llvm/ADT/SmallVector.h>
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+#include <llvm/ADT/Twine.h>
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+#include <llvm/ADT/Triple.h>
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+#include <llvm/ExecutionEngine/ExecutionEngine.h>
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+#include <llvm/MC/MCSubtargetInfo.h>
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+#include <llvm/Support/TargetSelect.h>
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+#include <llvm/Target/TargetMachine.h>
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+#include <llvm-c/Core.h>
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+#include <llvm-c/ExecutionEngine.h>
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+#include <llvm/ExecutionEngine/GenericValue.h>
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+#include <llvm/ExecutionEngine/JITEventListener.h>
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+#include <llvm/ExecutionEngine/RTDyldMemoryManager.h>
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+#include <llvm/IR/DerivedTypes.h>
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+#include <llvm/IR/Module.h>
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+#include <llvm/Support/ErrorHandling.h>
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+#include <llvm/Target/CodeGenCWrappers.h>
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+#include <llvm/Target/TargetOptions.h>
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+#include <cstring>
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+
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+using namespace llvm;
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+
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+extern "C" LLVMBool
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+WAMRCreateMCJITCompilerForModule(LLVMExecutionEngineRef *OutJIT,
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+ LLVMModuleRef M,
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+ LLVMMCJITCompilerOptions *PassedOptions,
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+ size_t SizeOfPassedOptions,
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+ char **OutError);
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+
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+extern "C" bool
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+aot_check_simd_compatibility(const char *arch_c_str, const char *cpu_c_str);
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+
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+LLVMBool
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+WAMRCreateMCJITCompilerForModule(LLVMExecutionEngineRef *OutJIT,
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+ LLVMModuleRef M,
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+ LLVMMCJITCompilerOptions *PassedOptions,
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+ size_t SizeOfPassedOptions,
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+ char **OutError)
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+{
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+ LLVMMCJITCompilerOptions options;
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+ // If the user passed a larger sized options struct, then they were compiled
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+ // against a newer LLVM. Tell them that something is wrong.
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+ if (SizeOfPassedOptions > sizeof(options)) {
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+ *OutError = strdup(
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+ "Refusing to use options struct that is larger than my own; assuming "
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+ "LLVM library mismatch.");
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+ return 1;
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+ }
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+
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+ // Defend against the user having an old version of the API by ensuring that
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+ // any fields they didn't see are cleared. We must defend against fields being
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+ // set to the bitwise equivalent of zero, and assume that this means "do the
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+ // default" as if that option hadn't been available.
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+ LLVMInitializeMCJITCompilerOptions(&options, sizeof(options));
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+ memcpy(&options, PassedOptions, SizeOfPassedOptions);
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+
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+ TargetOptions targetOptions;
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+ targetOptions.EnableFastISel = options.EnableFastISel;
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+ std::unique_ptr<Module> Mod(unwrap(M));
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+
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+ if (Mod) {
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+ // Set function attribute "frame-pointer" based on
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+ // NoFramePointerElim.
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+ for (auto &F : *Mod) {
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+ auto Attrs = F.getAttributes();
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+ StringRef Value = options.NoFramePointerElim ? "all" : "none";
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+ Attrs = Attrs.addAttribute(F.getContext(), AttributeList::FunctionIndex,
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+ "frame-pointer", Value);
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+ F.setAttributes(Attrs);
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+ }
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+ }
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+
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+ std::string Error;
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+ bool JIT;
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+ char *host_cpu = LLVMGetHostCPUName();
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+
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+ if (!host_cpu) {
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+ *OutError = NULL;
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+ return false;
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+ }
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+
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+ std::string mcpu(host_cpu);
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+ LLVMDisposeMessage(host_cpu);
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+
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+ EngineBuilder builder(std::move(Mod));
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+ builder.setEngineKind(EngineKind::JIT)
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+ .setErrorStr(&Error)
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+ .setMCPU(mcpu)
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+ .setOptLevel((CodeGenOpt::Level)options.OptLevel)
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+ .setTargetOptions(targetOptions);
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+ if (Optional<CodeModel::Model> CM = unwrap(options.CodeModel, JIT))
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+ builder.setCodeModel(*CM);
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+ if (options.MCJMM)
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+ builder.setMCJITMemoryManager(
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+ std::unique_ptr<RTDyldMemoryManager>(unwrap(options.MCJMM)));
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+ if (ExecutionEngine *JIT = builder.create()) {
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+ *OutJIT = wrap(JIT);
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+ return 0;
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+ }
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+ *OutError = strdup(Error.c_str());
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+ return 1;
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+}
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+
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+bool
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+aot_check_simd_compatibility(const char *arch_c_str, const char *cpu_c_str)
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+{
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+#if WASM_ENABLE_SIMD != 0
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+ if (!arch_c_str || !cpu_c_str) {
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+ return false;
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+ }
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+
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+ llvm::SmallVector<std::string, 1> targetAttributes;
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+ llvm::Triple targetTriple(arch_c_str, "", "");
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+ llvm::TargetMachine *targetMachine = llvm::EngineBuilder().selectTarget(
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+ targetTriple, "", std::string(cpu_c_str), targetAttributes);
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+ if (targetMachine == nullptr) {
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+ return false;
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+ }
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+
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+ const llvm::Triple::ArchType targetArch =
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+ targetMachine->getTargetTriple().getArch();
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+ const llvm::MCSubtargetInfo *subTargetInfo =
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+ targetMachine->getMCSubtargetInfo();
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+ if (subTargetInfo == nullptr) {
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+ return false;
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+ }
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+
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+ if (targetArch == llvm::Triple::x86_64) {
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+ return subTargetInfo->checkFeatures("+sse4.1");
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+ }
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+ else if (targetArch == llvm::Triple::aarch64) {
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+ return subTargetInfo->checkFeatures("+neon");
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+ }
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+ else {
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+ return false;
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+ }
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+#else
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+ (void)arch_c_str;
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+ (void)cpu_c_str;
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+ return true;
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+#endif /* WASM_ENABLE_SIMD */
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+}
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+
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Wenyong Huang