update ehci glue

port/ehci/usb_glue_aic.c

@@ -12,6 +12,13 @@
 
 extern void USBH_IRQHandler(uint8_t busid);
 
+static void aic_ehci_isr(void *arg)
+{
+    uint8_t busid = (uint8_t)arg;
+    extern void USBH_IRQHandler(uint8_t busid);
+    USBH_IRQHandler(busid);
+}
+
 const uint8_t aic_irq_table[] = {
     USB_HOST0_EHCI_IRQn,
 #ifdef HPM_USB1_BASE
@@ -62,8 +69,8 @@ void usb_hc_low_level_init(struct usbh_bus *bus)
     aicos_udelay(300);
 
     /* register interrupt callback */
-    aicos_request_irq(aic_irq_table[bus->hcd.hcd_id], (irq_handler_t)USBH_IRQHandler,
-                      0, "usb_host_ehci", bus->hcd.hcd_id);
+    aicos_request_irq(aic_irq_table[bus->hcd.hcd_id], (irq_handler_t)aic_ehci_isr,
+                      0, "usb_host_ehci", (void *)bus->hcd.hcd_id);
     aicos_irq_enable(aic_irq_table[bus->hcd.hcd_id]);
 }
 

port/ehci/usb_glue_ma35d0.c

@@ -0,0 +1,117 @@
+/**************************************************************************/ /**
+*
+* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
+*
+* SPDX-License-Identifier: Apache-2.0
+*
+* Change Logs:
+* Date            Author           Notes
+* 2023-8-8        Wayne            First version
+*
+******************************************************************************/
+#include "rtthread.h"
+
+#include "NuMicro.h"
+#include "rthw.h"
+#include "drv_sys.h"
+
+#define LOG_TAG "drv.cherry"
+#define DBG_ENABLE
+#define DBG_SECTION_NAME LOG_TAG
+#define DBG_LEVEL        DBG_LOG
+#define DBG_COLOR
+#include <rtdbg.h>
+
+#if defined(PKG_CHERRYUSB_HOST)
+
+#include "usbh_core.h"
+
+static void nu_echi_isr(int vector, void *param)
+{
+    uint8_t busid = (uint8_t)param;
+    extern void USBH_IRQHandler(uint8_t busid);
+    USBH_IRQHandler(busid);
+}
+
+static void nu_ochi_isr(int vector, void *param)
+{
+}
+
+void usb_hc_low_level_init(struct usbh_bus *bus)
+{
+    int timeout = 100;
+
+    if (bus->hcd.reg_base == HSUSBH0_BASE) {
+        /* Enable USBH clock */
+        CLK_EnableModuleClock(HUSBH0_MODULE);
+        SYS_ResetModule(HSUSBH0_RST);
+
+        /* Clock engine clock Configuration */
+        SYS->USBPMISCR &= ~(SYS_USBPMISCR_PHY0POR_Msk | SYS_USBPMISCR_PHY0COMN_Msk);
+        rt_thread_mdelay(20);
+        SYS->USBPMISCR |= SYS_USBPMISCR_PHY0SUSPEND_Msk | SYS_USBPMISCR_PHY0COMN_Msk;
+
+        /* set UHOVRCURH(SYS_MISCFCR0[12]) 1 => USBH Host over-current detect is high-active */
+        /*                                 0 => USBH Host over-current detect is low-active  */
+        //SYS->MISCFCR0 |= SYS_MISCFCR0_UHOVRCURH_Msk;
+        SYS->MISCFCR0 &= ~SYS_MISCFCR0_UHOVRCURH_Msk;
+        while (1) {
+            rt_thread_mdelay(1);
+            if ((SYS->USBPMISCR & SYS_USBPMISCR_PHY0HSTCKSTB_Msk) &&)
+                break; /* both USB PHY0 and PHY1 clock 60MHz UTMI clock stable */
+
+            timeout--;
+            if (timeout == 0) {
+                rt_kprintf("USB PHY reset failed. USBPMISCR = 0x%08x\n", SYS->USBPMISCR);
+                return;
+            }
+        }
+
+        /* Register interrupt service routine. */
+        rt_hw_interrupt_install(HSUSBH0_IRQn, nu_echi_isr, (void *)bus->hcd.hcd_id, "ehci0");
+
+        /* Enable interrupt */
+        rt_hw_interrupt_umask(HSUSBH0_IRQn);
+    } else if (bus->hcd.reg_base == HSUSBH1_BASE) {
+        /* Enable USBH clock */
+        CLK_EnableModuleClock(HUSBH1_MODULE);
+        SYS_ResetModule(HSUSBH1_RST);
+
+        /* Clock engine clock Configuration */
+        SYS->USBPMISCR &= ~(SYS_USBPMISCR_PHY1POR_Msk | SYS_USBPMISCR_PHY1COMN_Msk);
+        rt_thread_mdelay(20);
+        SYS->USBPMISCR |= SYS_USBPMISCR_PHY1SUSPEND_Msk | SYS_USBPMISCR_PHY1COMN_Msk;
+
+        /* set UHOVRCURH(SYS_MISCFCR0[12]) 1 => USBH Host over-current detect is high-active */
+        /*                                 0 => USBH Host over-current detect is low-active  */
+        //SYS->MISCFCR0 |= SYS_MISCFCR0_UHOVRCURH_Msk;
+        SYS->MISCFCR0 &= ~SYS_MISCFCR0_UHOVRCURH_Msk;
+        while (1) {
+            rt_thread_mdelay(1);
+            if ((SYS->USBPMISCR & SYS_USBPMISCR_PHY1HSTCKSTB_Msk))
+                break; /* both USB PHY0 and PHY1 clock 60MHz UTMI clock stable */
+
+            timeout--;
+            if (timeout == 0) {
+                rt_kprintf("USB PHY reset failed. USBPMISCR = 0x%08x\n", SYS->USBPMISCR);
+                return;
+            }
+        }
+        /* Register interrupt service routine. */
+        rt_hw_interrupt_install(HSUSBH1_IRQn, nu_echi_isr, (void *)bus->hcd.hcd_id, "ehci1");
+
+        /* Enable interrupt */
+        rt_hw_interrupt_umask(HSUSBH1_IRQn);
+    }
+}
+
+void usb_hc_low_level2_init(struct usbh_bus *bus)
+{
+}
+
+uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port)
+{
+    return USB_SPEED_HIGH;
+}
+
+#endif

port/ehci/usb_glue_nuc980.c

@@ -0,0 +1,62 @@
+/**************************************************************************/ /**
+*
+* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
+*
+* SPDX-License-Identifier: Apache-2.0
+*
+* Change Logs:
+* Date            Author           Notes
+* 2023-8-8        Wayne            First version
+*
+******************************************************************************/
+#include "rtthread.h"
+
+#include "NuMicro.h"
+#include "rthw.h"
+#include "drv_sys.h"
+
+#define LOG_TAG "drv.cherry"
+#define DBG_ENABLE
+#define DBG_SECTION_NAME LOG_TAG
+#define DBG_LEVEL        DBG_LOG
+#define DBG_COLOR
+#include <rtdbg.h>
+
+#if defined(PKG_CHERRYUSB_HOST)
+#include "usbh_core.h"
+
+static void nu_ehci_isr(int vector, void *param)
+{
+    extern void USBH_IRQHandler(uint8_t busid);
+    USBH_IRQHandler(0);
+}
+
+void usb_hc_low_level_init(struct usbh_bus *bus)
+{
+    LOG_D("%s %d", __FUNCTION__, __LINE__);
+
+    rt_hw_interrupt_mask(IRQ_EHCI);
+
+    /* Enable USBH clock */
+    nu_sys_ipclk_enable(USBHCKEN);
+    nu_sys_ip_reset(USBHRST);
+
+    outpw(0xB0015000 + 0xC4, 0x160); //HSUSBH->USBPCR0 = 0x160;   /* enable PHY 0          */
+    outpw(0xB0015000 + 0xC8, 0x520); //HSUSBH->USBPCR1 = 0x520;   /* enable PHY 1          */
+
+    //USBH->HcMiscControl |= USBH_HcMiscControl_OCAL_Msk; /* Over-current active low  */
+    //outpw(0xB0017000 + 0x204, inpw(0xB0017000 + 0x204) | (0x1ul << 3));
+
+    //USBH->HcMiscControl &= ~USBH_HcMiscControl_OCAL_Msk; /* Over-current active high  */
+    outpw(0xB0017000 + 0x204, inpw(0xB0017000 + 0x204) & (~(0x1ul << 3)));
+
+    rt_hw_interrupt_install(IRQ_EHCI, nu_ehci_isr, NULL, "ehci-1");
+    rt_hw_interrupt_set_priority(IRQ_EHCI, IRQ_LEVEL_1);
+    rt_hw_interrupt_umask(IRQ_EHCI);
+}
+
+uint8_t usbh_get_port_speed(struct usbh_bus *bus, const uint8_t port)
+{
+    return USB_SPEED_HIGH;
+}
+#endif