Update T113S3 glue

port/ehci/usb_glue_t113.c

@@ -1,18 +1,27 @@
 /*
- * Copyright (c) 2025, YC113
+ * Copyright (c) 2026, HakumenJean
  *
  * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2026-01-06     HakumenJean  first version
  */
+
+#include <stdbool.h>
+#include <string.h>
+#include <stdint.h>
+#include <stdlib.h>
+
 #include "usbh_core.h"
 #include "usb_hc_ehci.h"
-
 #ifdef CONFIG_USB_EHCI_WITH_OHCI
 #include "usb_hc_ohci.h"
 #endif
 
+#include "hal_clk.h"
+#include "hal_reset.h"
 #include "interrupt.h"
-#include "drv_reg_base.h"
-#include "drv_clock.h"
 
 #if CONFIG_USBHOST_MAX_BUS != 2
 #error "t113 has 2 usb host controller"
@@ -34,6 +43,13 @@
 #error "t113 usb ehci no iso register"
 #endif
 
+#define USB0_OTG_BASE_ADDR              (0x04100000U)
+#define USB0_PHY_BASE_ADDR              (0x04100400U)
+#define USB0_EHCI_BASE_ADDR             (0x04101000U)
+
+#define USB1_EHCI_BASE_ADDR             (0x04200000U)
+#define USB1_PHY_BASE_ADDR              (0x04200800U)
+
 void usb_select_phyTohci(void)
 {
     *(volatile rt_uint32_t *)(USB0_OTG_BASE_ADDR + 0x420) &= ~(1 << 0);
@@ -41,55 +57,52 @@ void usb_select_phyTohci(void)
 
 void usb_gate_open(rt_uint8_t busid)
 {
-    rt_uint32_t addr;
-
-    addr = (rt_uint32_t)&CCU->usb0_clk + busid * 4;
-
-    if(busid == 0) {
+    if (busid == 0) {
         /* otg gate open*/
-        CCU->usb_bgr |= 1 << 8;
+        hal_clock_enable(hal_clock_get(HAL_SUNXI_CCU, CLK_BUS_OTG));
 
         /* otg bus reset */
-        CCU->usb_bgr &= ~(1 << 24);
-        sdelay(10);
-        CCU->usb_bgr |= (1 << 24);
-        sdelay(10);
-    }
+        hal_reset_control_reset(hal_reset_control_get(HAL_SUNXI_RESET, RST_BUS_OTG));
+
+        /* ehci gate open */
+        hal_clock_enable(hal_clock_get(HAL_SUNXI_CCU, CLK_BUS_EHCI0));
+
+        /* ehci bus reset */
+        hal_reset_control_reset(hal_reset_control_get(HAL_SUNXI_RESET, RST_BUS_EHCI0));
+
+        /* ohci gate open */
+        hal_clock_enable(hal_clock_get(HAL_SUNXI_CCU, CLK_BUS_OHCI0));
 
-    /* ehci gate open */
-    CCU->usb_bgr |= (1 << 4) << busid;
+        /* ohci bus reset */
+        hal_reset_control_reset(hal_reset_control_get(HAL_SUNXI_RESET, RST_BUS_OHCI0));
 
-    /* ehci bus reset */
-    CCU->usb_bgr &= ~((1 << 20) << busid);
-    sdelay(10);
-    CCU->usb_bgr |= (1 << 20) << busid;
-    sdelay(10);
+        /* clock enable */
+        hal_clock_enable(hal_clock_get(HAL_SUNXI_CCU, CLK_USB_OHCI0));
 
-    /* ohci gate open */
-    CCU->usb_bgr |= 1 << busid;
+        /* reset phy */
+        hal_reset_control_reset(hal_reset_control_get(HAL_SUNXI_RESET, RST_USB_PHY0));
 
-    /* ohci bus reset */
-    CCU->usb_bgr &= ~((1 << 16) << busid);
-    sdelay(10);
-    CCU->usb_bgr |= (1 << 16) << busid;
-    sdelay(10);
+        /* otg phy select */
+        usb_select_phyTohci();
+    } else {
+        /* ehci gate open */
+        hal_clock_enable(hal_clock_get(HAL_SUNXI_CCU, CLK_BUS_EHCI1));
 
-    sdelay(10);
+        /* ehci bus reset */
+        hal_reset_control_reset(hal_reset_control_get(HAL_SUNXI_RESET, RST_BUS_EHCI1));
 
-    /* clock enable */
-    *(volatile rt_uint32_t *)addr &= ~(3 << 24);
-    *(volatile rt_uint32_t *)addr |= (1 << 31) | (1 << 24);
+        /* ohci gate open */
+        hal_clock_enable(hal_clock_get(HAL_SUNXI_CCU, CLK_BUS_OHCI1));
 
-    /* reset phy */
-    *(volatile rt_uint32_t *)addr &= ~(1 << 30);
-    sdelay(10);
-    *(volatile rt_uint32_t *)addr |= 1 << 30;
-    sdelay(10);
+        /* ohci bus reset */
+        hal_reset_control_reset(hal_reset_control_get(HAL_SUNXI_RESET, RST_BUS_OHCI1));
 
-    /* otg phy select */
-    if(busid == 0) usb_select_phyTohci();
+        /* clock enable */
+        hal_clock_enable(hal_clock_get(HAL_SUNXI_CCU, CLK_USB_OHCI1));
 
-    USB_LOG_DBG("usb%d gate : %X, clock : %X\n", busid, CCU->usb_bgr, *(volatile rt_uint32_t *)addr);
+        /* reset phy */
+        hal_reset_control_reset(hal_reset_control_get(HAL_SUNXI_RESET, RST_USB_PHY1));
+    }
 }
 
 void usb_clean_siddp(struct usbh_bus *bus)
@@ -109,10 +122,10 @@ void usb_hci_set_passby(struct usbh_bus *bus)
 
 void t113_ehci_isr(int vector, void *arg)
 {
-    rt_interrupt_enter();
-
     struct usbh_bus *bus = (struct usbh_bus *)arg;
 
+    rt_interrupt_enter();
+
     USB_LOG_DBG("t113_ehci_isr");
 
     extern void USBH_IRQHandler(uint8_t busid);
@@ -125,10 +138,10 @@ void t113_ehci_isr(int vector, void *arg)
 
 void t113_ohci_isr(int vector, void *arg)
 {
-    rt_interrupt_enter();
-
     struct usbh_bus *bus = (struct usbh_bus *)arg;
 
+    rt_interrupt_enter();
+
     USB_LOG_DBG("t113_ohci_isr");
 
     extern void OHCI_IRQHandler(uint8_t busid);
@@ -149,8 +162,9 @@ void usb_hc_low_level_init(struct usbh_bus *bus)
     usb_hci_set_passby(bus);
 
     /* register EHCI interrupt callback */
-    vector = T113_IRQ_USB0_EHCI + (bus->busid > 0 ? 3 : 0);
+    vector = SUNXI_IRQ_USB0_EHCI + (bus->busid > 0 ? 3 : 0);
     rt_hw_interrupt_install(vector, t113_ehci_isr, bus, RT_NULL);
+    rt_hw_interrupt_set_priority(vector, 11 << 4);
     rt_hw_interrupt_umask(vector);
 
     /* register OHCI interrupt callback */
@@ -183,12 +197,12 @@ int __usbh_init(void)
 {
 #ifdef T113_USING_USB0_HOST
     /* USB0 MSC test OK */
-    usbh_initialize(0, USB0_BASE_ADDR, NULL);
+    usbh_initialize(0, USB0_EHCI_BASE_ADDR, NULL);
 #endif
 
 #ifdef T113_USING_USB1_HOST
     /* USB1 MSC test OK */
-    usbh_initialize(1, USB1_BASE_ADDR, NULL);
+    usbh_initialize(1, USB1_EHCI_BASE_ADDR, NULL);
 #endif
     return 0;
 }
@@ -196,8 +210,26 @@ int __usbh_init(void)
 #ifdef PKG_CHERRYUSB_HOST
 
 #include <rtthread.h>
+#include <rthw.h>
 #include <rtdevice.h>
 
 INIT_ENV_EXPORT(__usbh_init);
 
+#ifdef CONFIG_USB_DCACHE_ENABLE
+void usb_dcache_clean(uintptr_t addr, size_t size)
+{
+    rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, (void *)addr, size);
+}
+
+void usb_dcache_invalidate(uintptr_t addr, size_t size)
+{
+    rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void *)addr, size);
+}
+
+void usb_dcache_flush(uintptr_t addr, size_t size)
+{
+    rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, (void *)addr, size);
+}
+#endif
+
 #endif