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@@ -0,0 +1,642 @@
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+/*
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+ * Copyright (c) 2022, HaiMianBBao
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+#include "usbd_core.h"
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+#include "hardware/resets.h"
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+#include "hardware/structs/usb.h"
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+#include "hardware/structs/nvic.h"
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+#if CHERRYUSB_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
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+#include "pico/fix/rp2040_usb_device_enumeration.h"
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+#endif
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+
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+#define usb_hw_set hw_set_alias(usb_hw)
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+#define usb_hw_clear hw_clear_alias(usb_hw)
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+
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+#if PICO_RP2350
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+#define USBD_IRQHandler isr_irq14
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+#endif
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+#if PICO_RP2040
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+#define USBD_IRQHandler isr_irq5
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+#endif
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+
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+#ifndef CONFIG_USBDEV_EP_NUM
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+#define CONFIG_USBDEV_EP_NUM 16
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+#endif
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+
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+#ifndef FORCE_VBUS_DETECT
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+#define FORCE_VBUS_DETECT 1
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+#endif
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+
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+/* Endpoint state */
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+struct usb_dc_ep_state {
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+ uint16_t ep_mps; /* Endpoint max packet size */
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+ uint8_t ep_type; /* Endpoint type */
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+ uint8_t ep_stalled; /* Endpoint stall flag */
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+ uint8_t ep_enable; /* Endpoint enable */
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+ uint8_t ep_addr; /* Endpoint address */
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+ uint8_t *xfer_buf;
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+ uint32_t xfer_len;
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+ uint32_t actual_xfer_len;
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+ /**
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+ * For rp2040
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+ */
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+ volatile uint32_t *endpoint_control; /*!< Endpoint control register */
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+ volatile uint32_t *buffer_control; /*!< Buffer control register */
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+ uint8_t *dpram_data_buf; /*!< Buffer pointer in usb dpram */
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+ uint8_t next_pid; /*!< Toggle after each packet (unless replying to a SETUP) */
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+};
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+
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+/* Driver state */
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+struct rp2040_udc {
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+ volatile uint8_t dev_addr;
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+ struct usb_dc_ep_state in_ep[CONFIG_USBDEV_EP_NUM]; /*!< IN endpoint parameters*/
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+ struct usb_dc_ep_state out_ep[CONFIG_USBDEV_EP_NUM]; /*!< OUT endpoint parameters */
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+ struct usb_setup_packet setup; /*!< Setup package that may be used in interrupt processing (outside the protocol stack) */
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+} g_rp2040_udc;
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+
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+static uint8_t *next_buffer_ptr;
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+
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+/**
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+ * @brief Take a buffer pointer located in the USB RAM and return as an offset of the RAM.
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+ *
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+ * @param buf
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+ * @return uint32_t
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+ */
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+static inline uint32_t usb_buffer_offset(volatile uint8_t *buf)
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+{
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+ return (uint32_t)buf ^ (uint32_t)usb_dpram;
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+}
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+
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+/**
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+ * @brief Alloc the endpoint dpram and set up ep (if applicable. Not valid for EP0).
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+ *
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+ * @param ep
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+ */
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+static int8_t rp2040_usb_config_ep(struct usb_dc_ep_state *ep)
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+{
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+ if (!ep->endpoint_control) {
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+ USB_LOG_WRN("Not valid for EP0 \r\n");
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+ return 0;
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+ }
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+
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+ /*!< size must be multiple of 64 */
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+ uint16_t size = ((ep->ep_mps + 64 - 1) / 64) * 64;
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+ /*!< Get current buffer ptr */
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+ ep->dpram_data_buf = next_buffer_ptr;
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+ /*!< Update the next buffer ptr */
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+ next_buffer_ptr += size;
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+ if (((uint32_t)next_buffer_ptr & 0b111111u) != 0) {
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+ USB_LOG_ERR("DPRAM Not 64 byte aligned \r\n");
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+ return -1;
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+ }
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+ uint32_t dpram_offset = usb_buffer_offset(ep->dpram_data_buf);
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+ if (dpram_offset > USB_DPRAM_MAX) {
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+ USB_LOG_ERR("DPRAM overflow \r\n");
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+ return -2;
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+ }
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+ USB_LOG_INFO("Alloced %d bytes at offset 0x%x (0x%p)\r\n", size, dpram_offset, ep->dpram_data_buf);
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+ /*!< Enable ep and perbuffer trigger interrupt */
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+ volatile uint32_t reg = EP_CTRL_ENABLE_BITS | EP_CTRL_INTERRUPT_PER_BUFFER | ((ep->ep_type) << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset;
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+ *ep->endpoint_control = reg;
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+ return 0;
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+}
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+
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+static void rp2040_usb_init(void)
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+{
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+ /*!< Reset usb controller */
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+ reset_block(RESETS_RESET_USBCTRL_BITS);
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+ unreset_block_wait(RESETS_RESET_USBCTRL_BITS);
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+
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+ /*!< Clear any previous state just in case */
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+ memset(usb_hw, 0, sizeof(*usb_hw));
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+ memset(usb_dpram, 0, sizeof(*usb_dpram));
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+
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+ /*!< Mux the controller to the onboard usb phy */
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+ usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
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+}
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+
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+int usb_dc_init(uint8_t busid)
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+{
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+ memset(&g_rp2040_udc, 0, sizeof(struct rp2040_udc));
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+ rp2040_usb_init();
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+#if FORCE_VBUS_DETECT
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+ /*!< Force VBUS detect so the device thinks it is plugged into a host */
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+ usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
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+#endif
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+
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+ /**
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+ * Initializes the USB peripheral for device mode and enables it.
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+ * Don't need to enable the pull up here. Force VBUS
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+ */
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+ usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS;
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+
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+ /**
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+ * Enable individual controller IRQS here. Processor interrupt enable will be used
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+ * for the global interrupt enable...
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+ * Note: Force VBUS detect cause disconnection not detectable
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+ */
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+ usb_hw->sie_ctrl = USB_SIE_CTRL_EP0_INT_1BUF_BITS;
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+ usb_hw->inte = USB_INTS_BUFF_STATUS_BITS | USB_INTS_BUS_RESET_BITS | USB_INTS_SETUP_REQ_BITS |
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+ USB_INTS_DEV_SUSPEND_BITS | USB_INTS_DEV_RESUME_FROM_HOST_BITS |
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+ (FORCE_VBUS_DETECT ? 0 : USB_INTS_DEV_CONN_DIS_BITS);
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+
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+ /**
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+ * Enable interrupt
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+ * Clear pending before enable
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+ * (if IRQ is actually asserted, it will immediately re-pend)
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+ */
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+#if PICO_RP2350
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+ //*((io_rw_32 *)(PPB_BASE + M33_NVIC_ICPR0_OFFSET)) = 1 << 14;
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+ //*((io_rw_32 *)(PPB_BASE + M33_NVIC_ISER0_OFFSET)) = 1 << 14;
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+ nvic_hw->icpr[0] = 1 << 14;
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+ nvic_hw->iser[0] = 1 << 14;
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+#endif
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+#if PICO_RP2040
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+ //*((io_rw_32 *)(PPB_BASE + M0PLUS_NVIC_ICPR_OFFSET)) = 1 << 5;
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+ //*((io_rw_32 *)(PPB_BASE + M0PLUS_NVIC_ISER_OFFSET)) = 1 << 5;
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+ nvic_hw->icpr = 1 << 5;
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+ nvic_hw->iser = 1 << 5;
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+#endif
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+
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+ usb_hw_set->sie_ctrl = USB_SIE_CTRL_PULLUP_EN_BITS;
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+ return 0;
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+}
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+
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+/**
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+ * @brief Starts a transfer on a given endpoint.
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+ *
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+ * @param ep, the endpoint configuration.
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+ * @param buf, the data buffer to send. Only applicable if the endpoint is TX
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+ * @param len, the length of the data in buf (this example limits max len to one packet - 64 bytes)
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+ */
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+static void usb_start_transfer(struct usb_dc_ep_state *ep, uint8_t *buf, uint16_t len)
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+{
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+ /*!< Prepare buffer control register value */
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+ uint32_t val = len | USB_BUF_CTRL_AVAIL;
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+ if (len < ep->ep_mps) {
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+ val |= USB_BUF_CTRL_LAST;
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+ }
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+
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+ if (USB_EP_DIR_IS_IN(ep->ep_addr)) {
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+ /*!< Need to copy the data from the user buffer to the usb memory */
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+ if (buf != NULL) {
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+ memcpy((void *)ep->dpram_data_buf, (void *)buf, len);
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+ }
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+ /*!< Mark as full */
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+ val |= USB_BUF_CTRL_FULL;
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+ } else {
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+ }
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+
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+ /*!< Set pid and flip for next transfer */
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+ val |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
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+ ep->next_pid ^= 1u;
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+ /**
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+ * !Need delay some cycles
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+ * nop for some clk_sys cycles to ensure that at least one clk_usb cycle has passed. For example if clk_sys was running
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+ * at 125MHz and clk_usb was running at 48MHz then 125/48 rounded up would be 3 nop instructions
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+ */
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+ *ep->buffer_control = val & ~USB_BUF_CTRL_AVAIL;
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+#ifdef __riscv
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+ __asm volatile(
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+ "jal 1f\n"
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+ "1: jal 1f\n"
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+ "1: jal 1f\n"
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+ "1: jal 1f\n"
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+ "1: jal 1f\n"
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+ "1: jal 1f\n"
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+ "1: jal 1f\n"
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+ "1:\n"
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+ ::: "memory");
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+#else
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+ __asm volatile(
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+ "b 1f\n"
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+ "1: b 1f\n"
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+ "1: b 1f\n"
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+ "1: b 1f\n"
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+ "1: b 1f\n"
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+ "1: b 1f\n"
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+ "1: b 1f\n"
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+ "1:\n"
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+ ::: "memory");
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+#endif
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+ *ep->buffer_control = val;
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+}
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+
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+int usb_dc_deinit(uint8_t busid)
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+{
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+ return 0;
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+}
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+
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+int usbd_set_address(uint8_t busid, const uint8_t addr)
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+{
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+ if (addr != 0) {
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+ g_rp2040_udc.dev_addr = addr;
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+ }
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+ return 0;
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+}
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+
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+uint8_t usbd_get_port_speed(uint8_t busid)
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+{
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+ return USB_SPEED_FULL;
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+}
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+
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+int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep)
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+{
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+ uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress);
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+
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+ if (ep_idx == 0) {
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+ /**
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+ * A device must support Endpoint 0 so that it can reply to SETUP packets and be enumerated. As a result, there is no
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+ * endpoint control register for EP0. Its buffers begin at 0x100. All other endpoints can have either single or dual buffers
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+ * and are mapped at the base address programmed. As EP0 has no endpoint control register, the interrupt enable
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+ * controls for EP0 come from SIE_CTRL.
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+ */
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+ g_rp2040_udc.out_ep[ep_idx].endpoint_control = NULL;
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+ g_rp2040_udc.out_ep[ep_idx].dpram_data_buf = (uint8_t *)&usb_dpram->ep0_buf_a[0];
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+ g_rp2040_udc.in_ep[ep_idx].endpoint_control = NULL;
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+ g_rp2040_udc.in_ep[ep_idx].dpram_data_buf = (uint8_t *)&usb_dpram->ep0_buf_a[0];
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+ }
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+
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+ if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) {
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+ g_rp2040_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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+ g_rp2040_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
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+ g_rp2040_udc.out_ep[ep_idx].ep_addr = ep->bEndpointAddress;
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+ g_rp2040_udc.out_ep[ep_idx].ep_enable = true;
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+ /*!< Get control reg */
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+ g_rp2040_udc.out_ep[ep_idx].buffer_control = &usb_dpram->ep_buf_ctrl[ep_idx].out;
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+ /*!< Clear control reg */
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+ *(g_rp2040_udc.out_ep[ep_idx].buffer_control) = 0;
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+
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+ if (ep_idx != 0) {
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+ g_rp2040_udc.out_ep[ep_idx].endpoint_control = &usb_dpram->ep_ctrl[ep_idx - 1].out;
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+ /**
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+ * Allocate a buffer on DPRAM for the endpoint
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+ */
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+ return rp2040_usb_config_ep(&g_rp2040_udc.out_ep[ep_idx]);
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+ }
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+
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+ } else {
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+ g_rp2040_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize);
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+ g_rp2040_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes);
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+ g_rp2040_udc.in_ep[ep_idx].ep_addr = ep->bEndpointAddress;
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+ g_rp2040_udc.in_ep[ep_idx].ep_enable = true;
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+ /*!< Get control reg */
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+ g_rp2040_udc.in_ep[ep_idx].buffer_control = &usb_dpram->ep_buf_ctrl[ep_idx].in;
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+ /*!< Clear control reg */
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+ *(g_rp2040_udc.in_ep[ep_idx].buffer_control) = 0;
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+
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+ if (ep_idx != 0) {
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+ g_rp2040_udc.in_ep[ep_idx].endpoint_control = &usb_dpram->ep_ctrl[ep_idx - 1].in;
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+ /**
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+ * Allocate a buffer on DPRAM for the endpoint
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+ */
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+ return rp2040_usb_config_ep(&g_rp2040_udc.in_ep[ep_idx]);
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+ }
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+ }
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+ return 0;
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+}
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+
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+int usbd_ep_close(uint8_t busid, const uint8_t ep)
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+{
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+ /*!< Ep id */
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+ uint16_t size = 0;
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+
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+ uint8_t epid = USB_EP_GET_IDX(ep);
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+ if (USB_EP_DIR_IS_IN(ep)) {
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+ /*!< In */
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+ size = ((g_rp2040_udc.in_ep[epid].ep_mps + 64 - 1) / 64) * 64;
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+ memset(g_rp2040_udc.in_ep[epid].dpram_data_buf, 0, size);
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+ next_buffer_ptr -= size;
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+ g_rp2040_udc.in_ep[epid].ep_enable = false;
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+ } else if (USB_EP_DIR_IS_OUT(ep)) {
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+ /*!< Out */
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+ size = ((g_rp2040_udc.out_ep[epid].ep_mps + 64 - 1) / 64) * 64;
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+ memset(g_rp2040_udc.out_ep[epid].dpram_data_buf, 0, size);
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+ next_buffer_ptr -= size;
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+ g_rp2040_udc.out_ep[epid].ep_enable = false;
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+ }
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+ return 0;
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+}
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+
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+int usbd_ep_set_stall(uint8_t busid, const uint8_t ep)
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+{
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+ if (USB_EP_GET_IDX(ep) == 0) {
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+ /**
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+ * A stall on EP0 has to be armed so it can be cleared on the next setup packet
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+ */
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+ usb_hw_set->ep_stall_arm = (USB_EP_DIR_IS_IN(ep)) ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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+ }
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+
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+ if (USB_EP_DIR_IS_OUT(ep)) {
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+ *(g_rp2040_udc.out_ep[USB_EP_GET_IDX(ep)].buffer_control) = USB_BUF_CTRL_STALL;
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+ } else {
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+ *(g_rp2040_udc.in_ep[USB_EP_GET_IDX(ep)].buffer_control) = USB_BUF_CTRL_STALL;
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+ }
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+
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+ return 0;
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+}
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+
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+int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep)
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+{
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+ volatile uint32_t value = 0;
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+ if (USB_EP_GET_IDX(ep)) {
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+ if (USB_EP_DIR_IS_OUT(ep)) {
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+ g_rp2040_udc.out_ep[USB_EP_GET_IDX(ep)].next_pid = 0;
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+ value = *(g_rp2040_udc.out_ep[USB_EP_GET_IDX(ep)].buffer_control) & (~USB_BUF_CTRL_STALL);
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+ *(g_rp2040_udc.out_ep[USB_EP_GET_IDX(ep)].buffer_control) = value;
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+ } else {
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+ g_rp2040_udc.in_ep[USB_EP_GET_IDX(ep)].next_pid = 0;
|
|
|
+ value = *(g_rp2040_udc.in_ep[USB_EP_GET_IDX(ep)].buffer_control) & (~USB_BUF_CTRL_STALL);
|
|
|
+ *(g_rp2040_udc.in_ep[USB_EP_GET_IDX(ep)].buffer_control) = value;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled)
|
|
|
+{
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len)
|
|
|
+{
|
|
|
+ uint8_t ep_idx = USB_EP_GET_IDX(ep);
|
|
|
+
|
|
|
+ if (!data && data_len) {
|
|
|
+ return -1;
|
|
|
+ }
|
|
|
+ if (!g_rp2040_udc.in_ep[ep_idx].ep_enable) {
|
|
|
+ return -2;
|
|
|
+ }
|
|
|
+
|
|
|
+ g_rp2040_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data;
|
|
|
+ g_rp2040_udc.in_ep[ep_idx].xfer_len = data_len;
|
|
|
+ g_rp2040_udc.in_ep[ep_idx].actual_xfer_len = 0;
|
|
|
+
|
|
|
+ if (data_len == 0) {
|
|
|
+ usb_start_transfer(&g_rp2040_udc.in_ep[ep_idx], NULL, 0);
|
|
|
+ return 0;
|
|
|
+ } else {
|
|
|
+ /*!< Not zlp */
|
|
|
+ data_len = MIN(data_len, g_rp2040_udc.in_ep[ep_idx].ep_mps);
|
|
|
+ usb_start_transfer(&g_rp2040_udc.in_ep[ep_idx], g_rp2040_udc.in_ep[ep_idx].xfer_buf, data_len);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len)
|
|
|
+{
|
|
|
+ uint8_t ep_idx = USB_EP_GET_IDX(ep);
|
|
|
+
|
|
|
+ if (!data && data_len) {
|
|
|
+ return -1;
|
|
|
+ }
|
|
|
+ if (!g_rp2040_udc.out_ep[ep_idx].ep_enable) {
|
|
|
+ return -2;
|
|
|
+ }
|
|
|
+ g_rp2040_udc.out_ep[ep_idx].xfer_buf = (uint8_t *)data;
|
|
|
+ g_rp2040_udc.out_ep[ep_idx].xfer_len = data_len;
|
|
|
+ g_rp2040_udc.out_ep[ep_idx].actual_xfer_len = 0;
|
|
|
+
|
|
|
+ if (data_len == 0) {
|
|
|
+ usb_start_transfer(&g_rp2040_udc.out_ep[ep_idx], NULL, 0);
|
|
|
+ return 0;
|
|
|
+ } else {
|
|
|
+ /*!< Not zlp */
|
|
|
+ data_len = MIN(data_len, g_rp2040_udc.out_ep[ep_idx].ep_mps);
|
|
|
+ usb_start_transfer(&g_rp2040_udc.out_ep[ep_idx], g_rp2040_udc.out_ep[ep_idx].xfer_buf, data_len);
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * @brief Notify an endpoint that a transfer has completed.
|
|
|
+ *
|
|
|
+ * @param ep, the endpoint to notify.
|
|
|
+ */
|
|
|
+static void usb_handle_ep_buff_done(struct usb_dc_ep_state *ep)
|
|
|
+{
|
|
|
+ uint32_t buffer_control = *ep->buffer_control;
|
|
|
+ /*!< Get the transfer length for this endpoint */
|
|
|
+ uint16_t read_count = buffer_control & USB_BUF_CTRL_LEN_MASK;
|
|
|
+ /*!< Call that endpoints buffer done handler */
|
|
|
+ if (ep->ep_addr == 0x80) {
|
|
|
+ /*!< EP0 In */
|
|
|
+ /**
|
|
|
+ * Determine the current setup direction
|
|
|
+ */
|
|
|
+ switch (g_rp2040_udc.setup.bmRequestType >> USB_REQUEST_DIR_SHIFT) {
|
|
|
+ case 1:
|
|
|
+ /*!< Get */
|
|
|
+ if (g_rp2040_udc.in_ep[0].xfer_len > g_rp2040_udc.in_ep[0].ep_mps) {
|
|
|
+ g_rp2040_udc.in_ep[0].xfer_len -= g_rp2040_udc.in_ep[0].ep_mps;
|
|
|
+ g_rp2040_udc.in_ep[0].actual_xfer_len += g_rp2040_udc.in_ep[0].ep_mps;
|
|
|
+ usbd_event_ep_in_complete_handler(0, 0 | 0x80, g_rp2040_udc.in_ep[0].actual_xfer_len);
|
|
|
+ } else {
|
|
|
+ g_rp2040_udc.in_ep[0].actual_xfer_len += g_rp2040_udc.in_ep[0].xfer_len;
|
|
|
+ g_rp2040_udc.in_ep[0].xfer_len = 0;
|
|
|
+ /**
|
|
|
+ * EP0 In complete and host will send a out token to get 0 length packet
|
|
|
+ * In the next usbd_event_ep_in_complete_handler, stack will start read 0 length packet
|
|
|
+ * and host must send data1 packet.We resest the ep0 next_pid = 1 in setup interrupt head.
|
|
|
+ */
|
|
|
+ usbd_event_ep_in_complete_handler(0, 0 | 0x80, g_rp2040_udc.in_ep[0].actual_xfer_len);
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case 0:
|
|
|
+ /*!< Set */
|
|
|
+ if (g_rp2040_udc.dev_addr > 0) {
|
|
|
+ usb_hw->dev_addr_ctrl = g_rp2040_udc.dev_addr;
|
|
|
+ g_rp2040_udc.dev_addr = 0;
|
|
|
+ } else {
|
|
|
+ /*!< Normal status stage // Setup out...out in */
|
|
|
+ /**
|
|
|
+ * Perpar for next setup
|
|
|
+ */
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ } else if (ep->ep_addr == 0x00) {
|
|
|
+ /*!< EP0 Out */
|
|
|
+ memcpy(g_rp2040_udc.out_ep[0].xfer_buf, g_rp2040_udc.out_ep[0].dpram_data_buf, read_count);
|
|
|
+ if (read_count == 0) {
|
|
|
+ /*!< Normal status stage // Setup in...in out */
|
|
|
+ /**
|
|
|
+ * Perpar for next setup
|
|
|
+ */
|
|
|
+ }
|
|
|
+
|
|
|
+ g_rp2040_udc.out_ep[0].actual_xfer_len += read_count;
|
|
|
+ g_rp2040_udc.out_ep[0].xfer_len -= read_count;
|
|
|
+
|
|
|
+ usbd_event_ep_out_complete_handler(0, 0x00, g_rp2040_udc.out_ep[0].actual_xfer_len);
|
|
|
+ } else {
|
|
|
+ /*!< Others ep */
|
|
|
+ uint16_t data_len = 0;
|
|
|
+ if (USB_EP_DIR_IS_OUT(ep->ep_addr)) {
|
|
|
+ /*!< flip the pid */
|
|
|
+ memcpy(g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].xfer_buf, g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].dpram_data_buf, read_count);
|
|
|
+ g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].xfer_buf += read_count;
|
|
|
+ g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].actual_xfer_len += read_count;
|
|
|
+ g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].xfer_len -= read_count;
|
|
|
+
|
|
|
+ if (read_count < g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].ep_mps || g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].xfer_len == 0) {
|
|
|
+ /*!< Out complete */
|
|
|
+ usbd_event_ep_out_complete_handler(0, ep->ep_addr, g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].actual_xfer_len);
|
|
|
+ } else {
|
|
|
+ /*!< Need read again */
|
|
|
+ data_len = MIN(g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].xfer_len, g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f].ep_mps);
|
|
|
+ usb_start_transfer(&g_rp2040_udc.out_ep[(ep->ep_addr) & 0x0f], NULL, data_len);
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ if (g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].xfer_len > g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].ep_mps) {
|
|
|
+ /*!< Need tx again */
|
|
|
+ g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].xfer_len -= g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].ep_mps;
|
|
|
+ g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].xfer_buf += g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].ep_mps;
|
|
|
+ g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].actual_xfer_len += g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].ep_mps;
|
|
|
+ data_len = MIN(g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].xfer_len, g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].ep_mps);
|
|
|
+ usb_start_transfer(&g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f], g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].xfer_buf, data_len);
|
|
|
+ } else {
|
|
|
+ /*!< In complete */
|
|
|
+ g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].actual_xfer_len += g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].xfer_len;
|
|
|
+ g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].xfer_len = 0;
|
|
|
+ usbd_event_ep_in_complete_handler(0, ep->ep_addr, g_rp2040_udc.in_ep[(ep->ep_addr) & 0x0f].actual_xfer_len);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * @brief Find the endpoint configuration for a specified endpoint number and
|
|
|
+ * direction and notify it that a transfer has completed.
|
|
|
+ *
|
|
|
+ * @param ep_num
|
|
|
+ * @param in
|
|
|
+ */
|
|
|
+static void usb_handle_buff_done(uint8_t ep_num, bool in)
|
|
|
+{
|
|
|
+ uint8_t ep_addr = ep_num | (in ? USB_EP_DIR_IN : 0);
|
|
|
+ if (USB_EP_DIR_IS_OUT(ep_addr)) {
|
|
|
+ usb_handle_ep_buff_done(&g_rp2040_udc.out_ep[ep_num]);
|
|
|
+ } else {
|
|
|
+ usb_handle_ep_buff_done(&g_rp2040_udc.in_ep[ep_num]);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * @brief Handle a "buffer status" irq. This means that one or more
|
|
|
+ * buffers have been sent / received. Notify each endpoint where this
|
|
|
+ * is the case.
|
|
|
+ */
|
|
|
+static void usb_handle_buff_status(void)
|
|
|
+{
|
|
|
+ uint32_t buffers = usb_hw->buf_status;
|
|
|
+ uint32_t remaining_buffers = buffers;
|
|
|
+
|
|
|
+ uint32_t bit = 1u;
|
|
|
+ for (uint8_t i = 0; remaining_buffers && i < USB_NUM_ENDPOINTS * 2; i++) {
|
|
|
+ if (remaining_buffers & bit) {
|
|
|
+ /*!< clear this in advance */
|
|
|
+ usb_hw_clear->buf_status = bit;
|
|
|
+ /*!< IN transfer for even i, OUT transfer for odd i */
|
|
|
+ usb_handle_buff_done(i >> 1u, !(i & 1u));
|
|
|
+ remaining_buffers &= ~bit;
|
|
|
+ }
|
|
|
+ bit <<= 1u;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+void USBD_IRQHandler(void)
|
|
|
+{
|
|
|
+ uint32_t const status = usb_hw->ints;
|
|
|
+ uint32_t handled = 0;
|
|
|
+
|
|
|
+ if (status & USB_INTS_BUFF_STATUS_BITS) {
|
|
|
+ handled |= USB_INTS_BUFF_STATUS_BITS;
|
|
|
+ usb_handle_buff_status();
|
|
|
+ }
|
|
|
+
|
|
|
+ if (status & USB_INTS_SETUP_REQ_BITS) {
|
|
|
+ handled |= USB_INTS_SETUP_REQ_BITS;
|
|
|
+ memcpy((uint8_t *)&g_rp2040_udc.setup, (uint8_t const *)&usb_dpram->setup_packet, 8);
|
|
|
+ /**
|
|
|
+ * reset pid to both 1 (data and ack)
|
|
|
+ */
|
|
|
+ g_rp2040_udc.in_ep[0].next_pid = 1;
|
|
|
+ g_rp2040_udc.out_ep[0].next_pid = 1;
|
|
|
+ usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_rp2040_udc.setup);
|
|
|
+ usb_hw_clear->sie_status = USB_SIE_STATUS_SETUP_REC_BITS;
|
|
|
+ }
|
|
|
+
|
|
|
+#if FORCE_VBUS_DETECT == 0
|
|
|
+ /**
|
|
|
+ * Since we force VBUS detect On, device will always think it is connected and
|
|
|
+ * couldn't distinguish between disconnect and suspend
|
|
|
+ */
|
|
|
+ if (status & USB_INTS_DEV_CONN_DIS_BITS) {
|
|
|
+ handled |= USB_INTS_DEV_CONN_DIS_BITS;
|
|
|
+ if (usb_hw->sie_status & USB_SIE_STATUS_CONNECTED_BITS) {
|
|
|
+ /*!< Connected: nothing to do */
|
|
|
+ } else {
|
|
|
+ /*!< Disconnected */
|
|
|
+ }
|
|
|
+ usb_hw_clear->sie_status = USB_SIE_STATUS_CONNECTED_BITS;
|
|
|
+ }
|
|
|
+#endif
|
|
|
+
|
|
|
+ /**
|
|
|
+ * SE0 for 2.5 us or more (will last at least 10ms)
|
|
|
+ */
|
|
|
+ if (status & USB_INTS_BUS_RESET_BITS) {
|
|
|
+ handled |= USB_INTS_BUS_RESET_BITS;
|
|
|
+ usb_hw->dev_addr_ctrl = 0;
|
|
|
+
|
|
|
+ for (uint8_t i = 0; i < CONFIG_USBDEV_EP_NUM - 1; i++) {
|
|
|
+ /*!< Start at ep1 */
|
|
|
+ usb_dpram->ep_ctrl[i].in = 0;
|
|
|
+ usb_dpram->ep_ctrl[i].out = 0;
|
|
|
+ }
|
|
|
+ /*!< reclaim buffer space */
|
|
|
+ next_buffer_ptr = &usb_dpram->epx_data[0];
|
|
|
+
|
|
|
+ usbd_event_reset_handler(0);
|
|
|
+ usb_hw_clear->sie_status = USB_SIE_STATUS_BUS_RESET_BITS;
|
|
|
+
|
|
|
+#if CHERRYUSB_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
|
|
|
+ /**
|
|
|
+ * Only run enumeration walk-around if pull up is enabled
|
|
|
+ */
|
|
|
+ if (usb_hw->sie_ctrl & USB_SIE_CTRL_PULLUP_EN_BITS)
|
|
|
+ rp2040_usb_device_enumeration_fix();
|
|
|
+#endif
|
|
|
+ }
|
|
|
+
|
|
|
+ /**
|
|
|
+ * Note from pico datasheet 4.1.2.6.4 (v1.2)
|
|
|
+ * If you enable the suspend interrupt, it is likely you will see a suspend interrupt when
|
|
|
+ * the device is first connected but the bus is idle. The bus can be idle for a few ms before
|
|
|
+ * the host begins sending start of frame packets. You will also see a suspend interrupt
|
|
|
+ * when the device is disconnected if you do not have a VBUS detect circuit connected. This is
|
|
|
+ * because without VBUS detection, it is impossible to tell the difference between
|
|
|
+ * being disconnected and suspended.
|
|
|
+ */
|
|
|
+ if (status & USB_INTS_DEV_SUSPEND_BITS) {
|
|
|
+ handled |= USB_INTS_DEV_SUSPEND_BITS;
|
|
|
+ /*!< Suspend */
|
|
|
+ usb_hw_clear->sie_status = USB_SIE_STATUS_SUSPENDED_BITS;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (status & USB_INTS_DEV_RESUME_FROM_HOST_BITS) {
|
|
|
+ handled |= USB_INTS_DEV_RESUME_FROM_HOST_BITS;
|
|
|
+ /*!< Resume */
|
|
|
+ usb_hw_clear->sie_status = USB_SIE_STATUS_RESUME_BITS;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (status ^ handled) {
|
|
|
+ USB_LOG_INFO("Unhandled IRQ 0x%x\n", (uint32_t)(status ^ handled));
|
|
|
+ }
|
|
|
+}
|
sakumisu