Merge pull request #8 from mbbill/correct_crlf

Correct crlf

.gitattributes

@@ -1 +1,42 @@
 * text=auto
+
+*.S text
+*.asm text
+*.c text
+*.cc text
+*.cpp text
+*.cxx text
+*.h text
+*.htm text
+*.html text
+*.in text
+*.ld text
+*.m4 text
+*.mak text
+*.mk text
+*.py text
+*.rb text
+*.s text
+*.sct text
+*.sh text
+*.txt text
+*.xml text
+SConscript text
+Makefile text
+AUTHORS text
+COPYING text
+
+*.LZO -text
+*.Opt -text
+*.Uv2 -text
+*.ewp -text
+*.eww -text
+*.vcproj -text
+*.bat -text
+*.dos -text
+*.icf -text
+*.inf -text
+*.ini -text
+*.sct -text
+*.xsd -text
+Jamfile -text

AUTHORS

@@ -1,45 +1,45 @@
-Kernel Design & Implementation
-- Bernard Xiong <bernard.xiong@gmail.com>
-
-LwIP 1.3.0/1.3.1/1.3.2/1.4.0
-- Porting
-  Qiu Yi
-  Mbbill
-- Testing
-  Bernard Xiong
-
-Filesystem
-- Porting and Add Virtual Filesystem
-- Testing
-  Qiu Yi
-  prife
-
-RTGUI
-- Design and Implemenation
-  Bernard Xiong
-  Grissiom
-
-BSP
-Bernard Xiong
-- ATMEL AT91SAM7S64 & AT91SAM7X256 Porting
-- STM32 Porting
-- S3C4510 Porting
-
-Mbbill
-- ATMEL AT91SAM7X256
-
-Xulong Cao
-- QEMU/x86
-
-Aozima
-- LPC 2148 Porting
-- STM32 Porting
-
-Jing Lee
-- LPC 2478 Porting
-
-Qiu Yi
-- S3C2410 & S3C2440 Porting
-- TI LM3S
-
-others...
+Kernel Design & Implementation
+- Bernard Xiong <bernard.xiong@gmail.com>
+
+LwIP 1.3.0/1.3.1/1.3.2/1.4.0
+- Porting
+  Qiu Yi
+  Mbbill
+- Testing
+  Bernard Xiong
+
+Filesystem
+- Porting and Add Virtual Filesystem
+- Testing
+  Qiu Yi
+  prife
+
+RTGUI
+- Design and Implemenation
+  Bernard Xiong
+  Grissiom
+
+BSP
+Bernard Xiong
+- ATMEL AT91SAM7S64 & AT91SAM7X256 Porting
+- STM32 Porting
+- S3C4510 Porting
+
+Mbbill
+- ATMEL AT91SAM7X256
+
+Xulong Cao
+- QEMU/x86
+
+Aozima
+- LPC 2148 Porting
+- STM32 Porting
+
+Jing Lee
+- LPC 2478 Porting
+
+Qiu Yi
+- S3C2410 & S3C2440 Porting
+- TI LM3S
+
+others...

bsp/at91sam9260/SConscript

@@ -1,24 +1,24 @@
-import rtconfig
-Import('RTT_ROOT')
-from building import *
-
-src_bsp = ['application.c', 'startup.c', 'board.c']
-src_drv = ['console.c']
-
-if GetDepend('RT_USING_LED'):
-	src_drv += ['led.c']
-
-if GetDepend('RT_USING_SDIO'):
-	src_drv += ['at91_mci.c']
-
-if GetDepend('RT_USING_LWIP'):
-	src_drv += ['macb.c']
-
-if GetDepend('RT_USING_I2C') and GetDepend('RT_USING_I2C_BITOPS'):
-	src_drv += ['at91_i2c_gpio.c']
-
-src	= File(src_bsp + src_drv)
-CPPPATH = [RTT_ROOT + '/bsp/at91sam9260']
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+import rtconfig
+Import('RTT_ROOT')
+from building import *
+
+src_bsp = ['application.c', 'startup.c', 'board.c']
+src_drv = ['console.c']
+
+if GetDepend('RT_USING_LED'):
+	src_drv += ['led.c']
+
+if GetDepend('RT_USING_SDIO'):
+	src_drv += ['at91_mci.c']
+
+if GetDepend('RT_USING_LWIP'):
+	src_drv += ['macb.c']
+
+if GetDepend('RT_USING_I2C') and GetDepend('RT_USING_I2C_BITOPS'):
+	src_drv += ['at91_i2c_gpio.c']
+
+src	= File(src_bsp + src_drv)
+CPPPATH = [RTT_ROOT + '/bsp/at91sam9260']
+group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/at91sam9260/SConstruct

@@ -1,41 +1,41 @@
-import os
-import sys
-import rtconfig
-
-if os.getenv('RTT_ROOT'):
-    RTT_ROOT = os.getenv('RTT_ROOT')
-else:
-    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
-
-sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
-from building import *
-
-TARGET = 'rtthread-at91sam9260.' + rtconfig.TARGET_EXT
-
-env = Environment(tools = ['mingw'],
-	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-	AR = rtconfig.AR, ARFLAGS = '-rc',
-	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
-env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
-
-Export('RTT_ROOT')
-Export('rtconfig')
-
-# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
-
-if GetDepend('RT_USING_WEBSERVER'):
-    objs = objs + SConscript(RTT_ROOT + '/components/net/webserver/SConscript', variant_dir='build/net/webserver', duplicate=0)
-
-if GetDepend('RT_USING_RTGUI'):
-    objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)
-
-# libc testsuite 
-objs = objs + SConscript(RTT_ROOT + '/examples/libc/SConscript', variant_dir='build/examples/libc', duplicate=0)
-
-# build program 
-env.Program(TARGET, objs)
-
-# end building 
-EndBuilding(TARGET)
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread-at91sam9260.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+
+if GetDepend('RT_USING_WEBSERVER'):
+    objs = objs + SConscript(RTT_ROOT + '/components/net/webserver/SConscript', variant_dir='build/net/webserver', duplicate=0)
+
+if GetDepend('RT_USING_RTGUI'):
+    objs = objs + SConscript(RTT_ROOT + '/examples/gui/SConscript', variant_dir='build/examples/gui', duplicate=0)
+
+# libc testsuite 
+objs = objs + SConscript(RTT_ROOT + '/examples/libc/SConscript', variant_dir='build/examples/libc', duplicate=0)
+
+# build program 
+env.Program(TARGET, objs)
+
+# end building 
+EndBuilding(TARGET)

bsp/at91sam9260/application.c

@@ -1,232 +1,232 @@
-/*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author		Notes
- * 2011-01-13     weety		first version
- */
-
-/**
- * @addtogroup at91sam9260
- */
-/*@{*/
-
-#include <rtthread.h>
-#include <rtdevice.h>
-
-#ifdef RT_USING_DFS
-/* dfs init */
-#include <dfs_init.h>
-/* dfs filesystem:ELM FatFs filesystem init */
-#include <dfs_elm.h>
-/* dfs Filesystem APIs */
-#include <dfs_fs.h>
-#ifdef RT_USING_DFS_UFFS
-/* dfs filesystem:UFFS filesystem init */
-#include <dfs_uffs.h>
-#endif
-#endif
-
-#if defined(RT_USING_DFS_DEVFS)
-#include <devfs.h>
-#endif
-
-#ifdef RT_USING_SDIO
-#include <drivers/mmcsd_core.h>
-#include "at91_mci.h"
-#endif
-
-#ifdef RT_USING_LWIP
-#include <netif/ethernetif.h>
-//#include <arch/sys_arch_init.h>
-#include "macb.h"
-#endif
-
-#ifdef RT_USING_LED
-#include "led.h"
-#endif
-
-#define RT_INIT_THREAD_STACK_SIZE (2*1024)
-
-#ifdef RT_USING_DFS_ROMFS
-#include <dfs_romfs.h>
-#endif
-
-void rt_init_thread_entry(void* parameter)
-{
-/* Filesystem Initialization */
-#ifdef RT_USING_DFS
-	{
-		/* init the device filesystem */
-		dfs_init();
-
-#if defined(RT_USING_DFS_ELMFAT)
-		/* init the elm chan FatFs filesystam*/
-		elm_init();
-#endif
-
-#if defined(RT_USING_DFS_ROMFS)
-		dfs_romfs_init();
-		if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0)
-		{
-			rt_kprintf("ROM File System initialized!\n");
-		}
-		else
-			rt_kprintf("ROM File System initialzation failed!\n");
-#endif
-
-#if defined(RT_USING_DFS_DEVFS)
-		devfs_init();
-		if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0)
-			rt_kprintf("Device File System initialized!\n");
-		else
-			rt_kprintf("Device File System initialzation failed!\n");
-
-		#ifdef RT_USING_NEWLIB
-		/* init libc */
-		libc_system_init("uart0");
-		#endif
-#endif
-
-#if defined(RT_USING_DFS_UFFS)
-	{
-		/* init the uffs filesystem */
-		dfs_uffs_init();
-
-		/* mount flash device as flash directory */
-		if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0)
-			rt_kprintf("UFFS File System initialized!\n");
-		else
-			rt_kprintf("UFFS File System initialzation failed!\n");
-	}
-#endif
-
-#ifdef RT_USING_SDIO
-	rt_mmcsd_core_init();
-	rt_mmcsd_blk_init();
-	at91_mci_init();
-	rt_thread_delay(RT_TICK_PER_SECOND*2);
-	/* mount sd card fat partition 1 as root directory */
-		if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
-		{
-			rt_kprintf("File System initialized!\n");
-		}
-		else
-			rt_kprintf("File System initialzation failed!\n");
-#endif
-	}
-#endif
-
-#ifdef RT_USING_LWIP
-	{
-		/* register ethernetif device */
-		eth_system_device_init();
-		rt_hw_macb_init();
-		/* re-init device driver */
-		rt_device_init_all();
-		/* init lwip system */
-		lwip_sys_init();
-	}
-#endif
-
-#ifdef RT_USING_I2C
-	{
-		rt_i2c_core_init();
-		at91_i2c_init();
-	}
-#endif
-
-}
-
-#ifdef RT_USING_LED
-void rt_led_thread_entry(void* parameter)
-{
-	rt_uint8_t cnt = 0;
-	led_init();
-	while(1)
-	{
-		/* light on leds for one second */
-		rt_thread_delay(40);
-		cnt++;
-		if (cnt&0x01)
-			led_on(1);
-		else
-			led_off(1);
-		if (cnt&0x02)
-			led_on(2);
-		else
-			led_off(2);
-		if (cnt&0x04)
-			led_on(3);
-		else
-			led_off(3);
-			
-	}
-}
-#endif
-
-int rt_application_init()
-{
-	rt_thread_t init_thread;
-#ifdef RT_USING_LED
-	rt_thread_t led_thread;
-#endif
-
-#if (RT_THREAD_PRIORITY_MAX == 32)
-	init_thread = rt_thread_create("init",
-								rt_init_thread_entry, RT_NULL,
-								RT_INIT_THREAD_STACK_SIZE, 8, 20);
-#ifdef RT_USING_LED
-	led_thread = rt_thread_create("led",
-								rt_led_thread_entry, RT_NULL,
-								512, 20, 20);
-#endif
-								
-#else
-	init_thread = rt_thread_create("init",
-								rt_init_thread_entry, RT_NULL,
-								RT_INIT_THREAD_STACK_SIZE, 80, 20);
-#ifdef RT_USING_LED
-	led_thread = rt_thread_create("led",
-								rt_led_thread_entry, RT_NULL,
-								512, 200, 20);
-#endif
-								
-#endif
-
-	if (init_thread != RT_NULL)
-		rt_thread_startup(init_thread);
-#ifdef RT_USING_LED
-	if(led_thread != RT_NULL)
-		rt_thread_startup(led_thread);
-#endif
-
-	return 0;
-}
-
-/* NFSv3 Initialization */
-#if defined(RT_USING_DFS) && defined(RT_USING_LWIP) && defined(RT_USING_DFS_NFS)
-#include <dfs_nfs.h>
-void nfs_start(void)
-{
-	nfs_init();
-
-	if (dfs_mount(RT_NULL, "/nfs", "nfs", 0, RT_NFS_HOST_EXPORT) == 0)
-	{
-		rt_kprintf("NFSv3 File System initialized!\n");
-	}
-	else
-		rt_kprintf("NFSv3 File System initialzation failed!\n");
-}
-
-#include "finsh.h"
-FINSH_FUNCTION_EXPORT(nfs_start, start net filesystem);
-#endif
-
-/*@}*/
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author		Notes
+ * 2011-01-13     weety		first version
+ */
+
+/**
+ * @addtogroup at91sam9260
+ */
+/*@{*/
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#ifdef RT_USING_DFS
+/* dfs init */
+#include <dfs_init.h>
+/* dfs filesystem:ELM FatFs filesystem init */
+#include <dfs_elm.h>
+/* dfs Filesystem APIs */
+#include <dfs_fs.h>
+#ifdef RT_USING_DFS_UFFS
+/* dfs filesystem:UFFS filesystem init */
+#include <dfs_uffs.h>
+#endif
+#endif
+
+#if defined(RT_USING_DFS_DEVFS)
+#include <devfs.h>
+#endif
+
+#ifdef RT_USING_SDIO
+#include <drivers/mmcsd_core.h>
+#include "at91_mci.h"
+#endif
+
+#ifdef RT_USING_LWIP
+#include <netif/ethernetif.h>
+//#include <arch/sys_arch_init.h>
+#include "macb.h"
+#endif
+
+#ifdef RT_USING_LED
+#include "led.h"
+#endif
+
+#define RT_INIT_THREAD_STACK_SIZE (2*1024)
+
+#ifdef RT_USING_DFS_ROMFS
+#include <dfs_romfs.h>
+#endif
+
+void rt_init_thread_entry(void* parameter)
+{
+/* Filesystem Initialization */
+#ifdef RT_USING_DFS
+	{
+		/* init the device filesystem */
+		dfs_init();
+
+#if defined(RT_USING_DFS_ELMFAT)
+		/* init the elm chan FatFs filesystam*/
+		elm_init();
+#endif
+
+#if defined(RT_USING_DFS_ROMFS)
+		dfs_romfs_init();
+		if (dfs_mount(RT_NULL, "/rom", "rom", 0, &romfs_root) == 0)
+		{
+			rt_kprintf("ROM File System initialized!\n");
+		}
+		else
+			rt_kprintf("ROM File System initialzation failed!\n");
+#endif
+
+#if defined(RT_USING_DFS_DEVFS)
+		devfs_init();
+		if (dfs_mount(RT_NULL, "/dev", "devfs", 0, 0) == 0)
+			rt_kprintf("Device File System initialized!\n");
+		else
+			rt_kprintf("Device File System initialzation failed!\n");
+
+		#ifdef RT_USING_NEWLIB
+		/* init libc */
+		libc_system_init("uart0");
+		#endif
+#endif
+
+#if defined(RT_USING_DFS_UFFS)
+	{
+		/* init the uffs filesystem */
+		dfs_uffs_init();
+
+		/* mount flash device as flash directory */
+		if(dfs_mount("nand0", "/nand0", "uffs", 0, 0) == 0)
+			rt_kprintf("UFFS File System initialized!\n");
+		else
+			rt_kprintf("UFFS File System initialzation failed!\n");
+	}
+#endif
+
+#ifdef RT_USING_SDIO
+	rt_mmcsd_core_init();
+	rt_mmcsd_blk_init();
+	at91_mci_init();
+	rt_thread_delay(RT_TICK_PER_SECOND*2);
+	/* mount sd card fat partition 1 as root directory */
+		if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
+		{
+			rt_kprintf("File System initialized!\n");
+		}
+		else
+			rt_kprintf("File System initialzation failed!\n");
+#endif
+	}
+#endif
+
+#ifdef RT_USING_LWIP
+	{
+		/* register ethernetif device */
+		eth_system_device_init();
+		rt_hw_macb_init();
+		/* re-init device driver */
+		rt_device_init_all();
+		/* init lwip system */
+		lwip_sys_init();
+	}
+#endif
+
+#ifdef RT_USING_I2C
+	{
+		rt_i2c_core_init();
+		at91_i2c_init();
+	}
+#endif
+
+}
+
+#ifdef RT_USING_LED
+void rt_led_thread_entry(void* parameter)
+{
+	rt_uint8_t cnt = 0;
+	led_init();
+	while(1)
+	{
+		/* light on leds for one second */
+		rt_thread_delay(40);
+		cnt++;
+		if (cnt&0x01)
+			led_on(1);
+		else
+			led_off(1);
+		if (cnt&0x02)
+			led_on(2);
+		else
+			led_off(2);
+		if (cnt&0x04)
+			led_on(3);
+		else
+			led_off(3);
+			
+	}
+}
+#endif
+
+int rt_application_init()
+{
+	rt_thread_t init_thread;
+#ifdef RT_USING_LED
+	rt_thread_t led_thread;
+#endif
+
+#if (RT_THREAD_PRIORITY_MAX == 32)
+	init_thread = rt_thread_create("init",
+								rt_init_thread_entry, RT_NULL,
+								RT_INIT_THREAD_STACK_SIZE, 8, 20);
+#ifdef RT_USING_LED
+	led_thread = rt_thread_create("led",
+								rt_led_thread_entry, RT_NULL,
+								512, 20, 20);
+#endif
+								
+#else
+	init_thread = rt_thread_create("init",
+								rt_init_thread_entry, RT_NULL,
+								RT_INIT_THREAD_STACK_SIZE, 80, 20);
+#ifdef RT_USING_LED
+	led_thread = rt_thread_create("led",
+								rt_led_thread_entry, RT_NULL,
+								512, 200, 20);
+#endif
+								
+#endif
+
+	if (init_thread != RT_NULL)
+		rt_thread_startup(init_thread);
+#ifdef RT_USING_LED
+	if(led_thread != RT_NULL)
+		rt_thread_startup(led_thread);
+#endif
+
+	return 0;
+}
+
+/* NFSv3 Initialization */
+#if defined(RT_USING_DFS) && defined(RT_USING_LWIP) && defined(RT_USING_DFS_NFS)
+#include <dfs_nfs.h>
+void nfs_start(void)
+{
+	nfs_init();
+
+	if (dfs_mount(RT_NULL, "/nfs", "nfs", 0, RT_NFS_HOST_EXPORT) == 0)
+	{
+		rt_kprintf("NFSv3 File System initialized!\n");
+	}
+	else
+		rt_kprintf("NFSv3 File System initialzation failed!\n");
+}
+
+#include "finsh.h"
+FINSH_FUNCTION_EXPORT(nfs_start, start net filesystem);
+#endif
+
+/*@}*/

bsp/at91sam9260/board.h

@@ -1,24 +1,24 @@
-/*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2006, RT-Thread Develop Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2011-01-13     weety      add board.h to this bsp
- */
-
-#ifndef __BOARD_H__
-#define __BOARD_H__
-
-#include <at91sam926x.h>
-#include <serial.h>
-
-void rt_hw_board_init(void);
-//void rt_hw_sdcard_init(void);
-
-#endif
+/*
+ * File      : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-01-13     weety      add board.h to this bsp
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <at91sam926x.h>
+#include <serial.h>
+
+void rt_hw_board_init(void);
+//void rt_hw_sdcard_init(void);
+
+#endif

bsp/at91sam9260/rtconfig.h

@@ -1,255 +1,255 @@
-/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
-
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX	32
-
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
-
-/* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX	256
-
-/* Tick per Second */
-#define RT_TICK_PER_SECOND	100
-
-/* SECTION: RT_DEBUG */
-/* Thread Debug */
-#define RT_DEBUG
-//#define SCHEDULER_DEBUG
-/* #define RT_THREAD_DEBUG */
-
-#define RT_USING_OVERFLOW_CHECK
-
-/* Using Hook */
-#define RT_USING_HOOK
-
-/* Using Software Timer */
-#define RT_USING_TIMER_SOFT
-#define RT_TIMER_THREAD_PRIO		8
-#define RT_TIMER_THREAD_STACK_SIZE	512
-#define RT_TIMER_TICK_PER_SECOND	10
-
-/* SECTION: IPC */
-/* Using Semaphore */
-#define RT_USING_SEMAPHORE
-
-/* Using Mutex */
-#define RT_USING_MUTEX
-
-/* Using Event */
-#define RT_USING_EVENT
-
-/* Using MailBox */
-#define RT_USING_MAILBOX
-
-/* Using Message Queue */
-#define RT_USING_MESSAGEQUEUE
-
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-#define RT_USING_MEMPOOL
-
-/* Using Dynamic Heap Management */
-#define RT_USING_HEAP
-
-/* Using Small MM */
-/* #define RT_USING_SMALL_MEM */
-
-/* Using SLAB Allocator */
-#define RT_USING_SLAB
-
-/* SECTION: Device System */
-/* Using Device System */
-#define RT_USING_DEVICE
-
-/* Using Module System */
-#define RT_USING_MODULE
-#define RT_USING_LIBDL
-
-/* SECTION: Console options */
-#define RT_USING_CONSOLE
-/* the buffer size of console */
-#define RT_CONSOLEBUF_SIZE	128
-
-/* SECTION: finsh, a C-Express shell */
-/* Using FinSH as Shell*/
-#define RT_USING_FINSH
-/* Using symbol table */
-#define FINSH_USING_SYMTAB
-#define FINSH_USING_DESCRIPTION
-#define FINSH_THREAD_STACK_SIZE 4096
-
-/* SECTION: the runtime libc library */
-/* the runtime libc library */
-#define RT_USING_NEWLIB
-#define RT_USING_PTHREADS
-
-/* SECTION: C++ support */
-/* Using C++ support */
-/* #define RT_USING_CPLUSPLUS */
-
-/* SECTION: Device filesystem support */
-/* using DFS support */
-#define RT_USING_DFS
-#define RT_USING_DFS_ELMFAT
-/* use long file name feature */
-#define RT_DFS_ELM_USE_LFN			2
-#define RT_DFS_ELM_REENTRANT
-/* define OEM code page */
-#define RT_DFS_ELM_CODE_PAGE	936
-/* Using OEM code page file */
-// #define RT_DFS_ELM_CODE_PAGE_FILE
-/* the max number of file length */
-#define RT_DFS_ELM_MAX_LFN			128
-/* #define RT_USING_DFS_YAFFS2 */
-#define RT_USING_DFS_DEVFS
-
-#define RT_USING_DFS_NFS
-#define RT_NFS_HOST_EXPORT		"192.168.1.5:/"
-
-#define DFS_USING_WORKDIR
-
-/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX		4
-/* the max number of opened files */
-#define DFS_FD_MAX					16
-/* the max number of cached sector */
-#define DFS_CACHE_MAX_NUM   		4
-
-/* Enable freemodbus protocol stack*/
-/* #define RT_USING_MODBUS */
-
-//#define RT_USING_LED
-
-#define RT_USING_SDIO
-
-#define RT_USING_I2C
-#define RT_USING_I2C_BITOPS
-
-#define RT_USING_DBGU
-/* #define RT_USING_UART0 */
-/* #define RT_USING_UART1 */
-/* #define RT_USING_UART2 */
-/* #define RT_USING_UART3 */
-
-/* SECTION: lwip, a lightweight TCP/IP protocol stack */
-/* Using lightweight TCP/IP protocol stack */
-#define RT_USING_LWIP
-#define RT_LWIP_DNS
-
-#define LWIP_NETIF_LINK_CALLBACK 1
-
-/* Trace LwIP protocol */
-// #define RT_LWIP_DEBUG 
-
-/* Enable ICMP protocol */
-#define RT_LWIP_ICMP
-
-/* Enable IGMP protocol */
-#define RT_LWIP_IGMP
-
-/* Enable UDP protocol */
-#define RT_LWIP_UDP
-
-/* Enable TCP protocol */
-#define RT_LWIP_TCP
-
-/* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM	5
-
-/* TCP sender buffer space */
-#define RT_LWIP_TCP_SND_BUF	1024*10
-
-/* TCP receive window. */
-#define RT_LWIP_TCP_WND	1024*8
-
-/* Enable SNMP protocol */
-/* #define RT_LWIP_SNMP */
-
-/* Using DHCP */
-/* #define RT_LWIP_DHCP */
-
-/* ip address of target */
-#define RT_LWIP_IPADDR0	192
-#define RT_LWIP_IPADDR1	168
-#define RT_LWIP_IPADDR2	1
-#define RT_LWIP_IPADDR3	30
-
-/* gateway address of target */
-#define RT_LWIP_GWADDR0	192
-#define RT_LWIP_GWADDR1	168
-#define RT_LWIP_GWADDR2	1
-#define RT_LWIP_GWADDR3	1
-
-/* mask address of target */
-#define RT_LWIP_MSKADDR0	255
-#define RT_LWIP_MSKADDR1	255
-#define RT_LWIP_MSKADDR2	255
-#define RT_LWIP_MSKADDR3	0
-
-/* the number of blocks for pbuf */
-#define RT_LWIP_PBUF_NUM	16
-
-/* the number of simultaneously queued TCP */
-#define RT_LWIP_TCP_SEG_NUM    40
-
-/* thread priority of tcpip thread */
-#define RT_LWIP_TCPTHREAD_PRIORITY	128
-
-/* mail box size of tcpip thread to wait for */
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE	32
-
-/* thread stack size of tcpip thread */
-#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
-
-/* thread priority of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_PRIORITY	144
-
-/* mail box size of ethnetif thread to wait for */
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE	32
-
-/* thread stack size of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
-
-
-/* SECTION: RTGUI support */
-/* using RTGUI support */
-/* #define RT_USING_RTGUI */
-
-/* name length of RTGUI object */
-//#define RTGUI_NAME_MAX		16
-/* support 16 weight font */
-//#define RTGUI_USING_FONT16
-/* support 16 weight font */
-//#define RTGUI_USING_FONT12
-/* support Chinese font */
-//#define RTGUI_USING_FONTHZ
-/* use DFS as file interface */
-//#define RTGUI_USING_DFS_FILERW
-/* use font file as Chinese font */
-/* #define RTGUI_USING_HZ_FILE */
-/* use Chinese bitmap font */
-//#define RTGUI_USING_HZ_BMP
-/* use small size in RTGUI */
-/* #define RTGUI_USING_SMALL_SIZE */
-/* use mouse cursor */
-/* #define RTGUI_USING_MOUSE_CURSOR */
-
-/* SECTION: FTK support */
-/* using FTK support */
-/* #define RT_USING_FTK */
-
-/*
- * Note on FTK:
- * 
- * FTK depends :
- * #define RT_USING_NEWLIB
- * #define DFS_USING_WORKDIR
- * 
- * And the maximal length must great than 64
- * #define RT_DFS_ELM_MAX_LFN	128
- */
-
-#endif
+/* RT-Thread config file */
+#ifndef __RTTHREAD_CFG_H__
+#define __RTTHREAD_CFG_H__
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX	32
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE	4
+
+/* PRIORITY_MAX */
+#define RT_THREAD_PRIORITY_MAX	256
+
+/* Tick per Second */
+#define RT_TICK_PER_SECOND	100
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug */
+#define RT_DEBUG
+//#define SCHEDULER_DEBUG
+/* #define RT_THREAD_DEBUG */
+
+#define RT_USING_OVERFLOW_CHECK
+
+/* Using Hook */
+#define RT_USING_HOOK
+
+/* Using Software Timer */
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO		8
+#define RT_TIMER_THREAD_STACK_SIZE	512
+#define RT_TIMER_TICK_PER_SECOND	10
+
+/* SECTION: IPC */
+/* Using Semaphore */
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex */
+#define RT_USING_MUTEX
+
+/* Using Event */
+#define RT_USING_EVENT
+
+/* Using MailBox */
+#define RT_USING_MAILBOX
+
+/* Using Message Queue */
+#define RT_USING_MESSAGEQUEUE
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+#define RT_USING_MEMPOOL
+
+/* Using Dynamic Heap Management */
+#define RT_USING_HEAP
+
+/* Using Small MM */
+/* #define RT_USING_SMALL_MEM */
+
+/* Using SLAB Allocator */
+#define RT_USING_SLAB
+
+/* SECTION: Device System */
+/* Using Device System */
+#define RT_USING_DEVICE
+
+/* Using Module System */
+#define RT_USING_MODULE
+#define RT_USING_LIBDL
+
+/* SECTION: Console options */
+#define RT_USING_CONSOLE
+/* the buffer size of console */
+#define RT_CONSOLEBUF_SIZE	128
+
+/* SECTION: finsh, a C-Express shell */
+/* Using FinSH as Shell*/
+#define RT_USING_FINSH
+/* Using symbol table */
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_STACK_SIZE 4096
+
+/* SECTION: the runtime libc library */
+/* the runtime libc library */
+#define RT_USING_NEWLIB
+#define RT_USING_PTHREADS
+
+/* SECTION: C++ support */
+/* Using C++ support */
+/* #define RT_USING_CPLUSPLUS */
+
+/* SECTION: Device filesystem support */
+/* using DFS support */
+#define RT_USING_DFS
+#define RT_USING_DFS_ELMFAT
+/* use long file name feature */
+#define RT_DFS_ELM_USE_LFN			2
+#define RT_DFS_ELM_REENTRANT
+/* define OEM code page */
+#define RT_DFS_ELM_CODE_PAGE	936
+/* Using OEM code page file */
+// #define RT_DFS_ELM_CODE_PAGE_FILE
+/* the max number of file length */
+#define RT_DFS_ELM_MAX_LFN			128
+/* #define RT_USING_DFS_YAFFS2 */
+#define RT_USING_DFS_DEVFS
+
+#define RT_USING_DFS_NFS
+#define RT_NFS_HOST_EXPORT		"192.168.1.5:/"
+
+#define DFS_USING_WORKDIR
+
+/* the max number of mounted filesystem */
+#define DFS_FILESYSTEMS_MAX		4
+/* the max number of opened files */
+#define DFS_FD_MAX					16
+/* the max number of cached sector */
+#define DFS_CACHE_MAX_NUM   		4
+
+/* Enable freemodbus protocol stack*/
+/* #define RT_USING_MODBUS */
+
+//#define RT_USING_LED
+
+#define RT_USING_SDIO
+
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
+
+#define RT_USING_DBGU
+/* #define RT_USING_UART0 */
+/* #define RT_USING_UART1 */
+/* #define RT_USING_UART2 */
+/* #define RT_USING_UART3 */
+
+/* SECTION: lwip, a lightweight TCP/IP protocol stack */
+/* Using lightweight TCP/IP protocol stack */
+#define RT_USING_LWIP
+#define RT_LWIP_DNS
+
+#define LWIP_NETIF_LINK_CALLBACK 1
+
+/* Trace LwIP protocol */
+// #define RT_LWIP_DEBUG 
+
+/* Enable ICMP protocol */
+#define RT_LWIP_ICMP
+
+/* Enable IGMP protocol */
+#define RT_LWIP_IGMP
+
+/* Enable UDP protocol */
+#define RT_LWIP_UDP
+
+/* Enable TCP protocol */
+#define RT_LWIP_TCP
+
+/* the number of simulatenously active TCP connections*/
+#define RT_LWIP_TCP_PCB_NUM	5
+
+/* TCP sender buffer space */
+#define RT_LWIP_TCP_SND_BUF	1024*10
+
+/* TCP receive window. */
+#define RT_LWIP_TCP_WND	1024*8
+
+/* Enable SNMP protocol */
+/* #define RT_LWIP_SNMP */
+
+/* Using DHCP */
+/* #define RT_LWIP_DHCP */
+
+/* ip address of target */
+#define RT_LWIP_IPADDR0	192
+#define RT_LWIP_IPADDR1	168
+#define RT_LWIP_IPADDR2	1
+#define RT_LWIP_IPADDR3	30
+
+/* gateway address of target */
+#define RT_LWIP_GWADDR0	192
+#define RT_LWIP_GWADDR1	168
+#define RT_LWIP_GWADDR2	1
+#define RT_LWIP_GWADDR3	1
+
+/* mask address of target */
+#define RT_LWIP_MSKADDR0	255
+#define RT_LWIP_MSKADDR1	255
+#define RT_LWIP_MSKADDR2	255
+#define RT_LWIP_MSKADDR3	0
+
+/* the number of blocks for pbuf */
+#define RT_LWIP_PBUF_NUM	16
+
+/* the number of simultaneously queued TCP */
+#define RT_LWIP_TCP_SEG_NUM    40
+
+/* thread priority of tcpip thread */
+#define RT_LWIP_TCPTHREAD_PRIORITY	128
+
+/* mail box size of tcpip thread to wait for */
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE	32
+
+/* thread stack size of tcpip thread */
+#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
+
+/* thread priority of ethnetif thread */
+#define RT_LWIP_ETHTHREAD_PRIORITY	144
+
+/* mail box size of ethnetif thread to wait for */
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE	32
+
+/* thread stack size of ethnetif thread */
+#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
+
+
+/* SECTION: RTGUI support */
+/* using RTGUI support */
+/* #define RT_USING_RTGUI */
+
+/* name length of RTGUI object */
+//#define RTGUI_NAME_MAX		16
+/* support 16 weight font */
+//#define RTGUI_USING_FONT16
+/* support 16 weight font */
+//#define RTGUI_USING_FONT12
+/* support Chinese font */
+//#define RTGUI_USING_FONTHZ
+/* use DFS as file interface */
+//#define RTGUI_USING_DFS_FILERW
+/* use font file as Chinese font */
+/* #define RTGUI_USING_HZ_FILE */
+/* use Chinese bitmap font */
+//#define RTGUI_USING_HZ_BMP
+/* use small size in RTGUI */
+/* #define RTGUI_USING_SMALL_SIZE */
+/* use mouse cursor */
+/* #define RTGUI_USING_MOUSE_CURSOR */
+
+/* SECTION: FTK support */
+/* using FTK support */
+/* #define RT_USING_FTK */
+
+/*
+ * Note on FTK:
+ * 
+ * FTK depends :
+ * #define RT_USING_NEWLIB
+ * #define DFS_USING_WORKDIR
+ * 
+ * And the maximal length must great than 64
+ * #define RT_DFS_ELM_MAX_LFN	128
+ */
+
+#endif

bsp/at91sam9260/rtconfig.py

@@ -1,84 +1,84 @@
-import os
-
-# toolchains options
-ARCH     = 'arm'
-CPU      = 'at91sam926x'
-TextBase = '0x20000000'
-
-CROSS_TOOL 	= 'gcc'
-
-if os.getenv('RTT_CC'):
-	CROSS_TOOL = os.getenv('RTT_CC')
-
-if  CROSS_TOOL == 'gcc':
-	PLATFORM 	= 'gcc'
-	EXEC_PATH 	= '/opt/arm-2010q1/bin/'
-elif CROSS_TOOL == 'keil':
-	PLATFORM 	= 'armcc'
-	EXEC_PATH 	= 'C:/Keil'
-elif CROSS_TOOL == 'iar':
-    print '================ERROR============================'
-    print 'Not support yet!'
-    print '================================================='
-    exit(0)
-
-if os.getenv('RTT_EXEC_PATH'):
-	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
-
-#BUILD = 'debug'
-BUILD = 'release'
-
-if PLATFORM == 'gcc':
-    # toolchains
-    PREFIX = 'arm-none-eabi-'
-    #PREFIX = 'arm-none-linux-gnueabi-'
-    CC = PREFIX + 'gcc'
-    AS = PREFIX + 'gcc'
-    AR = PREFIX + 'ar'
-    LINK = PREFIX + 'gcc'
-    TARGET_EXT = 'axf'
-    SIZE = PREFIX + 'size'
-    OBJDUMP = PREFIX + 'objdump'
-    OBJCPY = PREFIX + 'objcopy'
-
-    DEVICE = ' -mcpu=arm926ej-s'
-    CFLAGS = DEVICE
-    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase
-    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_at91sam9260.map,-cref,-u,_start -T at91sam9260_ram.ld' + ' -Ttext ' + TextBase
-
-    CPATH = ''
-    LPATH = ''
-
-    if BUILD == 'debug':
-        CFLAGS += ' -O0 -gdwarf-2'
-        AFLAGS += ' -gdwarf-2'
-    else:
-        CFLAGS += ' -O2'
-
-    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
-
-elif PLATFORM == 'armcc':
-    # toolchains
-    CC = 'armcc'
-    AS = 'armasm'
-    AR = 'armar'
-    LINK = 'armlink'
-    TARGET_EXT = 'axf'
-
-    DEVICE = ' --device DARMATS9'
-    CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
-    AFLAGS = DEVICE
-    LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-at91sam9260.map --ro-base 0x20000000 --entry Entry_Point --first Entry_Point'
-
-    CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"'
-    LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"'
-
-    EXEC_PATH += '/arm/bin40/'
-
-    if BUILD == 'debug':
-        CFLAGS += ' -g -O0'
-        AFLAGS += ' -g'
-    else:
-        CFLAGS += ' -O2'
-
-    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+import os
+
+# toolchains options
+ARCH     = 'arm'
+CPU      = 'at91sam926x'
+TextBase = '0x20000000'
+
+CROSS_TOOL 	= 'gcc'
+
+if os.getenv('RTT_CC'):
+	CROSS_TOOL = os.getenv('RTT_CC')
+
+if  CROSS_TOOL == 'gcc':
+	PLATFORM 	= 'gcc'
+	EXEC_PATH 	= '/opt/arm-2010q1/bin/'
+elif CROSS_TOOL == 'keil':
+	PLATFORM 	= 'armcc'
+	EXEC_PATH 	= 'C:/Keil'
+elif CROSS_TOOL == 'iar':
+    print '================ERROR============================'
+    print 'Not support yet!'
+    print '================================================='
+    exit(0)
+
+if os.getenv('RTT_EXEC_PATH'):
+	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+#BUILD = 'debug'
+BUILD = 'release'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'arm-none-eabi-'
+    #PREFIX = 'arm-none-linux-gnueabi-'
+    CC = PREFIX + 'gcc'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'axf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=arm926ej-s'
+    CFLAGS = DEVICE
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp' + ' -DTEXT_BASE=' + TextBase
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread_at91sam9260.map,-cref,-u,_start -T at91sam9260_ram.ld' + ' -Ttext ' + TextBase
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --device DARMATS9'
+    CFLAGS = DEVICE + ' --apcs=interwork --diag_suppress=870'
+    AFLAGS = DEVICE
+    LFLAGS = DEVICE + ' --strict --info sizes --info totals --info unused --info veneers --list rtthread-at91sam9260.map --ro-base 0x20000000 --entry Entry_Point --first Entry_Point'
+
+    CFLAGS += ' -I"' + EXEC_PATH + '/ARM/RV31/INC"'
+    LFLAGS += ' --libpath "' + EXEC_PATH + '/ARM/RV31/LIB"'
+
+    EXEC_PATH += '/arm/bin40/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'

bsp/avr32uc3b0/SConscript

@@ -1,11 +1,11 @@
-import rtconfig
-Import('RTT_ROOT')
-from building import *
-
-src_bsp = ['application.c', 'startup.c', 'board.c']
-
-src	= File(src_bsp)
-CPPPATH = [RTT_ROOT + '/bsp/avr32uc3b0']
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+import rtconfig
+Import('RTT_ROOT')
+from building import *
+
+src_bsp = ['application.c', 'startup.c', 'board.c']
+
+src	= File(src_bsp)
+CPPPATH = [RTT_ROOT + '/bsp/avr32uc3b0']
+group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/avr32uc3b0/SConstruct

@@ -1,35 +1,35 @@
-import os
-import sys
-import rtconfig
- 
-if os.getenv('RTT_ROOT'):
-    RTT_ROOT = os.getenv('RTT_ROOT')
-else:
-    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
-
-sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
-from building import *
- 
-TARGET = 'rtthread-' + rtconfig.ARCH + '.' + rtconfig.TARGET_EXT
- 
-env = Environment(tools = ['mingw'],
-   AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-   CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-   AR = rtconfig.AR, ARFLAGS = '-rc',
-   LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
-env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
- 
-Export('RTT_ROOT')
-Export('rtconfig')
- 
-# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
- 
-# AVR32 software framework building script
-objs = objs + SConscript(RTT_ROOT + '/bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/SConscript', variant_dir='bsp/SOFTWARE_FRAMEWORK', duplicate=0)
- 
-# build program
-env.Program(TARGET, objs)
- 
-# end building
+import os
+import sys
+import rtconfig
+ 
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+ 
+TARGET = 'rtthread-' + rtconfig.ARCH + '.' + rtconfig.TARGET_EXT
+ 
+env = Environment(tools = ['mingw'],
+   AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+   CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+   AR = rtconfig.AR, ARFLAGS = '-rc',
+   LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+ 
+Export('RTT_ROOT')
+Export('rtconfig')
+ 
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+ 
+# AVR32 software framework building script
+objs = objs + SConscript(RTT_ROOT + '/bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/SConscript', variant_dir='bsp/SOFTWARE_FRAMEWORK', duplicate=0)
+ 
+# build program
+env.Program(TARGET, objs)
+ 
+# end building
 EndBuilding(TARGET)

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/BOARDS/board.h

@@ -1,121 +1,121 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Standard board header file.
- *
- * This file includes the appropriate board header file according to the
- * defined board.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#include <avr32/io.h>
-
-/*! \name Base Boards
- */
-//! @{
-#define EVK1100           1   //!< AT32UC3A EVK1100 board.
-#define EVK1101           2   //!< AT32UC3B EVK1101 board.
-#define UC3C_EK           3   //!< AT32UC3C UC3C_EK board.
-#define EVK1104           4   //!< AT32UC3A3 EVK1104 board.
-#define EVK1105           5   //!< AT32UC3A EVK1105 board.
-#define STK1000           6   //!< AT32AP7000 STK1000 board.
-#define NGW100            7   //!< AT32AP7000 NGW100 board.
-#define STK600_RCUC3L0    8   //!< STK600 RCUC3L0 board.
-#define UC3L_EK           9   //!< AT32UC3L-EK board.
-#define USER_BOARD        99  //!< User-reserved board (if any).
-//! @}
-
-/*! \name Extension Boards
- */
-//! @{
-#define EXT1102           1   //!< AT32UC3B EXT1102 board.
-#define MC300             2   //!< AT32UC3 MC300 board.
-#define USER_EXT_BOARD    99  //!< User-reserved extension board (if any).
-//! @}
-
-#if BOARD == EVK1100
-  #include "EVK1100/evk1100.h"
-#elif BOARD == EVK1101
-  #include "EVK1101/evk1101.h"
-#elif BOARD == UC3C_EK
-  #include "UC3C_EK/uc3c_ek.h"
-#elif BOARD == EVK1104
-  #include "EVK1104/evk1104.h"
-#elif BOARD == EVK1105
-  #include "EVK1105/evk1105.h"
-#elif BOARD == STK1000
-  #include "STK1000/stk1000.h"
-#elif BOARD == NGW100
-  #include "NGW100/ngw100.h"
-#elif BOARD == STK600_RCUC3L0
-  #include "STK600/RCUC3L0/stk600_rcuc3l0.h"
-#elif BOARD == UC3L_EK
-  #include "UC3L_EK/uc3l_ek.h"
-#elif BOARD == USER_BOARD
-  // User-reserved area: #include the header file of your board here (if any).
-  #include "user_board.h"
-#else
-  #error No known AVR32 board defined
-#endif
-
-#if (defined EXT_BOARD)
-  #if EXT_BOARD == EXT1102
-    #include "EXT1102/ext1102.h"
-  #elif EXT_BOARD == MC300
-    #include "MC300/mc300.h"
-  #elif EXT_BOARD == USER_EXT_BOARD
-    // User-reserved area: #include the header file of your extension board here
-    // (if any).
-  #endif
-#endif
-
-
-#ifndef FRCOSC
-  #define FRCOSC    AVR32_PM_RCOSC_FREQUENCY  //!< Default RCOsc frequency.
-#endif
-
-
-#endif  // _BOARD_H_
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Standard board header file.
+ *
+ * This file includes the appropriate board header file according to the
+ * defined board.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#include <avr32/io.h>
+
+/*! \name Base Boards
+ */
+//! @{
+#define EVK1100           1   //!< AT32UC3A EVK1100 board.
+#define EVK1101           2   //!< AT32UC3B EVK1101 board.
+#define UC3C_EK           3   //!< AT32UC3C UC3C_EK board.
+#define EVK1104           4   //!< AT32UC3A3 EVK1104 board.
+#define EVK1105           5   //!< AT32UC3A EVK1105 board.
+#define STK1000           6   //!< AT32AP7000 STK1000 board.
+#define NGW100            7   //!< AT32AP7000 NGW100 board.
+#define STK600_RCUC3L0    8   //!< STK600 RCUC3L0 board.
+#define UC3L_EK           9   //!< AT32UC3L-EK board.
+#define USER_BOARD        99  //!< User-reserved board (if any).
+//! @}
+
+/*! \name Extension Boards
+ */
+//! @{
+#define EXT1102           1   //!< AT32UC3B EXT1102 board.
+#define MC300             2   //!< AT32UC3 MC300 board.
+#define USER_EXT_BOARD    99  //!< User-reserved extension board (if any).
+//! @}
+
+#if BOARD == EVK1100
+  #include "EVK1100/evk1100.h"
+#elif BOARD == EVK1101
+  #include "EVK1101/evk1101.h"
+#elif BOARD == UC3C_EK
+  #include "UC3C_EK/uc3c_ek.h"
+#elif BOARD == EVK1104
+  #include "EVK1104/evk1104.h"
+#elif BOARD == EVK1105
+  #include "EVK1105/evk1105.h"
+#elif BOARD == STK1000
+  #include "STK1000/stk1000.h"
+#elif BOARD == NGW100
+  #include "NGW100/ngw100.h"
+#elif BOARD == STK600_RCUC3L0
+  #include "STK600/RCUC3L0/stk600_rcuc3l0.h"
+#elif BOARD == UC3L_EK
+  #include "UC3L_EK/uc3l_ek.h"
+#elif BOARD == USER_BOARD
+  // User-reserved area: #include the header file of your board here (if any).
+  #include "user_board.h"
+#else
+  #error No known AVR32 board defined
+#endif
+
+#if (defined EXT_BOARD)
+  #if EXT_BOARD == EXT1102
+    #include "EXT1102/ext1102.h"
+  #elif EXT_BOARD == MC300
+    #include "MC300/mc300.h"
+  #elif EXT_BOARD == USER_EXT_BOARD
+    // User-reserved area: #include the header file of your extension board here
+    // (if any).
+  #endif
+#endif
+
+
+#ifndef FRCOSC
+  #define FRCOSC    AVR32_PM_RCOSC_FREQUENCY  //!< Default RCOsc frequency.
+#endif
+
+
+#endif  // _BOARD_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.c

@@ -1,1117 +1,1117 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief FLASHC driver for AVR32 UC3.
- *
- * AVR32 Flash Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a FLASHC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include <avr32/io.h>
-#include <stddef.h>
-#include "compiler.h"
-#include "flashc.h"
-
-
-/*! \name FLASHC Writable Bit-Field Registers
- */
-//! @{
-
-typedef union
-{
-  unsigned long                 fcr;
-  avr32_flashc_fcr_t            FCR;
-} u_avr32_flashc_fcr_t;
-
-typedef union
-{
-  unsigned long                 fcmd;
-  avr32_flashc_fcmd_t           FCMD;
-} u_avr32_flashc_fcmd_t;
-
-//! @}
-
-
-/*! \name Flash Properties
- */
-//! @{
-
-
-unsigned int flashc_get_flash_size(void)
-{
-#if (defined AVR32_FLASHC_300_H_INCLUDED)
-  static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_PR_FSZ_SIZE] =
-  {
-      32 << 10,
-      64 << 10,
-     128 << 10,
-     256 << 10,
-     384 << 10,
-     512 << 10,
-     768 << 10,
-    1024 << 10
-  };
-  return FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) >> AVR32_FLASHC_PR_FSZ_OFFSET];
-#else 
-  static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] =
-  {
-      32 << 10,
-      64 << 10,
-     128 << 10,
-     256 << 10,
-     384 << 10,
-     512 << 10,
-     768 << 10,
-    1024 << 10
-  };
-  return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET];
-#endif  
-}
-
-
-unsigned int flashc_get_page_count(void)
-{
-  return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE;
-}
-
-
-unsigned int flashc_get_page_count_per_region(void)
-{
-  return flashc_get_page_count() / AVR32_FLASHC_REGIONS;
-}
-
-
-unsigned int flashc_get_page_region(int page_number)
-{
-  return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region();
-}
-
-
-unsigned int flashc_get_region_first_page_number(unsigned int region)
-{
-  return region * flashc_get_page_count_per_region();
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Control
- */
-//! @{
-
-
-unsigned int flashc_get_wait_state(void)
-{
-  return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET;
-}
-
-
-void flashc_set_wait_state(unsigned int wait_state)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.fws = wait_state;
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-Bool flashc_is_ready_int_enabled(void)
-{
-  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0);
-}
-
-
-void flashc_enable_ready_int(Bool enable)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.frdy = (enable != FALSE);
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-Bool flashc_is_lock_error_int_enabled(void)
-{
-  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0);
-}
-
-
-void flashc_enable_lock_error_int(Bool enable)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.locke = (enable != FALSE);
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-Bool flashc_is_prog_error_int_enabled(void)
-{
-  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0);
-}
-
-
-void flashc_enable_prog_error_int(Bool enable)
-{
-  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
-  u_avr32_flashc_fcr.FCR.proge = (enable != FALSE);
-  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Status
- */
-//! @{
-
-
-Bool flashc_is_ready(void)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0);
-}
-
-
-void flashc_default_wait_until_ready(void)
-{
-  while (!flashc_is_ready());
-}
-
-
-void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready;
-
-
-/*! \brief Gets the error status of the FLASHC.
- *
- * \return The error status of the FLASHC built up from
- *         \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK.
- *
- * \warning This hardware error status is cleared by all functions reading the
- *          Flash Status Register (FSR). This function is therefore not part of
- *          the driver's API which instead presents \ref flashc_is_lock_error
- *          and \ref flashc_is_programming_error.
- */
-static unsigned int flashc_get_error_status(void)
-{
-  return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK |
-                             AVR32_FLASHC_FSR_PROGE_MASK);
-}
-
-
-//! Sticky error status of the FLASHC.
-//! This variable is updated by functions that issue FLASHC commands. It
-//! contains the cumulated FLASHC error status of all the FLASHC commands issued
-//! by a function.
-static unsigned int flashc_error_status = 0;
-
-
-Bool flashc_is_lock_error(void)
-{
-  return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0);
-}
-
-
-Bool flashc_is_programming_error(void)
-{
-  return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0);
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Command Control
- */
-//! @{
-
-
-unsigned int flashc_get_command(void)
-{
-  return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET;
-}
-
-
-unsigned int flashc_get_page_number(void)
-{
-  return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET;
-}
-
-
-void flashc_issue_command(unsigned int command, int page_number)
-{
-  u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd;
-  flashc_wait_until_ready();
-  u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd;
-  u_avr32_flashc_fcmd.FCMD.cmd = command;
-  if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number;
-  u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY;
-  AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd;
-  flashc_error_status = flashc_get_error_status();
-  flashc_wait_until_ready();
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Global Commands
- */
-//! @{
-
-
-void flashc_no_operation(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1);
-}
-
-
-void flashc_erase_all(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1);
-}
-
-
-//! @}
-
-
-/*! \name FLASHC Protection Mechanisms
- */
-//! @{
-
-
-Bool flashc_is_security_bit_active(void)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0);
-}
-
-
-void flashc_activate_security_bit(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1);
-}
-
-
-unsigned int flashc_get_bootloader_protected_size(void)
-{
-  unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 -
-                          flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET,
-                                                       AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE);
-  return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0;
-}
-
-
-unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size)
-{
-  flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET,
-                              AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE,
-                              (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 -
-                              ((bootprot_size) ?
-                               32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1),
-                                               AVR32_FLASHC_PAGE_SIZE <<
-                                               ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) +
-                                           AVR32_FLASHC_PAGE_SIZE - 1) /
-                                          AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 :
-                               0));
-  return flashc_get_bootloader_protected_size();
-}
-
-
-Bool flashc_is_external_privileged_fetch_locked(void)
-{
-  return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET));
-}
-
-
-void flashc_lock_external_privileged_fetch(Bool lock)
-{
-  flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock);
-}
-
-
-Bool flashc_is_page_region_locked(int page_number)
-{
-  return flashc_is_region_locked(flashc_get_page_region(page_number));
-}
-
-
-Bool flashc_is_region_locked(unsigned int region)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0);
-}
-
-
-void flashc_lock_page_region(int page_number, Bool lock)
-{
-  flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number);
-}
-
-
-void flashc_lock_region(unsigned int region, Bool lock)
-{
-  flashc_lock_page_region(flashc_get_region_first_page_number(region), lock);
-}
-
-
-void flashc_lock_all_regions(Bool lock)
-{
-  unsigned int error_status = 0;
-  unsigned int region = AVR32_FLASHC_REGIONS;
-  while (region)
-  {
-    flashc_lock_region(--region, lock);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-//! @}
-
-
-/*! \name Access to General-Purpose Fuses
- */
-//! @{
-
-
-Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit)
-{
-  return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0);
-}
-
-
-U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width)
-{
-  return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1);
-}
-
-
-U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte)
-{
-  return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3);
-}
-
-
-U64 flashc_read_all_gp_fuses(void)
-{
-  return AVR32_FLASHC.fgpfrlo | (U64)AVR32_FLASHC.fgpfrhi << 32;
-}
-
-
-Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F);
-  return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : TRUE;
-}
-
-
-Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_bit;
-  pos &= 0x3F;
-  width = min(width, 64);
-  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++)
-  {
-    flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-  return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : TRUE;
-}
-
-
-Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check)
-{
-  unsigned int error_status;
-  unsigned int current_gp_fuse_byte;
-  U64 value = flashc_read_all_gp_fuses();
-  flashc_erase_all_gp_fuses(FALSE);
-  error_status = flashc_error_status;
-  for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8)
-  {
-    if (current_gp_fuse_byte != gp_fuse_byte)
-    {
-      flashc_write_gp_fuse_byte(current_gp_fuse_byte, value);
-      error_status |= flashc_error_status;
-    }
-  }
-  flashc_error_status = error_status;
-  return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : TRUE;
-}
-
-
-Bool flashc_erase_all_gp_fuses(Bool check)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1);
-  return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : TRUE;
-}
-
-
-void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
-{
-  if (!value)
-    flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F);
-}
-
-
-void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_bit;
-  pos &= 0x3F;
-  width = min(width, 64);
-  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
-  {
-    flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3);
-}
-
-
-void flashc_write_all_gp_fuses(U64 value)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_byte;
-  for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8)
-  {
-    flashc_write_gp_fuse_byte(gp_fuse_byte, value);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
-{
-  if (value)
-    flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
-  else
-    flashc_write_gp_fuse_bit(gp_fuse_bit, FALSE);
-}
-
-
-void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value)
-{
-  unsigned int error_status = 0;
-  unsigned int gp_fuse_bit;
-  pos &= 0x3F;
-  width = min(width, 64);
-  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
-  {
-    flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-}
-
-
-void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
-{
-  unsigned int error_status;
-  switch (value)
-  {
-  case 0xFF:
-    flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
-    break;
-  case 0x00:
-    flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00);
-    break;
-  default:
-    flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
-    error_status = flashc_error_status;
-    flashc_write_gp_fuse_byte(gp_fuse_byte, value);
-    flashc_error_status |= error_status;
-  }
-}
-
-
-void flashc_set_all_gp_fuses(U64 value)
-{
-  unsigned int error_status;
-  switch (value)
-  {
-  case 0xFFFFFFFFFFFFFFFFULL:
-    flashc_erase_all_gp_fuses(FALSE);
-    break;
-  case 0x0000000000000000ULL:
-    flashc_write_all_gp_fuses(0x0000000000000000ULL);
-    break;
-  default:
-    flashc_erase_all_gp_fuses(FALSE);
-    error_status = flashc_error_status;
-    flashc_write_all_gp_fuses(value);
-    flashc_error_status |= error_status;
-  }
-}
-
-
-//! @}
-
-
-/*! \name Access to Flash Pages
- */
-//! @{
-
-
-void flashc_clear_page_buffer(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1);
-}
-
-
-Bool flashc_is_page_erased(void)
-{
-  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0);
-}
-
-
-Bool flashc_quick_page_read(int page_number)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number);
-  return flashc_is_page_erased();
-}
-
-
-Bool flashc_erase_page(int page_number, Bool check)
-{
-  Bool page_erased = TRUE;
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number);
-  if (check)
-  {
-    unsigned int error_status = flashc_error_status;
-    page_erased = flashc_quick_page_read(-1);
-    flashc_error_status |= error_status;
-  }
-  return page_erased;
-}
-
-
-Bool flashc_erase_all_pages(Bool check)
-{
-  Bool all_pages_erased = TRUE;
-  unsigned int error_status = 0;
-  unsigned int page_number = flashc_get_page_count();
-  while (page_number)
-  {
-    all_pages_erased &= flashc_erase_page(--page_number, check);
-    error_status |= flashc_error_status;
-  }
-  flashc_error_status = error_status;
-  return all_pages_erased;
-}
-
-
-void flashc_write_page(int page_number)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number);
-}
-
-
-Bool flashc_quick_user_page_read(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1);
-  return flashc_is_page_erased();
-}
-
-
-Bool flashc_erase_user_page(Bool check)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1);
-  return (check) ? flashc_quick_user_page_read() : TRUE;
-}
-
-
-void flashc_write_user_page(void)
-{
-  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1);
-}
-
-
-volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase)
-{
-  return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase);
-}
-
-
-volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase)
-{
-  return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase);
-}
-
-
-volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase)
-{
-  return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase);
-}
-
-
-volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase)
-{
-  // Use aggregated pointers to have several alignments available for a same address.
-  UnionCVPtr flash_array_end;
-  UnionVPtr dest;
-  Union64 source = {0};
-  StructCVPtr dest_end;
-  UnionCVPtr flash_page_source_end;
-  Bool incomplete_flash_page_end;
-  Union64 flash_dword;
-  UnionVPtr tmp;
-  unsigned int error_status = 0;
-  unsigned int i;
-
-  // Reformat arguments.
-  flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
-  dest.u8ptr = dst;
-  for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1);
-       src; i = (i - 1) & (sizeof(U64) - 1))
-  {
-    source.u8[i] = src;
-    src >>= 8;
-  }
-  dest_end.u8ptr = dest.u8ptr + nbytes;
-
-  // If destination is outside flash, go to next flash page if any.
-  if (dest.u8ptr < AVR32_FLASH)
-  {
-    dest.u8ptr = AVR32_FLASH;
-  }
-  else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
-  {
-    dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-  }
-
-  // If end of destination is outside flash, move it to the end of the previous flash page if any.
-  if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
-  {
-    dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
-  }
-  else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
-  {
-    dest_end.u8ptr = flash_array_end.u8ptr;
-  }
-
-  // Align each end of destination pointer with its natural boundary.
-  dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
-  dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
-  dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
-
-  // While end of destination is not reached...
-  while (dest.u8ptr < dest_end.u8ptr)
-  {
-    // Clear the page buffer in order to prepare data for a flash page write.
-    flashc_clear_page_buffer();
-    error_status |= flashc_error_status;
-
-    // Determine where the source data will end in the current flash page.
-    flash_page_source_end.u64ptr =
-      (U64 *)min((U32)dest_end.u64ptr,
-                 Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
-
-    // Determine if the current destination page has an incomplete end.
-    incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
-                                 Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
-
-    // Use a flash double-word buffer to manage unaligned accesses.
-    flash_dword.u64 = source.u64;
-
-    // If destination does not point to the beginning of the current flash page...
-    if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE))
-    {
-      // Fill the beginning of the page buffer with the current flash page data.
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
-           tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-           tmp.u64ptr++)
-        *tmp.u64ptr = *tmp.u64ptr;
-
-      // If destination is not 64-bit aligned...
-      if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
-      {
-        // Fill the beginning of the flash double-word buffer with the current
-        // flash page data.
-        // This is required by the hardware, even if page erase is not
-        // requested, in order to be able to write successfully to erased parts
-        // of flash pages that have already been written to.
-        for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
-          flash_dword.u8[i] = *tmp.u8ptr++;
-
-        // Align the destination pointer with its 64-bit boundary.
-        dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-
-        // If the current destination double-word is not the last one...
-        if (dest.u64ptr < dest_end.u64ptr)
-        {
-          // Write the flash double-word buffer to the page buffer and reinitialize it.
-          *dest.u64ptr++ = flash_dword.u64;
-          flash_dword.u64 = source.u64;
-        }
-      }
-    }
-
-    // Write the source data to the page buffer with 64-bit alignment.
-    for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-      *dest.u64ptr++ = source.u64;
-
-    // If the current destination page has an incomplete end...
-    if (incomplete_flash_page_end)
-    {
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      {
-        tmp.u8ptr = (volatile U8 *)dest_end.u8ptr;
-
-        // If end of destination is not 64-bit aligned...
-        if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
-        {
-          // Fill the end of the flash double-word buffer with the current flash page data.
-          for (i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); i < sizeof(U64); i++)
-            flash_dword.u8[i] = *tmp.u8ptr++;
-
-          // Write the flash double-word buffer to the page buffer.
-          *dest.u64ptr++ = flash_dword.u64;
-        }
-
-        // Fill the end of the page buffer with the current flash page data.
-        for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++)
-          *tmp.u64ptr = *tmp.u64ptr;
-      }
-    }
-
-    // If the current flash page is in the flash array...
-    if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
-    {
-      // Erase the current page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_page(-1, FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_page(-1);
-      error_status |= flashc_error_status;
-
-      // If the end of the flash array is reached, go to the User page.
-      if (dest.u8ptr >= flash_array_end.u8ptr)
-        dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-    }
-    // If the current flash page is the User page...
-    else
-    {
-      // Erase the User page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_user_page(FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_user_page();
-      error_status |= flashc_error_status;
-    }
-  }
-
-  // Update the FLASHC error status.
-  flashc_error_status = error_status;
-
-  // Return the initial destination pointer as the standard memset function does.
-  return dst;
-}
-
-
-volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase)
-{
-  // Use aggregated pointers to have several alignments available for a same address.
-  UnionCVPtr flash_array_end;
-  UnionVPtr dest;
-  UnionCPtr source;
-  StructCVPtr dest_end;
-  UnionCVPtr flash_page_source_end;
-  Bool incomplete_flash_page_end;
-  Union64 flash_dword;
-  Bool flash_dword_pending = FALSE;
-  UnionVPtr tmp;
-  unsigned int error_status = 0;
-  unsigned int i, j;
-
-  // Reformat arguments.
-  flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
-  dest.u8ptr = dst;
-  source.u8ptr = src;
-  dest_end.u8ptr = dest.u8ptr + nbytes;
-
-  // If destination is outside flash, go to next flash page if any.
-  if (dest.u8ptr < AVR32_FLASH)
-  {
-    source.u8ptr += AVR32_FLASH - dest.u8ptr;
-    dest.u8ptr = AVR32_FLASH;
-  }
-  else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
-  {
-    source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
-    dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-  }
-
-  // If end of destination is outside flash, move it to the end of the previous flash page if any.
-  if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
-  {
-    dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
-  }
-  else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
-  {
-    dest_end.u8ptr = flash_array_end.u8ptr;
-  }
-
-  // Align each end of destination pointer with its natural boundary.
-  dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
-  dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
-  dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
-
-  // While end of destination is not reached...
-  while (dest.u8ptr < dest_end.u8ptr)
-  {
-    // Clear the page buffer in order to prepare data for a flash page write.
-    flashc_clear_page_buffer();
-    error_status |= flashc_error_status;
-
-    // Determine where the source data will end in the current flash page.
-    flash_page_source_end.u64ptr =
-      (U64 *)min((U32)dest_end.u64ptr,
-                 Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
-
-    // Determine if the current destination page has an incomplete end.
-    incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
-                                 Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
-
-    // If destination does not point to the beginning of the current flash page...
-    if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE))
-    {
-      // Fill the beginning of the page buffer with the current flash page data.
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
-           tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-           tmp.u64ptr++)
-        *tmp.u64ptr = *tmp.u64ptr;
-
-      // If destination is not 64-bit aligned...
-      if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
-      {
-        // Fill the beginning of the flash double-word buffer with the current
-        // flash page data.
-        // This is required by the hardware, even if page erase is not
-        // requested, in order to be able to write successfully to erased parts
-        // of flash pages that have already been written to.
-        for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
-          flash_dword.u8[i] = *tmp.u8ptr++;
-
-        // Fill the end of the flash double-word buffer with the source data.
-        for (; i < sizeof(U64); i++)
-          flash_dword.u8[i] = *source.u8ptr++;
-
-        // Align the destination pointer with its 64-bit boundary.
-        dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
-
-        // If the current destination double-word is not the last one...
-        if (dest.u64ptr < dest_end.u64ptr)
-        {
-          // Write the flash double-word buffer to the page buffer.
-          *dest.u64ptr++ = flash_dword.u64;
-        }
-        // If the current destination double-word is the last one, the flash
-        // double-word buffer must be kept for later.
-        else flash_dword_pending = TRUE;
-      }
-    }
-
-    // Read the source data with the maximal possible alignment and write it to
-    // the page buffer with 64-bit alignment.
-    switch (Get_align((U32)source.u8ptr, sizeof(U32)))
-    {
-    case 0:
-      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-        *dest.u64ptr++ = *source.u64ptr++;
-      break;
-
-    case sizeof(U16):
-      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-      {
-        for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++;
-        *dest.u64ptr++ = flash_dword.u64;
-      }
-      break;
-
-    default:
-      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
-      {
-        for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++;
-        *dest.u64ptr++ = flash_dword.u64;
-      }
-    }
-
-    // If the current destination page has an incomplete end...
-    if (incomplete_flash_page_end)
-    {
-      // If the flash double-word buffer is in use, do not initialize it.
-      if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64));
-      // If the flash double-word buffer is free...
-      else
-      {
-        // Fill the beginning of the flash double-word buffer with the source data.
-        for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++)
-          flash_dword.u8[i] = *source.u8ptr++;
-      }
-
-      // This is required by the hardware, even if page erase is not requested,
-      // in order to be able to write successfully to erased parts of flash
-      // pages that have already been written to.
-      {
-        tmp.u8ptr = (volatile U8 *)dest_end.u8ptr;
-
-        // If end of destination is not 64-bit aligned...
-        if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
-        {
-          // Fill the end of the flash double-word buffer with the current flash page data.
-          for (; i < sizeof(U64); i++)
-            flash_dword.u8[i] = *tmp.u8ptr++;
-
-          // Write the flash double-word buffer to the page buffer.
-          *dest.u64ptr++ = flash_dword.u64;
-        }
-
-        // Fill the end of the page buffer with the current flash page data.
-        for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++)
-          *tmp.u64ptr = *tmp.u64ptr;
-      }
-    }
-
-    // If the current flash page is in the flash array...
-    if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
-    {
-      // Erase the current page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_page(-1, FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_page(-1);
-      error_status |= flashc_error_status;
-
-      // If the end of the flash array is reached, go to the User page.
-      if (dest.u8ptr >= flash_array_end.u8ptr)
-      {
-        source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
-        dest.u8ptr = AVR32_FLASHC_USER_PAGE;
-      }
-    }
-    // If the current flash page is the User page...
-    else
-    {
-      // Erase the User page if requested and write it from the page buffer.
-      if (erase)
-      {
-        flashc_erase_user_page(FALSE);
-        error_status |= flashc_error_status;
-      }
-      flashc_write_user_page();
-      error_status |= flashc_error_status;
-    }
-  }
-
-  // Update the FLASHC error status.
-  flashc_error_status = error_status;
-
-  // Return the initial destination pointer as the standard memcpy function does.
-  return dst;
-}
-
-
-#if UC3C
-void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz)
-{
-  //! Device-specific data
-  #undef AVR32_FLASHC_FWS_0_MAX_FREQ
-  #undef AVR32_FLASHC_FWS_1_MAX_FREQ
-  #undef AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ
-  #undef AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ
-  #define AVR32_FLASHC_FWS_0_MAX_FREQ           33000000
-  #define AVR32_FLASHC_FWS_1_MAX_FREQ           66000000
-  #define AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ      33000000
-  #define AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ      72000000
-  // These defines are missing from or wrong in the toolchain header files uc3cxxx.h
-  // Put a Bugzilla 
-
-  if(cpu_f_hz > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)    // > 33MHz
-  {
-    // Set a wait-state
-    flashc_set_wait_state(1);
-    if(cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) // <= 66MHz and >33Mhz
-    {
-      // Disable the high-speed read mode.      
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-    }
-    else // > 66Mhz
-    {
-      // Enable the high-speed read mode.
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);                     
-    }
-  }
-  else  // <= 33 MHz    
-  {
-    // Disable wait-state
-    flashc_set_wait_state(0);
-
-    // Disable the high-speed read mode.
-    flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-    
-  }
-}
-#endif // UC3C device-specific implementation
-
-//! @}
+/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief FLASHC driver for AVR32 UC3.
+ *
+ * AVR32 Flash Controller driver module.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with a FLASHC module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#include <avr32/io.h>
+#include <stddef.h>
+#include "compiler.h"
+#include "flashc.h"
+
+
+/*! \name FLASHC Writable Bit-Field Registers
+ */
+//! @{
+
+typedef union
+{
+  unsigned long                 fcr;
+  avr32_flashc_fcr_t            FCR;
+} u_avr32_flashc_fcr_t;
+
+typedef union
+{
+  unsigned long                 fcmd;
+  avr32_flashc_fcmd_t           FCMD;
+} u_avr32_flashc_fcmd_t;
+
+//! @}
+
+
+/*! \name Flash Properties
+ */
+//! @{
+
+
+unsigned int flashc_get_flash_size(void)
+{
+#if (defined AVR32_FLASHC_300_H_INCLUDED)
+  static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_PR_FSZ_SIZE] =
+  {
+      32 << 10,
+      64 << 10,
+     128 << 10,
+     256 << 10,
+     384 << 10,
+     512 << 10,
+     768 << 10,
+    1024 << 10
+  };
+  return FLASH_SIZE[(AVR32_FLASHC.pr & AVR32_FLASHC_PR_FSZ_MASK) >> AVR32_FLASHC_PR_FSZ_OFFSET];
+#else 
+  static const unsigned int FLASH_SIZE[1 << AVR32_FLASHC_FSR_FSZ_SIZE] =
+  {
+      32 << 10,
+      64 << 10,
+     128 << 10,
+     256 << 10,
+     384 << 10,
+     512 << 10,
+     768 << 10,
+    1024 << 10
+  };
+  return FLASH_SIZE[(AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FSZ_MASK) >> AVR32_FLASHC_FSR_FSZ_OFFSET];
+#endif  
+}
+
+
+unsigned int flashc_get_page_count(void)
+{
+  return flashc_get_flash_size() / AVR32_FLASHC_PAGE_SIZE;
+}
+
+
+unsigned int flashc_get_page_count_per_region(void)
+{
+  return flashc_get_page_count() / AVR32_FLASHC_REGIONS;
+}
+
+
+unsigned int flashc_get_page_region(int page_number)
+{
+  return ((page_number >= 0) ? page_number : flashc_get_page_number()) / flashc_get_page_count_per_region();
+}
+
+
+unsigned int flashc_get_region_first_page_number(unsigned int region)
+{
+  return region * flashc_get_page_count_per_region();
+}
+
+
+//! @}
+
+
+/*! \name FLASHC Control
+ */
+//! @{
+
+
+unsigned int flashc_get_wait_state(void)
+{
+  return (AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FWS_MASK) >> AVR32_FLASHC_FCR_FWS_OFFSET;
+}
+
+
+void flashc_set_wait_state(unsigned int wait_state)
+{
+  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+  u_avr32_flashc_fcr.FCR.fws = wait_state;
+  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+Bool flashc_is_ready_int_enabled(void)
+{
+  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_FRDY_MASK) != 0);
+}
+
+
+void flashc_enable_ready_int(Bool enable)
+{
+  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+  u_avr32_flashc_fcr.FCR.frdy = (enable != FALSE);
+  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+Bool flashc_is_lock_error_int_enabled(void)
+{
+  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_LOCKE_MASK) != 0);
+}
+
+
+void flashc_enable_lock_error_int(Bool enable)
+{
+  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+  u_avr32_flashc_fcr.FCR.locke = (enable != FALSE);
+  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+Bool flashc_is_prog_error_int_enabled(void)
+{
+  return ((AVR32_FLASHC.fcr & AVR32_FLASHC_FCR_PROGE_MASK) != 0);
+}
+
+
+void flashc_enable_prog_error_int(Bool enable)
+{
+  u_avr32_flashc_fcr_t u_avr32_flashc_fcr = {AVR32_FLASHC.fcr};
+  u_avr32_flashc_fcr.FCR.proge = (enable != FALSE);
+  AVR32_FLASHC.fcr = u_avr32_flashc_fcr.fcr;
+}
+
+
+//! @}
+
+
+/*! \name FLASHC Status
+ */
+//! @{
+
+
+Bool flashc_is_ready(void)
+{
+  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_FRDY_MASK) != 0);
+}
+
+
+void flashc_default_wait_until_ready(void)
+{
+  while (!flashc_is_ready());
+}
+
+
+void (*volatile flashc_wait_until_ready)(void) = flashc_default_wait_until_ready;
+
+
+/*! \brief Gets the error status of the FLASHC.
+ *
+ * \return The error status of the FLASHC built up from
+ *         \c AVR32_FLASHC_FSR_LOCKE_MASK and \c AVR32_FLASHC_FSR_PROGE_MASK.
+ *
+ * \warning This hardware error status is cleared by all functions reading the
+ *          Flash Status Register (FSR). This function is therefore not part of
+ *          the driver's API which instead presents \ref flashc_is_lock_error
+ *          and \ref flashc_is_programming_error.
+ */
+static unsigned int flashc_get_error_status(void)
+{
+  return AVR32_FLASHC.fsr & (AVR32_FLASHC_FSR_LOCKE_MASK |
+                             AVR32_FLASHC_FSR_PROGE_MASK);
+}
+
+
+//! Sticky error status of the FLASHC.
+//! This variable is updated by functions that issue FLASHC commands. It
+//! contains the cumulated FLASHC error status of all the FLASHC commands issued
+//! by a function.
+static unsigned int flashc_error_status = 0;
+
+
+Bool flashc_is_lock_error(void)
+{
+  return ((flashc_error_status & AVR32_FLASHC_FSR_LOCKE_MASK) != 0);
+}
+
+
+Bool flashc_is_programming_error(void)
+{
+  return ((flashc_error_status & AVR32_FLASHC_FSR_PROGE_MASK) != 0);
+}
+
+
+//! @}
+
+
+/*! \name FLASHC Command Control
+ */
+//! @{
+
+
+unsigned int flashc_get_command(void)
+{
+  return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_CMD_MASK) >> AVR32_FLASHC_FCMD_CMD_OFFSET;
+}
+
+
+unsigned int flashc_get_page_number(void)
+{
+  return (AVR32_FLASHC.fcmd & AVR32_FLASHC_FCMD_PAGEN_MASK) >> AVR32_FLASHC_FCMD_PAGEN_OFFSET;
+}
+
+
+void flashc_issue_command(unsigned int command, int page_number)
+{
+  u_avr32_flashc_fcmd_t u_avr32_flashc_fcmd;
+  flashc_wait_until_ready();
+  u_avr32_flashc_fcmd.fcmd = AVR32_FLASHC.fcmd;
+  u_avr32_flashc_fcmd.FCMD.cmd = command;
+  if (page_number >= 0) u_avr32_flashc_fcmd.FCMD.pagen = page_number;
+  u_avr32_flashc_fcmd.FCMD.key = AVR32_FLASHC_FCMD_KEY_KEY;
+  AVR32_FLASHC.fcmd = u_avr32_flashc_fcmd.fcmd;
+  flashc_error_status = flashc_get_error_status();
+  flashc_wait_until_ready();
+}
+
+
+//! @}
+
+
+/*! \name FLASHC Global Commands
+ */
+//! @{
+
+
+void flashc_no_operation(void)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_NOP, -1);
+}
+
+
+void flashc_erase_all(void)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EA, -1);
+}
+
+
+//! @}
+
+
+/*! \name FLASHC Protection Mechanisms
+ */
+//! @{
+
+
+Bool flashc_is_security_bit_active(void)
+{
+  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_SECURITY_MASK) != 0);
+}
+
+
+void flashc_activate_security_bit(void)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_SSB, -1);
+}
+
+
+unsigned int flashc_get_bootloader_protected_size(void)
+{
+  unsigned int bootprot = (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 -
+                          flashc_read_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET,
+                                                       AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE);
+  return (bootprot) ? AVR32_FLASHC_PAGE_SIZE << bootprot : 0;
+}
+
+
+unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size)
+{
+  flashc_set_gp_fuse_bitfield(AVR32_FLASHC_FGPFRLO_BOOTPROT_OFFSET,
+                              AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE,
+                              (1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1 -
+                              ((bootprot_size) ?
+                               32 - clz((((min(max(bootprot_size, AVR32_FLASHC_PAGE_SIZE << 1),
+                                               AVR32_FLASHC_PAGE_SIZE <<
+                                               ((1 << AVR32_FLASHC_FGPFRLO_BOOTPROT_SIZE) - 1)) +
+                                           AVR32_FLASHC_PAGE_SIZE - 1) /
+                                          AVR32_FLASHC_PAGE_SIZE) << 1) - 1) - 1 :
+                               0));
+  return flashc_get_bootloader_protected_size();
+}
+
+
+Bool flashc_is_external_privileged_fetch_locked(void)
+{
+  return (!flashc_read_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET));
+}
+
+
+void flashc_lock_external_privileged_fetch(Bool lock)
+{
+  flashc_set_gp_fuse_bit(AVR32_FLASHC_FGPFRLO_EPFL_OFFSET, !lock);
+}
+
+
+Bool flashc_is_page_region_locked(int page_number)
+{
+  return flashc_is_region_locked(flashc_get_page_region(page_number));
+}
+
+
+Bool flashc_is_region_locked(unsigned int region)
+{
+  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_LOCK0_MASK << (region & (AVR32_FLASHC_REGIONS - 1))) != 0);
+}
+
+
+void flashc_lock_page_region(int page_number, Bool lock)
+{
+  flashc_issue_command((lock) ? AVR32_FLASHC_FCMD_CMD_LP : AVR32_FLASHC_FCMD_CMD_UP, page_number);
+}
+
+
+void flashc_lock_region(unsigned int region, Bool lock)
+{
+  flashc_lock_page_region(flashc_get_region_first_page_number(region), lock);
+}
+
+
+void flashc_lock_all_regions(Bool lock)
+{
+  unsigned int error_status = 0;
+  unsigned int region = AVR32_FLASHC_REGIONS;
+  while (region)
+  {
+    flashc_lock_region(--region, lock);
+    error_status |= flashc_error_status;
+  }
+  flashc_error_status = error_status;
+}
+
+
+//! @}
+
+
+/*! \name Access to General-Purpose Fuses
+ */
+//! @{
+
+
+Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit)
+{
+  return ((flashc_read_all_gp_fuses() & 1ULL << (gp_fuse_bit & 0x3F)) != 0);
+}
+
+
+U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width)
+{
+  return flashc_read_all_gp_fuses() >> (pos & 0x3F) & ((1ULL << min(width, 64)) - 1);
+}
+
+
+U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte)
+{
+  return flashc_read_all_gp_fuses() >> ((gp_fuse_byte & 0x07) << 3);
+}
+
+
+U64 flashc_read_all_gp_fuses(void)
+{
+  return AVR32_FLASHC.fgpfrlo | (U64)AVR32_FLASHC.fgpfrhi << 32;
+}
+
+
+Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EGPB, gp_fuse_bit & 0x3F);
+  return (check) ? flashc_read_gp_fuse_bit(gp_fuse_bit) : TRUE;
+}
+
+
+Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check)
+{
+  unsigned int error_status = 0;
+  unsigned int gp_fuse_bit;
+  pos &= 0x3F;
+  width = min(width, 64);
+  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++)
+  {
+    flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
+    error_status |= flashc_error_status;
+  }
+  flashc_error_status = error_status;
+  return (check) ? (flashc_read_gp_fuse_bitfield(pos, width) == (1ULL << width) - 1) : TRUE;
+}
+
+
+Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check)
+{
+  unsigned int error_status;
+  unsigned int current_gp_fuse_byte;
+  U64 value = flashc_read_all_gp_fuses();
+  flashc_erase_all_gp_fuses(FALSE);
+  error_status = flashc_error_status;
+  for (current_gp_fuse_byte = 0; current_gp_fuse_byte < 8; current_gp_fuse_byte++, value >>= 8)
+  {
+    if (current_gp_fuse_byte != gp_fuse_byte)
+    {
+      flashc_write_gp_fuse_byte(current_gp_fuse_byte, value);
+      error_status |= flashc_error_status;
+    }
+  }
+  flashc_error_status = error_status;
+  return (check) ? (flashc_read_gp_fuse_byte(gp_fuse_byte) == 0xFF) : TRUE;
+}
+
+
+Bool flashc_erase_all_gp_fuses(Bool check)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EAGPF, -1);
+  return (check) ? (flashc_read_all_gp_fuses() == 0xFFFFFFFFFFFFFFFFULL) : TRUE;
+}
+
+
+void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
+{
+  if (!value)
+    flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WGPB, gp_fuse_bit & 0x3F);
+}
+
+
+void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value)
+{
+  unsigned int error_status = 0;
+  unsigned int gp_fuse_bit;
+  pos &= 0x3F;
+  width = min(width, 64);
+  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
+  {
+    flashc_write_gp_fuse_bit(gp_fuse_bit, value & 0x01);
+    error_status |= flashc_error_status;
+  }
+  flashc_error_status = error_status;
+}
+
+
+void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_PGPFB, (gp_fuse_byte & 0x07) | value << 3);
+}
+
+
+void flashc_write_all_gp_fuses(U64 value)
+{
+  unsigned int error_status = 0;
+  unsigned int gp_fuse_byte;
+  for (gp_fuse_byte = 0; gp_fuse_byte < 8; gp_fuse_byte++, value >>= 8)
+  {
+    flashc_write_gp_fuse_byte(gp_fuse_byte, value);
+    error_status |= flashc_error_status;
+  }
+  flashc_error_status = error_status;
+}
+
+
+void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value)
+{
+  if (value)
+    flashc_erase_gp_fuse_bit(gp_fuse_bit, FALSE);
+  else
+    flashc_write_gp_fuse_bit(gp_fuse_bit, FALSE);
+}
+
+
+void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value)
+{
+  unsigned int error_status = 0;
+  unsigned int gp_fuse_bit;
+  pos &= 0x3F;
+  width = min(width, 64);
+  for (gp_fuse_bit = pos; gp_fuse_bit < pos + width; gp_fuse_bit++, value >>= 1)
+  {
+    flashc_set_gp_fuse_bit(gp_fuse_bit, value & 0x01);
+    error_status |= flashc_error_status;
+  }
+  flashc_error_status = error_status;
+}
+
+
+void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value)
+{
+  unsigned int error_status;
+  switch (value)
+  {
+  case 0xFF:
+    flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
+    break;
+  case 0x00:
+    flashc_write_gp_fuse_byte(gp_fuse_byte, 0x00);
+    break;
+  default:
+    flashc_erase_gp_fuse_byte(gp_fuse_byte, FALSE);
+    error_status = flashc_error_status;
+    flashc_write_gp_fuse_byte(gp_fuse_byte, value);
+    flashc_error_status |= error_status;
+  }
+}
+
+
+void flashc_set_all_gp_fuses(U64 value)
+{
+  unsigned int error_status;
+  switch (value)
+  {
+  case 0xFFFFFFFFFFFFFFFFULL:
+    flashc_erase_all_gp_fuses(FALSE);
+    break;
+  case 0x0000000000000000ULL:
+    flashc_write_all_gp_fuses(0x0000000000000000ULL);
+    break;
+  default:
+    flashc_erase_all_gp_fuses(FALSE);
+    error_status = flashc_error_status;
+    flashc_write_all_gp_fuses(value);
+    flashc_error_status |= error_status;
+  }
+}
+
+
+//! @}
+
+
+/*! \name Access to Flash Pages
+ */
+//! @{
+
+
+void flashc_clear_page_buffer(void)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_CPB, -1);
+}
+
+
+Bool flashc_is_page_erased(void)
+{
+  return ((AVR32_FLASHC.fsr & AVR32_FLASHC_FSR_QPRR_MASK) != 0);
+}
+
+
+Bool flashc_quick_page_read(int page_number)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPR, page_number);
+  return flashc_is_page_erased();
+}
+
+
+Bool flashc_erase_page(int page_number, Bool check)
+{
+  Bool page_erased = TRUE;
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EP, page_number);
+  if (check)
+  {
+    unsigned int error_status = flashc_error_status;
+    page_erased = flashc_quick_page_read(-1);
+    flashc_error_status |= error_status;
+  }
+  return page_erased;
+}
+
+
+Bool flashc_erase_all_pages(Bool check)
+{
+  Bool all_pages_erased = TRUE;
+  unsigned int error_status = 0;
+  unsigned int page_number = flashc_get_page_count();
+  while (page_number)
+  {
+    all_pages_erased &= flashc_erase_page(--page_number, check);
+    error_status |= flashc_error_status;
+  }
+  flashc_error_status = error_status;
+  return all_pages_erased;
+}
+
+
+void flashc_write_page(int page_number)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WP, page_number);
+}
+
+
+Bool flashc_quick_user_page_read(void)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_QPRUP, -1);
+  return flashc_is_page_erased();
+}
+
+
+Bool flashc_erase_user_page(Bool check)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_EUP, -1);
+  return (check) ? flashc_quick_user_page_read() : TRUE;
+}
+
+
+void flashc_write_user_page(void)
+{
+  flashc_issue_command(AVR32_FLASHC_FCMD_CMD_WUP, -1);
+}
+
+
+volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase)
+{
+  return flashc_memset16(dst, src | (U16)src << 8, nbytes, erase);
+}
+
+
+volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase)
+{
+  return flashc_memset32(dst, src | (U32)src << 16, nbytes, erase);
+}
+
+
+volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase)
+{
+  return flashc_memset64(dst, src | (U64)src << 32, nbytes, erase);
+}
+
+
+volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase)
+{
+  // Use aggregated pointers to have several alignments available for a same address.
+  UnionCVPtr flash_array_end;
+  UnionVPtr dest;
+  Union64 source = {0};
+  StructCVPtr dest_end;
+  UnionCVPtr flash_page_source_end;
+  Bool incomplete_flash_page_end;
+  Union64 flash_dword;
+  UnionVPtr tmp;
+  unsigned int error_status = 0;
+  unsigned int i;
+
+  // Reformat arguments.
+  flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
+  dest.u8ptr = dst;
+  for (i = (Get_align((U32)dest.u8ptr, sizeof(U64)) - 1) & (sizeof(U64) - 1);
+       src; i = (i - 1) & (sizeof(U64) - 1))
+  {
+    source.u8[i] = src;
+    src >>= 8;
+  }
+  dest_end.u8ptr = dest.u8ptr + nbytes;
+
+  // If destination is outside flash, go to next flash page if any.
+  if (dest.u8ptr < AVR32_FLASH)
+  {
+    dest.u8ptr = AVR32_FLASH;
+  }
+  else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
+  {
+    dest.u8ptr = AVR32_FLASHC_USER_PAGE;
+  }
+
+  // If end of destination is outside flash, move it to the end of the previous flash page if any.
+  if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
+  {
+    dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
+  }
+  else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
+  {
+    dest_end.u8ptr = flash_array_end.u8ptr;
+  }
+
+  // Align each end of destination pointer with its natural boundary.
+  dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
+  dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
+  dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
+
+  // While end of destination is not reached...
+  while (dest.u8ptr < dest_end.u8ptr)
+  {
+    // Clear the page buffer in order to prepare data for a flash page write.
+    flashc_clear_page_buffer();
+    error_status |= flashc_error_status;
+
+    // Determine where the source data will end in the current flash page.
+    flash_page_source_end.u64ptr =
+      (U64 *)min((U32)dest_end.u64ptr,
+                 Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
+
+    // Determine if the current destination page has an incomplete end.
+    incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
+                                 Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
+
+    // Use a flash double-word buffer to manage unaligned accesses.
+    flash_dword.u64 = source.u64;
+
+    // If destination does not point to the beginning of the current flash page...
+    if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE))
+    {
+      // Fill the beginning of the page buffer with the current flash page data.
+      // This is required by the hardware, even if page erase is not requested,
+      // in order to be able to write successfully to erased parts of flash
+      // pages that have already been written to.
+      for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
+           tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+           tmp.u64ptr++)
+        *tmp.u64ptr = *tmp.u64ptr;
+
+      // If destination is not 64-bit aligned...
+      if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
+      {
+        // Fill the beginning of the flash double-word buffer with the current
+        // flash page data.
+        // This is required by the hardware, even if page erase is not
+        // requested, in order to be able to write successfully to erased parts
+        // of flash pages that have already been written to.
+        for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
+          flash_dword.u8[i] = *tmp.u8ptr++;
+
+        // Align the destination pointer with its 64-bit boundary.
+        dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+
+        // If the current destination double-word is not the last one...
+        if (dest.u64ptr < dest_end.u64ptr)
+        {
+          // Write the flash double-word buffer to the page buffer and reinitialize it.
+          *dest.u64ptr++ = flash_dword.u64;
+          flash_dword.u64 = source.u64;
+        }
+      }
+    }
+
+    // Write the source data to the page buffer with 64-bit alignment.
+    for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+      *dest.u64ptr++ = source.u64;
+
+    // If the current destination page has an incomplete end...
+    if (incomplete_flash_page_end)
+    {
+      // This is required by the hardware, even if page erase is not requested,
+      // in order to be able to write successfully to erased parts of flash
+      // pages that have already been written to.
+      {
+        tmp.u8ptr = (volatile U8 *)dest_end.u8ptr;
+
+        // If end of destination is not 64-bit aligned...
+        if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
+        {
+          // Fill the end of the flash double-word buffer with the current flash page data.
+          for (i = Get_align((U32)dest_end.u8ptr, sizeof(U64)); i < sizeof(U64); i++)
+            flash_dword.u8[i] = *tmp.u8ptr++;
+
+          // Write the flash double-word buffer to the page buffer.
+          *dest.u64ptr++ = flash_dword.u64;
+        }
+
+        // Fill the end of the page buffer with the current flash page data.
+        for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++)
+          *tmp.u64ptr = *tmp.u64ptr;
+      }
+    }
+
+    // If the current flash page is in the flash array...
+    if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
+    {
+      // Erase the current page if requested and write it from the page buffer.
+      if (erase)
+      {
+        flashc_erase_page(-1, FALSE);
+        error_status |= flashc_error_status;
+      }
+      flashc_write_page(-1);
+      error_status |= flashc_error_status;
+
+      // If the end of the flash array is reached, go to the User page.
+      if (dest.u8ptr >= flash_array_end.u8ptr)
+        dest.u8ptr = AVR32_FLASHC_USER_PAGE;
+    }
+    // If the current flash page is the User page...
+    else
+    {
+      // Erase the User page if requested and write it from the page buffer.
+      if (erase)
+      {
+        flashc_erase_user_page(FALSE);
+        error_status |= flashc_error_status;
+      }
+      flashc_write_user_page();
+      error_status |= flashc_error_status;
+    }
+  }
+
+  // Update the FLASHC error status.
+  flashc_error_status = error_status;
+
+  // Return the initial destination pointer as the standard memset function does.
+  return dst;
+}
+
+
+volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase)
+{
+  // Use aggregated pointers to have several alignments available for a same address.
+  UnionCVPtr flash_array_end;
+  UnionVPtr dest;
+  UnionCPtr source;
+  StructCVPtr dest_end;
+  UnionCVPtr flash_page_source_end;
+  Bool incomplete_flash_page_end;
+  Union64 flash_dword;
+  Bool flash_dword_pending = FALSE;
+  UnionVPtr tmp;
+  unsigned int error_status = 0;
+  unsigned int i, j;
+
+  // Reformat arguments.
+  flash_array_end.u8ptr = AVR32_FLASH + flashc_get_flash_size();
+  dest.u8ptr = dst;
+  source.u8ptr = src;
+  dest_end.u8ptr = dest.u8ptr + nbytes;
+
+  // If destination is outside flash, go to next flash page if any.
+  if (dest.u8ptr < AVR32_FLASH)
+  {
+    source.u8ptr += AVR32_FLASH - dest.u8ptr;
+    dest.u8ptr = AVR32_FLASH;
+  }
+  else if (flash_array_end.u8ptr <= dest.u8ptr && dest.u8ptr < AVR32_FLASHC_USER_PAGE)
+  {
+    source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
+    dest.u8ptr = AVR32_FLASHC_USER_PAGE;
+  }
+
+  // If end of destination is outside flash, move it to the end of the previous flash page if any.
+  if (dest_end.u8ptr > AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE)
+  {
+    dest_end.u8ptr = AVR32_FLASHC_USER_PAGE + AVR32_FLASHC_USER_PAGE_SIZE;
+  }
+  else if (AVR32_FLASHC_USER_PAGE >= dest_end.u8ptr && dest_end.u8ptr > flash_array_end.u8ptr)
+  {
+    dest_end.u8ptr = flash_array_end.u8ptr;
+  }
+
+  // Align each end of destination pointer with its natural boundary.
+  dest_end.u16ptr = (U16 *)Align_down((U32)dest_end.u8ptr, sizeof(U16));
+  dest_end.u32ptr = (U32 *)Align_down((U32)dest_end.u16ptr, sizeof(U32));
+  dest_end.u64ptr = (U64 *)Align_down((U32)dest_end.u32ptr, sizeof(U64));
+
+  // While end of destination is not reached...
+  while (dest.u8ptr < dest_end.u8ptr)
+  {
+    // Clear the page buffer in order to prepare data for a flash page write.
+    flashc_clear_page_buffer();
+    error_status |= flashc_error_status;
+
+    // Determine where the source data will end in the current flash page.
+    flash_page_source_end.u64ptr =
+      (U64 *)min((U32)dest_end.u64ptr,
+                 Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) + AVR32_FLASHC_PAGE_SIZE);
+
+    // Determine if the current destination page has an incomplete end.
+    incomplete_flash_page_end = (Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE) >=
+                                 Align_down((U32)dest_end.u8ptr, AVR32_FLASHC_PAGE_SIZE));
+
+    // If destination does not point to the beginning of the current flash page...
+    if (!Test_align((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE))
+    {
+      // Fill the beginning of the page buffer with the current flash page data.
+      // This is required by the hardware, even if page erase is not requested,
+      // in order to be able to write successfully to erased parts of flash
+      // pages that have already been written to.
+      for (tmp.u8ptr = (U8 *)Align_down((U32)dest.u8ptr, AVR32_FLASHC_PAGE_SIZE);
+           tmp.u64ptr < (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+           tmp.u64ptr++)
+        *tmp.u64ptr = *tmp.u64ptr;
+
+      // If destination is not 64-bit aligned...
+      if (!Test_align((U32)dest.u8ptr, sizeof(U64)))
+      {
+        // Fill the beginning of the flash double-word buffer with the current
+        // flash page data.
+        // This is required by the hardware, even if page erase is not
+        // requested, in order to be able to write successfully to erased parts
+        // of flash pages that have already been written to.
+        for (i = 0; i < Get_align((U32)dest.u8ptr, sizeof(U64)); i++)
+          flash_dword.u8[i] = *tmp.u8ptr++;
+
+        // Fill the end of the flash double-word buffer with the source data.
+        for (; i < sizeof(U64); i++)
+          flash_dword.u8[i] = *source.u8ptr++;
+
+        // Align the destination pointer with its 64-bit boundary.
+        dest.u64ptr = (U64 *)Align_down((U32)dest.u8ptr, sizeof(U64));
+
+        // If the current destination double-word is not the last one...
+        if (dest.u64ptr < dest_end.u64ptr)
+        {
+          // Write the flash double-word buffer to the page buffer.
+          *dest.u64ptr++ = flash_dword.u64;
+        }
+        // If the current destination double-word is the last one, the flash
+        // double-word buffer must be kept for later.
+        else flash_dword_pending = TRUE;
+      }
+    }
+
+    // Read the source data with the maximal possible alignment and write it to
+    // the page buffer with 64-bit alignment.
+    switch (Get_align((U32)source.u8ptr, sizeof(U32)))
+    {
+    case 0:
+      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+        *dest.u64ptr++ = *source.u64ptr++;
+      break;
+
+    case sizeof(U16):
+      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+      {
+        for (j = 0; j < sizeof(U64) / sizeof(U16); j++) flash_dword.u16[j] = *source.u16ptr++;
+        *dest.u64ptr++ = flash_dword.u64;
+      }
+      break;
+
+    default:
+      for (i = flash_page_source_end.u64ptr - dest.u64ptr; i; i--)
+      {
+        for (j = 0; j < sizeof(U64); j++) flash_dword.u8[j] = *source.u8ptr++;
+        *dest.u64ptr++ = flash_dword.u64;
+      }
+    }
+
+    // If the current destination page has an incomplete end...
+    if (incomplete_flash_page_end)
+    {
+      // If the flash double-word buffer is in use, do not initialize it.
+      if (flash_dword_pending) i = Get_align((U32)dest_end.u8ptr, sizeof(U64));
+      // If the flash double-word buffer is free...
+      else
+      {
+        // Fill the beginning of the flash double-word buffer with the source data.
+        for (i = 0; i < Get_align((U32)dest_end.u8ptr, sizeof(U64)); i++)
+          flash_dword.u8[i] = *source.u8ptr++;
+      }
+
+      // This is required by the hardware, even if page erase is not requested,
+      // in order to be able to write successfully to erased parts of flash
+      // pages that have already been written to.
+      {
+        tmp.u8ptr = (volatile U8 *)dest_end.u8ptr;
+
+        // If end of destination is not 64-bit aligned...
+        if (!Test_align((U32)dest_end.u8ptr, sizeof(U64)))
+        {
+          // Fill the end of the flash double-word buffer with the current flash page data.
+          for (; i < sizeof(U64); i++)
+            flash_dword.u8[i] = *tmp.u8ptr++;
+
+          // Write the flash double-word buffer to the page buffer.
+          *dest.u64ptr++ = flash_dword.u64;
+        }
+
+        // Fill the end of the page buffer with the current flash page data.
+        for (; !Test_align((U32)tmp.u64ptr, AVR32_FLASHC_PAGE_SIZE); tmp.u64ptr++)
+          *tmp.u64ptr = *tmp.u64ptr;
+      }
+    }
+
+    // If the current flash page is in the flash array...
+    if (dest.u8ptr <= AVR32_FLASHC_USER_PAGE)
+    {
+      // Erase the current page if requested and write it from the page buffer.
+      if (erase)
+      {
+        flashc_erase_page(-1, FALSE);
+        error_status |= flashc_error_status;
+      }
+      flashc_write_page(-1);
+      error_status |= flashc_error_status;
+
+      // If the end of the flash array is reached, go to the User page.
+      if (dest.u8ptr >= flash_array_end.u8ptr)
+      {
+        source.u8ptr += AVR32_FLASHC_USER_PAGE - dest.u8ptr;
+        dest.u8ptr = AVR32_FLASHC_USER_PAGE;
+      }
+    }
+    // If the current flash page is the User page...
+    else
+    {
+      // Erase the User page if requested and write it from the page buffer.
+      if (erase)
+      {
+        flashc_erase_user_page(FALSE);
+        error_status |= flashc_error_status;
+      }
+      flashc_write_user_page();
+      error_status |= flashc_error_status;
+    }
+  }
+
+  // Update the FLASHC error status.
+  flashc_error_status = error_status;
+
+  // Return the initial destination pointer as the standard memcpy function does.
+  return dst;
+}
+
+
+#if UC3C
+void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz)
+{
+  //! Device-specific data
+  #undef AVR32_FLASHC_FWS_0_MAX_FREQ
+  #undef AVR32_FLASHC_FWS_1_MAX_FREQ
+  #undef AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ
+  #undef AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ
+  #define AVR32_FLASHC_FWS_0_MAX_FREQ           33000000
+  #define AVR32_FLASHC_FWS_1_MAX_FREQ           66000000
+  #define AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ      33000000
+  #define AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ      72000000
+  // These defines are missing from or wrong in the toolchain header files uc3cxxx.h
+  // Put a Bugzilla 
+
+  if(cpu_f_hz > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)    // > 33MHz
+  {
+    // Set a wait-state
+    flashc_set_wait_state(1);
+    if(cpu_f_hz <= AVR32_FLASHC_FWS_1_MAX_FREQ) // <= 66MHz and >33Mhz
+    {
+      // Disable the high-speed read mode.      
+      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
+    }
+    else // > 66Mhz
+    {
+      // Enable the high-speed read mode.
+      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);                     
+    }
+  }
+  else  // <= 33 MHz    
+  {
+    // Disable wait-state
+    flashc_set_wait_state(0);
+
+    // Disable the high-speed read mode.
+    flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
+    
+  }
+}
+#endif // UC3C device-specific implementation
+
+//! @}

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/FLASHC/flashc.h

@@ -1,1002 +1,1002 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief FLASHC driver for AVR32 UC3.
- *
- * AVR32 Flash Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a FLASHC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _FLASHC_H_
-#define _FLASHC_H_
-
-#include <avr32/io.h>
-#include <stddef.h>
-#include "compiler.h"
-
-//! Number of flash regions defined by the FLASHC.
-#define AVR32_FLASHC_REGIONS  (AVR32_FLASHC_FLASH_SIZE /\
-                               (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE))
-
-
-/*! \name Flash Properties
- */
-//! @{
-
-/*! \brief Gets the size of the whole flash array.
- *
- * \return The size of the whole flash array in bytes.
- */
-extern unsigned int flashc_get_flash_size(void);
-
-/*! \brief Gets the total number of pages in the flash array.
- *
- * \return The total number of pages in the flash array.
- */
-extern unsigned int flashc_get_page_count(void);
-
-/*! \brief Gets the number of pages in each flash region.
- *
- * \return The number of pages in each flash region.
- */
-extern unsigned int flashc_get_page_count_per_region(void);
-
-/*! \brief Gets the region number of a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \return The region number of the specified page.
- */
-extern unsigned int flashc_get_page_region(int page_number);
-
-/*! \brief Gets the number of the first page of a region.
- *
- * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
- *
- * \return The number of the first page of the specified region.
- */
-extern unsigned int flashc_get_region_first_page_number(unsigned int region);
-
-//! @}
-
-
-/*! \name FLASHC Control
- */
-//! @{
-
-/*! \brief Gets the number of wait states of flash read accesses.
- *
- * \return The number of wait states of flash read accesses.
- */
-extern unsigned int flashc_get_wait_state(void);
-
-/*! \brief Sets the number of wait states of flash read accesses.
- *
- * \param wait_state The number of wait states of flash read accesses: \c 0 to
- *                   \c 1.
- */
-extern void flashc_set_wait_state(unsigned int wait_state);
-
-/*! \brief Tells whether the Flash Ready interrupt is enabled.
- *
- * \return Whether the Flash Ready interrupt is enabled.
- */
-extern Bool flashc_is_ready_int_enabled(void);
-
-/*! \brief Enables or disables the Flash Ready interrupt.
- *
- * \param enable Whether to enable the Flash Ready interrupt: \c TRUE or
- *               \c FALSE.
- */
-extern void flashc_enable_ready_int(Bool enable);
-
-/*! \brief Tells whether the Lock Error interrupt is enabled.
- *
- * \return Whether the Lock Error interrupt is enabled.
- */
-extern Bool flashc_is_lock_error_int_enabled(void);
-
-/*! \brief Enables or disables the Lock Error interrupt.
- *
- * \param enable Whether to enable the Lock Error interrupt: \c TRUE or
- *               \c FALSE.
- */
-extern void flashc_enable_lock_error_int(Bool enable);
-
-/*! \brief Tells whether the Programming Error interrupt is enabled.
- *
- * \return Whether the Programming Error interrupt is enabled.
- */
-extern Bool flashc_is_prog_error_int_enabled(void);
-
-/*! \brief Enables or disables the Programming Error interrupt.
- *
- * \param enable Whether to enable the Programming Error interrupt: \c TRUE or
- *               \c FALSE.
- */
-extern void flashc_enable_prog_error_int(Bool enable);
-
-//! @}
-
-
-/*! \name FLASHC Status
- */
-//! @{
-
-/*! \brief Tells whether the FLASHC is ready to run a new command.
- *
- * \return Whether the FLASHC is ready to run a new command.
- */
-extern Bool flashc_is_ready(void);
-
-/*! \brief Waits actively until the FLASHC is ready to run a new command.
- *
- * This is the default function assigned to \ref flashc_wait_until_ready.
- */
-extern void flashc_default_wait_until_ready(void);
-
-//! Pointer to the function used by the driver when it needs to wait until the
-//! FLASHC is ready to run a new command.
-//! The default function is \ref flashc_default_wait_until_ready.
-//! The user may change this pointer to use another implementation.
-extern void (*volatile flashc_wait_until_ready)(void);
-
-/*! \brief Tells whether a Lock Error has occurred during the last function
- *         called that issued one or more FLASHC commands.
- *
- * \return Whether a Lock Error has occurred during the last function called
- *         that issued one or more FLASHC commands.
- */
-extern Bool flashc_is_lock_error(void);
-
-/*! \brief Tells whether a Programming Error has occurred during the last
- *         function called that issued one or more FLASHC commands.
- *
- * \return Whether a Programming Error has occurred during the last function
- *         called that issued one or more FLASHC commands.
- */
-extern Bool flashc_is_programming_error(void);
-
-//! @}
-
-
-/*! \name FLASHC Command Control
- */
-//! @{
-
-/*! \brief Gets the last issued FLASHC command.
- *
- * \return The last issued FLASHC command.
- */
-extern unsigned int flashc_get_command(void);
-
-/*! \brief Gets the current FLASHC page number.
- *
- * \return The current FLASHC page number.
- */
-extern unsigned int flashc_get_page_number(void);
-
-/*! \brief Issues a FLASHC command.
- *
- * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x.
- * \param page_number The page number to apply the command to:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: use this to apply the command to the current page number
- *        or if the command does not apply to any page number;
- *   \arg this argument may have other meanings according to the command. See
- *        the FLASHC chapter of the MCU datasheet.
- *
- * \warning A Lock Error is issued if the command violates the protection
- *          mechanism.
- *
- * \warning A Programming Error is issued if the command is invalid.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_issue_command(unsigned int command, int page_number);
-
-//! @}
-
-
-/*! \name FLASHC Global Commands
- */
-//! @{
-
-/*! \brief Issues a No Operation command to the FLASHC.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_no_operation(void);
-
-/*! \brief Issues an Erase All command to the FLASHC.
- *
- * This command erases all bits in the flash array, the general-purpose fuse
- * bits and the Security bit. The User page is not erased.
- *
- * This command also ensures that all volatile memories, such as register file
- * and RAMs, are erased before the Security bit is erased, i.e. deactivated.
- *
- * \warning A Lock Error is issued if at least one region is locked or the
- *          bootloader protection is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern void flashc_erase_all(void);
-
-//! @}
-
-
-/*! \name FLASHC Protection Mechanisms
- */
-//! @{
-
-/*! \brief Tells whether the Security bit is active.
- *
- * \return Whether the Security bit is active.
- */
-extern Bool flashc_is_security_bit_active(void);
-
-/*! \brief Activates the Security bit.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_activate_security_bit(void);
-
-/*! \brief Gets the bootloader protected size.
- *
- * \return The bootloader protected size in bytes.
- */
-extern unsigned int flashc_get_bootloader_protected_size(void);
-
-/*! \brief Sets the bootloader protected size.
- *
- * \param bootprot_size The wanted bootloader protected size in bytes. If this
- *                      size is not supported, the actual size will be the
- *                      nearest greater available size or the maximal possible
- *                      size if the requested size is too large.
- *
- * \return The actual bootloader protected size in bytes.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size);
-
-/*! \brief Tells whether external privileged fetch is locked.
- *
- * \return Whether external privileged fetch is locked.
- */
-extern Bool flashc_is_external_privileged_fetch_locked(void);
-
-/*! \brief Locks or unlocks external privileged fetch.
- *
- * \param lock Whether to lock external privileged fetch: \c TRUE or \c FALSE.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_external_privileged_fetch(Bool lock);
-
-/*! \brief Tells whether the region of a page is locked.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \return Whether the region of the specified page is locked.
- */
-extern Bool flashc_is_page_region_locked(int page_number);
-
-/*! \brief Tells whether a region is locked.
- *
- * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
- *
- * \return Whether the specified region is locked.
- */
-extern Bool flashc_is_region_locked(unsigned int region);
-
-/*! \brief Locks or unlocks the region of a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- * \param lock Whether to lock the region of the specified page: \c TRUE or
- *             \c FALSE.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_page_region(int page_number, Bool lock);
-
-/*! \brief Locks or unlocks a region.
- *
- * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
- * \param lock Whether to lock the specified region: \c TRUE or \c FALSE.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_region(unsigned int region, Bool lock);
-
-/*! \brief Locks or unlocks all regions.
- *
- * \param lock Whether to lock the regions: \c TRUE or \c FALSE.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_lock_all_regions(Bool lock);
-
-//! @}
-
-
-/*! \name Access to General-Purpose Fuses
- */
-//! @{
-
-/*! \brief Reads a general-purpose fuse bit.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- *
- * \return The value of the specified general-purpose fuse bit.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit);
-
-/*! \brief Reads a general-purpose fuse bit-field.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- *
- * \return The value of the specified general-purpose fuse bit-field.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width);
-
-/*! \brief Reads a general-purpose fuse byte.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- *
- * \return The value of the specified general-purpose fuse byte.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte);
-
-/*! \brief Reads all general-purpose fuses.
- *
- * \return The value of all general-purpose fuses as a word.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern U64 flashc_read_all_gp_fuses(void);
-
-/*! \brief Erases a general-purpose fuse bit.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check);
-
-/*! \brief Erases a general-purpose fuse bit-field.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check);
-
-/*! \brief Erases a general-purpose fuse byte.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check);
-
-/*! \brief Erases all general-purpose fuses.
- *
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern Bool flashc_erase_all_gp_fuses(Bool check);
-
-/*! \brief Writes a general-purpose fuse bit.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- * \param value The value of the specified general-purpose fuse bit.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
-
-/*! \brief Writes a general-purpose fuse bit-field.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- * \param value The value of the specified general-purpose fuse bit-field.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value);
-
-/*! \brief Writes a general-purpose fuse byte.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- * \param value The value of the specified general-purpose fuse byte.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
-
-/*! \brief Writes all general-purpose fuses.
- *
- * \param value The value of all general-purpose fuses as a word.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_write_all_gp_fuses(U64 value);
-
-/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write
- *         operations.
- *
- * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
- * \param value The value of the specified general-purpose fuse bit.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
-
-/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and
- *         write operations.
- *
- * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
- *            \c 63.
- * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
- *              \c 64.
- * \param value The value of the specified general-purpose fuse bit-field.
- *
- * \warning A Lock Error is issued if the Security bit is active and the command
- *          is applied to BOOTPROT or EPFL fuses.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value);
-
-/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write
- *         operations.
- *
- * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
- * \param value The value of the specified general-purpose fuse byte.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
-
-/*! \brief Sets all general-purpose fuses with the appropriate erase and write
- *         operations.
- *
- * \param value The value of all general-purpose fuses as a word.
- *
- * \warning A Lock Error is issued if the Security bit is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note The actual number of general-purpose fuse bits implemented by hardware
- *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
- *       fixed at 1 by hardware.
- */
-extern void flashc_set_all_gp_fuses(U64 value);
-
-//! @}
-
-
-/*! \name Access to Flash Pages
- */
-//! @{
-
-/*! \brief Clears the page buffer.
- *
- * This command resets all bits in the page buffer to one. Write accesses to the
- * page buffer can only change page buffer bits from one to zero.
- *
- * \warning The page buffer is not automatically reset after a page write.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern void flashc_clear_page_buffer(void);
-
-/*! \brief Tells whether the page to which the last Quick Page Read or Quick
- *         Page Read User Page command was applied was erased.
- *
- * \return Whether the page to which the last Quick Page Read or Quick Page Read
- *         User Page command was applied was erased.
- */
-extern Bool flashc_is_page_erased(void);
-
-/*! \brief Applies the Quick Page Read command to a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \return Whether the specified page is erased.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern Bool flashc_quick_page_read(int page_number);
-
-/*! \brief Erases a page.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if the command is applied to a page belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern Bool flashc_erase_page(int page_number, Bool check);
-
-/*! \brief Erases all pages within the flash array.
- *
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \warning A Lock Error is issued if at least one region is locked or the
- *          bootloader protection is active.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern Bool flashc_erase_all_pages(Bool check);
-
-/*! \brief Writes a page from the page buffer.
- *
- * \param page_number The page number:
- *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
- *        the flash array;
- *   \arg <tt>< 0</tt>: the current page number.
- *
- * \warning A Lock Error is issued if the command is applied to a page belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \warning The page buffer is not automatically reset after a page write.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- */
-extern void flashc_write_page(int page_number);
-
-/*! \brief Issues a Quick Page Read User Page command to the FLASHC.
- *
- * \return Whether the User page is erased.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern Bool flashc_quick_user_page_read(void);
-
-/*! \brief Erases the User page.
- *
- * \param check Whether to check erase: \c TRUE or \c FALSE.
- *
- * \return Whether the erase succeeded or always \c TRUE if erase check was not
- *         requested.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note An erase operation can only set bits.
- */
-extern Bool flashc_erase_user_page(Bool check);
-
-/*! \brief Writes the User page from the page buffer.
- *
- * \warning The page buffer is not automatically reset after a page write.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- *
- * \note A write operation can only clear bits.
- */
-extern void flashc_write_user_page(void);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src source byte.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source byte.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source half-word.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source half-word.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source word.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source word.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source double-word.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source double-word.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase);
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the repeated \a src big-endian source pattern.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Source double-word.
- * \param src_width \a src width in bits: 8, 16, 32 or 64.
- * \param nbytes Number of bytes to set.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-#define flashc_memset(dst, src, src_width, nbytes, erase) \
-          TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase))
-
-/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
- *         from the source pointed to by \a src.
- *
- * The destination areas that are not within the flash array or the User page
- * are ignored.
- *
- * All pointer and size alignments are supported.
- *
- * \param dst Pointer to flash destination.
- * \param src Pointer to source data.
- * \param nbytes Number of bytes to copy.
- * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
- *
- * \return The value of \a dst.
- *
- * \warning If copying takes place between areas that overlap, the behavior is
- *          undefined.
- *
- * \warning This function may be called with \a erase set to \c FALSE only if
- *          the destination consists only of erased words, i.e. this function
- *          can not be used to write only one bit of a previously written word.
- *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
- *          resulting value in flash may be different from \c 0x00000000.
- *
- * \warning A Lock Error is issued if the command is applied to pages belonging
- *          to a locked region or to the bootloader protected area.
- *
- * \note The FLASHC error status returned by \ref flashc_is_lock_error and
- *       \ref flashc_is_programming_error is updated.
- */
-extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase);
-
-#if UC3C
-
-/*! \brief Depednding to the CPU frequency, set the wait states of flash read
- *         accesses and enable or disable the High speed read mode.
- *
- * \param cpu_f_hz The CPU frequency
- */
-void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz);
-#endif // UC3C device-specific implementation
-
-//! @}
-
-
-#endif  // _FLASHC_H_
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief FLASHC driver for AVR32 UC3.
+ *
+ * AVR32 Flash Controller driver module.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with a FLASHC module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _FLASHC_H_
+#define _FLASHC_H_
+
+#include <avr32/io.h>
+#include <stddef.h>
+#include "compiler.h"
+
+//! Number of flash regions defined by the FLASHC.
+#define AVR32_FLASHC_REGIONS  (AVR32_FLASHC_FLASH_SIZE /\
+                               (AVR32_FLASHC_PAGES_PR_REGION * AVR32_FLASHC_PAGE_SIZE))
+
+
+/*! \name Flash Properties
+ */
+//! @{
+
+/*! \brief Gets the size of the whole flash array.
+ *
+ * \return The size of the whole flash array in bytes.
+ */
+extern unsigned int flashc_get_flash_size(void);
+
+/*! \brief Gets the total number of pages in the flash array.
+ *
+ * \return The total number of pages in the flash array.
+ */
+extern unsigned int flashc_get_page_count(void);
+
+/*! \brief Gets the number of pages in each flash region.
+ *
+ * \return The number of pages in each flash region.
+ */
+extern unsigned int flashc_get_page_count_per_region(void);
+
+/*! \brief Gets the region number of a page.
+ *
+ * \param page_number The page number:
+ *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
+ *        the flash array;
+ *   \arg <tt>< 0</tt>: the current page number.
+ *
+ * \return The region number of the specified page.
+ */
+extern unsigned int flashc_get_page_region(int page_number);
+
+/*! \brief Gets the number of the first page of a region.
+ *
+ * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
+ *
+ * \return The number of the first page of the specified region.
+ */
+extern unsigned int flashc_get_region_first_page_number(unsigned int region);
+
+//! @}
+
+
+/*! \name FLASHC Control
+ */
+//! @{
+
+/*! \brief Gets the number of wait states of flash read accesses.
+ *
+ * \return The number of wait states of flash read accesses.
+ */
+extern unsigned int flashc_get_wait_state(void);
+
+/*! \brief Sets the number of wait states of flash read accesses.
+ *
+ * \param wait_state The number of wait states of flash read accesses: \c 0 to
+ *                   \c 1.
+ */
+extern void flashc_set_wait_state(unsigned int wait_state);
+
+/*! \brief Tells whether the Flash Ready interrupt is enabled.
+ *
+ * \return Whether the Flash Ready interrupt is enabled.
+ */
+extern Bool flashc_is_ready_int_enabled(void);
+
+/*! \brief Enables or disables the Flash Ready interrupt.
+ *
+ * \param enable Whether to enable the Flash Ready interrupt: \c TRUE or
+ *               \c FALSE.
+ */
+extern void flashc_enable_ready_int(Bool enable);
+
+/*! \brief Tells whether the Lock Error interrupt is enabled.
+ *
+ * \return Whether the Lock Error interrupt is enabled.
+ */
+extern Bool flashc_is_lock_error_int_enabled(void);
+
+/*! \brief Enables or disables the Lock Error interrupt.
+ *
+ * \param enable Whether to enable the Lock Error interrupt: \c TRUE or
+ *               \c FALSE.
+ */
+extern void flashc_enable_lock_error_int(Bool enable);
+
+/*! \brief Tells whether the Programming Error interrupt is enabled.
+ *
+ * \return Whether the Programming Error interrupt is enabled.
+ */
+extern Bool flashc_is_prog_error_int_enabled(void);
+
+/*! \brief Enables or disables the Programming Error interrupt.
+ *
+ * \param enable Whether to enable the Programming Error interrupt: \c TRUE or
+ *               \c FALSE.
+ */
+extern void flashc_enable_prog_error_int(Bool enable);
+
+//! @}
+
+
+/*! \name FLASHC Status
+ */
+//! @{
+
+/*! \brief Tells whether the FLASHC is ready to run a new command.
+ *
+ * \return Whether the FLASHC is ready to run a new command.
+ */
+extern Bool flashc_is_ready(void);
+
+/*! \brief Waits actively until the FLASHC is ready to run a new command.
+ *
+ * This is the default function assigned to \ref flashc_wait_until_ready.
+ */
+extern void flashc_default_wait_until_ready(void);
+
+//! Pointer to the function used by the driver when it needs to wait until the
+//! FLASHC is ready to run a new command.
+//! The default function is \ref flashc_default_wait_until_ready.
+//! The user may change this pointer to use another implementation.
+extern void (*volatile flashc_wait_until_ready)(void);
+
+/*! \brief Tells whether a Lock Error has occurred during the last function
+ *         called that issued one or more FLASHC commands.
+ *
+ * \return Whether a Lock Error has occurred during the last function called
+ *         that issued one or more FLASHC commands.
+ */
+extern Bool flashc_is_lock_error(void);
+
+/*! \brief Tells whether a Programming Error has occurred during the last
+ *         function called that issued one or more FLASHC commands.
+ *
+ * \return Whether a Programming Error has occurred during the last function
+ *         called that issued one or more FLASHC commands.
+ */
+extern Bool flashc_is_programming_error(void);
+
+//! @}
+
+
+/*! \name FLASHC Command Control
+ */
+//! @{
+
+/*! \brief Gets the last issued FLASHC command.
+ *
+ * \return The last issued FLASHC command.
+ */
+extern unsigned int flashc_get_command(void);
+
+/*! \brief Gets the current FLASHC page number.
+ *
+ * \return The current FLASHC page number.
+ */
+extern unsigned int flashc_get_page_number(void);
+
+/*! \brief Issues a FLASHC command.
+ *
+ * \param command The command: \c AVR32_FLASHC_FCMD_CMD_x.
+ * \param page_number The page number to apply the command to:
+ *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
+ *        the flash array;
+ *   \arg <tt>< 0</tt>: use this to apply the command to the current page number
+ *        or if the command does not apply to any page number;
+ *   \arg this argument may have other meanings according to the command. See
+ *        the FLASHC chapter of the MCU datasheet.
+ *
+ * \warning A Lock Error is issued if the command violates the protection
+ *          mechanism.
+ *
+ * \warning A Programming Error is issued if the command is invalid.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_issue_command(unsigned int command, int page_number);
+
+//! @}
+
+
+/*! \name FLASHC Global Commands
+ */
+//! @{
+
+/*! \brief Issues a No Operation command to the FLASHC.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_no_operation(void);
+
+/*! \brief Issues an Erase All command to the FLASHC.
+ *
+ * This command erases all bits in the flash array, the general-purpose fuse
+ * bits and the Security bit. The User page is not erased.
+ *
+ * This command also ensures that all volatile memories, such as register file
+ * and RAMs, are erased before the Security bit is erased, i.e. deactivated.
+ *
+ * \warning A Lock Error is issued if at least one region is locked or the
+ *          bootloader protection is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern void flashc_erase_all(void);
+
+//! @}
+
+
+/*! \name FLASHC Protection Mechanisms
+ */
+//! @{
+
+/*! \brief Tells whether the Security bit is active.
+ *
+ * \return Whether the Security bit is active.
+ */
+extern Bool flashc_is_security_bit_active(void);
+
+/*! \brief Activates the Security bit.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_activate_security_bit(void);
+
+/*! \brief Gets the bootloader protected size.
+ *
+ * \return The bootloader protected size in bytes.
+ */
+extern unsigned int flashc_get_bootloader_protected_size(void);
+
+/*! \brief Sets the bootloader protected size.
+ *
+ * \param bootprot_size The wanted bootloader protected size in bytes. If this
+ *                      size is not supported, the actual size will be the
+ *                      nearest greater available size or the maximal possible
+ *                      size if the requested size is too large.
+ *
+ * \return The actual bootloader protected size in bytes.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern unsigned int flashc_set_bootloader_protected_size(unsigned int bootprot_size);
+
+/*! \brief Tells whether external privileged fetch is locked.
+ *
+ * \return Whether external privileged fetch is locked.
+ */
+extern Bool flashc_is_external_privileged_fetch_locked(void);
+
+/*! \brief Locks or unlocks external privileged fetch.
+ *
+ * \param lock Whether to lock external privileged fetch: \c TRUE or \c FALSE.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_lock_external_privileged_fetch(Bool lock);
+
+/*! \brief Tells whether the region of a page is locked.
+ *
+ * \param page_number The page number:
+ *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
+ *        the flash array;
+ *   \arg <tt>< 0</tt>: the current page number.
+ *
+ * \return Whether the region of the specified page is locked.
+ */
+extern Bool flashc_is_page_region_locked(int page_number);
+
+/*! \brief Tells whether a region is locked.
+ *
+ * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
+ *
+ * \return Whether the specified region is locked.
+ */
+extern Bool flashc_is_region_locked(unsigned int region);
+
+/*! \brief Locks or unlocks the region of a page.
+ *
+ * \param page_number The page number:
+ *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
+ *        the flash array;
+ *   \arg <tt>< 0</tt>: the current page number.
+ * \param lock Whether to lock the region of the specified page: \c TRUE or
+ *             \c FALSE.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_lock_page_region(int page_number, Bool lock);
+
+/*! \brief Locks or unlocks a region.
+ *
+ * \param region The region number: \c 0 to <tt>(AVR32_FLASHC_REGIONS - 1)</tt>.
+ * \param lock Whether to lock the specified region: \c TRUE or \c FALSE.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_lock_region(unsigned int region, Bool lock);
+
+/*! \brief Locks or unlocks all regions.
+ *
+ * \param lock Whether to lock the regions: \c TRUE or \c FALSE.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_lock_all_regions(Bool lock);
+
+//! @}
+
+
+/*! \name Access to General-Purpose Fuses
+ */
+//! @{
+
+/*! \brief Reads a general-purpose fuse bit.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
+ *
+ * \return The value of the specified general-purpose fuse bit.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern Bool flashc_read_gp_fuse_bit(unsigned int gp_fuse_bit);
+
+/*! \brief Reads a general-purpose fuse bit-field.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ *            \c 63.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ *              \c 64.
+ *
+ * \return The value of the specified general-purpose fuse bit-field.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern U64 flashc_read_gp_fuse_bitfield(unsigned int pos, unsigned int width);
+
+/*! \brief Reads a general-purpose fuse byte.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
+ *
+ * \return The value of the specified general-purpose fuse byte.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern U8 flashc_read_gp_fuse_byte(unsigned int gp_fuse_byte);
+
+/*! \brief Reads all general-purpose fuses.
+ *
+ * \return The value of all general-purpose fuses as a word.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern U64 flashc_read_all_gp_fuses(void);
+
+/*! \brief Erases a general-purpose fuse bit.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ *         requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ *          is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern Bool flashc_erase_gp_fuse_bit(unsigned int gp_fuse_bit, Bool check);
+
+/*! \brief Erases a general-purpose fuse bit-field.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ *            \c 63.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ *              \c 64.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ *         requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ *          is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern Bool flashc_erase_gp_fuse_bitfield(unsigned int pos, unsigned int width, Bool check);
+
+/*! \brief Erases a general-purpose fuse byte.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ *         requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern Bool flashc_erase_gp_fuse_byte(unsigned int gp_fuse_byte, Bool check);
+
+/*! \brief Erases all general-purpose fuses.
+ *
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ *         requested.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern Bool flashc_erase_all_gp_fuses(Bool check);
+
+/*! \brief Writes a general-purpose fuse bit.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
+ * \param value The value of the specified general-purpose fuse bit.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ *          is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_write_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
+
+/*! \brief Writes a general-purpose fuse bit-field.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ *            \c 63.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ *              \c 64.
+ * \param value The value of the specified general-purpose fuse bit-field.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ *          is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_write_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value);
+
+/*! \brief Writes a general-purpose fuse byte.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
+ * \param value The value of the specified general-purpose fuse byte.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_write_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
+
+/*! \brief Writes all general-purpose fuses.
+ *
+ * \param value The value of all general-purpose fuses as a word.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_write_all_gp_fuses(U64 value);
+
+/*! \brief Sets a general-purpose fuse bit with the appropriate erase and write
+ *         operations.
+ *
+ * \param gp_fuse_bit The general-purpose fuse bit: \c 0 to \c 63.
+ * \param value The value of the specified general-purpose fuse bit.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ *          is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_set_gp_fuse_bit(unsigned int gp_fuse_bit, Bool value);
+
+/*! \brief Sets a general-purpose fuse bit-field with the appropriate erase and
+ *         write operations.
+ *
+ * \param pos The bit-position of the general-purpose fuse bit-field: \c 0 to
+ *            \c 63.
+ * \param width The bit-width of the general-purpose fuse bit-field: \c 0 to
+ *              \c 64.
+ * \param value The value of the specified general-purpose fuse bit-field.
+ *
+ * \warning A Lock Error is issued if the Security bit is active and the command
+ *          is applied to BOOTPROT or EPFL fuses.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_set_gp_fuse_bitfield(unsigned int pos, unsigned int width, U64 value);
+
+/*! \brief Sets a general-purpose fuse byte with the appropriate erase and write
+ *         operations.
+ *
+ * \param gp_fuse_byte The general-purpose fuse byte: \c 0 to \c 7.
+ * \param value The value of the specified general-purpose fuse byte.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_set_gp_fuse_byte(unsigned int gp_fuse_byte, U8 value);
+
+/*! \brief Sets all general-purpose fuses with the appropriate erase and write
+ *         operations.
+ *
+ * \param value The value of all general-purpose fuses as a word.
+ *
+ * \warning A Lock Error is issued if the Security bit is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note The actual number of general-purpose fuse bits implemented by hardware
+ *       is given by \c AVR32_FLASHC_GPF_NUM. The other bits among the 64 are
+ *       fixed at 1 by hardware.
+ */
+extern void flashc_set_all_gp_fuses(U64 value);
+
+//! @}
+
+
+/*! \name Access to Flash Pages
+ */
+//! @{
+
+/*! \brief Clears the page buffer.
+ *
+ * This command resets all bits in the page buffer to one. Write accesses to the
+ * page buffer can only change page buffer bits from one to zero.
+ *
+ * \warning The page buffer is not automatically reset after a page write.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern void flashc_clear_page_buffer(void);
+
+/*! \brief Tells whether the page to which the last Quick Page Read or Quick
+ *         Page Read User Page command was applied was erased.
+ *
+ * \return Whether the page to which the last Quick Page Read or Quick Page Read
+ *         User Page command was applied was erased.
+ */
+extern Bool flashc_is_page_erased(void);
+
+/*! \brief Applies the Quick Page Read command to a page.
+ *
+ * \param page_number The page number:
+ *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
+ *        the flash array;
+ *   \arg <tt>< 0</tt>: the current page number.
+ *
+ * \return Whether the specified page is erased.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern Bool flashc_quick_page_read(int page_number);
+
+/*! \brief Erases a page.
+ *
+ * \param page_number The page number:
+ *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
+ *        the flash array;
+ *   \arg <tt>< 0</tt>: the current page number.
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ *         requested.
+ *
+ * \warning A Lock Error is issued if the command is applied to a page belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_page(int page_number, Bool check);
+
+/*! \brief Erases all pages within the flash array.
+ *
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ *         requested.
+ *
+ * \warning A Lock Error is issued if at least one region is locked or the
+ *          bootloader protection is active.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_all_pages(Bool check);
+
+/*! \brief Writes a page from the page buffer.
+ *
+ * \param page_number The page number:
+ *   \arg \c 0 to <tt>(flashc_get_page_count() - 1)</tt>: a page number within
+ *        the flash array;
+ *   \arg <tt>< 0</tt>: the current page number.
+ *
+ * \warning A Lock Error is issued if the command is applied to a page belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \warning The page buffer is not automatically reset after a page write.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_page(int page_number);
+
+/*! \brief Issues a Quick Page Read User Page command to the FLASHC.
+ *
+ * \return Whether the User page is erased.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern Bool flashc_quick_user_page_read(void);
+
+/*! \brief Erases the User page.
+ *
+ * \param check Whether to check erase: \c TRUE or \c FALSE.
+ *
+ * \return Whether the erase succeeded or always \c TRUE if erase check was not
+ *         requested.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note An erase operation can only set bits.
+ */
+extern Bool flashc_erase_user_page(Bool check);
+
+/*! \brief Writes the User page from the page buffer.
+ *
+ * \warning The page buffer is not automatically reset after a page write.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ *
+ * \note A write operation can only clear bits.
+ */
+extern void flashc_write_user_page(void);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ *         from the repeated \a src source byte.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source byte.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning This function may be called with \a erase set to \c FALSE only if
+ *          the destination consists only of erased words, i.e. this function
+ *          can not be used to write only one bit of a previously written word.
+ *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
+ *          resulting value in flash may be different from \c 0x00000000.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset8(volatile void *dst, U8 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ *         from the repeated \a src big-endian source half-word.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source half-word.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning This function may be called with \a erase set to \c FALSE only if
+ *          the destination consists only of erased words, i.e. this function
+ *          can not be used to write only one bit of a previously written word.
+ *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
+ *          resulting value in flash may be different from \c 0x00000000.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset16(volatile void *dst, U16 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ *         from the repeated \a src big-endian source word.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source word.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning This function may be called with \a erase set to \c FALSE only if
+ *          the destination consists only of erased words, i.e. this function
+ *          can not be used to write only one bit of a previously written word.
+ *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
+ *          resulting value in flash may be different from \c 0x00000000.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset32(volatile void *dst, U32 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ *         from the repeated \a src big-endian source double-word.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source double-word.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning This function may be called with \a erase set to \c FALSE only if
+ *          the destination consists only of erased words, i.e. this function
+ *          can not be used to write only one bit of a previously written word.
+ *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
+ *          resulting value in flash may be different from \c 0x00000000.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memset64(volatile void *dst, U64 src, size_t nbytes, Bool erase);
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ *         from the repeated \a src big-endian source pattern.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Source double-word.
+ * \param src_width \a src width in bits: 8, 16, 32 or 64.
+ * \param nbytes Number of bytes to set.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning This function may be called with \a erase set to \c FALSE only if
+ *          the destination consists only of erased words, i.e. this function
+ *          can not be used to write only one bit of a previously written word.
+ *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
+ *          resulting value in flash may be different from \c 0x00000000.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+#define flashc_memset(dst, src, src_width, nbytes, erase) \
+          TPASTE2(flashc_memset, src_width)((dst), (src), (nbytes), (erase))
+
+/*! \brief Copies \a nbytes bytes to the flash destination pointed to by \a dst
+ *         from the source pointed to by \a src.
+ *
+ * The destination areas that are not within the flash array or the User page
+ * are ignored.
+ *
+ * All pointer and size alignments are supported.
+ *
+ * \param dst Pointer to flash destination.
+ * \param src Pointer to source data.
+ * \param nbytes Number of bytes to copy.
+ * \param erase Whether to erase before writing: \c TRUE or \c FALSE.
+ *
+ * \return The value of \a dst.
+ *
+ * \warning If copying takes place between areas that overlap, the behavior is
+ *          undefined.
+ *
+ * \warning This function may be called with \a erase set to \c FALSE only if
+ *          the destination consists only of erased words, i.e. this function
+ *          can not be used to write only one bit of a previously written word.
+ *          E.g., if \c 0x00000001 then \c 0xFFFFFFFE are written to a word, the
+ *          resulting value in flash may be different from \c 0x00000000.
+ *
+ * \warning A Lock Error is issued if the command is applied to pages belonging
+ *          to a locked region or to the bootloader protected area.
+ *
+ * \note The FLASHC error status returned by \ref flashc_is_lock_error and
+ *       \ref flashc_is_programming_error is updated.
+ */
+extern volatile void *flashc_memcpy(volatile void *dst, const void *src, size_t nbytes, Bool erase);
+
+#if UC3C
+
+/*! \brief Depednding to the CPU frequency, set the wait states of flash read
+ *         accesses and enable or disable the High speed read mode.
+ *
+ * \param cpu_f_hz The CPU frequency
+ */
+void flashc_set_flash_waitstate_and_readmode(unsigned long cpu_f_hz);
+#endif // UC3C device-specific implementation
+
+//! @}
+
+
+#endif  // _FLASHC_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.c

@@ -1,458 +1,458 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief GPIO driver for AVR32 UC3.
- *
- * This file defines a useful set of functions for the GPIO.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a GPIO module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include "gpio.h"
-
-//! GPIO module instance.
-#define GPIO  AVR32_GPIO
-
-
-/*! \name Peripheral Bus Interface
- */
-//! @{
-
-
-int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
-{
-  int status = GPIO_SUCCESS;
-  unsigned int i;
-
-  for (i = 0; i < size; i++)
-  {
-    status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
-    gpiomap++;
-  }
-
-  return status;
-}
-
-
-int gpio_enable_module_pin(unsigned int pin, unsigned int function)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  // Enable the correct function.
-  switch (function)
-  {
-  case 0: // A function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-  case 1: // B function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-  case 2: // C function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-  case 3: // D function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-    gpio_port->pmr2c = 1 << (pin & 0x1F);
-#endif
-    break;
-
-#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-  case 4: // E function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-    
-  case 5: // F function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1c = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-    
-  case 6: // G function.
-    gpio_port->pmr0c = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-    
-  case 7: // H function.
-    gpio_port->pmr0s = 1 << (pin & 0x1F);
-    gpio_port->pmr1s = 1 << (pin & 0x1F);
-    gpio_port->pmr2s = 1 << (pin & 0x1F);
-    break;
-#endif
-
-  default:
-    return GPIO_INVALID_ARGUMENT;
-  }
-
-  // Disable GPIO control.
-  gpio_port->gperc = 1 << (pin & 0x1F);
-
-  return GPIO_SUCCESS;
-}
-
-
-void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
-{
-  unsigned int i;
-
-  for (i = 0; i < size; i++)
-  {
-    gpio_enable_gpio_pin(gpiomap->pin);
-    gpiomap++;
-  }
-}
-
-
-void gpio_enable_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->oderc = 1 << (pin & 0x1F);
-  gpio_port->gpers = 1 << (pin & 0x1F);
-}
-
-
-// The open-drain mode is not synthesized on the current AVR32 products.
-// If one day some AVR32 products have this feature, the corresponding part
-// numbers should be listed in the #if below.
-// Note that other functions are available in this driver to use pins with open
-// drain in GPIO mode. The advantage of the open-drain mode functions over these
-// other functions is that they can be used not only in GPIO mode but also in
-// module mode.
-#if 0
-
-
-void gpio_enable_pin_open_drain(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->odmers = 1 << (pin & 0x1F);
-}
-
-
-void gpio_disable_pin_open_drain(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->odmerc = 1 << (pin & 0x1F);
-}
-
-
-#endif
-
-
-void gpio_enable_pin_pull_up(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puers = 1 << (pin & 0x1F);
-#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-  gpio_port->pderc = 1 << (pin & 0x1F);
-#endif
-}
-
-
-void gpio_disable_pin_pull_up(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puerc = 1 << (pin & 0x1F);
-}
-
-#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
-
-/*! \brief Enables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-void gpio_enable_pin_pull_down(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puerc = 1 << (pin & 0x1F);
-  gpio_port->pders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-void gpio_disable_pin_pull_down(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->pderc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Enables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-void gpio_enable_pin_buskeeper(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puers = 1 << (pin & 0x1F);
-  gpio_port->pders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-void gpio_disable_pin_buskeeper(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->puerc = 1 << (pin & 0x1F);
-  gpio_port->pderc = 1 << (pin & 0x1F);
-}
-
-#endif
-
-int gpio_get_pin_value(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return (gpio_port->pvr >> (pin & 0x1F)) & 1;
-}
-
-
-int gpio_get_gpio_pin_output_value(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return (gpio_port->ovr >> (pin & 0x1F)) & 1;
-}
-
-
-int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
-}
-
-
-void gpio_set_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrs  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_clr_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_tgl_gpio_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrt  = 1 << (pin & 0x1F); // Toggle the I/O line.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_set_gpio_open_drain_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_clr_gpio_open_drain_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
-  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
-  gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
-  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
-}
-
-
-void gpio_enable_pin_glitch_filter(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->gfers = 1 << (pin & 0x1F);
-}
-
-
-void gpio_disable_pin_glitch_filter(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->gferc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Configure the edge detector of an input pin
- *
- * \param pin The pin number.
- * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE
- *             or \ref GPIO_FALLING_EDGE).
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  
-  // Configure the edge detector.
-  switch (mode)
-  {
-  case GPIO_PIN_CHANGE:
-    gpio_port->imr0c = 1 << (pin & 0x1F);
-    gpio_port->imr1c = 1 << (pin & 0x1F);
-    break;
-
-  case GPIO_RISING_EDGE:
-    gpio_port->imr0s = 1 << (pin & 0x1F);
-    gpio_port->imr1c = 1 << (pin & 0x1F);
-    break;
-
-  case GPIO_FALLING_EDGE:
-    gpio_port->imr0c = 1 << (pin & 0x1F);
-    gpio_port->imr1s = 1 << (pin & 0x1F);
-    break;
-
-  default:
-    return GPIO_INVALID_ARGUMENT;
-  }
-
-  return GPIO_SUCCESS;
-}
-
-
-int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
-{
-  volatile avr32_gpio_port_t  *gpio_port = &GPIO.port[pin >> 5];
-
-  // Enable the glitch filter.
-  gpio_port->gfers = 1 << (pin & 0x1F);
-
-  // Configure the edge detector.
-  if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
-    return(GPIO_INVALID_ARGUMENT);
-
-  // Enable interrupt.
-  gpio_port->iers = 1 << (pin & 0x1F);
-
-  return GPIO_SUCCESS;
-}
-
-
-void gpio_disable_pin_interrupt(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->ierc = 1 << (pin & 0x1F);
-}
-
-
-int gpio_get_pin_interrupt_flag(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  return (gpio_port->ifr >> (pin & 0x1F)) & 1;
-}
-
-
-void gpio_clear_pin_interrupt_flag(unsigned int pin)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-  gpio_port->ifrc = 1 << (pin & 0x1F);
-}
-
-
-//#
-//# Peripheral Event System Support.
-//#
-#if UC3L
-int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
-{
-  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
-
-  if(TRUE == use_igf)
-  {
-    // Enable the glitch filter.
-    gpio_port->gfers = 1 << (pin & 0x1F);
-  }
-  else
-  {
-    // Disable the glitch filter.
-    gpio_port->gferc = 1 << (pin & 0x1F);
-  }
-
-  // Configure the edge detector.
-  return(gpio_configure_edge_detector(pin, mode));
-}
-
-#endif
-
-//! @}
+/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief GPIO driver for AVR32 UC3.
+ *
+ * This file defines a useful set of functions for the GPIO.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with a GPIO module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#include "gpio.h"
+
+//! GPIO module instance.
+#define GPIO  AVR32_GPIO
+
+
+/*! \name Peripheral Bus Interface
+ */
+//! @{
+
+
+int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
+{
+  int status = GPIO_SUCCESS;
+  unsigned int i;
+
+  for (i = 0; i < size; i++)
+  {
+    status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
+    gpiomap++;
+  }
+
+  return status;
+}
+
+
+int gpio_enable_module_pin(unsigned int pin, unsigned int function)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  // Enable the correct function.
+  switch (function)
+  {
+  case 0: // A function.
+    gpio_port->pmr0c = 1 << (pin & 0x1F);
+    gpio_port->pmr1c = 1 << (pin & 0x1F);
+#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+    gpio_port->pmr2c = 1 << (pin & 0x1F);
+#endif
+    break;
+
+  case 1: // B function.
+    gpio_port->pmr0s = 1 << (pin & 0x1F);
+    gpio_port->pmr1c = 1 << (pin & 0x1F);
+#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+    gpio_port->pmr2c = 1 << (pin & 0x1F);
+#endif
+    break;
+
+  case 2: // C function.
+    gpio_port->pmr0c = 1 << (pin & 0x1F);
+    gpio_port->pmr1s = 1 << (pin & 0x1F);
+#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+    gpio_port->pmr2c = 1 << (pin & 0x1F);
+#endif
+    break;
+
+  case 3: // D function.
+    gpio_port->pmr0s = 1 << (pin & 0x1F);
+    gpio_port->pmr1s = 1 << (pin & 0x1F);
+#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+    gpio_port->pmr2c = 1 << (pin & 0x1F);
+#endif
+    break;
+
+#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+  case 4: // E function.
+    gpio_port->pmr0c = 1 << (pin & 0x1F);
+    gpio_port->pmr1c = 1 << (pin & 0x1F);
+    gpio_port->pmr2s = 1 << (pin & 0x1F);
+    break;
+    
+  case 5: // F function.
+    gpio_port->pmr0s = 1 << (pin & 0x1F);
+    gpio_port->pmr1c = 1 << (pin & 0x1F);
+    gpio_port->pmr2s = 1 << (pin & 0x1F);
+    break;
+    
+  case 6: // G function.
+    gpio_port->pmr0c = 1 << (pin & 0x1F);
+    gpio_port->pmr1s = 1 << (pin & 0x1F);
+    gpio_port->pmr2s = 1 << (pin & 0x1F);
+    break;
+    
+  case 7: // H function.
+    gpio_port->pmr0s = 1 << (pin & 0x1F);
+    gpio_port->pmr1s = 1 << (pin & 0x1F);
+    gpio_port->pmr2s = 1 << (pin & 0x1F);
+    break;
+#endif
+
+  default:
+    return GPIO_INVALID_ARGUMENT;
+  }
+
+  // Disable GPIO control.
+  gpio_port->gperc = 1 << (pin & 0x1F);
+
+  return GPIO_SUCCESS;
+}
+
+
+void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
+{
+  unsigned int i;
+
+  for (i = 0; i < size; i++)
+  {
+    gpio_enable_gpio_pin(gpiomap->pin);
+    gpiomap++;
+  }
+}
+
+
+void gpio_enable_gpio_pin(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->oderc = 1 << (pin & 0x1F);
+  gpio_port->gpers = 1 << (pin & 0x1F);
+}
+
+
+// The open-drain mode is not synthesized on the current AVR32 products.
+// If one day some AVR32 products have this feature, the corresponding part
+// numbers should be listed in the #if below.
+// Note that other functions are available in this driver to use pins with open
+// drain in GPIO mode. The advantage of the open-drain mode functions over these
+// other functions is that they can be used not only in GPIO mode but also in
+// module mode.
+#if 0
+
+
+void gpio_enable_pin_open_drain(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->odmers = 1 << (pin & 0x1F);
+}
+
+
+void gpio_disable_pin_open_drain(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->odmerc = 1 << (pin & 0x1F);
+}
+
+
+#endif
+
+
+void gpio_enable_pin_pull_up(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->puers = 1 << (pin & 0x1F);
+#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+  gpio_port->pderc = 1 << (pin & 0x1F);
+#endif
+}
+
+
+void gpio_disable_pin_pull_up(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->puerc = 1 << (pin & 0x1F);
+}
+
+#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
+
+/*! \brief Enables the pull-down resistor of a pin.
+ *
+ * \param pin The pin number.
+ */
+void gpio_enable_pin_pull_down(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->puerc = 1 << (pin & 0x1F);
+  gpio_port->pders = 1 << (pin & 0x1F);
+}
+
+/*! \brief Disables the pull-down resistor of a pin.
+ *
+ * \param pin The pin number.
+ */
+void gpio_disable_pin_pull_down(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->pderc = 1 << (pin & 0x1F);
+}
+
+/*! \brief Enables the buskeeper functionality on a pin.
+ *
+ * \param pin The pin number.
+ */
+void gpio_enable_pin_buskeeper(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->puers = 1 << (pin & 0x1F);
+  gpio_port->pders = 1 << (pin & 0x1F);
+}
+
+/*! \brief Disables the buskeeper functionality on a pin.
+ *
+ * \param pin The pin number.
+ */
+void gpio_disable_pin_buskeeper(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->puerc = 1 << (pin & 0x1F);
+  gpio_port->pderc = 1 << (pin & 0x1F);
+}
+
+#endif
+
+int gpio_get_pin_value(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  return (gpio_port->pvr >> (pin & 0x1F)) & 1;
+}
+
+
+int gpio_get_gpio_pin_output_value(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  return (gpio_port->ovr >> (pin & 0x1F)) & 1;
+}
+
+
+int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
+}
+
+
+void gpio_set_gpio_pin(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  gpio_port->ovrs  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
+  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
+  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
+}
+
+
+void gpio_clr_gpio_pin(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
+  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
+  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
+}
+
+
+void gpio_tgl_gpio_pin(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  gpio_port->ovrt  = 1 << (pin & 0x1F); // Toggle the I/O line.
+  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
+  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
+}
+
+
+void gpio_set_gpio_open_drain_pin(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
+  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
+}
+
+
+void gpio_clr_gpio_open_drain_pin(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
+  gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
+  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
+}
+
+
+void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  gpio_port->ovrc  = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
+  gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
+  gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
+}
+
+
+void gpio_enable_pin_glitch_filter(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->gfers = 1 << (pin & 0x1F);
+}
+
+
+void gpio_disable_pin_glitch_filter(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->gferc = 1 << (pin & 0x1F);
+}
+
+/*! \brief Configure the edge detector of an input pin
+ *
+ * \param pin The pin number.
+ * \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE
+ *             or \ref GPIO_FALLING_EDGE).
+ *
+ * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
+ */
+static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  
+  // Configure the edge detector.
+  switch (mode)
+  {
+  case GPIO_PIN_CHANGE:
+    gpio_port->imr0c = 1 << (pin & 0x1F);
+    gpio_port->imr1c = 1 << (pin & 0x1F);
+    break;
+
+  case GPIO_RISING_EDGE:
+    gpio_port->imr0s = 1 << (pin & 0x1F);
+    gpio_port->imr1c = 1 << (pin & 0x1F);
+    break;
+
+  case GPIO_FALLING_EDGE:
+    gpio_port->imr0c = 1 << (pin & 0x1F);
+    gpio_port->imr1s = 1 << (pin & 0x1F);
+    break;
+
+  default:
+    return GPIO_INVALID_ARGUMENT;
+  }
+
+  return GPIO_SUCCESS;
+}
+
+
+int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
+{
+  volatile avr32_gpio_port_t  *gpio_port = &GPIO.port[pin >> 5];
+
+  // Enable the glitch filter.
+  gpio_port->gfers = 1 << (pin & 0x1F);
+
+  // Configure the edge detector.
+  if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
+    return(GPIO_INVALID_ARGUMENT);
+
+  // Enable interrupt.
+  gpio_port->iers = 1 << (pin & 0x1F);
+
+  return GPIO_SUCCESS;
+}
+
+
+void gpio_disable_pin_interrupt(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->ierc = 1 << (pin & 0x1F);
+}
+
+
+int gpio_get_pin_interrupt_flag(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  return (gpio_port->ifr >> (pin & 0x1F)) & 1;
+}
+
+
+void gpio_clear_pin_interrupt_flag(unsigned int pin)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+  gpio_port->ifrc = 1 << (pin & 0x1F);
+}
+
+
+//#
+//# Peripheral Event System Support.
+//#
+#if UC3L
+int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
+{
+  volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
+
+  if(TRUE == use_igf)
+  {
+    // Enable the glitch filter.
+    gpio_port->gfers = 1 << (pin & 0x1F);
+  }
+  else
+  {
+    // Disable the glitch filter.
+    gpio_port->gferc = 1 << (pin & 0x1F);
+  }
+
+  // Configure the edge detector.
+  return(gpio_configure_edge_detector(pin, mode));
+}
+
+#endif
+
+//! @}

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/GPIO/gpio.h

@@ -1,583 +1,583 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief GPIO header for AVR32 UC3.
- *
- * This file contains basic GPIO driver functions.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a GPIO module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _GPIO_H_
-#define _GPIO_H_
-
-#include <avr32/io.h>
-#include "compiler.h"
-
-/*! \name Return Values of the GPIO API
- */
-//! @{
-#define GPIO_SUCCESS            0 //!< Function successfully completed.
-#define GPIO_INVALID_ARGUMENT   1 //!< Input parameters are out of range.
-//! @}
-
-
-/*! \name Interrupt Trigger Modes
- */
-//! @{
-#define GPIO_PIN_CHANGE         0 //!< Interrupt triggered upon pin change.
-#define GPIO_RISING_EDGE        1 //!< Interrupt triggered upon rising edge.
-#define GPIO_FALLING_EDGE       2 //!< Interrupt triggered upon falling edge.
-//! @}
-
-
-//! A type definition of pins and modules connectivity.
-typedef struct
-{
-  unsigned char pin;              //!< Module pin.
-  unsigned char function;         //!< Module function.
-} gpio_map_t[];
-
-
-/*! \name Peripheral Bus Interface
- *
- * Low-speed interface with a non-deterministic number of clock cycles per
- * access.
- *
- * This interface operates with lower clock frequencies (fPB <= fCPU), and its
- * timing is not deterministic since it needs to access a shared bus which may
- * be heavily loaded.
- *
- * \note This interface is immediately available without initialization.
- */
-//! @{
-
-/*! \brief Enables specific module modes for a set of pins.
- *
- * \param gpiomap The pin map.
- * \param size The number of pins in \a gpiomap.
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
-
-/*! \brief Enables a specific module mode for a pin.
- *
- * \param pin The pin number.\n
- *            Refer to the product header file `uc3x.h' (where x is the part
- *            number; e.g. x = a0512) for module pins. E.g., to enable a PWM
- *            channel output, the pin number can be AVR32_PWM_3_PIN for PWM
- *            channel 3.
- * \param function The pin function.\n
- *                 Refer to the product header file `uc3x.h' (where x is the
- *                 part number; e.g. x = a0512) for module pin functions. E.g.,
- *                 to enable a PWM channel output, the pin function can be
- *                 AVR32_PWM_3_FUNCTION for PWM channel 3.
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
-
-/*! \brief Enables the GPIO mode of a set of pins.
- *
- * \param gpiomap The pin map.
- * \param size The number of pins in \a gpiomap.
- */
-extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
-
-/*! \brief Enables the GPIO mode of a pin.
- *
- * \param pin The pin number.\n
- *            Refer to the product header file `uc3x.h' (where x is the part
- *            number; e.g. x = a0512) for pin definitions. E.g., to enable the
- *            GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
- *            AVR32_PWM_3_PIN for PWM channel 3 can also be used to release
- *            module pins for GPIO.
- */
-extern void gpio_enable_gpio_pin(unsigned int pin);
-
-// The open-drain mode is not synthesized on the current AVR32 products.
-// If one day some AVR32 products have this feature, the corresponding part
-// numbers should be listed in the #if below.
-// Note that other functions are available in this driver to use pins with open
-// drain in GPIO mode. The advantage of the open-drain mode functions over these
-// other functions is that they can be used not only in GPIO mode but also in
-// module mode.
-#if 0
-
-/*! \brief Enables the open-drain mode of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_open_drain(unsigned int pin);
-
-/*! \brief Disables the open-drain mode of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_open_drain(unsigned int pin);
-
-#endif
-
-/*! \brief Enables the pull-up resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_pull_up(unsigned int pin);
-
-/*! \brief Disables the pull-up resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_pull_up(unsigned int pin);
-
-#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
-// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
-
-/*! \brief Enables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_pull_down(unsigned int pin);
-
-/*! \brief Disables the pull-down resistor of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_pull_down(unsigned int pin);
-
-/*! \brief Enables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_buskeeper(unsigned int pin);
-
-/*! \brief Disables the buskeeper functionality on a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_buskeeper(unsigned int pin);
-
-#endif
-
-/*! \brief Returns the value of a pin.
- *
- * \param pin The pin number.
- *
- * \return The pin value.
- */
-extern int gpio_get_pin_value(unsigned int pin);
-
-/*! \brief Returns the output value set for a GPIO pin.
- *
- * \param pin The pin number.
- *
- * \return The pin output value.
- *
- * \note This function must be used in conjunction with \ref gpio_set_gpio_pin,
- *       \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin.
- */
-extern int gpio_get_gpio_pin_output_value(unsigned int pin);
-
-/*! \brief Returns the output value set for a GPIO pin using open drain.
- *
- * \param pin The pin number.
- *
- * \return The pin output value.
- *
- * \note This function must be used in conjunction with
- *       \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin
- *       and \ref gpio_tgl_gpio_open_drain_pin.
- */
-extern int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 1.
- *
- * \param pin The pin number.
- */
-extern void gpio_set_gpio_pin(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 0.
- *
- * \param pin The pin number.
- */
-extern void gpio_clr_gpio_pin(unsigned int pin);
-
-/*! \brief Toggles a GPIO pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_tgl_gpio_pin(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 1 using open drain.
- *
- * \param pin The pin number.
- */
-extern void gpio_set_gpio_open_drain_pin(unsigned int pin);
-
-/*! \brief Drives a GPIO pin to 0 using open drain.
- *
- * \param pin The pin number.
- */
-extern void gpio_clr_gpio_open_drain_pin(unsigned int pin);
-
-/*! \brief Toggles a GPIO pin using open drain.
- *
- * \param pin The pin number.
- */
-extern void gpio_tgl_gpio_open_drain_pin(unsigned int pin);
-
-/*! \brief Enables the glitch filter of a pin.
- *
- * When the glitch filter is enabled, a glitch with duration of less than 1
- * clock cycle is automatically rejected, while a pulse with duration of 2 clock
- * cycles or more is accepted. For pulse durations between 1 clock cycle and 2
- * clock cycles, the pulse may or may not be taken into account, depending on
- * the precise timing of its occurrence. Thus for a pulse to be guaranteed
- * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
- * filtered out, its duration must not exceed 1 clock cycle. The filter
- * introduces 2 clock cycles latency.
- *
- * \param pin The pin number.
- */
-extern void gpio_enable_pin_glitch_filter(unsigned int pin);
-
-/*! \brief Disables the glitch filter of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_glitch_filter(unsigned int pin);
-
-/*! \brief Enables the interrupt of a pin with the specified settings.
- *
- * \param pin The pin number.
- * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
- *             \ref GPIO_FALLING_EDGE).
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
-
-/*! \brief Disables the interrupt of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_disable_pin_interrupt(unsigned int pin);
-
-/*! \brief Gets the interrupt flag of a pin.
- *
- * \param pin The pin number.
- *
- * \return The pin interrupt flag.
- */
-extern int gpio_get_pin_interrupt_flag(unsigned int pin);
-
-/*! \brief Clears the interrupt flag of a pin.
- *
- * \param pin The pin number.
- */
-extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
-
-//! @}
-
-
-#if (defined AVR32_GPIO_LOCAL_ADDRESS)
-/*! \name Local Bus Interface
- *
- * High-speed interface with only one clock cycle per access.
- *
- * This interface operates with high clock frequency (fCPU), and its timing is
- * deterministic since it does not need to access a shared bus which may be
- * heavily loaded.
- *
- * \warning To use this interface, the clock frequency of the peripheral bus on
- *          which the GPIO peripheral is connected must be set to the CPU clock
- *          frequency (fPB = fCPU).
- *
- * \note This interface has to be initialized in order to be available.
- */
-//! @{
-
-/*! \brief Enables the local bus interface for GPIO.
- *
- * \note This function must have been called at least once before using other
- *       functions in this interface.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_init(void)
-{
-  Set_system_register(AVR32_CPUCR,
-                      Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK);
-}
-
-/*! \brief Enables the output driver of a pin.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_enable_pin_output_driver(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the output driver of a pin.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_disable_pin_output_driver(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Returns the value of a pin.
- *
- * \param pin The pin number.
- *
- * \return The pin value.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int gpio_local_get_pin_value(unsigned int pin)
-{
-  return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1;
-}
-
-/*! \brief Drives a GPIO pin to 1.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin nor its output
- *       driver. \ref gpio_enable_gpio_pin and
- *       \ref gpio_local_enable_pin_output_driver can be called for this
- *       purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_set_gpio_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F);
-}
-
-/*! \brief Drives a GPIO pin to 0.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin nor its output
- *       driver. \ref gpio_enable_gpio_pin and
- *       \ref gpio_local_enable_pin_output_driver can be called for this
- *       purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_clr_gpio_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Toggles a GPIO pin.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init must have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin nor its output
- *       driver. \ref gpio_enable_gpio_pin and
- *       \ref gpio_local_enable_pin_output_driver can be called for this
- *       purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_tgl_gpio_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F);
-}
-
-/*! \brief Initializes the configuration of a GPIO pin so that it can be used
- *         with GPIO open-drain functions.
- *
- * \note This function must have been called at least once before using
- *       \ref gpio_local_set_gpio_open_drain_pin,
- *       \ref gpio_local_clr_gpio_open_drain_pin or
- *       \ref gpio_local_tgl_gpio_open_drain_pin.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_init_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Drives a GPIO pin to 1 using open drain.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
- *       have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_set_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Drives a GPIO pin to 0 using open drain.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
- *       have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_clr_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
-}
-
-/*! \brief Toggles a GPIO pin using open drain.
- *
- * \param pin The pin number.
- *
- * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
- *       have been called beforehand.
- *
- * \note This function does not enable the GPIO mode of the pin.
- *       \ref gpio_enable_gpio_pin can be called for this purpose.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(unsigned int pin)
-{
-  AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F);
-}
-
-//! @}
-#endif // AVR32_GPIO_LOCAL_ADDRESS
-
-#if UC3L
-//! @{
-/*! \name Peripheral Event System support
- *
- * The GPIO can be programmed to output peripheral events whenever an interrupt
- * condition is detected, such as pin value change, or only when a rising or
- * falling edge is detected.
- *
- */
-
-/*! \brief Enables the peripheral event generation of a pin.
- *
- * \param pin The pin number.
- *
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_enable_pin_periph_event(unsigned int pin)
-{
-  AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
-  AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F);
-}
-
-/*! \brief Disables the peripheral event generation of a pin.
- *
- * \param pin The pin number.
- *
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void gpio_disable_pin_periph_event(unsigned int pin)
-{
-  AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F);
-}
-
-/*! \brief Configure the peripheral event trigger mode of a pin
- *
- * \param pin The pin number.
- * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
- *             \ref GPIO_FALLING_EDGE).
- * \param use_igf use the Input Glitch Filter (TRUE) or not (FALSE).
- *
- * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
- */
-extern int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf);
-
-//! @}
-#endif
-
-
-#endif  // _GPIO_H_
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief GPIO header for AVR32 UC3.
+ *
+ * This file contains basic GPIO driver functions.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with a GPIO module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _GPIO_H_
+#define _GPIO_H_
+
+#include <avr32/io.h>
+#include "compiler.h"
+
+/*! \name Return Values of the GPIO API
+ */
+//! @{
+#define GPIO_SUCCESS            0 //!< Function successfully completed.
+#define GPIO_INVALID_ARGUMENT   1 //!< Input parameters are out of range.
+//! @}
+
+
+/*! \name Interrupt Trigger Modes
+ */
+//! @{
+#define GPIO_PIN_CHANGE         0 //!< Interrupt triggered upon pin change.
+#define GPIO_RISING_EDGE        1 //!< Interrupt triggered upon rising edge.
+#define GPIO_FALLING_EDGE       2 //!< Interrupt triggered upon falling edge.
+//! @}
+
+
+//! A type definition of pins and modules connectivity.
+typedef struct
+{
+  unsigned char pin;              //!< Module pin.
+  unsigned char function;         //!< Module function.
+} gpio_map_t[];
+
+
+/*! \name Peripheral Bus Interface
+ *
+ * Low-speed interface with a non-deterministic number of clock cycles per
+ * access.
+ *
+ * This interface operates with lower clock frequencies (fPB <= fCPU), and its
+ * timing is not deterministic since it needs to access a shared bus which may
+ * be heavily loaded.
+ *
+ * \note This interface is immediately available without initialization.
+ */
+//! @{
+
+/*! \brief Enables specific module modes for a set of pins.
+ *
+ * \param gpiomap The pin map.
+ * \param size The number of pins in \a gpiomap.
+ *
+ * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
+ */
+extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
+
+/*! \brief Enables a specific module mode for a pin.
+ *
+ * \param pin The pin number.\n
+ *            Refer to the product header file `uc3x.h' (where x is the part
+ *            number; e.g. x = a0512) for module pins. E.g., to enable a PWM
+ *            channel output, the pin number can be AVR32_PWM_3_PIN for PWM
+ *            channel 3.
+ * \param function The pin function.\n
+ *                 Refer to the product header file `uc3x.h' (where x is the
+ *                 part number; e.g. x = a0512) for module pin functions. E.g.,
+ *                 to enable a PWM channel output, the pin function can be
+ *                 AVR32_PWM_3_FUNCTION for PWM channel 3.
+ *
+ * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
+ */
+extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
+
+/*! \brief Enables the GPIO mode of a set of pins.
+ *
+ * \param gpiomap The pin map.
+ * \param size The number of pins in \a gpiomap.
+ */
+extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
+
+/*! \brief Enables the GPIO mode of a pin.
+ *
+ * \param pin The pin number.\n
+ *            Refer to the product header file `uc3x.h' (where x is the part
+ *            number; e.g. x = a0512) for pin definitions. E.g., to enable the
+ *            GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
+ *            AVR32_PWM_3_PIN for PWM channel 3 can also be used to release
+ *            module pins for GPIO.
+ */
+extern void gpio_enable_gpio_pin(unsigned int pin);
+
+// The open-drain mode is not synthesized on the current AVR32 products.
+// If one day some AVR32 products have this feature, the corresponding part
+// numbers should be listed in the #if below.
+// Note that other functions are available in this driver to use pins with open
+// drain in GPIO mode. The advantage of the open-drain mode functions over these
+// other functions is that they can be used not only in GPIO mode but also in
+// module mode.
+#if 0
+
+/*! \brief Enables the open-drain mode of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_enable_pin_open_drain(unsigned int pin);
+
+/*! \brief Disables the open-drain mode of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_disable_pin_open_drain(unsigned int pin);
+
+#endif
+
+/*! \brief Enables the pull-up resistor of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_enable_pin_pull_up(unsigned int pin);
+
+/*! \brief Disables the pull-up resistor of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_disable_pin_pull_up(unsigned int pin);
+
+#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
+// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
+
+/*! \brief Enables the pull-down resistor of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_enable_pin_pull_down(unsigned int pin);
+
+/*! \brief Disables the pull-down resistor of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_disable_pin_pull_down(unsigned int pin);
+
+/*! \brief Enables the buskeeper functionality on a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_enable_pin_buskeeper(unsigned int pin);
+
+/*! \brief Disables the buskeeper functionality on a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_disable_pin_buskeeper(unsigned int pin);
+
+#endif
+
+/*! \brief Returns the value of a pin.
+ *
+ * \param pin The pin number.
+ *
+ * \return The pin value.
+ */
+extern int gpio_get_pin_value(unsigned int pin);
+
+/*! \brief Returns the output value set for a GPIO pin.
+ *
+ * \param pin The pin number.
+ *
+ * \return The pin output value.
+ *
+ * \note This function must be used in conjunction with \ref gpio_set_gpio_pin,
+ *       \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin.
+ */
+extern int gpio_get_gpio_pin_output_value(unsigned int pin);
+
+/*! \brief Returns the output value set for a GPIO pin using open drain.
+ *
+ * \param pin The pin number.
+ *
+ * \return The pin output value.
+ *
+ * \note This function must be used in conjunction with
+ *       \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin
+ *       and \ref gpio_tgl_gpio_open_drain_pin.
+ */
+extern int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin);
+
+/*! \brief Drives a GPIO pin to 1.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_set_gpio_pin(unsigned int pin);
+
+/*! \brief Drives a GPIO pin to 0.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_clr_gpio_pin(unsigned int pin);
+
+/*! \brief Toggles a GPIO pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_tgl_gpio_pin(unsigned int pin);
+
+/*! \brief Drives a GPIO pin to 1 using open drain.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_set_gpio_open_drain_pin(unsigned int pin);
+
+/*! \brief Drives a GPIO pin to 0 using open drain.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_clr_gpio_open_drain_pin(unsigned int pin);
+
+/*! \brief Toggles a GPIO pin using open drain.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_tgl_gpio_open_drain_pin(unsigned int pin);
+
+/*! \brief Enables the glitch filter of a pin.
+ *
+ * When the glitch filter is enabled, a glitch with duration of less than 1
+ * clock cycle is automatically rejected, while a pulse with duration of 2 clock
+ * cycles or more is accepted. For pulse durations between 1 clock cycle and 2
+ * clock cycles, the pulse may or may not be taken into account, depending on
+ * the precise timing of its occurrence. Thus for a pulse to be guaranteed
+ * visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
+ * filtered out, its duration must not exceed 1 clock cycle. The filter
+ * introduces 2 clock cycles latency.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_enable_pin_glitch_filter(unsigned int pin);
+
+/*! \brief Disables the glitch filter of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_disable_pin_glitch_filter(unsigned int pin);
+
+/*! \brief Enables the interrupt of a pin with the specified settings.
+ *
+ * \param pin The pin number.
+ * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
+ *             \ref GPIO_FALLING_EDGE).
+ *
+ * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
+ */
+extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
+
+/*! \brief Disables the interrupt of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_disable_pin_interrupt(unsigned int pin);
+
+/*! \brief Gets the interrupt flag of a pin.
+ *
+ * \param pin The pin number.
+ *
+ * \return The pin interrupt flag.
+ */
+extern int gpio_get_pin_interrupt_flag(unsigned int pin);
+
+/*! \brief Clears the interrupt flag of a pin.
+ *
+ * \param pin The pin number.
+ */
+extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
+
+//! @}
+
+
+#if (defined AVR32_GPIO_LOCAL_ADDRESS)
+/*! \name Local Bus Interface
+ *
+ * High-speed interface with only one clock cycle per access.
+ *
+ * This interface operates with high clock frequency (fCPU), and its timing is
+ * deterministic since it does not need to access a shared bus which may be
+ * heavily loaded.
+ *
+ * \warning To use this interface, the clock frequency of the peripheral bus on
+ *          which the GPIO peripheral is connected must be set to the CPU clock
+ *          frequency (fPB = fCPU).
+ *
+ * \note This interface has to be initialized in order to be available.
+ */
+//! @{
+
+/*! \brief Enables the local bus interface for GPIO.
+ *
+ * \note This function must have been called at least once before using other
+ *       functions in this interface.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_init(void)
+{
+  Set_system_register(AVR32_CPUCR,
+                      Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK);
+}
+
+/*! \brief Enables the output driver of a pin.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init must have been called beforehand.
+ *
+ * \note This function does not enable the GPIO mode of the pin.
+ *       \ref gpio_enable_gpio_pin can be called for this purpose.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_enable_pin_output_driver(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
+}
+
+/*! \brief Disables the output driver of a pin.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init must have been called beforehand.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_disable_pin_output_driver(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
+}
+
+/*! \brief Returns the value of a pin.
+ *
+ * \param pin The pin number.
+ *
+ * \return The pin value.
+ *
+ * \note \ref gpio_local_init must have been called beforehand.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int gpio_local_get_pin_value(unsigned int pin)
+{
+  return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1;
+}
+
+/*! \brief Drives a GPIO pin to 1.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init must have been called beforehand.
+ *
+ * \note This function does not enable the GPIO mode of the pin nor its output
+ *       driver. \ref gpio_enable_gpio_pin and
+ *       \ref gpio_local_enable_pin_output_driver can be called for this
+ *       purpose.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_set_gpio_pin(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F);
+}
+
+/*! \brief Drives a GPIO pin to 0.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init must have been called beforehand.
+ *
+ * \note This function does not enable the GPIO mode of the pin nor its output
+ *       driver. \ref gpio_enable_gpio_pin and
+ *       \ref gpio_local_enable_pin_output_driver can be called for this
+ *       purpose.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_clr_gpio_pin(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
+}
+
+/*! \brief Toggles a GPIO pin.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init must have been called beforehand.
+ *
+ * \note This function does not enable the GPIO mode of the pin nor its output
+ *       driver. \ref gpio_enable_gpio_pin and
+ *       \ref gpio_local_enable_pin_output_driver can be called for this
+ *       purpose.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_tgl_gpio_pin(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F);
+}
+
+/*! \brief Initializes the configuration of a GPIO pin so that it can be used
+ *         with GPIO open-drain functions.
+ *
+ * \note This function must have been called at least once before using
+ *       \ref gpio_local_set_gpio_open_drain_pin,
+ *       \ref gpio_local_clr_gpio_open_drain_pin or
+ *       \ref gpio_local_tgl_gpio_open_drain_pin.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_init_gpio_open_drain_pin(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
+}
+
+/*! \brief Drives a GPIO pin to 1 using open drain.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
+ *       have been called beforehand.
+ *
+ * \note This function does not enable the GPIO mode of the pin.
+ *       \ref gpio_enable_gpio_pin can be called for this purpose.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_set_gpio_open_drain_pin(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
+}
+
+/*! \brief Drives a GPIO pin to 0 using open drain.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
+ *       have been called beforehand.
+ *
+ * \note This function does not enable the GPIO mode of the pin.
+ *       \ref gpio_enable_gpio_pin can be called for this purpose.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_clr_gpio_open_drain_pin(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
+}
+
+/*! \brief Toggles a GPIO pin using open drain.
+ *
+ * \param pin The pin number.
+ *
+ * \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
+ *       have been called beforehand.
+ *
+ * \note This function does not enable the GPIO mode of the pin.
+ *       \ref gpio_enable_gpio_pin can be called for this purpose.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(unsigned int pin)
+{
+  AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F);
+}
+
+//! @}
+#endif // AVR32_GPIO_LOCAL_ADDRESS
+
+#if UC3L
+//! @{
+/*! \name Peripheral Event System support
+ *
+ * The GPIO can be programmed to output peripheral events whenever an interrupt
+ * condition is detected, such as pin value change, or only when a rising or
+ * falling edge is detected.
+ *
+ */
+
+/*! \brief Enables the peripheral event generation of a pin.
+ *
+ * \param pin The pin number.
+ *
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_enable_pin_periph_event(unsigned int pin)
+{
+  AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
+  AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F);
+}
+
+/*! \brief Disables the peripheral event generation of a pin.
+ *
+ * \param pin The pin number.
+ *
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void gpio_disable_pin_periph_event(unsigned int pin)
+{
+  AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F);
+}
+
+/*! \brief Configure the peripheral event trigger mode of a pin
+ *
+ * \param pin The pin number.
+ * \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
+ *             \ref GPIO_FALLING_EDGE).
+ * \param use_igf use the Input Glitch Filter (TRUE) or not (FALSE).
+ *
+ * \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
+ */
+extern int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf);
+
+//! @}
+#endif
+
+
+#endif  // _GPIO_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/INTC/exception.x

@@ -1,4 +1,4 @@
-/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
 /*This file is prepared for Doxygen automatic documentation generation.*/
 /*! \file *********************************************************************

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.c

@@ -1,214 +1,214 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief INTC driver for AVR32 UC3.
- *
- * AVR32 Interrupt Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with an INTC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include <avr32/io.h>
-#include "compiler.h"
-#include "preprocessor.h"
-#include "intc.h"
-
-// define _evba from exception.S
-extern void _evba;
-
-//! Values to store in the interrupt priority registers for the various interrupt priority levels.
-extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
-
-//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
-//! Each line handler table contains a set of pointers to interrupt handlers.
-#if (defined __GNUC__)
-#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
-static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
-#elif (defined __ICCAVR32__)
-#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
-static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
-#endif
-MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
-#undef DECL_INT_LINE_HANDLER_TABLE
-
-//! Table containing for each interrupt group the number of interrupt request
-//! lines and a pointer to the table of interrupt line handlers.
-static const struct
-{
-  unsigned int num_irqs;
-  volatile __int_handler *_int_line_handler_table;
-} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] =
-{
-#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \
-  {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},
-  MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~)
-#undef INSERT_INT_LINE_HANDLER_TABLE
-};
-
-
-/*! \brief Default interrupt handler.
- *
- * \note Taken and adapted from Newlib.
- */
-#if (defined __GNUC__)
-__attribute__((__interrupt__))
-#elif (defined __ICCAVR32__)
-__interrupt
-#endif
-static void _unhandled_interrupt(void)
-{
-  // Catch unregistered interrupts.
-  while (TRUE);
-}
-
-
-/*! \brief Gets the interrupt handler of the current event at the \a int_level
- *         interrupt priority level (called from exception.S).
- *
- * \param int_level Interrupt priority level to handle.
- *
- * \return Interrupt handler to execute.
- *
- * \note Taken and adapted from Newlib.
- */
-__int_handler _get_interrupt_handler(unsigned int int_level)
-{
-  // ICR3 is mapped first, ICR0 last.
-  // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to
-  // pass a single argument to a function.
-  unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level];
-  unsigned int int_req = AVR32_INTC.irr[int_grp];
-
-  // As an interrupt may disappear while it is being fetched by the CPU
-  // (spurious interrupt caused by a delayed response from an MCU peripheral to
-  // an interrupt flag clear or interrupt disable instruction), check if there
-  // are remaining interrupt lines to process.
-  // If a spurious interrupt occurs, the status register (SR) contains an
-  // execution mode and interrupt level masks corresponding to a level 0
-  // interrupt, whatever the interrupt priority level causing the spurious
-  // event. This behavior has been chosen because a spurious interrupt has not
-  // to be a priority one and because it may not cause any trouble to other
-  // interrupts.
-  // However, these spurious interrupts place the hardware in an unstable state
-  // and could give problems in other/future versions of the CPU, so the
-  // software has to be written so that they never occur. The only safe way of
-  // achieving this is to always clear or disable peripheral interrupts with the
-  // following sequence:
-  // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.
-  // 2: Perform the bus access to the peripheral register that clears or
-  //    disables the interrupt.
-  // 3: Wait until the interrupt has actually been cleared or disabled by the
-  //    peripheral. This is usually performed by reading from a register in the
-  //    same peripheral (it DOES NOT have to be the same register that was
-  //    accessed in step 2, but it MUST be in the same peripheral), what takes
-  //    bus system latencies into account, but peripheral internal latencies
-  //    (generally 0 cycle) also have to be considered.
-  // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.
-  // Note that steps 1 and 4 are useless inside interrupt handlers as the
-  // corresponding interrupt level is automatically masked by IxM (unless IxM is
-  // explicitly cleared by the software).
-  //
-  // Get the right IRQ handler.
-  //
-  // If several interrupt lines are active in the group, the interrupt line with
-  // the highest number is selected. This is to be coherent with the
-  // prioritization of interrupt groups performed by the hardware interrupt
-  // controller.
-  //
-  // If no handler has been registered for the pending interrupt,
-  // _unhandled_interrupt will be selected thanks to the initialization of
-  // _int_line_handler_table_x by INTC_init_interrupts.
-  //
-  // exception.S will provide the interrupt handler with a clean interrupt stack
-  // frame, with nothing more pushed onto the stack. The interrupt handler must
-  // manage the `rete' instruction, what can be done thanks to pure assembly,
-  // inline assembly or the `__attribute__((__interrupt__))' C function
-  // attribute.
-  return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;
-}
-
-//! Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S
-static __inline__ void INTC_init_evba(void)
-{
-  Set_system_register(AVR32_EVBA, (int)&_evba );
-}
-
-void INTC_init_interrupts(void)
-{
-  unsigned int int_grp, int_req;
-
-  INTC_init_evba();
-
-  // For all interrupt groups,
-  for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)
-  {
-    // For all interrupt request lines of each group,
-    for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)
-    {
-      // Assign _unhandled_interrupt as default interrupt handler.
-      _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;
-    }
-
-    // Set the interrupt group priority register to its default value.
-    // By default, all interrupt groups are linked to the interrupt priority
-    // level 0 and to the interrupt vector _int0.
-    AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0];
-  }
-}
-
-
-void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level)
-{
-  // Determine the group of the IRQ.
-  unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
-
-  // Store in _int_line_handler_table_x the pointer to the interrupt handler, so
-  // that _get_interrupt_handler can retrieve it when the interrupt is vectored.
-  _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;
-
-  // Program the corresponding IPRX register to set the interrupt priority level
-  // and the interrupt vector offset that will be fetched by the core interrupt
-  // system.
-  // NOTE: The _intx functions are intermediate assembly functions between the
-  // core interrupt system and the user interrupt handler.
-  AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)];
-}
+/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief INTC driver for AVR32 UC3.
+ *
+ * AVR32 Interrupt Controller driver module.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with an INTC module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#include <avr32/io.h>
+#include "compiler.h"
+#include "preprocessor.h"
+#include "intc.h"
+
+// define _evba from exception.S
+extern void _evba;
+
+//! Values to store in the interrupt priority registers for the various interrupt priority levels.
+extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
+
+//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
+//! Each line handler table contains a set of pointers to interrupt handlers.
+#if (defined __GNUC__)
+#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
+static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
+#elif (defined __ICCAVR32__)
+#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
+static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
+#endif
+MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
+#undef DECL_INT_LINE_HANDLER_TABLE
+
+//! Table containing for each interrupt group the number of interrupt request
+//! lines and a pointer to the table of interrupt line handlers.
+static const struct
+{
+  unsigned int num_irqs;
+  volatile __int_handler *_int_line_handler_table;
+} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] =
+{
+#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \
+  {AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},
+  MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~)
+#undef INSERT_INT_LINE_HANDLER_TABLE
+};
+
+
+/*! \brief Default interrupt handler.
+ *
+ * \note Taken and adapted from Newlib.
+ */
+#if (defined __GNUC__)
+__attribute__((__interrupt__))
+#elif (defined __ICCAVR32__)
+__interrupt
+#endif
+static void _unhandled_interrupt(void)
+{
+  // Catch unregistered interrupts.
+  while (TRUE);
+}
+
+
+/*! \brief Gets the interrupt handler of the current event at the \a int_level
+ *         interrupt priority level (called from exception.S).
+ *
+ * \param int_level Interrupt priority level to handle.
+ *
+ * \return Interrupt handler to execute.
+ *
+ * \note Taken and adapted from Newlib.
+ */
+__int_handler _get_interrupt_handler(unsigned int int_level)
+{
+  // ICR3 is mapped first, ICR0 last.
+  // Code in exception.S puts int_level in R12 which is used by AVR32-GCC to
+  // pass a single argument to a function.
+  unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level];
+  unsigned int int_req = AVR32_INTC.irr[int_grp];
+
+  // As an interrupt may disappear while it is being fetched by the CPU
+  // (spurious interrupt caused by a delayed response from an MCU peripheral to
+  // an interrupt flag clear or interrupt disable instruction), check if there
+  // are remaining interrupt lines to process.
+  // If a spurious interrupt occurs, the status register (SR) contains an
+  // execution mode and interrupt level masks corresponding to a level 0
+  // interrupt, whatever the interrupt priority level causing the spurious
+  // event. This behavior has been chosen because a spurious interrupt has not
+  // to be a priority one and because it may not cause any trouble to other
+  // interrupts.
+  // However, these spurious interrupts place the hardware in an unstable state
+  // and could give problems in other/future versions of the CPU, so the
+  // software has to be written so that they never occur. The only safe way of
+  // achieving this is to always clear or disable peripheral interrupts with the
+  // following sequence:
+  // 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.
+  // 2: Perform the bus access to the peripheral register that clears or
+  //    disables the interrupt.
+  // 3: Wait until the interrupt has actually been cleared or disabled by the
+  //    peripheral. This is usually performed by reading from a register in the
+  //    same peripheral (it DOES NOT have to be the same register that was
+  //    accessed in step 2, but it MUST be in the same peripheral), what takes
+  //    bus system latencies into account, but peripheral internal latencies
+  //    (generally 0 cycle) also have to be considered.
+  // 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.
+  // Note that steps 1 and 4 are useless inside interrupt handlers as the
+  // corresponding interrupt level is automatically masked by IxM (unless IxM is
+  // explicitly cleared by the software).
+  //
+  // Get the right IRQ handler.
+  //
+  // If several interrupt lines are active in the group, the interrupt line with
+  // the highest number is selected. This is to be coherent with the
+  // prioritization of interrupt groups performed by the hardware interrupt
+  // controller.
+  //
+  // If no handler has been registered for the pending interrupt,
+  // _unhandled_interrupt will be selected thanks to the initialization of
+  // _int_line_handler_table_x by INTC_init_interrupts.
+  //
+  // exception.S will provide the interrupt handler with a clean interrupt stack
+  // frame, with nothing more pushed onto the stack. The interrupt handler must
+  // manage the `rete' instruction, what can be done thanks to pure assembly,
+  // inline assembly or the `__attribute__((__interrupt__))' C function
+  // attribute.
+  return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;
+}
+
+//! Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S
+static __inline__ void INTC_init_evba(void)
+{
+  Set_system_register(AVR32_EVBA, (int)&_evba );
+}
+
+void INTC_init_interrupts(void)
+{
+  unsigned int int_grp, int_req;
+
+  INTC_init_evba();
+
+  // For all interrupt groups,
+  for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)
+  {
+    // For all interrupt request lines of each group,
+    for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)
+    {
+      // Assign _unhandled_interrupt as default interrupt handler.
+      _int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;
+    }
+
+    // Set the interrupt group priority register to its default value.
+    // By default, all interrupt groups are linked to the interrupt priority
+    // level 0 and to the interrupt vector _int0.
+    AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0];
+  }
+}
+
+
+void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level)
+{
+  // Determine the group of the IRQ.
+  unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
+
+  // Store in _int_line_handler_table_x the pointer to the interrupt handler, so
+  // that _get_interrupt_handler can retrieve it when the interrupt is vectored.
+  _int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;
+
+  // Program the corresponding IPRX register to set the interrupt priority level
+  // and the interrupt vector offset that will be fetched by the core interrupt
+  // system.
+  // NOTE: The _intx functions are intermediate assembly functions between the
+  // core interrupt system and the user interrupt handler.
+  AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)];
+}

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/INTC/intc.h

@@ -1,100 +1,100 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief INTC driver for AVR32 UC3.
- *
- * AVR32 Interrupt Controller driver module.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with an INTC module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _INTC_H_
-#define _INTC_H_
-
-#include "compiler.h"
-
-
-//! Maximal number of interrupt request lines per group.
-#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP             32
-
-//! Number of interrupt priority levels.
-#define AVR32_INTC_NUM_INT_LEVELS                   (1 << AVR32_INTC_IPR_INTLEVEL_SIZE)
-
-
-#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-
-//! Pointer to interrupt handler.
-#if (defined __GNUC__)
-typedef void (*__int_handler)(void);
-#elif (defined __ICCAVR32__)
-typedef void (__interrupt *__int_handler)(void);
-#endif
-
-
-/*! \brief Initializes the hardware interrupt controller driver.
- *
- * \note Taken and adapted from Newlib.
- */
-extern void INTC_init_interrupts(void);
-
-/*! \brief Registers an interrupt handler.
- *
- * \param handler   Interrupt handler to register.
- * \param irq       IRQ of the interrupt handler to register.
- * \param int_level Interrupt priority level to assign to the group of this IRQ.
- *
- * \warning The interrupt handler must manage the `rete' instruction, what can
- *          be done thanks to pure assembly, inline assembly or the
- *          `__attribute__((__interrupt__))' C function attribute.
- *
- * \warning If several interrupt handlers of a same group are registered with
- *          different priority levels, only the latest priority level set will
- *          be effective.
- *
- * \note Taken and adapted from Newlib.
- */
-extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level);
-
-#endif  // __AVR32_ABI_COMPILER__
-
-
-#endif  // _INTC_H_
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief INTC driver for AVR32 UC3.
+ *
+ * AVR32 Interrupt Controller driver module.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with an INTC module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _INTC_H_
+#define _INTC_H_
+
+#include "compiler.h"
+
+
+//! Maximal number of interrupt request lines per group.
+#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP             32
+
+//! Number of interrupt priority levels.
+#define AVR32_INTC_NUM_INT_LEVELS                   (1 << AVR32_INTC_IPR_INTLEVEL_SIZE)
+
+
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
+
+//! Pointer to interrupt handler.
+#if (defined __GNUC__)
+typedef void (*__int_handler)(void);
+#elif (defined __ICCAVR32__)
+typedef void (__interrupt *__int_handler)(void);
+#endif
+
+
+/*! \brief Initializes the hardware interrupt controller driver.
+ *
+ * \note Taken and adapted from Newlib.
+ */
+extern void INTC_init_interrupts(void);
+
+/*! \brief Registers an interrupt handler.
+ *
+ * \param handler   Interrupt handler to register.
+ * \param irq       IRQ of the interrupt handler to register.
+ * \param int_level Interrupt priority level to assign to the group of this IRQ.
+ *
+ * \warning The interrupt handler must manage the `rete' instruction, what can
+ *          be done thanks to pure assembly, inline assembly or the
+ *          `__attribute__((__interrupt__))' C function attribute.
+ *
+ * \warning If several interrupt handlers of a same group are registered with
+ *          different priority levels, only the latest priority level set will
+ *          be effective.
+ *
+ * \note Taken and adapted from Newlib.
+ */
+extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level);
+
+#endif  // __AVR32_ABI_COMPILER__
+
+
+#endif  // _INTC_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.c

@@ -1,546 +1,546 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Power Manager driver.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include "compiler.h"
-#include "pm.h"
-
-
-/*! \name PM Writable Bit-Field Registers
- */
-//! @{
-
-typedef union
-{
-  unsigned long                 mcctrl;
-  avr32_pm_mcctrl_t             MCCTRL;
-} u_avr32_pm_mcctrl_t;
-
-typedef union
-{
-  unsigned long                 cksel;
-  avr32_pm_cksel_t              CKSEL;
-} u_avr32_pm_cksel_t;
-
-typedef union
-{
-  unsigned long                 pll;
-  avr32_pm_pll_t                PLL;
-} u_avr32_pm_pll_t;
-
-typedef union
-{
-  unsigned long                 oscctrl0;
-  avr32_pm_oscctrl0_t           OSCCTRL0;
-} u_avr32_pm_oscctrl0_t;
-
-typedef union
-{
-  unsigned long                 oscctrl1;
-  avr32_pm_oscctrl1_t           OSCCTRL1;
-} u_avr32_pm_oscctrl1_t;
-
-typedef union
-{
-  unsigned long                 oscctrl32;
-  avr32_pm_oscctrl32_t          OSCCTRL32;
-} u_avr32_pm_oscctrl32_t;
-
-typedef union
-{
-  unsigned long                 ier;
-  avr32_pm_ier_t                IER;
-} u_avr32_pm_ier_t;
-
-typedef union
-{
-  unsigned long                 idr;
-  avr32_pm_idr_t                IDR;
-} u_avr32_pm_idr_t;
-
-typedef union
-{
-  unsigned long                 icr;
-  avr32_pm_icr_t                ICR;
-} u_avr32_pm_icr_t;
-
-typedef union
-{
-  unsigned long                 gcctrl;
-  avr32_pm_gcctrl_t             GCCTRL;
-} u_avr32_pm_gcctrl_t;
-
-typedef union
-{
-  unsigned long                 rccr;
-  avr32_pm_rccr_t               RCCR;
-} u_avr32_pm_rccr_t;
-
-typedef union
-{
-  unsigned long                 bgcr;
-  avr32_pm_bgcr_t               BGCR;
-} u_avr32_pm_bgcr_t;
-
-typedef union
-{
-  unsigned long                 vregcr;
-  avr32_pm_vregcr_t             VREGCR;
-} u_avr32_pm_vregcr_t;
-
-typedef union
-{
-  unsigned long                 bod;
-  avr32_pm_bod_t                BOD;
-} u_avr32_pm_bod_t;
-
-//! @}
-
-
-/*! \brief Sets the mode of the oscillator 0.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
- */
-static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
-{
-  // Read
-  u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
-  // Modify
-  u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
-  // Write
-  pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
-}
-
-
-void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
-{
-  pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
-}
-
-
-void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
-{
-  pm_set_osc0_mode(pm, (fosc0 <  900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 :
-                       (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 :
-                       (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
-                                           AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
-}
-
-
-void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  pm_enable_clk0_no_wait(pm, startup);
-  pm_wait_for_clk0_ready(pm);
-}
-
-
-void pm_disable_clk0(volatile avr32_pm_t *pm)
-{
-  pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
-}
-
-
-void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  // Read register
-  u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
-  // Modify
-  u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
-  // Write back
-  pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
-
-  pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
-}
-
-
-void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
-}
-
-
-/*! \brief Sets the mode of the oscillator 1.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
- */
-static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
-{
-  // Read
-  u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
-  // Modify
-  u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
-  // Write
-  pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
-}
-
-
-void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
-{
-  pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
-}
-
-
-void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
-{
-  pm_set_osc1_mode(pm, (fosc1 <  900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 :
-                       (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 :
-                       (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
-                                           AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
-}
-
-
-void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  pm_enable_clk1_no_wait(pm, startup);
-  pm_wait_for_clk1_ready(pm);
-}
-
-
-void pm_disable_clk1(volatile avr32_pm_t *pm)
-{
-  pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
-}
-
-
-void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  // Read register
-  u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
-  // Modify
-  u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
-  // Write back
-  pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
-
-  pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
-}
-
-
-void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
-}
-
-
-/*! \brief Sets the mode of the 32-kHz oscillator.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
- */
-static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
-{
-  // Read
-  u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
-  // Modify
-  u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
-  // Write
-  pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
-}
-
-
-void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
-{
-  pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
-}
-
-
-void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
-{
-  pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
-}
-
-
-void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  pm_enable_clk32_no_wait(pm, startup);
-  pm_wait_for_clk32_ready(pm);
-}
-
-
-void pm_disable_clk32(volatile avr32_pm_t *pm)
-{
-  pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
-}
-
-
-void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
-{
-  // Read register
-  u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
-  // Modify
-  u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
-  u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
-  // Write back
-  pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
-}
-
-
-void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
-}
-
-
-void pm_cksel(volatile avr32_pm_t *pm,
-              unsigned int pbadiv,
-              unsigned int pbasel,
-              unsigned int pbbdiv,
-              unsigned int pbbsel,
-              unsigned int hsbdiv,
-              unsigned int hsbsel)
-{
-  u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
-
-  u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
-  u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
-  u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
-  u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
-  u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
-  u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
-  u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
-  u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
-
-  pm->cksel = u_avr32_pm_cksel.cksel;
-
-  // Wait for ckrdy bit and then clear it
-  while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
-}
-
-
-void pm_gc_setup(volatile avr32_pm_t *pm,
-                  unsigned int gc,
-                  unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
-                  unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
-                  unsigned int diven,
-                  unsigned int div)
-{
-  u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
-
-  u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
-  u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
-  u_avr32_pm_gcctrl.GCCTRL.diven  = diven;
-  u_avr32_pm_gcctrl.GCCTRL.div    = div;
-
-  pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
-}
-
-
-void pm_gc_enable(volatile avr32_pm_t *pm,
-                  unsigned int gc)
-{
-  pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
-}
-
-
-void pm_gc_disable(volatile avr32_pm_t *pm,
-                   unsigned int gc)
-{
-  pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
-}
-
-
-void pm_pll_setup(volatile avr32_pm_t *pm,
-                  unsigned int pll,
-                  unsigned int mul,
-                  unsigned int div,
-                  unsigned int osc,
-                  unsigned int lockcount)
-{
-  u_avr32_pm_pll_t u_avr32_pm_pll = {0};
-
-  u_avr32_pm_pll.PLL.pllosc   = osc;
-  u_avr32_pm_pll.PLL.plldiv   = div;
-  u_avr32_pm_pll.PLL.pllmul   = mul;
-  u_avr32_pm_pll.PLL.pllcount = lockcount;
-
-  pm->pll[pll] = u_avr32_pm_pll.pll;
-}
-
-
-void pm_pll_set_option(volatile avr32_pm_t *pm,
-                       unsigned int pll,
-                       unsigned int pll_freq,
-                       unsigned int pll_div2,
-                       unsigned int pll_wbwdisable)
-{
-  u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
-  u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
-  pm->pll[pll] = u_avr32_pm_pll.pll;
-}
-
-
-unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
-                               unsigned int pll)
-{
-  return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
-}
-
-
-void pm_pll_enable(volatile avr32_pm_t *pm,
-                  unsigned int pll)
-{
-  pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
-}
-
-
-void pm_pll_disable(volatile avr32_pm_t *pm,
-                  unsigned int pll)
-{
-  pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
-}
-
-
-void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
-}
-
-
-void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
-{
-  while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
-}
-
-
-void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
-{
-  // Read
-  u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
-  // Modify
-  u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
-  // Write back
-  pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
-}
-
-
-void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)
-{
-  pm_enable_osc0_crystal(pm, fosc0);            // Enable the Osc0 in crystal mode
-  pm_enable_clk0(pm, startup);                  // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal
-  pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0);  // Then switch main clock to Osc0
-}
-
-
-void pm_bod_enable_irq(volatile avr32_pm_t *pm)
-{
-  pm->ier = AVR32_PM_IER_BODDET_MASK;
-}
-
-
-void pm_bod_disable_irq(volatile avr32_pm_t *pm)
-{
-  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
-
-  if (global_interrupt_enabled) Disable_global_interrupt();
-  pm->idr = AVR32_PM_IDR_BODDET_MASK;
-  pm->isr;
-  if (global_interrupt_enabled) Enable_global_interrupt();
-}
-
-
-void pm_bod_clear_irq(volatile avr32_pm_t *pm)
-{
-  pm->icr = AVR32_PM_ICR_BODDET_MASK;
-}
-
-
-unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
-{
-  return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
-}
-
-
-unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
-{
-  return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
-}
-
-
-unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
-{
-  return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
-}
-
-
-unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp)
-{
-  return pm->gplp[gplp];
-}
-
-
-void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value)
-{
-  pm->gplp[gplp] = value;
-}
-
-
-long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module)
-{
-  unsigned long domain = module>>5;
-  unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
-
-  // Implementation-specific shortcut: the ckMASK registers are contiguous and
-  // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
-
-  *regptr |= (1<<(module%32));
-
-  return PASS;
-}
-
-long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module)
-{
-  unsigned long domain = module>>5;
-  unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
-
-  // Implementation-specific shortcut: the ckMASK registers are contiguous and
-  // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
-
-  *regptr &= ~(1<<(module%32));
-
-  return PASS;
-}
+/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Power Manager driver.
+ *
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#include "compiler.h"
+#include "pm.h"
+
+
+/*! \name PM Writable Bit-Field Registers
+ */
+//! @{
+
+typedef union
+{
+  unsigned long                 mcctrl;
+  avr32_pm_mcctrl_t             MCCTRL;
+} u_avr32_pm_mcctrl_t;
+
+typedef union
+{
+  unsigned long                 cksel;
+  avr32_pm_cksel_t              CKSEL;
+} u_avr32_pm_cksel_t;
+
+typedef union
+{
+  unsigned long                 pll;
+  avr32_pm_pll_t                PLL;
+} u_avr32_pm_pll_t;
+
+typedef union
+{
+  unsigned long                 oscctrl0;
+  avr32_pm_oscctrl0_t           OSCCTRL0;
+} u_avr32_pm_oscctrl0_t;
+
+typedef union
+{
+  unsigned long                 oscctrl1;
+  avr32_pm_oscctrl1_t           OSCCTRL1;
+} u_avr32_pm_oscctrl1_t;
+
+typedef union
+{
+  unsigned long                 oscctrl32;
+  avr32_pm_oscctrl32_t          OSCCTRL32;
+} u_avr32_pm_oscctrl32_t;
+
+typedef union
+{
+  unsigned long                 ier;
+  avr32_pm_ier_t                IER;
+} u_avr32_pm_ier_t;
+
+typedef union
+{
+  unsigned long                 idr;
+  avr32_pm_idr_t                IDR;
+} u_avr32_pm_idr_t;
+
+typedef union
+{
+  unsigned long                 icr;
+  avr32_pm_icr_t                ICR;
+} u_avr32_pm_icr_t;
+
+typedef union
+{
+  unsigned long                 gcctrl;
+  avr32_pm_gcctrl_t             GCCTRL;
+} u_avr32_pm_gcctrl_t;
+
+typedef union
+{
+  unsigned long                 rccr;
+  avr32_pm_rccr_t               RCCR;
+} u_avr32_pm_rccr_t;
+
+typedef union
+{
+  unsigned long                 bgcr;
+  avr32_pm_bgcr_t               BGCR;
+} u_avr32_pm_bgcr_t;
+
+typedef union
+{
+  unsigned long                 vregcr;
+  avr32_pm_vregcr_t             VREGCR;
+} u_avr32_pm_vregcr_t;
+
+typedef union
+{
+  unsigned long                 bod;
+  avr32_pm_bod_t                BOD;
+} u_avr32_pm_bod_t;
+
+//! @}
+
+
+/*! \brief Sets the mode of the oscillator 0.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
+ */
+static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
+{
+  // Read
+  u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
+  // Modify
+  u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
+  // Write
+  pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
+}
+
+
+void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
+{
+  pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
+}
+
+
+void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
+{
+  pm_set_osc0_mode(pm, (fosc0 <  900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 :
+                       (fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 :
+                       (fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
+                                           AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
+}
+
+
+void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
+{
+  pm_enable_clk0_no_wait(pm, startup);
+  pm_wait_for_clk0_ready(pm);
+}
+
+
+void pm_disable_clk0(volatile avr32_pm_t *pm)
+{
+  pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
+}
+
+
+void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
+{
+  // Read register
+  u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
+  // Modify
+  u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
+  // Write back
+  pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
+
+  pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
+}
+
+
+void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
+{
+  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
+}
+
+
+/*! \brief Sets the mode of the oscillator 1.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
+ */
+static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
+{
+  // Read
+  u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
+  // Modify
+  u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
+  // Write
+  pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
+}
+
+
+void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
+{
+  pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
+}
+
+
+void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
+{
+  pm_set_osc1_mode(pm, (fosc1 <  900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 :
+                       (fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 :
+                       (fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
+                                           AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
+}
+
+
+void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
+{
+  pm_enable_clk1_no_wait(pm, startup);
+  pm_wait_for_clk1_ready(pm);
+}
+
+
+void pm_disable_clk1(volatile avr32_pm_t *pm)
+{
+  pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
+}
+
+
+void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
+{
+  // Read register
+  u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
+  // Modify
+  u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
+  // Write back
+  pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
+
+  pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
+}
+
+
+void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
+{
+  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
+}
+
+
+/*! \brief Sets the mode of the 32-kHz oscillator.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ * \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
+ */
+static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
+{
+  // Read
+  u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
+  // Modify
+  u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
+  // Write
+  pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
+}
+
+
+void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
+{
+  pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
+}
+
+
+void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
+{
+  pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
+}
+
+
+void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
+{
+  pm_enable_clk32_no_wait(pm, startup);
+  pm_wait_for_clk32_ready(pm);
+}
+
+
+void pm_disable_clk32(volatile avr32_pm_t *pm)
+{
+  pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
+}
+
+
+void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
+{
+  // Read register
+  u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
+  // Modify
+  u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
+  u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
+  // Write back
+  pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
+}
+
+
+void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
+{
+  while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
+}
+
+
+void pm_cksel(volatile avr32_pm_t *pm,
+              unsigned int pbadiv,
+              unsigned int pbasel,
+              unsigned int pbbdiv,
+              unsigned int pbbsel,
+              unsigned int hsbdiv,
+              unsigned int hsbsel)
+{
+  u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
+
+  u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
+  u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
+  u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
+  u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
+  u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
+  u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
+  u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
+  u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
+
+  pm->cksel = u_avr32_pm_cksel.cksel;
+
+  // Wait for ckrdy bit and then clear it
+  while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
+}
+
+
+void pm_gc_setup(volatile avr32_pm_t *pm,
+                  unsigned int gc,
+                  unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
+                  unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
+                  unsigned int diven,
+                  unsigned int div)
+{
+  u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
+
+  u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
+  u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
+  u_avr32_pm_gcctrl.GCCTRL.diven  = diven;
+  u_avr32_pm_gcctrl.GCCTRL.div    = div;
+
+  pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
+}
+
+
+void pm_gc_enable(volatile avr32_pm_t *pm,
+                  unsigned int gc)
+{
+  pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
+}
+
+
+void pm_gc_disable(volatile avr32_pm_t *pm,
+                   unsigned int gc)
+{
+  pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
+}
+
+
+void pm_pll_setup(volatile avr32_pm_t *pm,
+                  unsigned int pll,
+                  unsigned int mul,
+                  unsigned int div,
+                  unsigned int osc,
+                  unsigned int lockcount)
+{
+  u_avr32_pm_pll_t u_avr32_pm_pll = {0};
+
+  u_avr32_pm_pll.PLL.pllosc   = osc;
+  u_avr32_pm_pll.PLL.plldiv   = div;
+  u_avr32_pm_pll.PLL.pllmul   = mul;
+  u_avr32_pm_pll.PLL.pllcount = lockcount;
+
+  pm->pll[pll] = u_avr32_pm_pll.pll;
+}
+
+
+void pm_pll_set_option(volatile avr32_pm_t *pm,
+                       unsigned int pll,
+                       unsigned int pll_freq,
+                       unsigned int pll_div2,
+                       unsigned int pll_wbwdisable)
+{
+  u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
+  u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
+  pm->pll[pll] = u_avr32_pm_pll.pll;
+}
+
+
+unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
+                               unsigned int pll)
+{
+  return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
+}
+
+
+void pm_pll_enable(volatile avr32_pm_t *pm,
+                  unsigned int pll)
+{
+  pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
+}
+
+
+void pm_pll_disable(volatile avr32_pm_t *pm,
+                  unsigned int pll)
+{
+  pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
+}
+
+
+void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
+{
+  while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
+}
+
+
+void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
+{
+  while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
+}
+
+
+void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
+{
+  // Read
+  u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
+  // Modify
+  u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
+  // Write back
+  pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
+}
+
+
+void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)
+{
+  pm_enable_osc0_crystal(pm, fosc0);            // Enable the Osc0 in crystal mode
+  pm_enable_clk0(pm, startup);                  // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal
+  pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0);  // Then switch main clock to Osc0
+}
+
+
+void pm_bod_enable_irq(volatile avr32_pm_t *pm)
+{
+  pm->ier = AVR32_PM_IER_BODDET_MASK;
+}
+
+
+void pm_bod_disable_irq(volatile avr32_pm_t *pm)
+{
+  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
+
+  if (global_interrupt_enabled) Disable_global_interrupt();
+  pm->idr = AVR32_PM_IDR_BODDET_MASK;
+  pm->isr;
+  if (global_interrupt_enabled) Enable_global_interrupt();
+}
+
+
+void pm_bod_clear_irq(volatile avr32_pm_t *pm)
+{
+  pm->icr = AVR32_PM_ICR_BODDET_MASK;
+}
+
+
+unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
+{
+  return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
+}
+
+
+unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
+{
+  return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
+}
+
+
+unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
+{
+  return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
+}
+
+
+unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp)
+{
+  return pm->gplp[gplp];
+}
+
+
+void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value)
+{
+  pm->gplp[gplp] = value;
+}
+
+
+long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module)
+{
+  unsigned long domain = module>>5;
+  unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
+
+  // Implementation-specific shortcut: the ckMASK registers are contiguous and
+  // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
+
+  *regptr |= (1<<(module%32));
+
+  return PASS;
+}
+
+long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module)
+{
+  unsigned long domain = module>>5;
+  unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
+
+  // Implementation-specific shortcut: the ckMASK registers are contiguous and
+  // memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
+
+  *regptr &= ~(1<<(module%32));
+
+  return PASS;
+}

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm.h

@@ -1,493 +1,493 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Power Manager driver.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _PM_H_
-#define _PM_H_
-
-#include <avr32/io.h>
-#include "compiler.h"
-#include "preprocessor.h"
-
-
-/*! \brief Sets the MCU in the specified sleep mode.
- *
- * \param mode Sleep mode:
- *   \arg \c AVR32_PM_SMODE_IDLE: Idle;
- *   \arg \c AVR32_PM_SMODE_FROZEN: Frozen;
- *   \arg \c AVR32_PM_SMODE_STANDBY: Standby;
- *   \arg \c AVR32_PM_SMODE_STOP: Stop;
- *   \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop;
- *   \arg \c AVR32_PM_SMODE_STATIC: Static.
- */
-#define SLEEP(mode)   {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
-
-
-//! Input and output parameters when initializing PM clocks using pm_configure_clocks().
-typedef struct
-{
-  //! CPU frequency (input/output argument).
-  unsigned long cpu_f;
-
-  //! PBA frequency (input/output argument).
-  unsigned long pba_f;
-
-  //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
-  unsigned long osc0_f;
-
-  //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
-  unsigned long osc0_startup;
-} pm_freq_param_t;
-
-#define PM_FREQ_STATUS_FAIL   (-1)
-#define PM_FREQ_STATUS_OK     (0)
-
-
-/*! \brief Gets the MCU reset cause.
- *
- * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
- *
- * \return The MCU reset cause which can be masked with the
- *         \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
-{
-  return pm->rcause;
-}
-
-
-/*!
- * \brief This function will enable the external clock mode of the oscillator 0.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the crystal mode of the oscillator 0.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param fosc0 Oscillator 0 crystal frequency (Hz)
- */
-extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
-
-
-/*!
- * \brief This function will enable the oscillator 0 to be used with a startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will disable the oscillator 0.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_disable_clk0(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 0 to be used with no startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will wait until the Osc0 clock is ready.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the external clock mode of the oscillator 1.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the crystal mode of the oscillator 1.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param fosc1 Oscillator 1 crystal frequency (Hz)
- */
-extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
-
-
-/*!
- * \brief This function will enable the oscillator 1 to be used with a startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will disable the oscillator 1.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_disable_clk1(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 1 to be used with no startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will wait until the Osc1 clock is ready.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the external clock mode of the 32-kHz oscillator.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the crystal mode of the 32-kHz oscillator.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 32 to be used with a startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will disable the oscillator 32.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_disable_clk32(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will enable the oscillator 32 to be used with no startup time.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
- */
-extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
-
-
-/*!
- * \brief This function will wait until the osc32 clock is ready.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will select all the power manager clocks.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pbadiv Peripheral Bus A clock divisor enable
- * \param pbasel Peripheral Bus A select
- * \param pbbdiv Peripheral Bus B clock divisor enable
- * \param pbbsel Peripheral Bus B select
- * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
- * \param hsbsel High Speed Bus select (CPU clock = HSB clock )
- */
-extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
-
-
-/*!
- * \brief This function will setup a generic clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gc generic clock number (0 for gc0...)
- * \param osc_or_pll Use OSC (=0) or PLL (=1)
- * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1
- * \param diven Generic clock divisor enable
- * \param div Generic clock divisor
- */
-extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
-
-
-/*!
- * \brief This function will enable a generic clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gc generic clock number (0 for gc0...)
- */
-extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
-
-
-/*!
- * \brief This function will disable a generic clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gc generic clock number (0 for gc0...)
- */
-extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
-
-
-/*!
- * \brief This function will setup a PLL.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- * \param mul PLL MUL in the PLL formula
- * \param div PLL DIV in the PLL formula
- * \param osc OSC number (0 for osc0, 1 for osc1)
- * \param lockcount PLL lockount
- */
-extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
-
-
-/*!
- * \brief This function will set a PLL option.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
- * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
- * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
- */
-extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int  pll_freq, unsigned int  pll_div2, unsigned int  pll_wbwdisable);
-
-
-/*!
- * \brief This function will get a PLL option.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- * \return       Option
- */
-extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
-
-
-/*!
- * \brief This function will enable a PLL.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- */
-extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
-
-
-/*!
- * \brief This function will disable a PLL.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param pll PLL number(0 for PLL0, 1 for PLL1)
- */
-extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
-
-
-/*!
- * \brief This function will wait for PLL0 locked
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will wait for PLL1 locked
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- */
-extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief This function will switch the power manager main clock.
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.
- */
-extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
-
-
-/*!
- * \brief Switch main clock to clock Osc0 (crystal mode)
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param fosc0 Oscillator 0 crystal frequency (Hz)
- * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
- */
-extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
-
-
-/*! \brief Enables the Brown-Out Detector interrupt.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- */
-extern void pm_bod_enable_irq(volatile avr32_pm_t *pm);
-
-
-/*! \brief Disables the Brown-Out Detector interrupt.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- */
-extern void pm_bod_disable_irq(volatile avr32_pm_t *pm);
-
-
-/*! \brief Clears the Brown-Out Detector interrupt flag.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- */
-extern void pm_bod_clear_irq(volatile avr32_pm_t *pm);
-
-
-/*! \brief Gets the Brown-Out Detector interrupt flag.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- *
- * \retval 0 No BOD interrupt.
- * \retval 1 BOD interrupt pending.
- */
-extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm);
-
-
-/*! \brief Gets the Brown-Out Detector interrupt enable status.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- *
- * \retval 0 BOD interrupt disabled.
- * \retval 1 BOD interrupt enabled.
- */
-extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm);
-
-
-/*! \brief Gets the triggering threshold of the Brown-Out Detector.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
- *
- * \return Triggering threshold of the BOD. See the electrical characteristics
- *         in the part datasheet for actual voltage levels.
- */
-extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm);
-
-
-/*!
- * \brief Read the content of the PM GPLP registers
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- *
- * \return The content of the chosen GPLP register.
- */
-extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp);
-
-
-/*!
- * \brief Write into the PM GPLP registers
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- * \param value Value to write
- */
-extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value);
-
-
-/*! \brief Enable the clock of a module.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param module The module to clock (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module);
-
-/*! \brief Disable the clock of a module.
- *
- * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
- * \param module The module to shut down (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module);
-
-
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
- *         according to the user wishes.
- *
- * This function needs some parameters stored in a pm_freq_param_t structure:
- *  - cpu_f and pba_f are the wanted frequencies,
- *  - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0),
- *  - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP).
- *
- * The function will then configure the clocks using the following rules:
- *  - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order
- *    to satisfy the CPU frequency,
- *  - It optimizes the configuration depending the various divide stages,
- *  - Then, the PBA frequency is configured from the CPU freq.
- *  - Note that HSB and PBB are configured with the same frequency as CPU.
- *  - Note also that the number of wait states of the flash read accesses is automatically set-up depending
- *    the CPU frequency. As a consequence, the application needs the FLASHC driver to compile.
- *
- * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval PM_FREQ_STATUS_OK    Mode successfully initialized.
- * \retval PM_FREQ_STATUS_FAIL  The configuration can not be done.
- */
-extern int pm_configure_clocks(pm_freq_param_t *param);
-
-
-/*! \brief Automatically configure the USB clock.
- *
- * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming
- * a 12 MHz crystal is connected to it.
- */
-extern void pm_configure_usb_clock(void);
-
-
-#endif  // _PM_H_
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Power Manager driver.
+ *
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _PM_H_
+#define _PM_H_
+
+#include <avr32/io.h>
+#include "compiler.h"
+#include "preprocessor.h"
+
+
+/*! \brief Sets the MCU in the specified sleep mode.
+ *
+ * \param mode Sleep mode:
+ *   \arg \c AVR32_PM_SMODE_IDLE: Idle;
+ *   \arg \c AVR32_PM_SMODE_FROZEN: Frozen;
+ *   \arg \c AVR32_PM_SMODE_STANDBY: Standby;
+ *   \arg \c AVR32_PM_SMODE_STOP: Stop;
+ *   \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop;
+ *   \arg \c AVR32_PM_SMODE_STATIC: Static.
+ */
+#define SLEEP(mode)   {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
+
+
+//! Input and output parameters when initializing PM clocks using pm_configure_clocks().
+typedef struct
+{
+  //! CPU frequency (input/output argument).
+  unsigned long cpu_f;
+
+  //! PBA frequency (input/output argument).
+  unsigned long pba_f;
+
+  //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
+  unsigned long osc0_f;
+
+  //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
+  unsigned long osc0_startup;
+} pm_freq_param_t;
+
+#define PM_FREQ_STATUS_FAIL   (-1)
+#define PM_FREQ_STATUS_OK     (0)
+
+
+/*! \brief Gets the MCU reset cause.
+ *
+ * \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
+ *
+ * \return The MCU reset cause which can be masked with the
+ *         \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
+{
+  return pm->rcause;
+}
+
+
+/*!
+ * \brief This function will enable the external clock mode of the oscillator 0.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the crystal mode of the oscillator 0.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param fosc0 Oscillator 0 crystal frequency (Hz)
+ */
+extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
+
+
+/*!
+ * \brief This function will enable the oscillator 0 to be used with a startup time.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
+ */
+extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
+
+
+/*!
+ * \brief This function will disable the oscillator 0.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_disable_clk0(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the oscillator 0 to be used with no startup time.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
+ */
+extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
+
+
+/*!
+ * \brief This function will wait until the Osc0 clock is ready.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the external clock mode of the oscillator 1.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the crystal mode of the oscillator 1.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param fosc1 Oscillator 1 crystal frequency (Hz)
+ */
+extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
+
+
+/*!
+ * \brief This function will enable the oscillator 1 to be used with a startup time.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
+ */
+extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
+
+
+/*!
+ * \brief This function will disable the oscillator 1.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_disable_clk1(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the oscillator 1 to be used with no startup time.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
+ */
+extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
+
+
+/*!
+ * \brief This function will wait until the Osc1 clock is ready.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the external clock mode of the 32-kHz oscillator.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the crystal mode of the 32-kHz oscillator.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the oscillator 32 to be used with a startup time.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
+ */
+extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
+
+
+/*!
+ * \brief This function will disable the oscillator 32.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_disable_clk32(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will enable the oscillator 32 to be used with no startup time.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
+ */
+extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
+
+
+/*!
+ * \brief This function will wait until the osc32 clock is ready.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will select all the power manager clocks.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param pbadiv Peripheral Bus A clock divisor enable
+ * \param pbasel Peripheral Bus A select
+ * \param pbbdiv Peripheral Bus B clock divisor enable
+ * \param pbbsel Peripheral Bus B select
+ * \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
+ * \param hsbsel High Speed Bus select (CPU clock = HSB clock )
+ */
+extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
+
+
+/*!
+ * \brief This function will setup a generic clock.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param gc generic clock number (0 for gc0...)
+ * \param osc_or_pll Use OSC (=0) or PLL (=1)
+ * \param pll_osc Select Osc0/PLL0 or Osc1/PLL1
+ * \param diven Generic clock divisor enable
+ * \param div Generic clock divisor
+ */
+extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
+
+
+/*!
+ * \brief This function will enable a generic clock.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param gc generic clock number (0 for gc0...)
+ */
+extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
+
+
+/*!
+ * \brief This function will disable a generic clock.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param gc generic clock number (0 for gc0...)
+ */
+extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
+
+
+/*!
+ * \brief This function will setup a PLL.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)
+ * \param mul PLL MUL in the PLL formula
+ * \param div PLL DIV in the PLL formula
+ * \param osc OSC number (0 for osc0, 1 for osc1)
+ * \param lockcount PLL lockount
+ */
+extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
+
+
+/*!
+ * \brief This function will set a PLL option.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)
+ * \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
+ * \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
+ * \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
+ */
+extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int  pll_freq, unsigned int  pll_div2, unsigned int  pll_wbwdisable);
+
+
+/*!
+ * \brief This function will get a PLL option.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)
+ * \return       Option
+ */
+extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
+
+
+/*!
+ * \brief This function will enable a PLL.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)
+ */
+extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
+
+
+/*!
+ * \brief This function will disable a PLL.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param pll PLL number(0 for PLL0, 1 for PLL1)
+ */
+extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
+
+
+/*!
+ * \brief This function will wait for PLL0 locked
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will wait for PLL1 locked
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ */
+extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief This function will switch the power manager main clock.
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.
+ */
+extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
+
+
+/*!
+ * \brief Switch main clock to clock Osc0 (crystal mode)
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param fosc0 Oscillator 0 crystal frequency (Hz)
+ * \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
+ */
+extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
+
+
+/*! \brief Enables the Brown-Out Detector interrupt.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ */
+extern void pm_bod_enable_irq(volatile avr32_pm_t *pm);
+
+
+/*! \brief Disables the Brown-Out Detector interrupt.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ */
+extern void pm_bod_disable_irq(volatile avr32_pm_t *pm);
+
+
+/*! \brief Clears the Brown-Out Detector interrupt flag.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ */
+extern void pm_bod_clear_irq(volatile avr32_pm_t *pm);
+
+
+/*! \brief Gets the Brown-Out Detector interrupt flag.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ *
+ * \retval 0 No BOD interrupt.
+ * \retval 1 BOD interrupt pending.
+ */
+extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm);
+
+
+/*! \brief Gets the Brown-Out Detector interrupt enable status.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ *
+ * \retval 0 BOD interrupt disabled.
+ * \retval 1 BOD interrupt enabled.
+ */
+extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm);
+
+
+/*! \brief Gets the triggering threshold of the Brown-Out Detector.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM).
+ *
+ * \return Triggering threshold of the BOD. See the electrical characteristics
+ *         in the part datasheet for actual voltage levels.
+ */
+extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm);
+
+
+/*!
+ * \brief Read the content of the PM GPLP registers
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
+ *
+ * \return The content of the chosen GPLP register.
+ */
+extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp);
+
+
+/*!
+ * \brief Write into the PM GPLP registers
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
+ * \param value Value to write
+ */
+extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value);
+
+
+/*! \brief Enable the clock of a module.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param module The module to clock (use one of the defines in the part-specific
+ * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
+ * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
+ *
+ * \return Status.
+ *   \retval 0  Success.
+ *   \retval <0 An error occured.
+ */
+extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module);
+
+/*! \brief Disable the clock of a module.
+ *
+ * \param pm Base address of the Power Manager (i.e. &AVR32_PM)
+ * \param module The module to shut down (use one of the defines in the part-specific
+ * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
+ * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
+ *
+ * \return Status.
+ *   \retval 0  Success.
+ *   \retval <0 An error occured.
+ */
+extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module);
+
+
+
+/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
+ *         according to the user wishes.
+ *
+ * This function needs some parameters stored in a pm_freq_param_t structure:
+ *  - cpu_f and pba_f are the wanted frequencies,
+ *  - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0),
+ *  - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP).
+ *
+ * The function will then configure the clocks using the following rules:
+ *  - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order
+ *    to satisfy the CPU frequency,
+ *  - It optimizes the configuration depending the various divide stages,
+ *  - Then, the PBA frequency is configured from the CPU freq.
+ *  - Note that HSB and PBB are configured with the same frequency as CPU.
+ *  - Note also that the number of wait states of the flash read accesses is automatically set-up depending
+ *    the CPU frequency. As a consequence, the application needs the FLASHC driver to compile.
+ *
+ * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
+ *
+ * \param param    pointer on the configuration structure.
+ *
+ * \retval PM_FREQ_STATUS_OK    Mode successfully initialized.
+ * \retval PM_FREQ_STATUS_FAIL  The configuration can not be done.
+ */
+extern int pm_configure_clocks(pm_freq_param_t *param);
+
+
+/*! \brief Automatically configure the USB clock.
+ *
+ * USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming
+ * a 12 MHz crystal is connected to it.
+ */
+extern void pm_configure_usb_clock(void);
+
+
+#endif  // _PM_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/PM/pm_conf_clocks.c

@@ -1,268 +1,268 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Power Manager clocks configuration helper.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include <string.h>
-#include "compiler.h"
-#include "pm.h"
-
-extern void flashc_set_wait_state(unsigned int wait_state);
-#if (defined AVR32_FLASHC_210_H_INCLUDED)
-extern void flashc_issue_command(unsigned int command, int page_number);
-#endif
-
-
-#define PM_MAX_MUL                ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1)
-
-
-int pm_configure_clocks(pm_freq_param_t *param)
-{
-  // Supported frequencies:
-  // Fosc0 mul div PLL div2_en cpu_f pba_f   Comment
-  //  12   15   1  192     1     12    12
-  //  12    9   3   40     1     20    20    PLL out of spec
-  //  12   15   1  192     1     24    12
-  //  12    9   1  120     1     30    15
-  //  12    9   3   40     0     40    20    PLL out of spec
-  //  12   15   1  192     1     48    12
-  //  12   15   1  192     1     48    24
-  //  12    8   1  108     1     54    27
-  //  12    9   1  120     1     60    15
-  //  12    9   1  120     1     60    30
-  //  12   10   1  132     1     66    16.5
-  //
-  unsigned long in_cpu_f  = param->cpu_f;
-  unsigned long in_osc0_f = param->osc0_f;
-  unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
-  unsigned long pll_freq, rest;
-  Bool b_div2_pba, b_div2_cpu;
-
-  // Switch to external Oscillator 0
-  pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup);
-
-  // Start with CPU freq config
-  if (in_cpu_f == in_osc0_f)
-  {
-    param->cpu_f = in_osc0_f;
-    param->pba_f = in_osc0_f;
-    return PM_FREQ_STATUS_OK;
-  }
-  else if (in_cpu_f < in_osc0_f)
-  {
-    // TBD
-  }
-
-  rest = in_cpu_f % in_osc0_f;
-
-  for (div = 1; div < 32; div++)
-  {
-    if ((div * rest) % in_osc0_f == 0)
-      break;
-  }
-  if (div == 32)
-    return PM_FREQ_STATUS_FAIL;
-
-  mul = (in_cpu_f * div) / in_osc0_f;
-
-  if (mul > PM_MAX_MUL)
-    return PM_FREQ_STATUS_FAIL;
-
-  // export 2power from PLL div to div2_cpu
-  while (!(div % 2))
-  {
-    div /= 2;
-    div2_cpu++;
-  }
-
-  // Here we know the mul and div parameter of the PLL config.
-  // . Check out if the PLL has a valid in_cpu_f.
-  // . Try to have for the PLL frequency (VCO output) the highest possible value
-  //   to reduce jitter.
-  while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
-  {
-    if (2 * mul > PM_MAX_MUL)
-      break;
-    mul *= 2;
-    div2_cpu++;
-  }
-
-  if (div2_cpu != 0)
-  {
-    div2_cpu--;
-    div2_en = 1;
-  }
-
-  pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
-
-  // Update real CPU Frequency
-  param->cpu_f = pll_freq / (1 << div2_cpu);
-  mul--;
-
-  pm_pll_setup(&AVR32_PM
-  , 0   // pll
-  , mul // mul
-  , div // div
-  , 0   // osc
-  , 16  // lockcount
-  );
-
-  pm_pll_set_option(&AVR32_PM
-  , 0 // pll
-  // PLL clock is lower than 160MHz: need to set pllopt.
-  , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq
-  , div2_en // pll_div2
-  , 0 // pll_wbwdisable
-  );
-
-  rest = pll_freq;
-  while (rest > AVR32_PM_PBA_MAX_FREQ ||
-         rest != param->pba_f)
-  {
-    div2_pba++;
-    rest = pll_freq / (1 << div2_pba);
-    if (rest < param->pba_f)
-      break;
-  }
-
-  // Update real PBA Frequency
-  param->pba_f = pll_freq / (1 << div2_pba);
-
-  // Enable PLL0
-  pm_pll_enable(&AVR32_PM, 0);
-
-  // Wait for PLL0 locked
-  pm_wait_for_pll0_locked(&AVR32_PM);
-
-  if (div2_cpu)
-  {
-    b_div2_cpu = TRUE;
-    div2_cpu--;
-  }
-  else
-    b_div2_cpu = FALSE;
-
-  if (div2_pba)
-  {
-    b_div2_pba = TRUE;
-    div2_pba--;
-  }
-  else
-    b_div2_pba = FALSE;
-
-  pm_cksel(&AVR32_PM
-  , b_div2_pba, div2_pba // PBA
-  , b_div2_cpu, div2_cpu // PBB
-  , b_div2_cpu, div2_cpu // HSB
-  );
-
-  if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ)
-  {
-    flashc_set_wait_state(1);
-#if (defined AVR32_FLASHC_210_H_INCLUDED)
-    if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ)
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
-    else
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-#endif
-  }
-  else
-  {
-    flashc_set_wait_state(0);
-#if (defined AVR32_FLASHC_210_H_INCLUDED)
-    if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
-    else
-      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
-#endif
-  }
-
-  pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
-
-  return PM_FREQ_STATUS_OK;
-}
-
-
-void pm_configure_usb_clock(void)
-{
-#if UC3A3
-
-  // Setup USB GCLK.
-  pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc
-                  0,                  // osc_or_pll: use Osc (if 0) or PLL (if 1)
-                  0,                  // pll_osc: select Osc0/PLL0 or Osc1/PLL1
-                  0,                  // diven
-                  0);                 // div
-
-  // Enable USB GCLK.
-  pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
-#else
-  // Use 12MHz from OSC0 and generate 96 MHz
-  pm_pll_setup(&AVR32_PM, 1,  // pll.
-	  7,   // mul.
-	  1,   // div.
-	  0,   // osc.
-	  16); // lockcount.
-
-  pm_pll_set_option(&AVR32_PM, 1, // pll.
-	  1,  // pll_freq: choose the range 80-180MHz.
-	  1,  // pll_div2.
-	  0); // pll_wbwdisable.
-
-  // start PLL1 and wait forl lock
-  pm_pll_enable(&AVR32_PM, 1);
-
-  // Wait for PLL1 locked.
-  pm_wait_for_pll1_locked(&AVR32_PM);
-
-  pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB,  // gc.
-            1,  // osc_or_pll: use Osc (if 0) or PLL (if 1).
-            1,  // pll_osc: select Osc0/PLL0 or Osc1/PLL1.
-            0,  // diven.
-            0); // div.
-  pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
-#endif
-}
+/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Power Manager clocks configuration helper.
+ *
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#include <string.h>
+#include "compiler.h"
+#include "pm.h"
+
+extern void flashc_set_wait_state(unsigned int wait_state);
+#if (defined AVR32_FLASHC_210_H_INCLUDED)
+extern void flashc_issue_command(unsigned int command, int page_number);
+#endif
+
+
+#define PM_MAX_MUL                ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1)
+
+
+int pm_configure_clocks(pm_freq_param_t *param)
+{
+  // Supported frequencies:
+  // Fosc0 mul div PLL div2_en cpu_f pba_f   Comment
+  //  12   15   1  192     1     12    12
+  //  12    9   3   40     1     20    20    PLL out of spec
+  //  12   15   1  192     1     24    12
+  //  12    9   1  120     1     30    15
+  //  12    9   3   40     0     40    20    PLL out of spec
+  //  12   15   1  192     1     48    12
+  //  12   15   1  192     1     48    24
+  //  12    8   1  108     1     54    27
+  //  12    9   1  120     1     60    15
+  //  12    9   1  120     1     60    30
+  //  12   10   1  132     1     66    16.5
+  //
+  unsigned long in_cpu_f  = param->cpu_f;
+  unsigned long in_osc0_f = param->osc0_f;
+  unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
+  unsigned long pll_freq, rest;
+  Bool b_div2_pba, b_div2_cpu;
+
+  // Switch to external Oscillator 0
+  pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup);
+
+  // Start with CPU freq config
+  if (in_cpu_f == in_osc0_f)
+  {
+    param->cpu_f = in_osc0_f;
+    param->pba_f = in_osc0_f;
+    return PM_FREQ_STATUS_OK;
+  }
+  else if (in_cpu_f < in_osc0_f)
+  {
+    // TBD
+  }
+
+  rest = in_cpu_f % in_osc0_f;
+
+  for (div = 1; div < 32; div++)
+  {
+    if ((div * rest) % in_osc0_f == 0)
+      break;
+  }
+  if (div == 32)
+    return PM_FREQ_STATUS_FAIL;
+
+  mul = (in_cpu_f * div) / in_osc0_f;
+
+  if (mul > PM_MAX_MUL)
+    return PM_FREQ_STATUS_FAIL;
+
+  // export 2power from PLL div to div2_cpu
+  while (!(div % 2))
+  {
+    div /= 2;
+    div2_cpu++;
+  }
+
+  // Here we know the mul and div parameter of the PLL config.
+  // . Check out if the PLL has a valid in_cpu_f.
+  // . Try to have for the PLL frequency (VCO output) the highest possible value
+  //   to reduce jitter.
+  while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
+  {
+    if (2 * mul > PM_MAX_MUL)
+      break;
+    mul *= 2;
+    div2_cpu++;
+  }
+
+  if (div2_cpu != 0)
+  {
+    div2_cpu--;
+    div2_en = 1;
+  }
+
+  pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
+
+  // Update real CPU Frequency
+  param->cpu_f = pll_freq / (1 << div2_cpu);
+  mul--;
+
+  pm_pll_setup(&AVR32_PM
+  , 0   // pll
+  , mul // mul
+  , div // div
+  , 0   // osc
+  , 16  // lockcount
+  );
+
+  pm_pll_set_option(&AVR32_PM
+  , 0 // pll
+  // PLL clock is lower than 160MHz: need to set pllopt.
+  , (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq
+  , div2_en // pll_div2
+  , 0 // pll_wbwdisable
+  );
+
+  rest = pll_freq;
+  while (rest > AVR32_PM_PBA_MAX_FREQ ||
+         rest != param->pba_f)
+  {
+    div2_pba++;
+    rest = pll_freq / (1 << div2_pba);
+    if (rest < param->pba_f)
+      break;
+  }
+
+  // Update real PBA Frequency
+  param->pba_f = pll_freq / (1 << div2_pba);
+
+  // Enable PLL0
+  pm_pll_enable(&AVR32_PM, 0);
+
+  // Wait for PLL0 locked
+  pm_wait_for_pll0_locked(&AVR32_PM);
+
+  if (div2_cpu)
+  {
+    b_div2_cpu = TRUE;
+    div2_cpu--;
+  }
+  else
+    b_div2_cpu = FALSE;
+
+  if (div2_pba)
+  {
+    b_div2_pba = TRUE;
+    div2_pba--;
+  }
+  else
+    b_div2_pba = FALSE;
+
+  pm_cksel(&AVR32_PM
+  , b_div2_pba, div2_pba // PBA
+  , b_div2_cpu, div2_cpu // PBB
+  , b_div2_cpu, div2_cpu // HSB
+  );
+
+  if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ)
+  {
+    flashc_set_wait_state(1);
+#if (defined AVR32_FLASHC_210_H_INCLUDED)
+    if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ)
+      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
+    else
+      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
+#endif
+  }
+  else
+  {
+    flashc_set_wait_state(0);
+#if (defined AVR32_FLASHC_210_H_INCLUDED)
+    if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)
+      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
+    else
+      flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
+#endif
+  }
+
+  pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
+
+  return PM_FREQ_STATUS_OK;
+}
+
+
+void pm_configure_usb_clock(void)
+{
+#if UC3A3
+
+  // Setup USB GCLK.
+  pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc
+                  0,                  // osc_or_pll: use Osc (if 0) or PLL (if 1)
+                  0,                  // pll_osc: select Osc0/PLL0 or Osc1/PLL1
+                  0,                  // diven
+                  0);                 // div
+
+  // Enable USB GCLK.
+  pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
+#else
+  // Use 12MHz from OSC0 and generate 96 MHz
+  pm_pll_setup(&AVR32_PM, 1,  // pll.
+	  7,   // mul.
+	  1,   // div.
+	  0,   // osc.
+	  16); // lockcount.
+
+  pm_pll_set_option(&AVR32_PM, 1, // pll.
+	  1,  // pll_freq: choose the range 80-180MHz.
+	  1,  // pll_div2.
+	  0); // pll_wbwdisable.
+
+  // start PLL1 and wait forl lock
+  pm_pll_enable(&AVR32_PM, 1);
+
+  // Wait for PLL1 locked.
+  pm_wait_for_pll1_locked(&AVR32_PM);
+
+  pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB,  // gc.
+            1,  // osc_or_pll: use Osc (if 0) or PLL (if 1).
+            1,  // pll_osc: select Osc0/PLL0 or Osc1/PLL1.
+            0,  // diven.
+            0); // div.
+  pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
+#endif
+}

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.c

@@ -1,566 +1,566 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief High-level library abstracting features such as oscillators/pll/dfll
- *        configuration, clock configuration, System-sensible parameters
- *        configuration, buses clocks configuration, sleep mode, reset.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-#include "power_clocks_lib.h"
-
-
-//! Device-specific data
-#if UC3L
-static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration
-#endif
-
-#if UC3C
-static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration
-#endif
-
-long int pcl_configure_clocks(pcl_freq_param_t *param)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-  // Implementation for UC3A, UC3A3, UC3B parts.
-  return(pm_configure_clocks(param));
-#else
-  #ifdef AVR32_PM_410_H_INCLUDED
-    // Implementation for UC3C parts.
-    return(pcl_configure_clocks_uc3c(param));
-  #else
-    // Implementation for UC3L parts.
-    return(pcl_configure_clocks_uc3l(param));
-  #endif
-#endif
-}
-
-
-//! Device-specific implementation
-#if UC3L
-// FORWARD declaration
-static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src,
-                                                  unsigned long main_clock_freq_hz,
-                                                  pcl_freq_param_t *param);
-
-long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_RCSYS
-
-  // Supported synchronous clocks frequencies if RCSYS is the main clock source:
-  // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-#ifdef AVR32SFW_INPUT_CHECK
-    // Verify that the target frequencies are reachable.
-    if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ)
-      || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ))
-      return(-1);
-#endif
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param));
-}
-
-
-long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_RC120M
-
-  // Supported synchronous clocks frequencies if RC120M is the main clock source:
-  // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that the target frequencies are reachable.
-  if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ)
-    || (param->pbb_f > SCIF_RC120M_FREQ_HZ))
-    return(-1);
-#endif
-
-  // Start the 120MHz internal RCosc (RC120M) clock
-  scif_start_rc120M();
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param));
-}
-
-
-long int pcl_configure_clocks_osc0(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_OSC0
-
-  // Supported synchronous clocks frequencies if OSC0 is the main clock source:
-  // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
-  // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-  unsigned long               main_clock_freq;
-
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-  main_clock_freq = param->osc0_f;
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that the target frequencies are reachable.
-  if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
-    || (param->pbb_f > main_clock_freq))
-    return(-1);
-#endif
-  // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
-  scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq);
-  // Enable the OSC0
-  scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param));
-}
-
-
-long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_DFLL
-
-  // Supported synchronous clocks frequencies if DFLL is the main clock source:
-  // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
-  // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-  unsigned long   main_clock_freq;
-  scif_gclk_opt_t *pgc_dfllif_ref_opt;
-
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-  main_clock_freq = param->dfll_f;
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that the target DFLL output frequency is in the correct range.
-  if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ))
-    return(-1);
-  // Verify that the target frequencies are reachable.
-  if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
-    || (param->pbb_f > main_clock_freq))
-    return(-1);
-#endif
-  pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params;
-  // Implementation note: this implementation configures the DFLL in closed-loop
-  // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF
-  // as a reference (RCSYS being used as the generic clock source, undivided).
-  scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE);
-
-  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param));
-}
-
-
-static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param)
-{
-  // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M
-
-  // Supported synchronous clocks frequencies if RCSYS is the main clock source:
-  // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
-
-  // Supported synchronous clocks frequencies if RC120M is the main clock source:
-  // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
-
-  // Supported synchronous clocks frequencies if OSC0 is the main clock source:
-  // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
-  // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
-
-  // Supported synchronous clocks frequencies if DFLL is the main clock source:
-  // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
-  // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
-
-  // NOTE: by default, this implementation doesn't perform thorough checks on the
-  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
-
-
-#ifdef AVR32SFW_INPUT_CHECK
-  // Verify that fCPU >= fPBx
-  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
-    return(-1);
-#endif
-
-  if(PCL_MC_RCSYS == param->main_clk_src)
-  {
-    return(pcl_configure_clocks_rcsys(param));
-  }
-  else if(PCL_MC_RC120M == param->main_clk_src)
-  {
-    return(pcl_configure_clocks_rc120m(param));
-  }
-  else if(PCL_MC_OSC0 == param->main_clk_src)
-  {
-    return(pcl_configure_clocks_osc0(param));
-  }
-  else // PCL_MC_DFLL0 == param->main_clk_src
-  {
-    return(pcl_configure_clocks_dfll0(param));
-  }
-}
-
-static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param)
-{
-  //#
-  //# Set the Synchronous clock division ratio for each clock domain
-  //#
-  pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f);
-
-  //#
-  //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
-  //#
-#if UC3L
-    flashcdw_set_flash_waitstate_and_readmode(param->cpu_f);
-#elif UC3C
-    flashc_set_flash_waitstate_and_readmode(param->cpu_f);
-#endif
-
-
-  //#
-  //# Switch the main clock source to the selected clock.
-  //#
-  pm_set_mclk_source(main_clk_src);
-
-  return PASS;
-}
-
-#endif // UC3L device-specific implementation
-
-//! UC3C Device-specific implementation
-#if UC3C
-static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param)
-{
-  #define PM_MAX_MUL                         ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1)
-  #define AVR32_PM_PBA_MAX_FREQ              66000000
-  #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ   240000000
-  #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ   160000000
-
-    // Implementation for  UC3C parts.
-        // Supported frequencies:
-        // Fosc0 mul div PLL div2_en cpu_f pba_f   Comment
-        //  12   15   1  192     1     12    12
-        //  12    9   3   40     1     20    20    PLL out of spec
-        //  12   15   1  192     1     24    12
-        //  12    9   1  120     1     30    15
-        //  12    9   3   40     0     40    20    PLL out of spec
-        //  12   15   1  192     1     48    12
-        //  12   15   1  192     1     48    24
-        //  12    8   1  108     1     54    27
-        //  12    9   1  120     1     60    15
-        //  12    9   1  120     1     60    30
-        //  12   10   1  132     1     66    16.5
-        //
-        unsigned long in_cpu_f  = param->cpu_f;
-        unsigned long in_osc0_f = param->osc0_f;
-        unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
-        unsigned long pll_freq, rest;
-        Bool b_div2_pba, b_div2_cpu;
-
-        // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency.
-        scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f);
-        // Enable the OSC0
-        scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
-        // Set the main clock source as being OSC0.
-        pm_set_mclk_source(PM_CLK_SRC_OSC0);
-
-        // Start with CPU freq config
-        if (in_cpu_f == in_osc0_f)
-        {
-          param->cpu_f = in_osc0_f;
-          param->pba_f = in_osc0_f;
-          return PASS;
-        }
-        else if (in_cpu_f < in_osc0_f)
-        {
-          // TBD
-        }
-
-        rest = in_cpu_f % in_osc0_f;
-
-        for (div = 1; div < 32; div++)
-        {
-          if ((div * rest) % in_osc0_f == 0)
-            break;
-        }
-        if (div == 32)
-          return FAIL;
-
-        mul = (in_cpu_f * div) / in_osc0_f;
-
-        if (mul > PM_MAX_MUL)
-          return FAIL;
-
-        // export 2power from PLL div to div2_cpu
-        while (!(div % 2))
-        {
-          div /= 2;
-          div2_cpu++;
-        }
-
-        // Here we know the mul and div parameter of the PLL config.
-        // . Check out if the PLL has a valid in_cpu_f.
-        // . Try to have for the PLL frequency (VCO output) the highest possible value
-        //   to reduce jitter.
-        while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
-        {
-          if (2 * mul > PM_MAX_MUL)
-            break;
-          mul *= 2;
-          div2_cpu++;
-        }
-
-        if (div2_cpu != 0)
-        {
-          div2_cpu--;
-          div2_en = 1;
-        }
-
-        pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
-
-        // Update real CPU Frequency
-        param->cpu_f = pll_freq / (1 << div2_cpu);
-        mul--;
-
-        scif_pll_opt_t opt;
-
-        opt.osc = SCIF_OSC0,     // Sel Osc0 or Osc1
-        opt.lockcount = 16,      // lockcount in main clock for the PLL wait lock
-        opt.div = div,             // DIV=1 in the formula
-        opt.mul = mul,             // MUL=7 in the formula
-        opt.pll_div2 = div2_en,        // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
-        opt.pll_wbwdisable = 0,  //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
-        opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0,        // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
-
-
-        scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock
-
-        /* Enable PLL0 */
-        scif_pll_enable(SCIF_PLL0);
-
-        /* Wait for PLL0 locked */
-        scif_wait_for_pll_locked(SCIF_PLL0) ;
-
-        rest = pll_freq;
-        while (rest > AVR32_PM_PBA_MAX_FREQ ||
-               rest != param->pba_f)
-        {
-          div2_pba++;
-          rest = pll_freq / (1 << div2_pba);
-          if (rest < param->pba_f)
-            break;
-        }
-
-        // Update real PBA Frequency
-        param->pba_f = pll_freq / (1 << div2_pba);
-
-
-        if (div2_cpu)
-        {
-          b_div2_cpu = TRUE;
-          div2_cpu--;
-        }
-        else
-          b_div2_cpu = FALSE;
-
-        if (div2_pba)
-        {
-          b_div2_pba = TRUE;
-          div2_pba--;
-        }
-        else
-          b_div2_pba = FALSE;
-
-        if (b_div2_cpu == TRUE )
-        {
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB
-        }
-        if (b_div2_pba == TRUE )
-        {
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA
-          pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC
-        }
-
-        // Set Flashc Wait State
-        flashc_set_flash_waitstate_and_readmode(param->cpu_f);
-
-        // Set the main clock source as being PLL0.
-        pm_set_mclk_source(PM_CLK_SRC_PLL0);
-
-        return PASS;
-}
-#endif // UC3C device-specific implementation
-
-long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  if(PCL_OSC0 == osc)
-  {
-    // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency,
-    // enable the OSC0, set the main clock source as being OSC0.
-    pm_switch_to_osc0(&AVR32_PM, fcrystal, startup);
-  }
-  else
-  {
-    return PCL_NOT_SUPPORTED;
-  }
-#else
-// Implementation for UC3C, UC3L parts.
-  #if AVR32_PM_VERSION_RESETVALUE < 0x400
-    return PCL_NOT_SUPPORTED;
-  #else
-  if(PCL_OSC0 == osc)
-  {
-    // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
-    scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal);
-    // Enable the OSC0
-    scif_enable_osc(SCIF_OSC0, startup, true);
-    // Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
-#if UC3L
-    flashcdw_set_flash_waitstate_and_readmode(fcrystal);
-#elif UC3C
-    flashc_set_flash_waitstate_and_readmode(fcrystal);
-#endif
-    // Set the main clock source as being OSC0.
-    pm_set_mclk_source(PM_CLK_SRC_OSC0);
-  }
-  else
-  {
-    return PCL_NOT_SUPPORTED;
-  }
-  #endif
-#endif
-  return PASS;
-}
-
-long int pcl_configure_usb_clock(void)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  pm_configure_usb_clock();
-  return PASS;
-#else
-  #ifdef AVR32_PM_410_H_INCLUDED
-    const scif_pll_opt_t opt = {
-              .osc = SCIF_OSC0,     // Sel Osc0 or Osc1
-              .lockcount = 16,      // lockcount in main clock for the PLL wait lock
-              .div = 1,             // DIV=1 in the formula
-              .mul = 5,             // MUL=7 in the formula
-              .pll_div2 = 1,        // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
-              .pll_wbwdisable = 0,  //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
-              .pll_freq = 1,        // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
-    };
-
-    /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */
-    scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock
-
-    /* Enable PLL1 */
-    scif_pll_enable(SCIF_PLL1);
-
-    /* Wait for PLL1 locked */
-    scif_wait_for_pll_locked(SCIF_PLL1) ;
-
-  // Implementation for UC3C parts.
-    // Setup the generic clock for USB
-    scif_gc_setup(AVR32_SCIF_GCLK_USB,
-                  SCIF_GCCTRL_PLL1,
-                  AVR32_SCIF_GC_NO_DIV_CLOCK,
-                  0);
-    // Now enable the generic clock
-    scif_gc_enable(AVR32_SCIF_GCLK_USB);
-    return PASS;
-  #else
-      return PCL_NOT_SUPPORTED;
-  #endif
-#endif
-}
-
-
-#if UC3L
-#else
-void pcl_write_gplp(unsigned long gplp, unsigned long value)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  pm_write_gplp(&AVR32_PM,gplp,value);
-#else
-  scif_write_gplp(gplp,value);
-#endif
-}
-
-unsigned long pcl_read_gplp(unsigned long gplp)
-{
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-  return pm_read_gplp(&AVR32_PM,gplp);
-#else
-  return scif_read_gplp(gplp);
-#endif
-}
-#endif
+/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief High-level library abstracting features such as oscillators/pll/dfll
+ *        configuration, clock configuration, System-sensible parameters
+ *        configuration, buses clocks configuration, sleep mode, reset.
+ *
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+#include "power_clocks_lib.h"
+
+
+//! Device-specific data
+#if UC3L
+static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration
+#endif
+
+#if UC3C
+static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration
+#endif
+
+long int pcl_configure_clocks(pcl_freq_param_t *param)
+{
+#ifndef AVR32_PM_VERSION_RESETVALUE
+  // Implementation for UC3A, UC3A3, UC3B parts.
+  return(pm_configure_clocks(param));
+#else
+  #ifdef AVR32_PM_410_H_INCLUDED
+    // Implementation for UC3C parts.
+    return(pcl_configure_clocks_uc3c(param));
+  #else
+    // Implementation for UC3L parts.
+    return(pcl_configure_clocks_uc3l(param));
+  #endif
+#endif
+}
+
+
+//! Device-specific implementation
+#if UC3L
+// FORWARD declaration
+static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src,
+                                                  unsigned long main_clock_freq_hz,
+                                                  pcl_freq_param_t *param);
+
+long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param)
+{
+  // Supported main clock sources: PCL_MC_RCSYS
+
+  // Supported synchronous clocks frequencies if RCSYS is the main clock source:
+  // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
+
+  // NOTE: by default, this implementation doesn't perform thorough checks on the
+  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that fCPU >= fPBx
+  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
+    return(-1);
+#endif
+
+#ifdef AVR32SFW_INPUT_CHECK
+    // Verify that the target frequencies are reachable.
+    if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ)
+      || (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ))
+      return(-1);
+#endif
+
+  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param));
+}
+
+
+long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param)
+{
+  // Supported main clock sources: PCL_MC_RC120M
+
+  // Supported synchronous clocks frequencies if RC120M is the main clock source:
+  // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
+
+  // NOTE: by default, this implementation doesn't perform thorough checks on the
+  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that fCPU >= fPBx
+  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
+    return(-1);
+#endif
+
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that the target frequencies are reachable.
+  if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ)
+    || (param->pbb_f > SCIF_RC120M_FREQ_HZ))
+    return(-1);
+#endif
+
+  // Start the 120MHz internal RCosc (RC120M) clock
+  scif_start_rc120M();
+
+  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param));
+}
+
+
+long int pcl_configure_clocks_osc0(pcl_freq_param_t *param)
+{
+  // Supported main clock sources: PCL_MC_OSC0
+
+  // Supported synchronous clocks frequencies if OSC0 is the main clock source:
+  // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
+  // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
+
+  // NOTE: by default, this implementation doesn't perform thorough checks on the
+  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+
+  unsigned long               main_clock_freq;
+
+
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that fCPU >= fPBx
+  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
+    return(-1);
+#endif
+
+  main_clock_freq = param->osc0_f;
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that the target frequencies are reachable.
+  if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
+    || (param->pbb_f > main_clock_freq))
+    return(-1);
+#endif
+  // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
+  scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq);
+  // Enable the OSC0
+  scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
+
+  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param));
+}
+
+
+long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param)
+{
+  // Supported main clock sources: PCL_MC_DFLL
+
+  // Supported synchronous clocks frequencies if DFLL is the main clock source:
+  // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
+  // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
+
+  // NOTE: by default, this implementation doesn't perform thorough checks on the
+  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+
+  unsigned long   main_clock_freq;
+  scif_gclk_opt_t *pgc_dfllif_ref_opt;
+
+
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that fCPU >= fPBx
+  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
+    return(-1);
+#endif
+
+  main_clock_freq = param->dfll_f;
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that the target DFLL output frequency is in the correct range.
+  if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ))
+    return(-1);
+  // Verify that the target frequencies are reachable.
+  if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
+    || (param->pbb_f > main_clock_freq))
+    return(-1);
+#endif
+  pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params;
+  // Implementation note: this implementation configures the DFLL in closed-loop
+  // mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF
+  // as a reference (RCSYS being used as the generic clock source, undivided).
+  scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE);
+
+  return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param));
+}
+
+
+static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param)
+{
+  // Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M
+
+  // Supported synchronous clocks frequencies if RCSYS is the main clock source:
+  // 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
+
+  // Supported synchronous clocks frequencies if RC120M is the main clock source:
+  // 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
+
+  // Supported synchronous clocks frequencies if OSC0 is the main clock source:
+  // (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
+  // 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
+
+  // Supported synchronous clocks frequencies if DFLL is the main clock source:
+  // (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
+  // 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
+
+  // NOTE: by default, this implementation doesn't perform thorough checks on the
+  // input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+
+
+#ifdef AVR32SFW_INPUT_CHECK
+  // Verify that fCPU >= fPBx
+  if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
+    return(-1);
+#endif
+
+  if(PCL_MC_RCSYS == param->main_clk_src)
+  {
+    return(pcl_configure_clocks_rcsys(param));
+  }
+  else if(PCL_MC_RC120M == param->main_clk_src)
+  {
+    return(pcl_configure_clocks_rc120m(param));
+  }
+  else if(PCL_MC_OSC0 == param->main_clk_src)
+  {
+    return(pcl_configure_clocks_osc0(param));
+  }
+  else // PCL_MC_DFLL0 == param->main_clk_src
+  {
+    return(pcl_configure_clocks_dfll0(param));
+  }
+}
+
+static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param)
+{
+  //#
+  //# Set the Synchronous clock division ratio for each clock domain
+  //#
+  pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f);
+
+  //#
+  //# Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
+  //#
+#if UC3L
+    flashcdw_set_flash_waitstate_and_readmode(param->cpu_f);
+#elif UC3C
+    flashc_set_flash_waitstate_and_readmode(param->cpu_f);
+#endif
+
+
+  //#
+  //# Switch the main clock source to the selected clock.
+  //#
+  pm_set_mclk_source(main_clk_src);
+
+  return PASS;
+}
+
+#endif // UC3L device-specific implementation
+
+//! UC3C Device-specific implementation
+#if UC3C
+static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param)
+{
+  #define PM_MAX_MUL                         ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1)
+  #define AVR32_PM_PBA_MAX_FREQ              66000000
+  #define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ   240000000
+  #define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ   160000000
+
+    // Implementation for  UC3C parts.
+        // Supported frequencies:
+        // Fosc0 mul div PLL div2_en cpu_f pba_f   Comment
+        //  12   15   1  192     1     12    12
+        //  12    9   3   40     1     20    20    PLL out of spec
+        //  12   15   1  192     1     24    12
+        //  12    9   1  120     1     30    15
+        //  12    9   3   40     0     40    20    PLL out of spec
+        //  12   15   1  192     1     48    12
+        //  12   15   1  192     1     48    24
+        //  12    8   1  108     1     54    27
+        //  12    9   1  120     1     60    15
+        //  12    9   1  120     1     60    30
+        //  12   10   1  132     1     66    16.5
+        //
+        unsigned long in_cpu_f  = param->cpu_f;
+        unsigned long in_osc0_f = param->osc0_f;
+        unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
+        unsigned long pll_freq, rest;
+        Bool b_div2_pba, b_div2_cpu;
+
+        // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency.
+        scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f);
+        // Enable the OSC0
+        scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
+        // Set the main clock source as being OSC0.
+        pm_set_mclk_source(PM_CLK_SRC_OSC0);
+
+        // Start with CPU freq config
+        if (in_cpu_f == in_osc0_f)
+        {
+          param->cpu_f = in_osc0_f;
+          param->pba_f = in_osc0_f;
+          return PASS;
+        }
+        else if (in_cpu_f < in_osc0_f)
+        {
+          // TBD
+        }
+
+        rest = in_cpu_f % in_osc0_f;
+
+        for (div = 1; div < 32; div++)
+        {
+          if ((div * rest) % in_osc0_f == 0)
+            break;
+        }
+        if (div == 32)
+          return FAIL;
+
+        mul = (in_cpu_f * div) / in_osc0_f;
+
+        if (mul > PM_MAX_MUL)
+          return FAIL;
+
+        // export 2power from PLL div to div2_cpu
+        while (!(div % 2))
+        {
+          div /= 2;
+          div2_cpu++;
+        }
+
+        // Here we know the mul and div parameter of the PLL config.
+        // . Check out if the PLL has a valid in_cpu_f.
+        // . Try to have for the PLL frequency (VCO output) the highest possible value
+        //   to reduce jitter.
+        while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
+        {
+          if (2 * mul > PM_MAX_MUL)
+            break;
+          mul *= 2;
+          div2_cpu++;
+        }
+
+        if (div2_cpu != 0)
+        {
+          div2_cpu--;
+          div2_en = 1;
+        }
+
+        pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
+
+        // Update real CPU Frequency
+        param->cpu_f = pll_freq / (1 << div2_cpu);
+        mul--;
+
+        scif_pll_opt_t opt;
+
+        opt.osc = SCIF_OSC0,     // Sel Osc0 or Osc1
+        opt.lockcount = 16,      // lockcount in main clock for the PLL wait lock
+        opt.div = div,             // DIV=1 in the formula
+        opt.mul = mul,             // MUL=7 in the formula
+        opt.pll_div2 = div2_en,        // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
+        opt.pll_wbwdisable = 0,  //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
+        opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0,        // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
+
+
+        scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock
+
+        /* Enable PLL0 */
+        scif_pll_enable(SCIF_PLL0);
+
+        /* Wait for PLL0 locked */
+        scif_wait_for_pll_locked(SCIF_PLL0) ;
+
+        rest = pll_freq;
+        while (rest > AVR32_PM_PBA_MAX_FREQ ||
+               rest != param->pba_f)
+        {
+          div2_pba++;
+          rest = pll_freq / (1 << div2_pba);
+          if (rest < param->pba_f)
+            break;
+        }
+
+        // Update real PBA Frequency
+        param->pba_f = pll_freq / (1 << div2_pba);
+
+
+        if (div2_cpu)
+        {
+          b_div2_cpu = TRUE;
+          div2_cpu--;
+        }
+        else
+          b_div2_cpu = FALSE;
+
+        if (div2_pba)
+        {
+          b_div2_pba = TRUE;
+          div2_pba--;
+        }
+        else
+          b_div2_pba = FALSE;
+
+        if (b_div2_cpu == TRUE )
+        {
+          pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU
+          pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB
+          pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB
+        }
+        if (b_div2_pba == TRUE )
+        {
+          pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA
+          pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC
+        }
+
+        // Set Flashc Wait State
+        flashc_set_flash_waitstate_and_readmode(param->cpu_f);
+
+        // Set the main clock source as being PLL0.
+        pm_set_mclk_source(PM_CLK_SRC_PLL0);
+
+        return PASS;
+}
+#endif // UC3C device-specific implementation
+
+long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup)
+{
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Implementation for UC3A, UC3A3, UC3B parts.
+  if(PCL_OSC0 == osc)
+  {
+    // Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency,
+    // enable the OSC0, set the main clock source as being OSC0.
+    pm_switch_to_osc0(&AVR32_PM, fcrystal, startup);
+  }
+  else
+  {
+    return PCL_NOT_SUPPORTED;
+  }
+#else
+// Implementation for UC3C, UC3L parts.
+  #if AVR32_PM_VERSION_RESETVALUE < 0x400
+    return PCL_NOT_SUPPORTED;
+  #else
+  if(PCL_OSC0 == osc)
+  {
+    // Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
+    scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal);
+    // Enable the OSC0
+    scif_enable_osc(SCIF_OSC0, startup, true);
+    // Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
+#if UC3L
+    flashcdw_set_flash_waitstate_and_readmode(fcrystal);
+#elif UC3C
+    flashc_set_flash_waitstate_and_readmode(fcrystal);
+#endif
+    // Set the main clock source as being OSC0.
+    pm_set_mclk_source(PM_CLK_SRC_OSC0);
+  }
+  else
+  {
+    return PCL_NOT_SUPPORTED;
+  }
+  #endif
+#endif
+  return PASS;
+}
+
+long int pcl_configure_usb_clock(void)
+{
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Implementation for UC3A, UC3A3, UC3B parts.
+  pm_configure_usb_clock();
+  return PASS;
+#else
+  #ifdef AVR32_PM_410_H_INCLUDED
+    const scif_pll_opt_t opt = {
+              .osc = SCIF_OSC0,     // Sel Osc0 or Osc1
+              .lockcount = 16,      // lockcount in main clock for the PLL wait lock
+              .div = 1,             // DIV=1 in the formula
+              .mul = 5,             // MUL=7 in the formula
+              .pll_div2 = 1,        // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
+              .pll_wbwdisable = 0,  //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
+              .pll_freq = 1,        // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
+    };
+
+    /* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */
+    scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock
+
+    /* Enable PLL1 */
+    scif_pll_enable(SCIF_PLL1);
+
+    /* Wait for PLL1 locked */
+    scif_wait_for_pll_locked(SCIF_PLL1) ;
+
+  // Implementation for UC3C parts.
+    // Setup the generic clock for USB
+    scif_gc_setup(AVR32_SCIF_GCLK_USB,
+                  SCIF_GCCTRL_PLL1,
+                  AVR32_SCIF_GC_NO_DIV_CLOCK,
+                  0);
+    // Now enable the generic clock
+    scif_gc_enable(AVR32_SCIF_GCLK_USB);
+    return PASS;
+  #else
+      return PCL_NOT_SUPPORTED;
+  #endif
+#endif
+}
+
+
+#if UC3L
+#else
+void pcl_write_gplp(unsigned long gplp, unsigned long value)
+{
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Implementation for UC3A, UC3A3, UC3B parts.
+  pm_write_gplp(&AVR32_PM,gplp,value);
+#else
+  scif_write_gplp(gplp,value);
+#endif
+}
+
+unsigned long pcl_read_gplp(unsigned long gplp)
+{
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Implementation for UC3A, UC3A3, UC3B parts.
+  return pm_read_gplp(&AVR32_PM,gplp);
+#else
+  return scif_read_gplp(gplp);
+#endif
+}
+#endif

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/PM/power_clocks_lib.h

@@ -1,379 +1,379 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file has been prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief High-level library abstracting features such as oscillators/pll/dfll
- *        configuration, clock configuration, System-sensible parameters
- *        configuration, buses clocks configuration, sleep mode, reset.
- *
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- *****************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _POWER_CLOCKS_LIB_H_
-#define _POWER_CLOCKS_LIB_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <avr32/io.h>
-#include "compiler.h"
-
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Support for UC3A, UC3A3, UC3B parts.
-  #include "pm.h"
-#else
-//! Device-specific data
-#if UC3L 
-  #include "pm_uc3l.h"
-  #include "scif_uc3l.h"
-  #include "flashcdw.h"
-#elif UC3C
-  #include "pm_uc3c.h"
-  #include "scif_uc3c.h"
-  #include "flashc.h"
-#endif
-#endif
-
-/*! \name Clocks Management
- */
-//! @{
-
-//! The different oscillators
-typedef enum
-{
-  PCL_OSC0  = 0,
-  PCL_OSC1  = 1
-} pcl_osc_t;
-
-//! The different DFLLs
-typedef enum
-{
-  PCL_DFLL0  = 0,
-  PCL_DFLL1  = 1
-} pcl_dfll_t;
-
-//! Possible Main Clock Sources
-typedef enum
-{
-  PCL_MC_RCSYS,      // Default main clock source, supported by all (aka Slow Clock)
-  PCL_MC_OSC0,       // Supported by all
-  PCL_MC_OSC1,       // Supported by UC3C only
-  PCL_MC_OSC0_PLL0,  // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference)
-  PCL_MC_OSC1_PLL0,  // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference)
-  PCL_MC_OSC0_PLL1,  // Supported by UC3C  (the main clock source is PLL1 with OSC0 as reference)
-  PCL_MC_OSC1_PLL1,  // Supported by UC3C  (the main clock source is PLL1 with OSC1 as reference)
-  PCL_MC_DFLL0,      // Supported by UC3L
-  PCL_MC_DFLL1,      // Not supported yet
-  PCL_MC_RC120M,     // Supported by UC3L, UC3C
-  PCL_MC_RC8M,       // Supported by UC3C
-  PCL_MC_CRIPOSC     // Supported by UC3C
-} pcl_mainclk_t;
-
-//! Input and output parameters to configure clocks with pcl_configure_clocks().
-// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies.
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Support for UC3A, UC3A3, UC3B parts.
-#define pcl_freq_param_t  pm_freq_param_t // See pm.h
-#else
-// Support for UC3C, UC3L parts.
-typedef struct
-{
-  //! Main clock source selection (input argument).
-  pcl_mainclk_t main_clk_src;
-
-  //! Target CPU frequency (input/output argument).
-  unsigned long cpu_f;
-
-  //! Target PBA frequency (input/output argument).
-  unsigned long pba_f;
-
-  //! Target PBB frequency (input/output argument).
-  unsigned long pbb_f;
-
-  //! Target PBC frequency (input/output argument).
-  unsigned long pbc_f;
-
-  //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
-  unsigned long osc0_f;
-
-  //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
-  unsigned long osc0_startup;
-
-  //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency)
-  unsigned long dfll_f;
-  
-  //! Other parameters that might be necessary depending on the device (implementation-dependent).
-  // For the UC3L DFLL setup, this parameter should be pointing to a structure of
-  // type (scif_gclk_opt_t *).
-  void *pextra_params;
-} pcl_freq_param_t;
-#endif
-
-//! Define "not supported" for the lib.
-#define PCL_NOT_SUPPORTED (-10000)
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - main_clk_src is the id of the main clock source to use,
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
- *  - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
- *  - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
- *  - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll.
- *
- * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks() and modify it to use
- * preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock.
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies
- *
- * Supported main clock sources: PCL_MC_RCSYS
- *
- * Supported synchronous clocks frequencies:
- * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_rcsys() and modify it to use
- * preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock.
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies
- *
- * Supported main clock sources: PCL_MC_RC120M
- *
- * Supported synchronous clocks frequencies:
- * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_rc120m() and modify it to
- * use preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
- *  - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
- *  - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
- *
- * Supported main clock sources: PCL_MC_OSC0
- *
- * Supported synchronous clocks frequencies:
- * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
- * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_osc0() and modify it to use
- * preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param);
-
-/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock
- *
- * This function needs some parameters stored in a pcl_freq_param_t structure:
- *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
- *  - dfll_f is the target DFLL frequency to set-up
- *
- * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks,
- *  the target frequency of the DFLL should be chosen to be as high as possible
- *  within the specification range (for stability reasons); the target cpu and pbx
- *  frequencies will then be reached by appropriate division ratio.
- *
- * Supported main clock sources: PCL_MC_DFLL0
- *
- * Supported synchronous clocks frequencies:
- * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
- * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
- *
- * \note: by default, this implementation doesn't perform thorough checks on the
- *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
- *
- * \note: since it is dynamically computing the appropriate field values of the
- * configuration registers from the parameters structure, this function is not
- * optimal in terms of code size. For a code size optimal solution, it is better
- * to create a new function from pcl_configure_clocks_dfll0() and modify it to
- * use preprocessor computation from pre-defined target frequencies.
- *
- * \param param    pointer on the configuration structure.
- *
- * \retval 0   Success.
- * \retval <0  The configuration cannot be performed.
- */
-extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param);
-
-/*! \brief Switch the main clock source to Osc0 configured in crystal mode
- *
- * \param osc The oscillator to enable and switch to.
- * \param fcrystal Oscillator external crystal frequency (Hz)
- * \param startup Oscillator startup time.
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup);
-
-/*! \brief Enable the clock of a module.
- *
- * \param module The module to clock (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
- * or look in the module section).
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module)
-#else
-// Implementation for UC3C, UC3L parts.
-#define pcl_enable_module(module) pm_enable_module(module)
-#endif
-
-/*! \brief Disable the clock of a module.
- *
- * \param module The module to shut down (use one of the defines in the part-specific
- * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
- * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
- * or look in the module section).
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-#ifndef AVR32_PM_VERSION_RESETVALUE
-// Implementation for UC3A, UC3A3, UC3B parts.
-#define pcl_disable_module(module)  pm_disable_module(&AVR32_PM, module)
-#else
-// Implementation for UC3C, UC3L parts.
-#define pcl_disable_module(module)  pm_disable_module(module)
-#endif
-
-/*! \brief Configure the USB Clock
- *
- *
- * \return Status.
- *   \retval 0  Success.
- *   \retval <0 An error occured.
- */
-extern long int pcl_configure_usb_clock(void);
-
-//! @}
-
-/*! \name Power Management
- */
-//! @{
-/*!
- * \brief Read the content of the GPLP registers
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- *
- * \return The content of the chosen GPLP register.
- */
-extern unsigned long pcl_read_gplp(unsigned long gplp);
-
-
-/*!
- * \brief Write into the GPLP registers
- * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
- * \param value Value to write
- */
-extern void pcl_write_gplp(unsigned long gplp, unsigned long value);
-
-//! @}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif  // _POWER_CLOCKS_LIB_H_
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief High-level library abstracting features such as oscillators/pll/dfll
+ *        configuration, clock configuration, System-sensible parameters
+ *        configuration, buses clocks configuration, sleep mode, reset.
+ *
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ *****************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _POWER_CLOCKS_LIB_H_
+#define _POWER_CLOCKS_LIB_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <avr32/io.h>
+#include "compiler.h"
+
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Support for UC3A, UC3A3, UC3B parts.
+  #include "pm.h"
+#else
+//! Device-specific data
+#if UC3L 
+  #include "pm_uc3l.h"
+  #include "scif_uc3l.h"
+  #include "flashcdw.h"
+#elif UC3C
+  #include "pm_uc3c.h"
+  #include "scif_uc3c.h"
+  #include "flashc.h"
+#endif
+#endif
+
+/*! \name Clocks Management
+ */
+//! @{
+
+//! The different oscillators
+typedef enum
+{
+  PCL_OSC0  = 0,
+  PCL_OSC1  = 1
+} pcl_osc_t;
+
+//! The different DFLLs
+typedef enum
+{
+  PCL_DFLL0  = 0,
+  PCL_DFLL1  = 1
+} pcl_dfll_t;
+
+//! Possible Main Clock Sources
+typedef enum
+{
+  PCL_MC_RCSYS,      // Default main clock source, supported by all (aka Slow Clock)
+  PCL_MC_OSC0,       // Supported by all
+  PCL_MC_OSC1,       // Supported by UC3C only
+  PCL_MC_OSC0_PLL0,  // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference)
+  PCL_MC_OSC1_PLL0,  // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference)
+  PCL_MC_OSC0_PLL1,  // Supported by UC3C  (the main clock source is PLL1 with OSC0 as reference)
+  PCL_MC_OSC1_PLL1,  // Supported by UC3C  (the main clock source is PLL1 with OSC1 as reference)
+  PCL_MC_DFLL0,      // Supported by UC3L
+  PCL_MC_DFLL1,      // Not supported yet
+  PCL_MC_RC120M,     // Supported by UC3L, UC3C
+  PCL_MC_RC8M,       // Supported by UC3C
+  PCL_MC_CRIPOSC     // Supported by UC3C
+} pcl_mainclk_t;
+
+//! Input and output parameters to configure clocks with pcl_configure_clocks().
+// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies.
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Support for UC3A, UC3A3, UC3B parts.
+#define pcl_freq_param_t  pm_freq_param_t // See pm.h
+#else
+// Support for UC3C, UC3L parts.
+typedef struct
+{
+  //! Main clock source selection (input argument).
+  pcl_mainclk_t main_clk_src;
+
+  //! Target CPU frequency (input/output argument).
+  unsigned long cpu_f;
+
+  //! Target PBA frequency (input/output argument).
+  unsigned long pba_f;
+
+  //! Target PBB frequency (input/output argument).
+  unsigned long pbb_f;
+
+  //! Target PBC frequency (input/output argument).
+  unsigned long pbc_f;
+
+  //! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
+  unsigned long osc0_f;
+
+  //! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
+  unsigned long osc0_startup;
+
+  //! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency)
+  unsigned long dfll_f;
+  
+  //! Other parameters that might be necessary depending on the device (implementation-dependent).
+  // For the UC3L DFLL setup, this parameter should be pointing to a structure of
+  // type (scif_gclk_opt_t *).
+  void *pextra_params;
+} pcl_freq_param_t;
+#endif
+
+//! Define "not supported" for the lib.
+#define PCL_NOT_SUPPORTED (-10000)
+
+/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
+ *
+ * This function needs some parameters stored in a pcl_freq_param_t structure:
+ *  - main_clk_src is the id of the main clock source to use,
+ *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
+ *  - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
+ *  - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
+ *  - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll.
+ *
+ * The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
+ *
+ * \note: since it is dynamically computing the appropriate field values of the
+ * configuration registers from the parameters structure, this function is not
+ * optimal in terms of code size. For a code size optimal solution, it is better
+ * to create a new function from pcl_configure_clocks() and modify it to use
+ * preprocessor computation from pre-defined target frequencies.
+ *
+ * \param param    pointer on the configuration structure.
+ *
+ * \retval 0   Success.
+ * \retval <0  The configuration cannot be performed.
+ */
+extern long int pcl_configure_clocks(pcl_freq_param_t *param);
+
+/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock.
+ *
+ * This function needs some parameters stored in a pcl_freq_param_t structure:
+ *  - cpu_f and pba_f and pbb_f are the wanted frequencies
+ *
+ * Supported main clock sources: PCL_MC_RCSYS
+ *
+ * Supported synchronous clocks frequencies:
+ * 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
+ *
+ * \note: by default, this implementation doesn't perform thorough checks on the
+ *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+ *
+ * \note: since it is dynamically computing the appropriate field values of the
+ * configuration registers from the parameters structure, this function is not
+ * optimal in terms of code size. For a code size optimal solution, it is better
+ * to create a new function from pcl_configure_clocks_rcsys() and modify it to use
+ * preprocessor computation from pre-defined target frequencies.
+ *
+ * \param param    pointer on the configuration structure.
+ *
+ * \retval 0   Success.
+ * \retval <0  The configuration cannot be performed.
+ */
+extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param);
+
+/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock.
+ *
+ * This function needs some parameters stored in a pcl_freq_param_t structure:
+ *  - cpu_f and pba_f and pbb_f are the wanted frequencies
+ *
+ * Supported main clock sources: PCL_MC_RC120M
+ *
+ * Supported synchronous clocks frequencies:
+ * 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
+ *
+ * \note: by default, this implementation doesn't perform thorough checks on the
+ *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+ *
+ * \note: since it is dynamically computing the appropriate field values of the
+ * configuration registers from the parameters structure, this function is not
+ * optimal in terms of code size. For a code size optimal solution, it is better
+ * to create a new function from pcl_configure_clocks_rc120m() and modify it to
+ * use preprocessor computation from pre-defined target frequencies.
+ *
+ * \param param    pointer on the configuration structure.
+ *
+ * \retval 0   Success.
+ * \retval <0  The configuration cannot be performed.
+ */
+extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param);
+
+/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock
+ *
+ * This function needs some parameters stored in a pcl_freq_param_t structure:
+ *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
+ *  - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
+ *  - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
+ *
+ * Supported main clock sources: PCL_MC_OSC0
+ *
+ * Supported synchronous clocks frequencies:
+ * (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
+ * 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
+ *
+ * \note: by default, this implementation doesn't perform thorough checks on the
+ *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+ *
+ * \note: since it is dynamically computing the appropriate field values of the
+ * configuration registers from the parameters structure, this function is not
+ * optimal in terms of code size. For a code size optimal solution, it is better
+ * to create a new function from pcl_configure_clocks_osc0() and modify it to use
+ * preprocessor computation from pre-defined target frequencies.
+ *
+ * \param param    pointer on the configuration structure.
+ *
+ * \retval 0   Success.
+ * \retval <0  The configuration cannot be performed.
+ */
+extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param);
+
+/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock
+ *
+ * This function needs some parameters stored in a pcl_freq_param_t structure:
+ *  - cpu_f and pba_f and pbb_f are the wanted frequencies,
+ *  - dfll_f is the target DFLL frequency to set-up
+ *
+ * \note: when the DFLL0 is to be used as main source clock for the synchronous clocks,
+ *  the target frequency of the DFLL should be chosen to be as high as possible
+ *  within the specification range (for stability reasons); the target cpu and pbx
+ *  frequencies will then be reached by appropriate division ratio.
+ *
+ * Supported main clock sources: PCL_MC_DFLL0
+ *
+ * Supported synchronous clocks frequencies:
+ * (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
+ * 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
+ *
+ * \note: by default, this implementation doesn't perform thorough checks on the
+ *        input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
+ *
+ * \note: since it is dynamically computing the appropriate field values of the
+ * configuration registers from the parameters structure, this function is not
+ * optimal in terms of code size. For a code size optimal solution, it is better
+ * to create a new function from pcl_configure_clocks_dfll0() and modify it to
+ * use preprocessor computation from pre-defined target frequencies.
+ *
+ * \param param    pointer on the configuration structure.
+ *
+ * \retval 0   Success.
+ * \retval <0  The configuration cannot be performed.
+ */
+extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param);
+
+/*! \brief Switch the main clock source to Osc0 configured in crystal mode
+ *
+ * \param osc The oscillator to enable and switch to.
+ * \param fcrystal Oscillator external crystal frequency (Hz)
+ * \param startup Oscillator startup time.
+ *
+ * \return Status.
+ *   \retval 0  Success.
+ *   \retval <0 An error occured.
+ */
+extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup);
+
+/*! \brief Enable the clock of a module.
+ *
+ * \param module The module to clock (use one of the defines in the part-specific
+ * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
+ * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
+ * or look in the module section).
+ *
+ * \return Status.
+ *   \retval 0  Success.
+ *   \retval <0 An error occured.
+ */
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Implementation for UC3A, UC3A3, UC3B parts.
+#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module)
+#else
+// Implementation for UC3C, UC3L parts.
+#define pcl_enable_module(module) pm_enable_module(module)
+#endif
+
+/*! \brief Disable the clock of a module.
+ *
+ * \param module The module to shut down (use one of the defines in the part-specific
+ * header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
+ * clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
+ * or look in the module section).
+ *
+ * \return Status.
+ *   \retval 0  Success.
+ *   \retval <0 An error occured.
+ */
+#ifndef AVR32_PM_VERSION_RESETVALUE
+// Implementation for UC3A, UC3A3, UC3B parts.
+#define pcl_disable_module(module)  pm_disable_module(&AVR32_PM, module)
+#else
+// Implementation for UC3C, UC3L parts.
+#define pcl_disable_module(module)  pm_disable_module(module)
+#endif
+
+/*! \brief Configure the USB Clock
+ *
+ *
+ * \return Status.
+ *   \retval 0  Success.
+ *   \retval <0 An error occured.
+ */
+extern long int pcl_configure_usb_clock(void);
+
+//! @}
+
+/*! \name Power Management
+ */
+//! @{
+/*!
+ * \brief Read the content of the GPLP registers
+ * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
+ *
+ * \return The content of the chosen GPLP register.
+ */
+extern unsigned long pcl_read_gplp(unsigned long gplp);
+
+
+/*!
+ * \brief Write into the GPLP registers
+ * \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
+ * \param value Value to write
+ */
+extern void pcl_write_gplp(unsigned long gplp, unsigned long value);
+
+//! @}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // _POWER_CLOCKS_LIB_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.c

@@ -1,914 +1,914 @@
-/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief USART driver for AVR32 UC3.
- *
- * This file contains basic functions for the AVR32 USART, with support for all
- * modes, settings and clock speeds.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a USART module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#include "compiler.h"
-#include "usart.h"
-
-
-//------------------------------------------------------------------------------
-/*! \name Private Functions
- */
-//! @{
-
-
-/*! \brief Checks if the USART is in multidrop mode.
- *
- * \param usart Base address of the USART instance.
- *
- * \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
-{
-  return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
-}
-
-
-/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for
- *         the USART asynchronous modes to generate a baud rate as close as
- *         possible to the baud rate set point.
- *
- * Baud rate calculation:
- * \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8.
- * The maximal oversampling is selected if it allows to generate a baud rate close to the set point.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate set point.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Baud rate successfully initialized.
- * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
- */
-static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
-{
-  unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8;
-  unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate);
-  unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE;
-  unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1);
-
-  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
-                             AVR32_USART_MR_SYNC_MASK |
-                             AVR32_USART_MR_OVER_MASK)) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
-              ((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET |
-                fp << AVR32_USART_BRGR_FP_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master
- *         modes to generate a baud rate as close as possible to the baud rate
- *         set point.
- *
- * Baud rate calculation:
- * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate set point.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Baud rate successfully initialized.
- * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
- */
-static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
-{
-  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
-
-  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
-              AVR32_USART_MR_SYNC_MASK;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Selects the SCK pin as the source of baud rate for the USART
- *         synchronous slave modes.
- *
- * \param usart Base address of the USART instance.
- *
- * \retval USART_SUCCESS  Baud rate successfully initialized.
- */
-static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart)
-{
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET |
-              AVR32_USART_MR_SYNC_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to
- *         generate an ISO7816 clock as close as possible to the clock set point.
- *
- * ISO7816 clock calculation:
- * \f$ Clock = \frac{SelectedClock}{CD} \f$.
- *
- * \param usart   Base address of the USART instance.
- * \param clock   ISO7816 clock set point.
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        ISO7816 clock successfully initialized.
- * \retval USART_INVALID_INPUT  ISO7816 clock set point is out of range for the given input clock frequency.
- */
-static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz)
-{
-  unsigned int cd = (pba_hz + clock / 2) / clock;
-
-  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
-                             AVR32_USART_MR_SYNC_MASK |
-                             AVR32_USART_MR_OVER_MASK)) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
-              AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-
-/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to
- *         generate a baud rate as close as possible to the baud rate set point.
- *
- * Baud rate calculation:
- * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate set point.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Baud rate successfully initialized.
- * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
- */
-static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
-{
-  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
-
-  if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
-    return USART_INVALID_INPUT;
-
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET;
-
-  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI
- *         slave mode.
- *
- * \param usart Base address of the USART instance.
- *
- * \retval USART_SUCCESS  Baud rate successfully initialized.
- */
-static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart)
-{
-  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
-              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-#endif  // USART rev. >= 4.0.0
-
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-/*! \name Initialization Functions
- */
-//! @{
-
-
-void usart_reset(volatile avr32_usart_t *usart)
-{
-  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
-
-  // Disable all USART interrupts.
-  // Interrupts needed should be set explicitly on every reset.
-  if (global_interrupt_enabled) Disable_global_interrupt();
-  usart->idr = 0xFFFFFFFF;
-  usart->csr;
-  if (global_interrupt_enabled) Enable_global_interrupt();
-
-  // Reset mode and other registers that could cause unpredictable behavior after reset.
-  usart->mr = 0;
-  usart->rtor = 0;
-  usart->ttgr = 0;
-
-  // Shutdown TX and RX (will be re-enabled when setup has successfully completed),
-  // reset status bits and turn off DTR and RTS.
-  usart->cr = AVR32_USART_CR_RSTRX_MASK   |
-              AVR32_USART_CR_RSTTX_MASK   |
-              AVR32_USART_CR_RSTSTA_MASK  |
-              AVR32_USART_CR_RSTIT_MASK   |
-              AVR32_USART_CR_RSTNACK_MASK |
-#ifndef AVR32_USART_440_H_INCLUDED
-// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440.
-              AVR32_USART_CR_DTRDIS_MASK  |
-#endif
-              AVR32_USART_CR_RTSDIS_MASK;
-}
-
-
-int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1, 1.5 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
-
-  // Setup complete; enable communication.
-  // Enable only output as input is not possible in synchronous mode without
-  // transferring clock.
-  usart->cr = AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set hardware handshaking mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set modem mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET |
-              AVR32_USART_MR_CLKO_MASK;
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->paritytype > 7 ||
-      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
-      opt->channelmode > 3 ||
-      usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
-
-  if (opt->stopbits > USART_2_STOPBITS)
-  {
-    // Set two stop bits
-    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
-    // and a timeguard period gives the rest.
-    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
-  }
-  else
-    // Insert 1 or 2 stop bits.
-    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
-
-  // Set normal mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set RS485 mode.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
-                    long pba_hz, unsigned char irda_filter)
-{
-  // First: Setup standard RS232.
-  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set IrDA filter.
-  usart->ifr = irda_filter;
-
-  // Set IrDA mode and activate filtering of input.
-  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
-              AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET |
-              AVR32_USART_MR_FILTER_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->paritytype > 1)
-    return USART_INVALID_INPUT;
-
-  if (t == 0)
-  {
-    // Set USART mode to ISO7816, T=0.
-    // The T=0 protocol always uses 2 stop bits.
-    usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET |
-                AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET |
-                opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0.
-  }
-  else if (t == 1)
-  {
-    // Only LSB first in the T=1 protocol.
-    // max_iterations field is only used in T=0 mode.
-    if (opt->bit_order != 0 ||
-        opt->max_iterations != 0)
-      return USART_INVALID_INPUT;
-
-    // Set USART mode to ISO7816, T=1.
-    // The T=1 protocol always uses 1 stop bit.
-    usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET |
-                AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET;
-  }
-  else
-    return USART_INVALID_INPUT;
-
-  if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
-  usart->fidi = opt->fidi_ratio;
-
-  // Set ISO7816 spesific options in the MODE register.
-  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
-               AVR32_USART_MR_CLKO_MASK | // Enable clock output.
-               opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET |
-               opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET |
-               opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET;
-
-  // Setup complete; enable the receiver by default.
-  usart_iso7816_enable_receiver(usart);
-
-  return USART_SUCCESS;
-}
-
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-
-int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET;  // LIN master mode.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->spimode > 3 ||
-      opt->channelmode > 3 ||
-      usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode.
-               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
-               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET |            // SPI clock polarity.
-               AVR32_USART_MR_CLKO_MASK;                                      // Drive SCK pin.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
-{
-  // Reset the USART and shutdown TX and RX.
-  usart_reset(usart);
-
-  // Check input values.
-  if (!opt || // Null pointer.
-      opt->charlength < 5 || opt->charlength > 9 ||
-      opt->spimode > 3 ||
-      opt->channelmode > 3 ||
-      usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT)
-    return USART_INVALID_INPUT;
-
-  if (opt->charlength == 9)
-  {
-    // Character length set to 9 bits. MODE9 dominates CHRL.
-    usart->mr |= AVR32_USART_MR_MODE9_MASK;
-  }
-  else
-  {
-    // CHRL gives the character length (- 5) when MODE9 = 0.
-    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
-  }
-
-  usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET |  // SPI slave mode.
-               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
-               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
-               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET;             // SPI clock polarity.
-
-  // Setup complete; enable communication.
-  // Enable input and output.
-  usart->cr = AVR32_USART_CR_RXEN_MASK |
-              AVR32_USART_CR_TXEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-#endif  // USART rev. >= 4.0.0
-
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-
-/*! \name SPI Control Functions
- */
-//! @{
-
-
-int usart_spi_selectChip(volatile avr32_usart_t *usart)
-{
-  // Force the SPI chip select.
-  usart->cr = AVR32_USART_CR_RTSEN_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-int usart_spi_unselectChip(volatile avr32_usart_t *usart)
-{
-  int timeout = USART_DEFAULT_TIMEOUT;
-
-  do
-  {
-    if (!timeout--) return USART_FAILURE;
-  } while (!usart_tx_empty(usart));
-
-  // Release the SPI chip select.
-  usart->cr = AVR32_USART_CR_RTSDIS_MASK;
-
-  return USART_SUCCESS;
-}
-
-
-//! @}
-
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-/*! \name Transmit/Receive Functions
- */
-//! @{
-
-
-int usart_send_address(volatile avr32_usart_t *usart, int address)
-{
-  // Check if USART is in multidrop / RS485 mode.
-  if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
-
-  // Prepare to send an address.
-  usart->cr = AVR32_USART_CR_SENDA_MASK;
-
-  // Write the address to TX.
-  usart_bw_write_char(usart, address);
-
-  return USART_SUCCESS;
-}
-
-
-int usart_write_char(volatile avr32_usart_t *usart, int c)
-{
-  if (usart_tx_ready(usart))
-  {
-    usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK;
-    return USART_SUCCESS;
-  }
-  else
-    return USART_TX_BUSY;
-}
-
-
-int usart_putchar(volatile avr32_usart_t *usart, int c)
-{
-  int timeout = USART_DEFAULT_TIMEOUT;
-
-  if (c == '\n')
-  {
-    do
-    {
-      if (!timeout--) return USART_FAILURE;
-    } while (usart_write_char(usart, '\r') != USART_SUCCESS);
-
-    timeout = USART_DEFAULT_TIMEOUT;
-  }
-
-  do
-  {
-    if (!timeout--) return USART_FAILURE;
-  } while (usart_write_char(usart, c) != USART_SUCCESS);
-
-  return USART_SUCCESS;
-}
-
-
-int usart_read_char(volatile avr32_usart_t *usart, int *c)
-{
-  // Check for errors: frame, parity and overrun. In RS485 mode, a parity error
-  // would mean that an address char has been received.
-  if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
-                    AVR32_USART_CSR_FRAME_MASK |
-                    AVR32_USART_CSR_PARE_MASK))
-    return USART_RX_ERROR;
-
-  // No error; if we really did receive a char, read it and return SUCCESS.
-  if (usart_test_hit(usart))
-  {
-    *c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET;
-    return USART_SUCCESS;
-  }
-  else
-    return USART_RX_EMPTY;
-}
-
-
-int usart_getchar(volatile avr32_usart_t *usart)
-{
-  int c, ret;
-
-  while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
-
-  if (ret == USART_RX_ERROR)
-    return USART_FAILURE;
-
-  return c;
-}
-
-
-void usart_write_line(volatile avr32_usart_t *usart, const char *string)
-{
-  while (*string != '\0')
-    usart_putchar(usart, *string++);
-}
-
-
-int usart_get_echo_line(volatile avr32_usart_t *usart)
-{
-  int rx_char;
-  int retval = USART_SUCCESS;
-
-  while (1)
-  {
-    rx_char = usart_getchar(usart);
-    if (rx_char == USART_FAILURE)
-    {
-      usart_write_line(usart, "Error!!!\n");
-      retval = USART_FAILURE;
-      break;
-    }
-    if (rx_char == '\x03')
-    {
-      retval = USART_FAILURE;
-      break;
-    }
-    usart_putchar(usart, rx_char);
-    if (rx_char == '\r')
-    {
-      usart_putchar(usart, '\n');
-      break;
-    }
-  }
-
-  return retval;
-}
-
-
-//! @}
+/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief USART driver for AVR32 UC3.
+ *
+ * This file contains basic functions for the AVR32 USART, with support for all
+ * modes, settings and clock speeds.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with a USART module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#include "compiler.h"
+#include "usart.h"
+
+
+//------------------------------------------------------------------------------
+/*! \name Private Functions
+ */
+//! @{
+
+
+/*! \brief Checks if the USART is in multidrop mode.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
+{
+  return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
+}
+
+
+/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for
+ *         the USART asynchronous modes to generate a baud rate as close as
+ *         possible to the baud rate set point.
+ *
+ * Baud rate calculation:
+ * \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8.
+ * The maximal oversampling is selected if it allows to generate a baud rate close to the set point.
+ *
+ * \param usart     Base address of the USART instance.
+ * \param baudrate  Baud rate set point.
+ * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Baud rate successfully initialized.
+ * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
+ */
+static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
+{
+  unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8;
+  unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate);
+  unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE;
+  unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1);
+
+  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
+    return USART_INVALID_INPUT;
+
+  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
+                             AVR32_USART_MR_SYNC_MASK |
+                             AVR32_USART_MR_OVER_MASK)) |
+              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
+              ((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET;
+
+  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET |
+                fp << AVR32_USART_BRGR_FP_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master
+ *         modes to generate a baud rate as close as possible to the baud rate
+ *         set point.
+ *
+ * Baud rate calculation:
+ * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
+ *
+ * \param usart     Base address of the USART instance.
+ * \param baudrate  Baud rate set point.
+ * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Baud rate successfully initialized.
+ * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
+ */
+static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
+{
+  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
+
+  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
+    return USART_INVALID_INPUT;
+
+  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
+              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
+              AVR32_USART_MR_SYNC_MASK;
+
+  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+/*! \brief Selects the SCK pin as the source of baud rate for the USART
+ *         synchronous slave modes.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \retval USART_SUCCESS  Baud rate successfully initialized.
+ */
+static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart)
+{
+  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
+              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET |
+              AVR32_USART_MR_SYNC_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to
+ *         generate an ISO7816 clock as close as possible to the clock set point.
+ *
+ * ISO7816 clock calculation:
+ * \f$ Clock = \frac{SelectedClock}{CD} \f$.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param clock   ISO7816 clock set point.
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        ISO7816 clock successfully initialized.
+ * \retval USART_INVALID_INPUT  ISO7816 clock set point is out of range for the given input clock frequency.
+ */
+static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz)
+{
+  unsigned int cd = (pba_hz + clock / 2) / clock;
+
+  if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
+    return USART_INVALID_INPUT;
+
+  usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
+                             AVR32_USART_MR_SYNC_MASK |
+                             AVR32_USART_MR_OVER_MASK)) |
+              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
+              AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET;
+
+  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+
+/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to
+ *         generate a baud rate as close as possible to the baud rate set point.
+ *
+ * Baud rate calculation:
+ * \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
+ *
+ * \param usart     Base address of the USART instance.
+ * \param baudrate  Baud rate set point.
+ * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Baud rate successfully initialized.
+ * \retval USART_INVALID_INPUT  Baud rate set point is out of range for the given input clock frequency.
+ */
+static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
+{
+  unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
+
+  if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
+    return USART_INVALID_INPUT;
+
+  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
+              AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET;
+
+  usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI
+ *         slave mode.
+ *
+ * \param usart Base address of the USART instance.
+ *
+ * \retval USART_SUCCESS  Baud rate successfully initialized.
+ */
+static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart)
+{
+  usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
+              AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+#endif  // USART rev. >= 4.0.0
+
+
+//! @}
+
+
+//------------------------------------------------------------------------------
+/*! \name Initialization Functions
+ */
+//! @{
+
+
+void usart_reset(volatile avr32_usart_t *usart)
+{
+  Bool global_interrupt_enabled = Is_global_interrupt_enabled();
+
+  // Disable all USART interrupts.
+  // Interrupts needed should be set explicitly on every reset.
+  if (global_interrupt_enabled) Disable_global_interrupt();
+  usart->idr = 0xFFFFFFFF;
+  usart->csr;
+  if (global_interrupt_enabled) Enable_global_interrupt();
+
+  // Reset mode and other registers that could cause unpredictable behavior after reset.
+  usart->mr = 0;
+  usart->rtor = 0;
+  usart->ttgr = 0;
+
+  // Shutdown TX and RX (will be re-enabled when setup has successfully completed),
+  // reset status bits and turn off DTR and RTS.
+  usart->cr = AVR32_USART_CR_RSTRX_MASK   |
+              AVR32_USART_CR_RSTTX_MASK   |
+              AVR32_USART_CR_RSTSTA_MASK  |
+              AVR32_USART_CR_RSTIT_MASK   |
+              AVR32_USART_CR_RSTNACK_MASK |
+#ifndef AVR32_USART_440_H_INCLUDED
+// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440.
+              AVR32_USART_CR_DTRDIS_MASK  |
+#endif
+              AVR32_USART_CR_RTSDIS_MASK;
+}
+
+
+int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (!opt || // Null pointer.
+      opt->charlength < 5 || opt->charlength > 9 ||
+      opt->paritytype > 7 ||
+      opt->stopbits > 2 + 255 ||
+      opt->channelmode > 3 ||
+      usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  if (opt->charlength == 9)
+  {
+    // Character length set to 9 bits. MODE9 dominates CHRL.
+    usart->mr |= AVR32_USART_MR_MODE9_MASK;
+  }
+  else
+  {
+    // CHRL gives the character length (- 5) when MODE9 = 0.
+    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
+  }
+
+  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
+               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
+
+  if (opt->stopbits > USART_2_STOPBITS)
+  {
+    // Set two stop bits
+    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
+    // and a timeguard period gives the rest.
+    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
+  }
+  else
+    // Insert 1, 1.5 or 2 stop bits.
+    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
+
+  // Set normal mode.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
+
+  // Setup complete; enable communication.
+  // Enable input and output.
+  usart->cr = AVR32_USART_CR_RXEN_MASK |
+              AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (!opt || // Null pointer.
+      opt->charlength < 5 || opt->charlength > 9 ||
+      opt->paritytype > 7 ||
+      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
+      opt->channelmode > 3 ||
+      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  if (opt->charlength == 9)
+  {
+    // Character length set to 9 bits. MODE9 dominates CHRL.
+    usart->mr |= AVR32_USART_MR_MODE9_MASK;
+  }
+  else
+  {
+    // CHRL gives the character length (- 5) when MODE9 = 0.
+    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
+  }
+
+  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
+               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
+
+  if (opt->stopbits > USART_2_STOPBITS)
+  {
+    // Set two stop bits
+    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
+    // and a timeguard period gives the rest.
+    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
+  }
+  else
+    // Insert 1 or 2 stop bits.
+    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
+
+  // Set normal mode.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
+
+  // Setup complete; enable communication.
+  // Enable only output as input is not possible in synchronous mode without
+  // transferring clock.
+  usart->cr = AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+  // First: Setup standard RS232.
+  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  // Set hardware handshaking mode.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+  // First: Setup standard RS232.
+  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  // Set modem mode.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (!opt || // Null pointer.
+      opt->charlength < 5 || opt->charlength > 9 ||
+      opt->paritytype > 7 ||
+      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
+      opt->channelmode > 3 ||
+      usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  if (opt->charlength == 9)
+  {
+    // Character length set to 9 bits. MODE9 dominates CHRL.
+    usart->mr |= AVR32_USART_MR_MODE9_MASK;
+  }
+  else
+  {
+    // CHRL gives the character length (- 5) when MODE9 = 0.
+    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
+  }
+
+  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
+               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
+
+  if (opt->stopbits > USART_2_STOPBITS)
+  {
+    // Set two stop bits
+    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
+    // and a timeguard period gives the rest.
+    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
+  }
+  else
+    // Insert 1 or 2 stop bits.
+    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
+
+  // Set normal mode.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET |
+              AVR32_USART_MR_CLKO_MASK;
+
+  // Setup complete; enable communication.
+  // Enable input and output.
+  usart->cr = AVR32_USART_CR_RXEN_MASK |
+              AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (!opt || // Null pointer.
+      opt->charlength < 5 || opt->charlength > 9 ||
+      opt->paritytype > 7 ||
+      opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
+      opt->channelmode > 3 ||
+      usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  if (opt->charlength == 9)
+  {
+    // Character length set to 9 bits. MODE9 dominates CHRL.
+    usart->mr |= AVR32_USART_MR_MODE9_MASK;
+  }
+  else
+  {
+    // CHRL gives the character length (- 5) when MODE9 = 0.
+    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
+  }
+
+  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
+               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
+
+  if (opt->stopbits > USART_2_STOPBITS)
+  {
+    // Set two stop bits
+    usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
+    // and a timeguard period gives the rest.
+    usart->ttgr = opt->stopbits - USART_2_STOPBITS;
+  }
+  else
+    // Insert 1 or 2 stop bits.
+    usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
+
+  // Set normal mode.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
+
+  // Setup complete; enable communication.
+  // Enable input and output.
+  usart->cr = AVR32_USART_CR_RXEN_MASK |
+              AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
+{
+  // First: Setup standard RS232.
+  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  // Set RS485 mode.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
+                    long pba_hz, unsigned char irda_filter)
+{
+  // First: Setup standard RS232.
+  if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  // Set IrDA filter.
+  usart->ifr = irda_filter;
+
+  // Set IrDA mode and activate filtering of input.
+  usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
+              AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET |
+              AVR32_USART_MR_FILTER_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (!opt || // Null pointer.
+      opt->paritytype > 1)
+    return USART_INVALID_INPUT;
+
+  if (t == 0)
+  {
+    // Set USART mode to ISO7816, T=0.
+    // The T=0 protocol always uses 2 stop bits.
+    usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET |
+                AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET |
+                opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0.
+  }
+  else if (t == 1)
+  {
+    // Only LSB first in the T=1 protocol.
+    // max_iterations field is only used in T=0 mode.
+    if (opt->bit_order != 0 ||
+        opt->max_iterations != 0)
+      return USART_INVALID_INPUT;
+
+    // Set USART mode to ISO7816, T=1.
+    // The T=1 protocol always uses 1 stop bit.
+    usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET |
+                AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET;
+  }
+  else
+    return USART_INVALID_INPUT;
+
+  if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  // Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
+  usart->fidi = opt->fidi_ratio;
+
+  // Set ISO7816 spesific options in the MODE register.
+  usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
+               AVR32_USART_MR_CLKO_MASK | // Enable clock output.
+               opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET |
+               opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET |
+               opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET;
+
+  // Setup complete; enable the receiver by default.
+  usart_iso7816_enable_receiver(usart);
+
+  return USART_SUCCESS;
+}
+
+
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+
+int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET;  // LIN master mode.
+
+  // Setup complete; enable communication.
+  // Enable input and output.
+  usart->cr = AVR32_USART_CR_RXEN_MASK |
+              AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode.
+
+  // Setup complete; enable communication.
+  // Enable input and output.
+  usart->cr = AVR32_USART_CR_RXEN_MASK |
+              AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (!opt || // Null pointer.
+      opt->charlength < 5 || opt->charlength > 9 ||
+      opt->spimode > 3 ||
+      opt->channelmode > 3 ||
+      usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  if (opt->charlength == 9)
+  {
+    // Character length set to 9 bits. MODE9 dominates CHRL.
+    usart->mr |= AVR32_USART_MR_MODE9_MASK;
+  }
+  else
+  {
+    // CHRL gives the character length (- 5) when MODE9 = 0.
+    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
+  }
+
+  usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode.
+               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
+               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
+               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET |            // SPI clock polarity.
+               AVR32_USART_MR_CLKO_MASK;                                      // Drive SCK pin.
+
+  // Setup complete; enable communication.
+  // Enable input and output.
+  usart->cr = AVR32_USART_CR_RXEN_MASK |
+              AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
+{
+  // Reset the USART and shutdown TX and RX.
+  usart_reset(usart);
+
+  // Check input values.
+  if (!opt || // Null pointer.
+      opt->charlength < 5 || opt->charlength > 9 ||
+      opt->spimode > 3 ||
+      opt->channelmode > 3 ||
+      usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT)
+    return USART_INVALID_INPUT;
+
+  if (opt->charlength == 9)
+  {
+    // Character length set to 9 bits. MODE9 dominates CHRL.
+    usart->mr |= AVR32_USART_MR_MODE9_MASK;
+  }
+  else
+  {
+    // CHRL gives the character length (- 5) when MODE9 = 0.
+    usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
+  }
+
+  usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET |  // SPI slave mode.
+               ((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET |   // SPI clock phase.
+               opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET |             // Channel mode.
+               (opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET;             // SPI clock polarity.
+
+  // Setup complete; enable communication.
+  // Enable input and output.
+  usart->cr = AVR32_USART_CR_RXEN_MASK |
+              AVR32_USART_CR_TXEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+#endif  // USART rev. >= 4.0.0
+
+
+//! @}
+
+
+//------------------------------------------------------------------------------
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+
+/*! \name SPI Control Functions
+ */
+//! @{
+
+
+int usart_spi_selectChip(volatile avr32_usart_t *usart)
+{
+  // Force the SPI chip select.
+  usart->cr = AVR32_USART_CR_RTSEN_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+int usart_spi_unselectChip(volatile avr32_usart_t *usart)
+{
+  int timeout = USART_DEFAULT_TIMEOUT;
+
+  do
+  {
+    if (!timeout--) return USART_FAILURE;
+  } while (!usart_tx_empty(usart));
+
+  // Release the SPI chip select.
+  usart->cr = AVR32_USART_CR_RTSDIS_MASK;
+
+  return USART_SUCCESS;
+}
+
+
+//! @}
+
+
+#endif  // USART rev. >= 4.0.0
+
+
+//------------------------------------------------------------------------------
+/*! \name Transmit/Receive Functions
+ */
+//! @{
+
+
+int usart_send_address(volatile avr32_usart_t *usart, int address)
+{
+  // Check if USART is in multidrop / RS485 mode.
+  if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
+
+  // Prepare to send an address.
+  usart->cr = AVR32_USART_CR_SENDA_MASK;
+
+  // Write the address to TX.
+  usart_bw_write_char(usart, address);
+
+  return USART_SUCCESS;
+}
+
+
+int usart_write_char(volatile avr32_usart_t *usart, int c)
+{
+  if (usart_tx_ready(usart))
+  {
+    usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK;
+    return USART_SUCCESS;
+  }
+  else
+    return USART_TX_BUSY;
+}
+
+
+int usart_putchar(volatile avr32_usart_t *usart, int c)
+{
+  int timeout = USART_DEFAULT_TIMEOUT;
+
+  if (c == '\n')
+  {
+    do
+    {
+      if (!timeout--) return USART_FAILURE;
+    } while (usart_write_char(usart, '\r') != USART_SUCCESS);
+
+    timeout = USART_DEFAULT_TIMEOUT;
+  }
+
+  do
+  {
+    if (!timeout--) return USART_FAILURE;
+  } while (usart_write_char(usart, c) != USART_SUCCESS);
+
+  return USART_SUCCESS;
+}
+
+
+int usart_read_char(volatile avr32_usart_t *usart, int *c)
+{
+  // Check for errors: frame, parity and overrun. In RS485 mode, a parity error
+  // would mean that an address char has been received.
+  if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
+                    AVR32_USART_CSR_FRAME_MASK |
+                    AVR32_USART_CSR_PARE_MASK))
+    return USART_RX_ERROR;
+
+  // No error; if we really did receive a char, read it and return SUCCESS.
+  if (usart_test_hit(usart))
+  {
+    *c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET;
+    return USART_SUCCESS;
+  }
+  else
+    return USART_RX_EMPTY;
+}
+
+
+int usart_getchar(volatile avr32_usart_t *usart)
+{
+  int c, ret;
+
+  while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
+
+  if (ret == USART_RX_ERROR)
+    return USART_FAILURE;
+
+  return c;
+}
+
+
+void usart_write_line(volatile avr32_usart_t *usart, const char *string)
+{
+  while (*string != '\0')
+    usart_putchar(usart, *string++);
+}
+
+
+int usart_get_echo_line(volatile avr32_usart_t *usart)
+{
+  int rx_char;
+  int retval = USART_SUCCESS;
+
+  while (1)
+  {
+    rx_char = usart_getchar(usart);
+    if (rx_char == USART_FAILURE)
+    {
+      usart_write_line(usart, "Error!!!\n");
+      retval = USART_FAILURE;
+      break;
+    }
+    if (rx_char == '\x03')
+    {
+      retval = USART_FAILURE;
+      break;
+    }
+    usart_putchar(usart, rx_char);
+    if (rx_char == '\r')
+    {
+      usart_putchar(usart, '\n');
+      break;
+    }
+  }
+
+  return retval;
+}
+
+
+//! @}

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/DRIVERS/USART/usart.h

@@ -1,889 +1,889 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief USART driver for AVR32 UC3.
- *
- * This file contains basic functions for the AVR32 USART, with support for all
- * modes, settings and clock speeds.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices with a USART module can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _USART_H_
-#define _USART_H_
-
-#include <avr32/io.h>
-#include "compiler.h"
-
-
-/*! \name Return Values
- */
-//! @{
-#define USART_SUCCESS                 0 //!< Successful completion.
-#define USART_FAILURE                -1 //!< Failure because of some unspecified reason.
-#define USART_INVALID_INPUT           1 //!< Input value out of range.
-#define USART_INVALID_ARGUMENT       -1 //!< Argument value out of range.
-#define USART_TX_BUSY                 2 //!< Transmitter was busy.
-#define USART_RX_EMPTY                3 //!< Nothing was received.
-#define USART_RX_ERROR                4 //!< Transmission error occurred.
-#define USART_MODE_FAULT              5 //!< USART not in the appropriate mode.
-//! @}
-
-//! Default time-out value (number of attempts).
-#define USART_DEFAULT_TIMEOUT         10000
-
-/*! \name Parity Settings
- */
-//! @{
-#define USART_EVEN_PARITY             AVR32_USART_MR_PAR_EVEN   //!< Use even parity on character transmission.
-#define USART_ODD_PARITY              AVR32_USART_MR_PAR_ODD    //!< Use odd parity on character transmission.
-#define USART_SPACE_PARITY            AVR32_USART_MR_PAR_SPACE  //!< Use a space as parity bit.
-#define USART_MARK_PARITY             AVR32_USART_MR_PAR_MARK   //!< Use a mark as parity bit.
-#define USART_NO_PARITY               AVR32_USART_MR_PAR_NONE   //!< Don't use a parity bit.
-#define USART_MULTIDROP_PARITY        AVR32_USART_MR_PAR_MULTI  //!< Parity bit is used to flag address characters.
-//! @}
-
-/*! \name Stop Bits Settings
- */
-//! @{
-#define USART_1_STOPBIT               AVR32_USART_MR_NBSTOP_1   //!< Use 1 stop bit.
-#define USART_1_5_STOPBITS            AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.
-#define USART_2_STOPBITS              AVR32_USART_MR_NBSTOP_2   //!< Use 2 stop bits (for more, just give the number of bits).
-//! @}
-
-/*! \name Channel Modes
- */
-//! @{
-#define USART_NORMAL_CHMODE           AVR32_USART_MR_CHMODE_NORMAL      //!< Normal communication.
-#define USART_AUTO_ECHO               AVR32_USART_MR_CHMODE_ECHO        //!< Echo data.
-#define USART_LOCAL_LOOPBACK          AVR32_USART_MR_CHMODE_LOCAL_LOOP  //!< Local loopback.
-#define USART_REMOTE_LOOPBACK         AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.
-//! @}
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \name LIN Node Actions
- */
-//! @{
-#define USART_LIN_PUBLISH_ACTION      AVR32_USART_LINMR_NACT_PUBLISH    //!< The USART transmits the response.
-#define USART_LIN_SUBSCRIBE_ACTION    AVR32_USART_LINMR_NACT_SUBSCRIBE  //!< The USART receives the response.
-#define USART_LIN_IGNORE_ACTION       AVR32_USART_LINMR_NACT_IGNORE     //!< The USART does not transmit and does not receive the reponse.
-//! @}
-
-/*! \name LIN Checksum Types
- */
-//! @{
-#define USART_LIN_ENHANCED_CHECKSUM   0 //!< LIN 2.0 "enhanced" checksum.
-#define USART_LIN_CLASSIC_CHECKSUM    1 //!< LIN 1.3 "classic" checksum.
-//! @}
-
-#endif  // USART rev. >= 4.0.0
-
-
-//! Input parameters when initializing RS232 and similar modes.
-typedef struct
-{
-  //! Set baud rate of the USART (unused in slave modes).
-  unsigned long baudrate;
-
-  //! Number of bits to transmit as a character (5 to 9).
-  unsigned char charlength;
-
-  //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,
-  //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or
-  //! \ref USART_MULTIDROP_PARITY.
-  unsigned char paritytype;
-
-  //! Number of stop bits between two characters: \ref USART_1_STOPBIT,
-  //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257
-  //! which will result in a time guard period of that length between characters.
-  //! \note \ref USART_1_5_STOPBITS is supported in asynchronous modes only.
-  unsigned short stopbits;
-
-  //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
-  //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
-  unsigned char channelmode;
-} usart_options_t;
-
-//! Input parameters when initializing ISO7816 mode.
-typedef struct
-{
-  //! Set the frequency of the ISO7816 clock.
-  unsigned long iso7816_hz;
-
-  //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).
-  //! Bit rate = \ref iso7816_hz / \ref fidi_ratio.
-  unsigned short fidi_ratio;
-
-  //! How to calculate the parity bit: \ref USART_EVEN_PARITY for normal mode or
-  //! \ref USART_ODD_PARITY for inverse mode.
-  unsigned char paritytype;
-
-  //! Inhibit Non Acknowledge:\n
-  //!   - 0: the NACK is generated;\n
-  //!   - 1: the NACK is not generated.
-  //!
-  //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.
-  int inhibit_nack;
-
-  //! Disable successive NACKs.
-  //! Successive parity errors are counted up to the value in the \ref max_iterations field.
-  //! These parity errors generate a NACK on the ISO line. As soon as this value is reached,
-  //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.
-  int dis_suc_nack;
-
-  //! Max number of repetitions (0 to 7).
-  unsigned char max_iterations;
-
-  //! Bit order in transmitted characters:\n
-  //!   - 0: LSB first;\n
-  //!   - 1: MSB first.
-  int bit_order;
-} usart_iso7816_options_t;
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-//! Input parameters when initializing SPI mode.
-typedef struct
-{
-  //! Set the frequency of the SPI clock (unused in slave mode).
-  unsigned long baudrate;
-
-  //! Number of bits to transmit as a character (5 to 9).
-  unsigned char charlength;
-
-  //! Which SPI mode to use.
-  unsigned char spimode;
-
-  //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
-  //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
-  unsigned char channelmode;
-} usart_spi_options_t;
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-/*! \name Initialization Functions
- */
-//! @{
-
-/*! \brief Resets the USART and disables TX and RX.
- *
- * \param usart   Base address of the USART instance.
- */
-extern void usart_reset(volatile avr32_usart_t *usart);
-
-/*! \brief Sets up the USART to use the standard RS232 protocol.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode.
- *
- * Compared to \ref usart_init_rs232, this function allows very high baud rates
- * (up to \a pba_hz instead of \a pba_hz / \c 8) at the expense of full duplex.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- *
- * \note The \c 1.5 stop bit is not supported in this mode.
- */
-extern int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use hardware handshaking.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- *
- * \note \ref usart_init_rs232 does not need to be invoked before this function.
- */
-extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use a synchronous RS232-like protocol in master mode.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use a synchronous RS232-like protocol in slave mode.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the RS485 protocol.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the IrDA protocol.
- *
- * \param usart         Base address of the USART instance.
- * \param opt           Options needed to set up RS232 communication (see \ref usart_options_t).
- * \param pba_hz        USART module input clock frequency (PBA clock, Hz).
- * \param irda_filter   Counter used to distinguish received ones from zeros.
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
-                           long pba_hz, unsigned char irda_filter);
-
-/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.
- *
- * The receiver is enabled by default. \ref usart_iso7816_enable_receiver and
- * \ref usart_iso7816_enable_transmitter can be called to change the half-duplex
- * communication direction.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up ISO7816 communication (see \ref usart_iso7816_options_t).
- * \param t       ISO7816 mode to use (T=0 or T=1).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz);
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \brief Sets up the USART to use the LIN master mode.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- */
-extern int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
-
-/*! \brief Sets up the USART to use the LIN slave mode.
- *
- * \param usart     Base address of the USART instance.
- * \param baudrate  Baud rate.
- * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
- *
- */
-extern int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
-
-/*! \brief Sets up the USART to use the SPI master mode.
- *
- * \ref usart_spi_selectChip and \ref usart_spi_unselectChip can be called to
- * select or unselect the SPI slave chip.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up SPI mode (see \ref usart_spi_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
-
-/*! \brief Sets up the USART to use the SPI slave mode.
- *
- * \param usart   Base address of the USART instance.
- * \param opt     Options needed to set up SPI mode (see \ref usart_spi_options_t).
- * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
- *
- * \retval USART_SUCCESS        Mode successfully initialized.
- * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
- */
-extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
-
-#endif  // USART rev. >= 4.0.0
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-/*! \name Read and Reset Error Status Bits
- */
-//! @{
-
-/*! \brief Resets the error status.
- *
- * This function resets the status bits indicating that a parity error,
- * framing error or overrun has occurred. The RXBRK bit, indicating
- * a start/end of break condition on the RX line, is also reset.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_CR_RSTSTA_MASK;
-}
-
-/*! \brief Checks if a parity error has occurred since last status reset.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a parity error has been detected, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;
-}
-
-/*! \brief Checks if a framing error has occurred since last status reset.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a framing error has been detected, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;
-}
-
-/*! \brief Checks if an overrun error has occurred since last status reset.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a overrun error has been detected, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;
-}
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \brief Get LIN Error Status
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval The binary value of the error field.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_lin_get_error(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & (AVR32_USART_CSR_LINSNRE_MASK |
-                        AVR32_USART_CSR_LINCE_MASK |
-                        AVR32_USART_CSR_LINIPE_MASK |
-                        AVR32_USART_CSR_LINISFE_MASK |
-                        AVR32_USART_CSR_LINBE_MASK)) >> AVR32_USART_CSR_LINBE_OFFSET;
-}
-
-#endif  // USART rev. >= 4.0.0
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-/*! \name ISO7816 Control Functions
- */
-//! @{
-
-/*! \brief Enables the ISO7816 receiver.
- *
- * The ISO7816 transmitter is disabled.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_iso7816_enable_receiver(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_CR_TXDIS_MASK | AVR32_USART_CR_RXEN_MASK;
-}
-
-/*! \brief Enables the ISO7816 transmitter.
- *
- * The ISO7816 receiver is disabled.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_iso7816_enable_transmitter(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXEN_MASK;
-}
-
-//! @}
-
-
-//------------------------------------------------------------------------------
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \name LIN Control Functions
- */
-//! @{
-
-/*! \brief Sets the node action.
- *
- * \param usart   Base address of the USART instance.
- * \param action  The node action: \ref USART_LIN_PUBLISH_ACTION,
- *                \ref USART_LIN_SUBSCRIBE_ACTION or
- *                \ref USART_LIN_IGNORE_ACTION.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_node_action(volatile avr32_usart_t *usart, unsigned char action)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_NACT_MASK) |
-                 action << AVR32_USART_LINMR_NACT_OFFSET;
-}
-
-/*! \brief Enables or disables the Identifier parity.
- *
- * \param usart   Base address of the USART instance.
- * \param parity  Whether to enable the Identifier parity: \c TRUE or \c FALSE.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_enable_parity(volatile avr32_usart_t *usart, unsigned char parity)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_PARDIS_MASK) |
-                 !parity << AVR32_USART_LINMR_PARDIS_OFFSET;
-}
-
-/*! \brief Enables or disables the checksum.
- *
- * \param usart   Base address of the USART instance.
- * \param parity  Whether to enable the checksum: \c TRUE or \c FALSE.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_enable_checksum(volatile avr32_usart_t *usart, unsigned char checksum)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKDIS_MASK) |
-                 !checksum << AVR32_USART_LINMR_CHKDIS_OFFSET;
-}
-
-/*! \brief Sets the checksum type.
- *
- * \param usart   Base address of the USART instance.
- * \param chktyp  The checksum type: \ref USART_LIN_ENHANCED_CHEKSUM or
- *                \ref USART_LIN_CLASSIC_CHECKSUM.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_checksum(volatile avr32_usart_t *usart, unsigned char chktyp)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKTYP_MASK) |
-                 chktyp << AVR32_USART_LINMR_CHKTYP_OFFSET;
-}
-
-/*! \brief Gets the response data length.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return The response data length.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned char usart_lin_get_data_length(volatile avr32_usart_t *usart)
-{
-  if (usart->linmr & AVR32_USART_LINMR_DLM_MASK)
-  {
-    unsigned char data_length = 1 << ((usart->linir >> (AVR32_USART_LINIR_IDCHR_OFFSET + 4)) & 0x03);
-    if (data_length == 1)
-      data_length = 2;
-    return data_length;
-  }
-  else
-    return ((usart->linmr & AVR32_USART_LINMR_DLC_MASK) >> AVR32_USART_LINMR_DLC_OFFSET) + 1;
-}
-
-/*! \brief Sets the response data length for LIN 1.x.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_data_length_lin1x(volatile avr32_usart_t *usart)
-{
-  usart->linmr |= AVR32_USART_LINMR_DLM_MASK;
-}
-
-/*! \brief Sets the response data length for LIN 2.x.
- *
- * \param usart         Base address of the USART instance.
- * \param data_length   The response data length.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_data_length_lin2x(volatile avr32_usart_t *usart, unsigned char data_length)
-{
-  usart->linmr = (usart->linmr & ~(AVR32_USART_LINMR_DLC_MASK |
-                                   AVR32_USART_LINMR_DLM_MASK)) |
-                 (data_length - 1) << AVR32_USART_LINMR_DLC_OFFSET;
-}
-
-/*! \brief Enables or disables the frame slot mode.
- *
- * \param usart       Base address of the USART instance.
- * \param frameslot   Whether to enable the frame slot mode: \c TRUE or
- *                    \c FALSE.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_enable_frameslot(volatile avr32_usart_t *usart, unsigned char frameslot)
-{
-  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_FSDIS_MASK) |
-                 !frameslot << AVR32_USART_LINMR_FSDIS_OFFSET;
-}
-
-/*! \brief Gets the Identifier character.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return The Identifier character.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ unsigned char usart_lin_get_id_char(volatile avr32_usart_t *usart)
-{
-  return (usart->linir & AVR32_USART_LINIR_IDCHR_MASK) >> AVR32_USART_LINIR_IDCHR_OFFSET;
-}
-
-/*! \brief Sets the Identifier character.
- *
- * \param usart     Base address of the USART instance.
- * \param id_char   The Identifier character.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_set_id_char(volatile avr32_usart_t *usart, unsigned char id_char)
-{
-  usart->linir = (usart->linir & ~AVR32_USART_LINIR_IDCHR_MASK) |
-                 id_char << AVR32_USART_LINIR_IDCHR_OFFSET;
-}
-
-//! @}
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \name SPI Control Functions
- */
-//! @{
-
-/*! \brief Selects SPI slave chip.
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval USART_SUCCESS        Success.
- */
-extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
-
-/*! \brief Unselects SPI slave chip.
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval USART_SUCCESS        Success.
- * \retval USART_FAILURE        Time-out.
- */
-extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
-
-//! @}
-
-#endif  // USART rev. >= 4.0.0
-
-
-//------------------------------------------------------------------------------
-/*! \name Transmit/Receive Functions
- */
-//! @{
-
-/*! \brief Addresses a receiver.
- *
- * While in RS485 mode, receivers only accept data addressed to them.
- * A packet/char with the address tag set has to precede any data.
- * This function is used to address a receiver. This receiver should read
- * all the following data, until an address packet addresses another receiver.
- *
- * \param usart     Base address of the USART instance.
- * \param address   Address of the target device.
- *
- * \retval USART_SUCCESS    Address successfully sent (if current mode is RS485).
- * \retval USART_MODE_FAULT Wrong operating mode.
- */
-extern int usart_send_address(volatile avr32_usart_t *usart, int address);
-
-/*! \brief Tests if the USART is ready to transmit a character.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if the USART Transmit Holding Register is free, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_tx_ready(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_TXRDY_MASK) != 0;
-}
-
-/*! \brief Writes the given character to the TX buffer if the transmitter is ready.
- *
- * \param usart   Base address of the USART instance.
- * \param c       The character (up to 9 bits) to transmit.
- *
- * \retval USART_SUCCESS  The transmitter was ready.
- * \retval USART_TX_BUSY  The transmitter was busy.
- */
-extern int usart_write_char(volatile avr32_usart_t *usart, int c);
-
-/*! \brief An active wait writing a character to the USART.
- *
- * \param usart   Base address of the USART instance.
- * \param c       The character (up to 9 bits) to transmit.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)
-{
-  while (usart_write_char(usart, c) != USART_SUCCESS);
-}
-
-/*! \brief Sends a character with the USART.
- *
- * \param usart   Base address of the USART instance.
- * \param c       Character to write.
- *
- * \retval USART_SUCCESS  The character was written.
- * \retval USART_FAILURE  The function timed out before the USART transmitter became ready to send.
- */
-extern int usart_putchar(volatile avr32_usart_t *usart, int c);
-
-/*! \brief Tests if all requested USART transmissions are over.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if the USART Transmit Shift Register and the USART Transmit
- *         Holding Register are free, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_tx_empty(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_TXEMPTY_MASK) != 0;
-}
-
-/*! \brief Tests if the USART contains a received character.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if the USART Receive Holding Register is full, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_test_hit(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_RXRDY_MASK) != 0;
-}
-
-/*! \brief Checks the RX buffer for a received character, and stores it at the
- *         given memory location.
- *
- * \param usart   Base address of the USART instance.
- * \param c       Pointer to the where the read character should be stored
- *                (must be at least short in order to accept 9-bit characters).
- *
- * \retval USART_SUCCESS  The character was read successfully.
- * \retval USART_RX_EMPTY The RX buffer was empty.
- * \retval USART_RX_ERROR An error was deteceted.
- */
-extern int usart_read_char(volatile avr32_usart_t *usart, int *c);
-
-/*! \brief Waits until a character is received, and returns it.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return The received character, or \ref USART_FAILURE upon error.
- */
-extern int usart_getchar(volatile avr32_usart_t *usart);
-
-/*! \brief Writes one character string to the USART.
- *
- * \param usart   Base address of the USART instance.
- * \param string  String to be written.
- */
-extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);
-
-/*! \brief Gets and echoes characters until end of line.
- *
- * \param usart   Base address of the USART instance.
- *
- * \retval USART_SUCCESS  Success.
- * \retval USART_FAILURE  Low-level error detected or ETX character received.
- */
-extern int usart_get_echo_line(volatile avr32_usart_t *usart);
-
-#if defined(AVR32_USART_400_H_INCLUDED) || \
-    defined(AVR32_USART_410_H_INCLUDED) || \
-    defined(AVR32_USART_420_H_INCLUDED) || \
-    defined(AVR32_USART_440_H_INCLUDED) || \
-    defined(AVR32_USART_602_H_INCLUDED)
-
-/*! \brief Abort LIN transmission.
- *
- * \param usart   Base address of the USART instance.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ void usart_lin_abort(volatile avr32_usart_t *usart)
-{
-  usart->cr = AVR32_USART_LINABT_MASK;
-}
-
-/*! \brief Tests if a LIN transfer has been completed.
- *
- * \param usart   Base address of the USART instance.
- *
- * \return \c 1 if a LIN transfer has been completed, otherwise \c 0.
- */
-#if (defined __GNUC__)
-__attribute__((__always_inline__))
-#endif
-extern __inline__ int usart_lin_transfer_completed(volatile avr32_usart_t *usart)
-{
-  return (usart->csr & AVR32_USART_CSR_LINTC_MASK) != 0;
-}
-
-#endif  // USART rev. >= 4.0.0
-
-//! @}
-
-
-#endif  // _USART_H_
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief USART driver for AVR32 UC3.
+ *
+ * This file contains basic functions for the AVR32 USART, with support for all
+ * modes, settings and clock speeds.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices with a USART module can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _USART_H_
+#define _USART_H_
+
+#include <avr32/io.h>
+#include "compiler.h"
+
+
+/*! \name Return Values
+ */
+//! @{
+#define USART_SUCCESS                 0 //!< Successful completion.
+#define USART_FAILURE                -1 //!< Failure because of some unspecified reason.
+#define USART_INVALID_INPUT           1 //!< Input value out of range.
+#define USART_INVALID_ARGUMENT       -1 //!< Argument value out of range.
+#define USART_TX_BUSY                 2 //!< Transmitter was busy.
+#define USART_RX_EMPTY                3 //!< Nothing was received.
+#define USART_RX_ERROR                4 //!< Transmission error occurred.
+#define USART_MODE_FAULT              5 //!< USART not in the appropriate mode.
+//! @}
+
+//! Default time-out value (number of attempts).
+#define USART_DEFAULT_TIMEOUT         10000
+
+/*! \name Parity Settings
+ */
+//! @{
+#define USART_EVEN_PARITY             AVR32_USART_MR_PAR_EVEN   //!< Use even parity on character transmission.
+#define USART_ODD_PARITY              AVR32_USART_MR_PAR_ODD    //!< Use odd parity on character transmission.
+#define USART_SPACE_PARITY            AVR32_USART_MR_PAR_SPACE  //!< Use a space as parity bit.
+#define USART_MARK_PARITY             AVR32_USART_MR_PAR_MARK   //!< Use a mark as parity bit.
+#define USART_NO_PARITY               AVR32_USART_MR_PAR_NONE   //!< Don't use a parity bit.
+#define USART_MULTIDROP_PARITY        AVR32_USART_MR_PAR_MULTI  //!< Parity bit is used to flag address characters.
+//! @}
+
+/*! \name Stop Bits Settings
+ */
+//! @{
+#define USART_1_STOPBIT               AVR32_USART_MR_NBSTOP_1   //!< Use 1 stop bit.
+#define USART_1_5_STOPBITS            AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.
+#define USART_2_STOPBITS              AVR32_USART_MR_NBSTOP_2   //!< Use 2 stop bits (for more, just give the number of bits).
+//! @}
+
+/*! \name Channel Modes
+ */
+//! @{
+#define USART_NORMAL_CHMODE           AVR32_USART_MR_CHMODE_NORMAL      //!< Normal communication.
+#define USART_AUTO_ECHO               AVR32_USART_MR_CHMODE_ECHO        //!< Echo data.
+#define USART_LOCAL_LOOPBACK          AVR32_USART_MR_CHMODE_LOCAL_LOOP  //!< Local loopback.
+#define USART_REMOTE_LOOPBACK         AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.
+//! @}
+
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+/*! \name LIN Node Actions
+ */
+//! @{
+#define USART_LIN_PUBLISH_ACTION      AVR32_USART_LINMR_NACT_PUBLISH    //!< The USART transmits the response.
+#define USART_LIN_SUBSCRIBE_ACTION    AVR32_USART_LINMR_NACT_SUBSCRIBE  //!< The USART receives the response.
+#define USART_LIN_IGNORE_ACTION       AVR32_USART_LINMR_NACT_IGNORE     //!< The USART does not transmit and does not receive the reponse.
+//! @}
+
+/*! \name LIN Checksum Types
+ */
+//! @{
+#define USART_LIN_ENHANCED_CHECKSUM   0 //!< LIN 2.0 "enhanced" checksum.
+#define USART_LIN_CLASSIC_CHECKSUM    1 //!< LIN 1.3 "classic" checksum.
+//! @}
+
+#endif  // USART rev. >= 4.0.0
+
+
+//! Input parameters when initializing RS232 and similar modes.
+typedef struct
+{
+  //! Set baud rate of the USART (unused in slave modes).
+  unsigned long baudrate;
+
+  //! Number of bits to transmit as a character (5 to 9).
+  unsigned char charlength;
+
+  //! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,
+  //! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or
+  //! \ref USART_MULTIDROP_PARITY.
+  unsigned char paritytype;
+
+  //! Number of stop bits between two characters: \ref USART_1_STOPBIT,
+  //! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257
+  //! which will result in a time guard period of that length between characters.
+  //! \note \ref USART_1_5_STOPBITS is supported in asynchronous modes only.
+  unsigned short stopbits;
+
+  //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
+  //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
+  unsigned char channelmode;
+} usart_options_t;
+
+//! Input parameters when initializing ISO7816 mode.
+typedef struct
+{
+  //! Set the frequency of the ISO7816 clock.
+  unsigned long iso7816_hz;
+
+  //! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).
+  //! Bit rate = \ref iso7816_hz / \ref fidi_ratio.
+  unsigned short fidi_ratio;
+
+  //! How to calculate the parity bit: \ref USART_EVEN_PARITY for normal mode or
+  //! \ref USART_ODD_PARITY for inverse mode.
+  unsigned char paritytype;
+
+  //! Inhibit Non Acknowledge:\n
+  //!   - 0: the NACK is generated;\n
+  //!   - 1: the NACK is not generated.
+  //!
+  //! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.
+  int inhibit_nack;
+
+  //! Disable successive NACKs.
+  //! Successive parity errors are counted up to the value in the \ref max_iterations field.
+  //! These parity errors generate a NACK on the ISO line. As soon as this value is reached,
+  //! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.
+  int dis_suc_nack;
+
+  //! Max number of repetitions (0 to 7).
+  unsigned char max_iterations;
+
+  //! Bit order in transmitted characters:\n
+  //!   - 0: LSB first;\n
+  //!   - 1: MSB first.
+  int bit_order;
+} usart_iso7816_options_t;
+
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+//! Input parameters when initializing SPI mode.
+typedef struct
+{
+  //! Set the frequency of the SPI clock (unused in slave mode).
+  unsigned long baudrate;
+
+  //! Number of bits to transmit as a character (5 to 9).
+  unsigned char charlength;
+
+  //! Which SPI mode to use.
+  unsigned char spimode;
+
+  //! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
+  //! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
+  unsigned char channelmode;
+} usart_spi_options_t;
+
+#endif  // USART rev. >= 4.0.0
+
+
+//------------------------------------------------------------------------------
+/*! \name Initialization Functions
+ */
+//! @{
+
+/*! \brief Resets the USART and disables TX and RX.
+ *
+ * \param usart   Base address of the USART instance.
+ */
+extern void usart_reset(volatile avr32_usart_t *usart);
+
+/*! \brief Sets up the USART to use the standard RS232 protocol.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode.
+ *
+ * Compared to \ref usart_init_rs232, this function allows very high baud rates
+ * (up to \a pba_hz instead of \a pba_hz / \c 8) at the expense of full duplex.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ *
+ * \note The \c 1.5 stop bit is not supported in this mode.
+ */
+extern int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use hardware handshaking.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ *
+ * \note \ref usart_init_rs232 does not need to be invoked before this function.
+ */
+extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use a synchronous RS232-like protocol in master mode.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use a synchronous RS232-like protocol in slave mode.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the RS485 protocol.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the IrDA protocol.
+ *
+ * \param usart         Base address of the USART instance.
+ * \param opt           Options needed to set up RS232 communication (see \ref usart_options_t).
+ * \param pba_hz        USART module input clock frequency (PBA clock, Hz).
+ * \param irda_filter   Counter used to distinguish received ones from zeros.
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
+                           long pba_hz, unsigned char irda_filter);
+
+/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.
+ *
+ * The receiver is enabled by default. \ref usart_iso7816_enable_receiver and
+ * \ref usart_iso7816_enable_transmitter can be called to change the half-duplex
+ * communication direction.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up ISO7816 communication (see \ref usart_iso7816_options_t).
+ * \param t       ISO7816 mode to use (T=0 or T=1).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz);
+
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+/*! \brief Sets up the USART to use the LIN master mode.
+ *
+ * \param usart     Base address of the USART instance.
+ * \param baudrate  Baud rate.
+ * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
+ *
+ */
+extern int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
+
+/*! \brief Sets up the USART to use the LIN slave mode.
+ *
+ * \param usart     Base address of the USART instance.
+ * \param baudrate  Baud rate.
+ * \param pba_hz    USART module input clock frequency (PBA clock, Hz).
+ *
+ */
+extern int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
+
+/*! \brief Sets up the USART to use the SPI master mode.
+ *
+ * \ref usart_spi_selectChip and \ref usart_spi_unselectChip can be called to
+ * select or unselect the SPI slave chip.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up SPI mode (see \ref usart_spi_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
+
+/*! \brief Sets up the USART to use the SPI slave mode.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param opt     Options needed to set up SPI mode (see \ref usart_spi_options_t).
+ * \param pba_hz  USART module input clock frequency (PBA clock, Hz).
+ *
+ * \retval USART_SUCCESS        Mode successfully initialized.
+ * \retval USART_INVALID_INPUT  One or more of the arguments is out of valid range.
+ */
+extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
+
+#endif  // USART rev. >= 4.0.0
+
+//! @}
+
+
+//------------------------------------------------------------------------------
+/*! \name Read and Reset Error Status Bits
+ */
+//! @{
+
+/*! \brief Resets the error status.
+ *
+ * This function resets the status bits indicating that a parity error,
+ * framing error or overrun has occurred. The RXBRK bit, indicating
+ * a start/end of break condition on the RX line, is also reset.
+ *
+ * \param usart   Base address of the USART instance.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)
+{
+  usart->cr = AVR32_USART_CR_RSTSTA_MASK;
+}
+
+/*! \brief Checks if a parity error has occurred since last status reset.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return \c 1 if a parity error has been detected, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;
+}
+
+/*! \brief Checks if a framing error has occurred since last status reset.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return \c 1 if a framing error has been detected, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;
+}
+
+/*! \brief Checks if an overrun error has occurred since last status reset.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return \c 1 if a overrun error has been detected, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;
+}
+
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+/*! \brief Get LIN Error Status
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \retval The binary value of the error field.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_lin_get_error(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & (AVR32_USART_CSR_LINSNRE_MASK |
+                        AVR32_USART_CSR_LINCE_MASK |
+                        AVR32_USART_CSR_LINIPE_MASK |
+                        AVR32_USART_CSR_LINISFE_MASK |
+                        AVR32_USART_CSR_LINBE_MASK)) >> AVR32_USART_CSR_LINBE_OFFSET;
+}
+
+#endif  // USART rev. >= 4.0.0
+
+//! @}
+
+
+//------------------------------------------------------------------------------
+/*! \name ISO7816 Control Functions
+ */
+//! @{
+
+/*! \brief Enables the ISO7816 receiver.
+ *
+ * The ISO7816 transmitter is disabled.
+ *
+ * \param usart   Base address of the USART instance.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_iso7816_enable_receiver(volatile avr32_usart_t *usart)
+{
+  usart->cr = AVR32_USART_CR_TXDIS_MASK | AVR32_USART_CR_RXEN_MASK;
+}
+
+/*! \brief Enables the ISO7816 transmitter.
+ *
+ * The ISO7816 receiver is disabled.
+ *
+ * \param usart   Base address of the USART instance.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_iso7816_enable_transmitter(volatile avr32_usart_t *usart)
+{
+  usart->cr = AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXEN_MASK;
+}
+
+//! @}
+
+
+//------------------------------------------------------------------------------
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+/*! \name LIN Control Functions
+ */
+//! @{
+
+/*! \brief Sets the node action.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param action  The node action: \ref USART_LIN_PUBLISH_ACTION,
+ *                \ref USART_LIN_SUBSCRIBE_ACTION or
+ *                \ref USART_LIN_IGNORE_ACTION.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_set_node_action(volatile avr32_usart_t *usart, unsigned char action)
+{
+  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_NACT_MASK) |
+                 action << AVR32_USART_LINMR_NACT_OFFSET;
+}
+
+/*! \brief Enables or disables the Identifier parity.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param parity  Whether to enable the Identifier parity: \c TRUE or \c FALSE.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_enable_parity(volatile avr32_usart_t *usart, unsigned char parity)
+{
+  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_PARDIS_MASK) |
+                 !parity << AVR32_USART_LINMR_PARDIS_OFFSET;
+}
+
+/*! \brief Enables or disables the checksum.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param parity  Whether to enable the checksum: \c TRUE or \c FALSE.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_enable_checksum(volatile avr32_usart_t *usart, unsigned char checksum)
+{
+  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKDIS_MASK) |
+                 !checksum << AVR32_USART_LINMR_CHKDIS_OFFSET;
+}
+
+/*! \brief Sets the checksum type.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param chktyp  The checksum type: \ref USART_LIN_ENHANCED_CHEKSUM or
+ *                \ref USART_LIN_CLASSIC_CHECKSUM.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_set_checksum(volatile avr32_usart_t *usart, unsigned char chktyp)
+{
+  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKTYP_MASK) |
+                 chktyp << AVR32_USART_LINMR_CHKTYP_OFFSET;
+}
+
+/*! \brief Gets the response data length.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return The response data length.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ unsigned char usart_lin_get_data_length(volatile avr32_usart_t *usart)
+{
+  if (usart->linmr & AVR32_USART_LINMR_DLM_MASK)
+  {
+    unsigned char data_length = 1 << ((usart->linir >> (AVR32_USART_LINIR_IDCHR_OFFSET + 4)) & 0x03);
+    if (data_length == 1)
+      data_length = 2;
+    return data_length;
+  }
+  else
+    return ((usart->linmr & AVR32_USART_LINMR_DLC_MASK) >> AVR32_USART_LINMR_DLC_OFFSET) + 1;
+}
+
+/*! \brief Sets the response data length for LIN 1.x.
+ *
+ * \param usart   Base address of the USART instance.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_set_data_length_lin1x(volatile avr32_usart_t *usart)
+{
+  usart->linmr |= AVR32_USART_LINMR_DLM_MASK;
+}
+
+/*! \brief Sets the response data length for LIN 2.x.
+ *
+ * \param usart         Base address of the USART instance.
+ * \param data_length   The response data length.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_set_data_length_lin2x(volatile avr32_usart_t *usart, unsigned char data_length)
+{
+  usart->linmr = (usart->linmr & ~(AVR32_USART_LINMR_DLC_MASK |
+                                   AVR32_USART_LINMR_DLM_MASK)) |
+                 (data_length - 1) << AVR32_USART_LINMR_DLC_OFFSET;
+}
+
+/*! \brief Enables or disables the frame slot mode.
+ *
+ * \param usart       Base address of the USART instance.
+ * \param frameslot   Whether to enable the frame slot mode: \c TRUE or
+ *                    \c FALSE.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_enable_frameslot(volatile avr32_usart_t *usart, unsigned char frameslot)
+{
+  usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_FSDIS_MASK) |
+                 !frameslot << AVR32_USART_LINMR_FSDIS_OFFSET;
+}
+
+/*! \brief Gets the Identifier character.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return The Identifier character.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ unsigned char usart_lin_get_id_char(volatile avr32_usart_t *usart)
+{
+  return (usart->linir & AVR32_USART_LINIR_IDCHR_MASK) >> AVR32_USART_LINIR_IDCHR_OFFSET;
+}
+
+/*! \brief Sets the Identifier character.
+ *
+ * \param usart     Base address of the USART instance.
+ * \param id_char   The Identifier character.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_set_id_char(volatile avr32_usart_t *usart, unsigned char id_char)
+{
+  usart->linir = (usart->linir & ~AVR32_USART_LINIR_IDCHR_MASK) |
+                 id_char << AVR32_USART_LINIR_IDCHR_OFFSET;
+}
+
+//! @}
+
+#endif  // USART rev. >= 4.0.0
+
+
+//------------------------------------------------------------------------------
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+/*! \name SPI Control Functions
+ */
+//! @{
+
+/*! \brief Selects SPI slave chip.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \retval USART_SUCCESS        Success.
+ */
+extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
+
+/*! \brief Unselects SPI slave chip.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \retval USART_SUCCESS        Success.
+ * \retval USART_FAILURE        Time-out.
+ */
+extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
+
+//! @}
+
+#endif  // USART rev. >= 4.0.0
+
+
+//------------------------------------------------------------------------------
+/*! \name Transmit/Receive Functions
+ */
+//! @{
+
+/*! \brief Addresses a receiver.
+ *
+ * While in RS485 mode, receivers only accept data addressed to them.
+ * A packet/char with the address tag set has to precede any data.
+ * This function is used to address a receiver. This receiver should read
+ * all the following data, until an address packet addresses another receiver.
+ *
+ * \param usart     Base address of the USART instance.
+ * \param address   Address of the target device.
+ *
+ * \retval USART_SUCCESS    Address successfully sent (if current mode is RS485).
+ * \retval USART_MODE_FAULT Wrong operating mode.
+ */
+extern int usart_send_address(volatile avr32_usart_t *usart, int address);
+
+/*! \brief Tests if the USART is ready to transmit a character.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return \c 1 if the USART Transmit Holding Register is free, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_tx_ready(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & AVR32_USART_CSR_TXRDY_MASK) != 0;
+}
+
+/*! \brief Writes the given character to the TX buffer if the transmitter is ready.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param c       The character (up to 9 bits) to transmit.
+ *
+ * \retval USART_SUCCESS  The transmitter was ready.
+ * \retval USART_TX_BUSY  The transmitter was busy.
+ */
+extern int usart_write_char(volatile avr32_usart_t *usart, int c);
+
+/*! \brief An active wait writing a character to the USART.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param c       The character (up to 9 bits) to transmit.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)
+{
+  while (usart_write_char(usart, c) != USART_SUCCESS);
+}
+
+/*! \brief Sends a character with the USART.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param c       Character to write.
+ *
+ * \retval USART_SUCCESS  The character was written.
+ * \retval USART_FAILURE  The function timed out before the USART transmitter became ready to send.
+ */
+extern int usart_putchar(volatile avr32_usart_t *usart, int c);
+
+/*! \brief Tests if all requested USART transmissions are over.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return \c 1 if the USART Transmit Shift Register and the USART Transmit
+ *         Holding Register are free, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_tx_empty(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & AVR32_USART_CSR_TXEMPTY_MASK) != 0;
+}
+
+/*! \brief Tests if the USART contains a received character.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return \c 1 if the USART Receive Holding Register is full, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_test_hit(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & AVR32_USART_CSR_RXRDY_MASK) != 0;
+}
+
+/*! \brief Checks the RX buffer for a received character, and stores it at the
+ *         given memory location.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param c       Pointer to the where the read character should be stored
+ *                (must be at least short in order to accept 9-bit characters).
+ *
+ * \retval USART_SUCCESS  The character was read successfully.
+ * \retval USART_RX_EMPTY The RX buffer was empty.
+ * \retval USART_RX_ERROR An error was deteceted.
+ */
+extern int usart_read_char(volatile avr32_usart_t *usart, int *c);
+
+/*! \brief Waits until a character is received, and returns it.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return The received character, or \ref USART_FAILURE upon error.
+ */
+extern int usart_getchar(volatile avr32_usart_t *usart);
+
+/*! \brief Writes one character string to the USART.
+ *
+ * \param usart   Base address of the USART instance.
+ * \param string  String to be written.
+ */
+extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);
+
+/*! \brief Gets and echoes characters until end of line.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \retval USART_SUCCESS  Success.
+ * \retval USART_FAILURE  Low-level error detected or ETX character received.
+ */
+extern int usart_get_echo_line(volatile avr32_usart_t *usart);
+
+#if defined(AVR32_USART_400_H_INCLUDED) || \
+    defined(AVR32_USART_410_H_INCLUDED) || \
+    defined(AVR32_USART_420_H_INCLUDED) || \
+    defined(AVR32_USART_440_H_INCLUDED) || \
+    defined(AVR32_USART_602_H_INCLUDED)
+
+/*! \brief Abort LIN transmission.
+ *
+ * \param usart   Base address of the USART instance.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ void usart_lin_abort(volatile avr32_usart_t *usart)
+{
+  usart->cr = AVR32_USART_LINABT_MASK;
+}
+
+/*! \brief Tests if a LIN transfer has been completed.
+ *
+ * \param usart   Base address of the USART instance.
+ *
+ * \return \c 1 if a LIN transfer has been completed, otherwise \c 0.
+ */
+#if (defined __GNUC__)
+__attribute__((__always_inline__))
+#endif
+extern __inline__ int usart_lin_transfer_completed(volatile avr32_usart_t *usart)
+{
+  return (usart->csr & AVR32_USART_CSR_LINTC_MASK) != 0;
+}
+
+#endif  // USART rev. >= 4.0.0
+
+//! @}
+
+
+#endif  // _USART_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/SConscript

@@ -1,30 +1,30 @@
-import rtconfig
-Import('RTT_ROOT')
-from building import *
-
-cwd = GetCurrentDir()
-
-src = Split("""
-DRIVERS/FLASHC/flashc.c
-DRIVERS/GPIO/gpio.c
-DRIVERS/INTC/intc.c
-DRIVERS/PM/pm.c
-DRIVERS/PM/pm_conf_clocks.c
-DRIVERS/PM/power_clocks_lib.c
-DRIVERS/USART/usart.c
-""")
-
-CPPPATH = [
-    cwd + '/BOARDS',
-    cwd + '/UTILS',
-    cwd + '/UTILS/PREPROCESSOR',
-    cwd + '/DRIVERS/FLASHC',
-    cwd + '/DRIVERS/GPIO',
-    cwd + '/DRIVERS/INTC',
-    cwd + '/DRIVERS/PM',
-    cwd + '/DRIVERS/USART',
-]
-
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+import rtconfig
+Import('RTT_ROOT')
+from building import *
+
+cwd = GetCurrentDir()
+
+src = Split("""
+DRIVERS/FLASHC/flashc.c
+DRIVERS/GPIO/gpio.c
+DRIVERS/INTC/intc.c
+DRIVERS/PM/pm.c
+DRIVERS/PM/pm_conf_clocks.c
+DRIVERS/PM/power_clocks_lib.c
+DRIVERS/USART/usart.c
+""")
+
+CPPPATH = [
+    cwd + '/BOARDS',
+    cwd + '/UTILS',
+    cwd + '/UTILS/PREPROCESSOR',
+    cwd + '/DRIVERS/FLASHC',
+    cwd + '/DRIVERS/GPIO',
+    cwd + '/DRIVERS/INTC',
+    cwd + '/DRIVERS/PM',
+    cwd + '/DRIVERS/USART',
+]
+
+group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_cpu.h

@@ -1,63 +1,63 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief NEWLIB_ADDONS CPU include file for AVR32.
- *
- * - Compiler:           GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef __AVR32_NEWLIB_ADDONS_CPU_H__
-#define __AVR32_NEWLIB_ADDONS_CPU_H__
-
-#include <_ansi.h>
-
-_BEGIN_STD_C
-
-#define CPU_HZ get_cpu_hz()
-
-void udelay(unsigned long usec);
-void set_cpu_hz(unsigned int clk_hz);
-unsigned int get_cpu_hz();
-
-_END_STD_C
-
-#endif
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief NEWLIB_ADDONS CPU include file for AVR32.
+ *
+ * - Compiler:           GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef __AVR32_NEWLIB_ADDONS_CPU_H__
+#define __AVR32_NEWLIB_ADDONS_CPU_H__
+
+#include <_ansi.h>
+
+_BEGIN_STD_C
+
+#define CPU_HZ get_cpu_hz()
+
+void udelay(unsigned long usec);
+void set_cpu_hz(unsigned int clk_hz);
+unsigned int get_cpu_hz();
+
+_END_STD_C
+
+#endif

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_exceptions.h

@@ -1,120 +1,120 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief NEWLIB_ADDONS exceptions include file for AVR32.
- *
- * - Compiler:           GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__
-#define __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__
-
-#include <_ansi.h>
-
-_BEGIN_STD_C
-
-/*
- Exception vector offsets
-*/
-#define EVBA_UNRECOVERABLE    0x000
-#define EVBA_TLB_MULTIPLE     0x004
-#define EVBA_BUS_ERROR_DATA   0x008
-#define EVBA_BUS_ERROR_INSTR  0x00C
-#define EVBA_NMI              0x010
-#define EVBA_INSTR_ADDR       0x014
-#define EVBA_ITLB_MISS        0x050
-#define EVBA_ITLB_PROT        0x018
-#define EVBA_BREAKPOINT       0x01C
-#define EVBA_ILLEGAL_OPCODE   0x020
-#define EVBA_UNIMPLEMENTED    0x024
-#define EVBA_PRIVILEGE_VIOL   0x028
-#define EVBA_FLOATING_POINT   0x02C
-#define EVBA_COP_ABSENT       0x030
-#define EVBA_SCALL            0x100
-#define EVBA_DATA_ADDR_R      0x034
-#define EVBA_DATA_ADDR_W      0x038
-#define EVBA_DTLB_MISS_R      0x060
-#define EVBA_DTLB_MISS_W      0x070
-#define EVBA_DTLB_PROT_R      0x03C
-#define EVBA_DTLB_PROT_W      0x040
-#define EVBA_DTLB_MODIFIED    0x044
-
-
-/*
-   Define the form of the function used when registering exceptions.
-   The function should return the address which the exception should
-   return to after the exception processing.
-*/
-
-typedef unsigned int (*__exception_handler)(int /*evba_offset*/, int /*return address*/);
-
-/*
-   Define the form of the function used when registering a scall handler.
-*/
-
-typedef void (*__scall_handler)(int /*code*/, int /*p1*/, int /*p2*/
-                                         , int /*p3*/, int /*p4*/);
-
-/*
-   Function for registering an exception handler for the exception with
-   offset given by evba_offset.
-*/
-void _register_exception_handler(__exception_handler handler, int evba_offset);
-
-/*
-   Function for registering a scall handler which can be a arbirary
-   function which uses r8-r12 for parameters.
-*/
-void _register_scall_handler(__scall_handler handler);
-
-/*
-   Initialize exceptions. Must be called before registering exception handlers
-   and needed to enable exceptions. 'evba' is the pointer to the exception
-   vector. 'handler_table' is a pointer to an array where the pointers to
-   the exception handlers are stored. This array must be at least 0x104 bytes
-   and word aligned.
-*/
-void init_exceptions(void *evba, void *handler_table);
-
-_END_STD_C
-
-#endif
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief NEWLIB_ADDONS exceptions include file for AVR32.
+ *
+ * - Compiler:           GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__
+#define __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__
+
+#include <_ansi.h>
+
+_BEGIN_STD_C
+
+/*
+ Exception vector offsets
+*/
+#define EVBA_UNRECOVERABLE    0x000
+#define EVBA_TLB_MULTIPLE     0x004
+#define EVBA_BUS_ERROR_DATA   0x008
+#define EVBA_BUS_ERROR_INSTR  0x00C
+#define EVBA_NMI              0x010
+#define EVBA_INSTR_ADDR       0x014
+#define EVBA_ITLB_MISS        0x050
+#define EVBA_ITLB_PROT        0x018
+#define EVBA_BREAKPOINT       0x01C
+#define EVBA_ILLEGAL_OPCODE   0x020
+#define EVBA_UNIMPLEMENTED    0x024
+#define EVBA_PRIVILEGE_VIOL   0x028
+#define EVBA_FLOATING_POINT   0x02C
+#define EVBA_COP_ABSENT       0x030
+#define EVBA_SCALL            0x100
+#define EVBA_DATA_ADDR_R      0x034
+#define EVBA_DATA_ADDR_W      0x038
+#define EVBA_DTLB_MISS_R      0x060
+#define EVBA_DTLB_MISS_W      0x070
+#define EVBA_DTLB_PROT_R      0x03C
+#define EVBA_DTLB_PROT_W      0x040
+#define EVBA_DTLB_MODIFIED    0x044
+
+
+/*
+   Define the form of the function used when registering exceptions.
+   The function should return the address which the exception should
+   return to after the exception processing.
+*/
+
+typedef unsigned int (*__exception_handler)(int /*evba_offset*/, int /*return address*/);
+
+/*
+   Define the form of the function used when registering a scall handler.
+*/
+
+typedef void (*__scall_handler)(int /*code*/, int /*p1*/, int /*p2*/
+                                         , int /*p3*/, int /*p4*/);
+
+/*
+   Function for registering an exception handler for the exception with
+   offset given by evba_offset.
+*/
+void _register_exception_handler(__exception_handler handler, int evba_offset);
+
+/*
+   Function for registering a scall handler which can be a arbirary
+   function which uses r8-r12 for parameters.
+*/
+void _register_scall_handler(__scall_handler handler);
+
+/*
+   Initialize exceptions. Must be called before registering exception handlers
+   and needed to enable exceptions. 'evba' is the pointer to the exception
+   vector. 'handler_table' is a pointer to an array where the pointers to
+   the exception handlers are stored. This array must be at least 0x104 bytes
+   and word aligned.
+*/
+void init_exceptions(void *evba, void *handler_table);
+
+_END_STD_C
+
+#endif

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_interrupts.h

@@ -1,82 +1,82 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief NEWLIB_ADDONS interrupts include file for AVR32.
- *
- * - Compiler:           GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__
-#define __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__
-
-#include <_ansi.h>
-
-_BEGIN_STD_C
-
-#define INT_GRPS          64
-#define INT_LINES         32
-#define INTPR_BASE        (__intc_base__ + 0x0000)
-#define INTREQ_BASE       (__intc_base__ + 64*4)
-#define INTCAUSE_BASE     (__intc_base__ + 2*64*4)
-
-//Register offsets
-#define INTLEVEL          30
-#define AUTOVECTOR        0
-#define AUTOVECTOR_BITS   14
-
-//Priorities
-#define INT0              0
-#define INT1              1
-#define INT2              2
-#define INT3              3
-
-
-typedef void (*__newlib_int_handler)(int /* int_grp*/, void */*user_handle*/);
-
-__newlib_int_handler register_interrupt(__newlib_int_handler handler, int int_grp, int line, int priority,
-                                 .../* void *user_handle*/);
-void init_interrupts();
-void set_interrupts_base(void *base);
-
-_END_STD_C
-
-#endif
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief NEWLIB_ADDONS interrupts include file for AVR32.
+ *
+ * - Compiler:           GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__
+#define __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__
+
+#include <_ansi.h>
+
+_BEGIN_STD_C
+
+#define INT_GRPS          64
+#define INT_LINES         32
+#define INTPR_BASE        (__intc_base__ + 0x0000)
+#define INTREQ_BASE       (__intc_base__ + 64*4)
+#define INTCAUSE_BASE     (__intc_base__ + 2*64*4)
+
+//Register offsets
+#define INTLEVEL          30
+#define AUTOVECTOR        0
+#define AUTOVECTOR_BITS   14
+
+//Priorities
+#define INT0              0
+#define INT1              1
+#define INT2              2
+#define INT3              3
+
+
+typedef void (*__newlib_int_handler)(int /* int_grp*/, void */*user_handle*/);
+
+__newlib_int_handler register_interrupt(__newlib_int_handler handler, int int_grp, int line, int priority,
+                                 .../* void *user_handle*/);
+void init_interrupts();
+void set_interrupts_base(void *base);
+
+_END_STD_C
+
+#endif

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_io.h

@@ -1,174 +1,174 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief NEWLIB_ADDONS miscellaneous macros include file for AVR32.
- *
- * - Compiler:           GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef __AVR32_NEWLIB_ADDONS_IO_H__
-#define __AVR32_NEWLIB_ADDONS_IO_H__
-
-#include <_ansi.h>
-
-_BEGIN_STD_C
-
-typedef char u8;
-typedef unsigned int u32;
-
-#define __raw_writeb(v,a)       (*(volatile unsigned char  *)(a) = (v))
-#define __raw_writew(v,a)       (*(volatile unsigned short *)(a) = (v))
-#define __raw_writel(v,a)       (*(volatile unsigned int   *)(a) = (v))
-
-#define __raw_readb(a)          (*(volatile unsigned char  *)(a))
-#define __raw_readw(a)          (*(volatile unsigned short *)(a))
-#define __raw_readl(a)          (*(volatile unsigned int   *)(a))
-
-/* As long as I/O is only performed in P4 (or possibly P3), we're safe */
-#define writeb(v,a)		__raw_writeb(v,a)
-#define writew(v,a)		__raw_writew(v,a)
-#define writel(v,a)		__raw_writel(v,a)
-
-#define readb(a)		__raw_readb(a)
-#define readw(a)		__raw_readw(a)
-#define readl(a)		__raw_readl(a)
-
-/* Memory segments when segmentation is enabled */
-#define P0SEG		0x00000000
-#define P1SEG		0x80000000
-#define P2SEG		0xa0000000
-#define P3SEG		0xc0000000
-#define P4SEG		0xe0000000
-
-/* Returns the privileged segment base of a given address */
-#define PXSEG(a)	(((unsigned long)(a)) & 0xe0000000)
-
-/* Returns the physical address of a PnSEG (n=1,2) address */
-#define PHYSADDR(a)	(((unsigned long)(a)) & 0x1fffffff)
-
-/*
- * Map an address to a certain privileged segment
- */
-#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
-#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
-#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
-#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
-
-
-#define cached(addr) P1SEGADDR(addr)
-#define uncached(addr) P2SEGADDR(addr)
-#define physaddr(addr) PHYSADDR(addr)
-
-#define BF(field, value) \
-  ({ union { \
-      struct { \
-       unsigned           : 32 - field ##  _OFFSET -  field ##  _SIZE ; \
-       unsigned long __val: field ##  _SIZE ; \
-      }; \
-      unsigned long __ul; \
-     } __tmp; \
-     __tmp.__ul = 0; \
-     __tmp.__val = value; \
-     __tmp.__ul;})
-
-#define BF_D(field, value) \
-  ({ union { \
-      struct { \
-       unsigned long long : 64 - field ##  _OFFSET -  field ##  _SIZE ; \
-       unsigned long long __val: field ##  _SIZE ; \
-      }; \
-      unsigned long long __ul; \
-     } __tmp; \
-     __tmp.__ul = 0; \
-     __tmp.__val = value; \
-     __tmp.__ul;})
-
-#define BFINS(var, field, value) \
-  { union {\
-      struct { \
-       unsigned           : 32 - field ##  _OFFSET -  field ##  _SIZE ; \
-       unsigned long __val: field ##  _SIZE ; \
-      }; \
-      unsigned long __ul; \
-     } __tmp; \
-     __tmp.__ul = var; \
-     __tmp.__val = value; \
-     var = __tmp.__ul;}
-
-#define BFEXT(var, field) \
-  ({ union {\
-      struct { \
-       unsigned           : 32 - field ##  _OFFSET -  field ##  _SIZE ; \
-       unsigned long __val: field ##  _SIZE ; \
-      }; \
-      unsigned long __ul; \
-     } __tmp; \
-     __tmp.__ul = var; \
-     __tmp.__val; })
-
-#define BFINS_D(var, field, value) \
-  { union {\
-      struct { \
-       unsigned long long : 64 - field ##  _OFFSET -  field ##  _SIZE ; \
-       unsigned long long __val: field ##  _SIZE ; \
-      }; \
-      unsigned long long __ul; \
-     } __tmp; \
-     __tmp.__ul = var; \
-     __tmp.__val = value; \
-     var = __tmp.__ul;}
-
-#define BFEXT_D(var, field) \
-  ({ union {\
-      struct { \
-       unsigned long long : 64 - field ##  _OFFSET -  field ##  _SIZE ; \
-       unsigned long long __val: field ##  _SIZE ; \
-      }; \
-      unsigned long long __ul; \
-     } __tmp; \
-     __tmp.__ul = var; \
-     __tmp.__val; })
-
-
-_END_STD_C
-
-#endif
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief NEWLIB_ADDONS miscellaneous macros include file for AVR32.
+ *
+ * - Compiler:           GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef __AVR32_NEWLIB_ADDONS_IO_H__
+#define __AVR32_NEWLIB_ADDONS_IO_H__
+
+#include <_ansi.h>
+
+_BEGIN_STD_C
+
+typedef char u8;
+typedef unsigned int u32;
+
+#define __raw_writeb(v,a)       (*(volatile unsigned char  *)(a) = (v))
+#define __raw_writew(v,a)       (*(volatile unsigned short *)(a) = (v))
+#define __raw_writel(v,a)       (*(volatile unsigned int   *)(a) = (v))
+
+#define __raw_readb(a)          (*(volatile unsigned char  *)(a))
+#define __raw_readw(a)          (*(volatile unsigned short *)(a))
+#define __raw_readl(a)          (*(volatile unsigned int   *)(a))
+
+/* As long as I/O is only performed in P4 (or possibly P3), we're safe */
+#define writeb(v,a)		__raw_writeb(v,a)
+#define writew(v,a)		__raw_writew(v,a)
+#define writel(v,a)		__raw_writel(v,a)
+
+#define readb(a)		__raw_readb(a)
+#define readw(a)		__raw_readw(a)
+#define readl(a)		__raw_readl(a)
+
+/* Memory segments when segmentation is enabled */
+#define P0SEG		0x00000000
+#define P1SEG		0x80000000
+#define P2SEG		0xa0000000
+#define P3SEG		0xc0000000
+#define P4SEG		0xe0000000
+
+/* Returns the privileged segment base of a given address */
+#define PXSEG(a)	(((unsigned long)(a)) & 0xe0000000)
+
+/* Returns the physical address of a PnSEG (n=1,2) address */
+#define PHYSADDR(a)	(((unsigned long)(a)) & 0x1fffffff)
+
+/*
+ * Map an address to a certain privileged segment
+ */
+#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
+#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
+#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
+#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
+
+
+#define cached(addr) P1SEGADDR(addr)
+#define uncached(addr) P2SEGADDR(addr)
+#define physaddr(addr) PHYSADDR(addr)
+
+#define BF(field, value) \
+  ({ union { \
+      struct { \
+       unsigned           : 32 - field ##  _OFFSET -  field ##  _SIZE ; \
+       unsigned long __val: field ##  _SIZE ; \
+      }; \
+      unsigned long __ul; \
+     } __tmp; \
+     __tmp.__ul = 0; \
+     __tmp.__val = value; \
+     __tmp.__ul;})
+
+#define BF_D(field, value) \
+  ({ union { \
+      struct { \
+       unsigned long long : 64 - field ##  _OFFSET -  field ##  _SIZE ; \
+       unsigned long long __val: field ##  _SIZE ; \
+      }; \
+      unsigned long long __ul; \
+     } __tmp; \
+     __tmp.__ul = 0; \
+     __tmp.__val = value; \
+     __tmp.__ul;})
+
+#define BFINS(var, field, value) \
+  { union {\
+      struct { \
+       unsigned           : 32 - field ##  _OFFSET -  field ##  _SIZE ; \
+       unsigned long __val: field ##  _SIZE ; \
+      }; \
+      unsigned long __ul; \
+     } __tmp; \
+     __tmp.__ul = var; \
+     __tmp.__val = value; \
+     var = __tmp.__ul;}
+
+#define BFEXT(var, field) \
+  ({ union {\
+      struct { \
+       unsigned           : 32 - field ##  _OFFSET -  field ##  _SIZE ; \
+       unsigned long __val: field ##  _SIZE ; \
+      }; \
+      unsigned long __ul; \
+     } __tmp; \
+     __tmp.__ul = var; \
+     __tmp.__val; })
+
+#define BFINS_D(var, field, value) \
+  { union {\
+      struct { \
+       unsigned long long : 64 - field ##  _OFFSET -  field ##  _SIZE ; \
+       unsigned long long __val: field ##  _SIZE ; \
+      }; \
+      unsigned long long __ul; \
+     } __tmp; \
+     __tmp.__ul = var; \
+     __tmp.__val = value; \
+     var = __tmp.__ul;}
+
+#define BFEXT_D(var, field) \
+  ({ union {\
+      struct { \
+       unsigned long long : 64 - field ##  _OFFSET -  field ##  _SIZE ; \
+       unsigned long long __val: field ##  _SIZE ; \
+      }; \
+      unsigned long long __ul; \
+     } __tmp; \
+     __tmp.__ul = var; \
+     __tmp.__val; })
+
+
+_END_STD_C
+
+#endif

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS/INCLUDE/nlao_usart.h

@@ -1,208 +1,208 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief NEWLIB_ADDONS USART include file for AVR32.
- *
- * - Compiler:           GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef __AVR32_NEWLIB_ADDONS_USART_H__
-#define __AVR32_NEWLIB_ADDONS_USART_H__
-
-#include <_ansi.h>
-
-#include "nlao_io.h"
-
-_BEGIN_STD_C
-
-struct usart3 {
-	volatile u32	us_cr;
-	volatile u32	us_mr;
-	volatile u32	us_ier;
-	volatile u32	us_idr;
-	volatile u32	us_imr;
-	volatile u32	us_csr;
-	volatile u32	us_rhr;
-	volatile u32	us_thr;
-	volatile u32	us_brgr;
-	volatile u32	us_rtor;
-	volatile u32	us_ttgr;
-	volatile u32	us_reserved[5];
-	volatile u32	us_fidi;
-	volatile u32	us_ner;
-	volatile u32	us_xxr;
-	volatile u32	us_if;
-};
-
-/* Register offsets */
-#define US_CR			0x0000
-#define US_MR			0x0004
-#define US_IER			0x0008
-#define US_IDR			0x000c
-#define US_IMR			0x0010
-#define US_CSR			0x0014
-#define US_RHR			0x0018
-#define US_THR			0x001c
-#define US_BRGR			0x0020
-#define US_RTOR			0x0024
-#define US_TTGR			0x0028
-
-#define US_FIDI			0x0040
-#define US_NER			0x0044
-#define US_XXR			0x0048
-#define US_IF			0x004c
-
-#define US_RPR                  0x0100
-#define US_RCR                  0x0104
-#define US_TPR                  0x0108
-#define US_TCR                  0x010c
-#define US_RNPR                 0x0110
-#define US_RNCR                 0x0114
-#define US_TNPR                 0x0118
-#define US_TNCR                 0x011c
-#define US_PTCR                 0x0120
-#define US_PTSR                 0x0124
-
-
-
-
-/* USART3 Control Register */
-#define US_CR_RSTRX		(1 <<  2)
-#define US_CR_RSTTX		(1 <<  3)
-#define US_CR_RXEN		(1 <<  4)
-#define US_CR_RXDIS		(1 <<  5)
-#define US_CR_TXEN		(1 <<  6)
-#define US_CR_TXDIS		(1 <<  7)
-#define US_CR_RSTSTA		(1 <<  8)
-#define US_CR_STTBRK		(1 <<  9)
-#define US_CR_STPBRK		(1 << 10)
-
-#define US_CR_DTREN		(1 << 16)
-#define US_CR_DTRDIS		(1 << 17)
-#define US_CR_RTSEN		(1 << 18)
-#define US_CR_RTSDIS		(1 << 19)
-
-/* USART3 Mode Register */
-#define US_MR_MODE		(15 <<  0)
-#define US_MR_MODE_NORMAL	( 0 <<  0)
-#define US_MR_MODE_HWFLOW	( 2 <<  0)
-#define US_MR_CLKS		( 3 <<  4)
-#define US_MR_CLKS_CLOCK	( 0 <<  4)
-#define US_MR_CLKS_FDIV1	( 1 <<  4)
-#define US_MR_CLKS_SLOW		( 2 <<  4)
-#define US_MR_CLKS_EXT		( 3 <<  4)
-#define US_MR_CHRL_5BITS	( 0 <<  6)
-#define US_MR_CHRL_6BITS	( 1 <<  6)
-#define US_MR_CHRL_7BITS	( 2 <<  6)
-#define US_MR_CHRL_8BITS	( 3 <<  6)
-#define US_MR_SYNC		( 1 <<  8)
-#define US_MR_PAR_EVEN		( 0 <<  9)
-#define US_MR_PAR_ODD		( 1 <<  9)
-#define US_MR_PAR_SPACE		( 2 <<  9)
-#define US_MR_PAR_MARK		( 3 <<  9)
-#define US_MR_PAR_NONE		( 4 <<  9)
-#define US_MR_PAR_MDROP		( 6 <<  9)
-#define US_MR_NBSTOP_1BIT	( 0 << 12)
-#define US_MR_NBSTOP_1_5BIT	( 1 << 12)
-#define US_MR_NBSTOP_2BITS	( 2 << 12)
-#define US_MR_OVER		( 1 << 19)
-#define US_MR_OVER_X16		( 0 << 19)
-#define US_MR_OVER_X8		( 1 << 19)
-
-/* USART3 Channel Status Register */
-#define US_CSR_RXRDY		(1 <<  0)
-#define US_CSR_TXRDY		(1 <<  1)
-#define US_CSR_RXBRK		(1 <<  2)
-#define US_CSR_ENDRX		(1 <<  3)
-#define US_CSR_ENDTX		(1 <<  4)
-
-
-#define US_CSR_OVRE		(1 <<  5)
-#define US_CSR_FRAME		(1 <<  6)
-#define US_CSR_PARE		(1 <<  7)
-
-#define US_CSR_TXEMPTY		(1 <<  9)
-
-#define US_CSR_TXBUFE           (1 << 11)
-#define US_CSR_RXBUFF           (1 << 12)
-#define US_CSR_RIIC		(1 << 16)
-#define US_CSR_DSRIC		(1 << 17)
-#define US_CSR_DCDIC		(1 << 18)
-#define US_CSR_CTSIC		(1 << 19)
-#define US_CSR_RI		(1 << 20)
-#define US_CSR_DSR		(1 << 21)
-#define US_CSR_DCD		(1 << 22)
-#define US_CSR_CTS		(1 << 23)
-
-/* USART3 Baud Rate Generator Register */
-#define US_BRGR_CD_OFFSET	0
-#define US_BRGR_FP_OFFSET	16
-
-#define US_BRGR_CD_SIZE		16
-#define US_BRGR_FP_SIZE		3
-
-#define US_BRGR_CD		(0xFFFF <<  0)
-#define US_BRGR_FP		(     7 << 16)
-
-/*USART3 PDC Transfer Control Register */
-#define US_PTCR_RXTEN           (1 << 0)
-#define US_PTCR_RXTDIS          (1 << 1)
-#define US_PTCR_TXTEN           (1 << 8)
-#define US_PTCR_TXTDIS          (1 << 9)
-
-/*USART3 PDC Transfer Status Register */
-#define US_PTSR_RXTEN           (1 << 0)
-#define US_PTSR_TXTEN           (1 << 8)
-
-
-int usart_init(int baudrate);
-void usart_putc(char c);
-void usart_puts(const char *s);
-int usart_getc(void);
-int usart_tstc(void);
-void usart_setbrg(int baudrate, int cpu_clock);
-void set_usart_base(void *usart_base);
-
-
-_END_STD_C
-
-#endif /* MERLIN_USART3_H */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief NEWLIB_ADDONS USART include file for AVR32.
+ *
+ * - Compiler:           GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef __AVR32_NEWLIB_ADDONS_USART_H__
+#define __AVR32_NEWLIB_ADDONS_USART_H__
+
+#include <_ansi.h>
+
+#include "nlao_io.h"
+
+_BEGIN_STD_C
+
+struct usart3 {
+	volatile u32	us_cr;
+	volatile u32	us_mr;
+	volatile u32	us_ier;
+	volatile u32	us_idr;
+	volatile u32	us_imr;
+	volatile u32	us_csr;
+	volatile u32	us_rhr;
+	volatile u32	us_thr;
+	volatile u32	us_brgr;
+	volatile u32	us_rtor;
+	volatile u32	us_ttgr;
+	volatile u32	us_reserved[5];
+	volatile u32	us_fidi;
+	volatile u32	us_ner;
+	volatile u32	us_xxr;
+	volatile u32	us_if;
+};
+
+/* Register offsets */
+#define US_CR			0x0000
+#define US_MR			0x0004
+#define US_IER			0x0008
+#define US_IDR			0x000c
+#define US_IMR			0x0010
+#define US_CSR			0x0014
+#define US_RHR			0x0018
+#define US_THR			0x001c
+#define US_BRGR			0x0020
+#define US_RTOR			0x0024
+#define US_TTGR			0x0028
+
+#define US_FIDI			0x0040
+#define US_NER			0x0044
+#define US_XXR			0x0048
+#define US_IF			0x004c
+
+#define US_RPR                  0x0100
+#define US_RCR                  0x0104
+#define US_TPR                  0x0108
+#define US_TCR                  0x010c
+#define US_RNPR                 0x0110
+#define US_RNCR                 0x0114
+#define US_TNPR                 0x0118
+#define US_TNCR                 0x011c
+#define US_PTCR                 0x0120
+#define US_PTSR                 0x0124
+
+
+
+
+/* USART3 Control Register */
+#define US_CR_RSTRX		(1 <<  2)
+#define US_CR_RSTTX		(1 <<  3)
+#define US_CR_RXEN		(1 <<  4)
+#define US_CR_RXDIS		(1 <<  5)
+#define US_CR_TXEN		(1 <<  6)
+#define US_CR_TXDIS		(1 <<  7)
+#define US_CR_RSTSTA		(1 <<  8)
+#define US_CR_STTBRK		(1 <<  9)
+#define US_CR_STPBRK		(1 << 10)
+
+#define US_CR_DTREN		(1 << 16)
+#define US_CR_DTRDIS		(1 << 17)
+#define US_CR_RTSEN		(1 << 18)
+#define US_CR_RTSDIS		(1 << 19)
+
+/* USART3 Mode Register */
+#define US_MR_MODE		(15 <<  0)
+#define US_MR_MODE_NORMAL	( 0 <<  0)
+#define US_MR_MODE_HWFLOW	( 2 <<  0)
+#define US_MR_CLKS		( 3 <<  4)
+#define US_MR_CLKS_CLOCK	( 0 <<  4)
+#define US_MR_CLKS_FDIV1	( 1 <<  4)
+#define US_MR_CLKS_SLOW		( 2 <<  4)
+#define US_MR_CLKS_EXT		( 3 <<  4)
+#define US_MR_CHRL_5BITS	( 0 <<  6)
+#define US_MR_CHRL_6BITS	( 1 <<  6)
+#define US_MR_CHRL_7BITS	( 2 <<  6)
+#define US_MR_CHRL_8BITS	( 3 <<  6)
+#define US_MR_SYNC		( 1 <<  8)
+#define US_MR_PAR_EVEN		( 0 <<  9)
+#define US_MR_PAR_ODD		( 1 <<  9)
+#define US_MR_PAR_SPACE		( 2 <<  9)
+#define US_MR_PAR_MARK		( 3 <<  9)
+#define US_MR_PAR_NONE		( 4 <<  9)
+#define US_MR_PAR_MDROP		( 6 <<  9)
+#define US_MR_NBSTOP_1BIT	( 0 << 12)
+#define US_MR_NBSTOP_1_5BIT	( 1 << 12)
+#define US_MR_NBSTOP_2BITS	( 2 << 12)
+#define US_MR_OVER		( 1 << 19)
+#define US_MR_OVER_X16		( 0 << 19)
+#define US_MR_OVER_X8		( 1 << 19)
+
+/* USART3 Channel Status Register */
+#define US_CSR_RXRDY		(1 <<  0)
+#define US_CSR_TXRDY		(1 <<  1)
+#define US_CSR_RXBRK		(1 <<  2)
+#define US_CSR_ENDRX		(1 <<  3)
+#define US_CSR_ENDTX		(1 <<  4)
+
+
+#define US_CSR_OVRE		(1 <<  5)
+#define US_CSR_FRAME		(1 <<  6)
+#define US_CSR_PARE		(1 <<  7)
+
+#define US_CSR_TXEMPTY		(1 <<  9)
+
+#define US_CSR_TXBUFE           (1 << 11)
+#define US_CSR_RXBUFF           (1 << 12)
+#define US_CSR_RIIC		(1 << 16)
+#define US_CSR_DSRIC		(1 << 17)
+#define US_CSR_DCDIC		(1 << 18)
+#define US_CSR_CTSIC		(1 << 19)
+#define US_CSR_RI		(1 << 20)
+#define US_CSR_DSR		(1 << 21)
+#define US_CSR_DCD		(1 << 22)
+#define US_CSR_CTS		(1 << 23)
+
+/* USART3 Baud Rate Generator Register */
+#define US_BRGR_CD_OFFSET	0
+#define US_BRGR_FP_OFFSET	16
+
+#define US_BRGR_CD_SIZE		16
+#define US_BRGR_FP_SIZE		3
+
+#define US_BRGR_CD		(0xFFFF <<  0)
+#define US_BRGR_FP		(     7 << 16)
+
+/*USART3 PDC Transfer Control Register */
+#define US_PTCR_RXTEN           (1 << 0)
+#define US_PTCR_RXTDIS          (1 << 1)
+#define US_PTCR_TXTEN           (1 << 8)
+#define US_PTCR_TXTDIS          (1 << 9)
+
+/*USART3 PDC Transfer Status Register */
+#define US_PTSR_RXTEN           (1 << 0)
+#define US_PTSR_TXTEN           (1 << 8)
+
+
+int usart_init(int baudrate);
+void usart_putc(char c);
+void usart_puts(const char *s);
+int usart_getc(void);
+int usart_tstc(void);
+void usart_setbrg(int baudrate, int cpu_clock);
+void set_usart_base(void *usart_base);
+
+
+_END_STD_C
+
+#endif /* MERLIN_USART3_H */

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/mrepeat.h

@@ -1,328 +1,328 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Preprocessor macro repeating utils.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _MREPEAT_H_
-#define _MREPEAT_H_
-
-#include "preprocessor.h"
-
-
-//! Maximal number of repetitions supported by MREPEAT.
-#define MREPEAT_LIMIT   256
-
-/*! \brief Macro repeat.
- *
- * This macro represents a horizontal repetition construct.
- *
- * \param count  The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT.
- * \param macro  A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with
- *               the current repetition number and the auxiliary data argument.
- * \param data   Auxiliary data passed to macro.
- *
- * \return       <tt>macro(0, data) macro(1, data) ... macro(count - 1, data)</tt>
- */
-#define MREPEAT(count, macro, data)         TPASTE2(MREPEAT, count)(macro, data)
-
-#define MREPEAT0(  macro, data)
-#define MREPEAT1(  macro, data)       MREPEAT0(  macro, data)   macro(  0, data)
-#define MREPEAT2(  macro, data)       MREPEAT1(  macro, data)   macro(  1, data)
-#define MREPEAT3(  macro, data)       MREPEAT2(  macro, data)   macro(  2, data)
-#define MREPEAT4(  macro, data)       MREPEAT3(  macro, data)   macro(  3, data)
-#define MREPEAT5(  macro, data)       MREPEAT4(  macro, data)   macro(  4, data)
-#define MREPEAT6(  macro, data)       MREPEAT5(  macro, data)   macro(  5, data)
-#define MREPEAT7(  macro, data)       MREPEAT6(  macro, data)   macro(  6, data)
-#define MREPEAT8(  macro, data)       MREPEAT7(  macro, data)   macro(  7, data)
-#define MREPEAT9(  macro, data)       MREPEAT8(  macro, data)   macro(  8, data)
-#define MREPEAT10( macro, data)       MREPEAT9(  macro, data)   macro(  9, data)
-#define MREPEAT11( macro, data)       MREPEAT10( macro, data)   macro( 10, data)
-#define MREPEAT12( macro, data)       MREPEAT11( macro, data)   macro( 11, data)
-#define MREPEAT13( macro, data)       MREPEAT12( macro, data)   macro( 12, data)
-#define MREPEAT14( macro, data)       MREPEAT13( macro, data)   macro( 13, data)
-#define MREPEAT15( macro, data)       MREPEAT14( macro, data)   macro( 14, data)
-#define MREPEAT16( macro, data)       MREPEAT15( macro, data)   macro( 15, data)
-#define MREPEAT17( macro, data)       MREPEAT16( macro, data)   macro( 16, data)
-#define MREPEAT18( macro, data)       MREPEAT17( macro, data)   macro( 17, data)
-#define MREPEAT19( macro, data)       MREPEAT18( macro, data)   macro( 18, data)
-#define MREPEAT20( macro, data)       MREPEAT19( macro, data)   macro( 19, data)
-#define MREPEAT21( macro, data)       MREPEAT20( macro, data)   macro( 20, data)
-#define MREPEAT22( macro, data)       MREPEAT21( macro, data)   macro( 21, data)
-#define MREPEAT23( macro, data)       MREPEAT22( macro, data)   macro( 22, data)
-#define MREPEAT24( macro, data)       MREPEAT23( macro, data)   macro( 23, data)
-#define MREPEAT25( macro, data)       MREPEAT24( macro, data)   macro( 24, data)
-#define MREPEAT26( macro, data)       MREPEAT25( macro, data)   macro( 25, data)
-#define MREPEAT27( macro, data)       MREPEAT26( macro, data)   macro( 26, data)
-#define MREPEAT28( macro, data)       MREPEAT27( macro, data)   macro( 27, data)
-#define MREPEAT29( macro, data)       MREPEAT28( macro, data)   macro( 28, data)
-#define MREPEAT30( macro, data)       MREPEAT29( macro, data)   macro( 29, data)
-#define MREPEAT31( macro, data)       MREPEAT30( macro, data)   macro( 30, data)
-#define MREPEAT32( macro, data)       MREPEAT31( macro, data)   macro( 31, data)
-#define MREPEAT33( macro, data)       MREPEAT32( macro, data)   macro( 32, data)
-#define MREPEAT34( macro, data)       MREPEAT33( macro, data)   macro( 33, data)
-#define MREPEAT35( macro, data)       MREPEAT34( macro, data)   macro( 34, data)
-#define MREPEAT36( macro, data)       MREPEAT35( macro, data)   macro( 35, data)
-#define MREPEAT37( macro, data)       MREPEAT36( macro, data)   macro( 36, data)
-#define MREPEAT38( macro, data)       MREPEAT37( macro, data)   macro( 37, data)
-#define MREPEAT39( macro, data)       MREPEAT38( macro, data)   macro( 38, data)
-#define MREPEAT40( macro, data)       MREPEAT39( macro, data)   macro( 39, data)
-#define MREPEAT41( macro, data)       MREPEAT40( macro, data)   macro( 40, data)
-#define MREPEAT42( macro, data)       MREPEAT41( macro, data)   macro( 41, data)
-#define MREPEAT43( macro, data)       MREPEAT42( macro, data)   macro( 42, data)
-#define MREPEAT44( macro, data)       MREPEAT43( macro, data)   macro( 43, data)
-#define MREPEAT45( macro, data)       MREPEAT44( macro, data)   macro( 44, data)
-#define MREPEAT46( macro, data)       MREPEAT45( macro, data)   macro( 45, data)
-#define MREPEAT47( macro, data)       MREPEAT46( macro, data)   macro( 46, data)
-#define MREPEAT48( macro, data)       MREPEAT47( macro, data)   macro( 47, data)
-#define MREPEAT49( macro, data)       MREPEAT48( macro, data)   macro( 48, data)
-#define MREPEAT50( macro, data)       MREPEAT49( macro, data)   macro( 49, data)
-#define MREPEAT51( macro, data)       MREPEAT50( macro, data)   macro( 50, data)
-#define MREPEAT52( macro, data)       MREPEAT51( macro, data)   macro( 51, data)
-#define MREPEAT53( macro, data)       MREPEAT52( macro, data)   macro( 52, data)
-#define MREPEAT54( macro, data)       MREPEAT53( macro, data)   macro( 53, data)
-#define MREPEAT55( macro, data)       MREPEAT54( macro, data)   macro( 54, data)
-#define MREPEAT56( macro, data)       MREPEAT55( macro, data)   macro( 55, data)
-#define MREPEAT57( macro, data)       MREPEAT56( macro, data)   macro( 56, data)
-#define MREPEAT58( macro, data)       MREPEAT57( macro, data)   macro( 57, data)
-#define MREPEAT59( macro, data)       MREPEAT58( macro, data)   macro( 58, data)
-#define MREPEAT60( macro, data)       MREPEAT59( macro, data)   macro( 59, data)
-#define MREPEAT61( macro, data)       MREPEAT60( macro, data)   macro( 60, data)
-#define MREPEAT62( macro, data)       MREPEAT61( macro, data)   macro( 61, data)
-#define MREPEAT63( macro, data)       MREPEAT62( macro, data)   macro( 62, data)
-#define MREPEAT64( macro, data)       MREPEAT63( macro, data)   macro( 63, data)
-#define MREPEAT65( macro, data)       MREPEAT64( macro, data)   macro( 64, data)
-#define MREPEAT66( macro, data)       MREPEAT65( macro, data)   macro( 65, data)
-#define MREPEAT67( macro, data)       MREPEAT66( macro, data)   macro( 66, data)
-#define MREPEAT68( macro, data)       MREPEAT67( macro, data)   macro( 67, data)
-#define MREPEAT69( macro, data)       MREPEAT68( macro, data)   macro( 68, data)
-#define MREPEAT70( macro, data)       MREPEAT69( macro, data)   macro( 69, data)
-#define MREPEAT71( macro, data)       MREPEAT70( macro, data)   macro( 70, data)
-#define MREPEAT72( macro, data)       MREPEAT71( macro, data)   macro( 71, data)
-#define MREPEAT73( macro, data)       MREPEAT72( macro, data)   macro( 72, data)
-#define MREPEAT74( macro, data)       MREPEAT73( macro, data)   macro( 73, data)
-#define MREPEAT75( macro, data)       MREPEAT74( macro, data)   macro( 74, data)
-#define MREPEAT76( macro, data)       MREPEAT75( macro, data)   macro( 75, data)
-#define MREPEAT77( macro, data)       MREPEAT76( macro, data)   macro( 76, data)
-#define MREPEAT78( macro, data)       MREPEAT77( macro, data)   macro( 77, data)
-#define MREPEAT79( macro, data)       MREPEAT78( macro, data)   macro( 78, data)
-#define MREPEAT80( macro, data)       MREPEAT79( macro, data)   macro( 79, data)
-#define MREPEAT81( macro, data)       MREPEAT80( macro, data)   macro( 80, data)
-#define MREPEAT82( macro, data)       MREPEAT81( macro, data)   macro( 81, data)
-#define MREPEAT83( macro, data)       MREPEAT82( macro, data)   macro( 82, data)
-#define MREPEAT84( macro, data)       MREPEAT83( macro, data)   macro( 83, data)
-#define MREPEAT85( macro, data)       MREPEAT84( macro, data)   macro( 84, data)
-#define MREPEAT86( macro, data)       MREPEAT85( macro, data)   macro( 85, data)
-#define MREPEAT87( macro, data)       MREPEAT86( macro, data)   macro( 86, data)
-#define MREPEAT88( macro, data)       MREPEAT87( macro, data)   macro( 87, data)
-#define MREPEAT89( macro, data)       MREPEAT88( macro, data)   macro( 88, data)
-#define MREPEAT90( macro, data)       MREPEAT89( macro, data)   macro( 89, data)
-#define MREPEAT91( macro, data)       MREPEAT90( macro, data)   macro( 90, data)
-#define MREPEAT92( macro, data)       MREPEAT91( macro, data)   macro( 91, data)
-#define MREPEAT93( macro, data)       MREPEAT92( macro, data)   macro( 92, data)
-#define MREPEAT94( macro, data)       MREPEAT93( macro, data)   macro( 93, data)
-#define MREPEAT95( macro, data)       MREPEAT94( macro, data)   macro( 94, data)
-#define MREPEAT96( macro, data)       MREPEAT95( macro, data)   macro( 95, data)
-#define MREPEAT97( macro, data)       MREPEAT96( macro, data)   macro( 96, data)
-#define MREPEAT98( macro, data)       MREPEAT97( macro, data)   macro( 97, data)
-#define MREPEAT99( macro, data)       MREPEAT98( macro, data)   macro( 98, data)
-#define MREPEAT100(macro, data)       MREPEAT99( macro, data)   macro( 99, data)
-#define MREPEAT101(macro, data)       MREPEAT100(macro, data)   macro(100, data)
-#define MREPEAT102(macro, data)       MREPEAT101(macro, data)   macro(101, data)
-#define MREPEAT103(macro, data)       MREPEAT102(macro, data)   macro(102, data)
-#define MREPEAT104(macro, data)       MREPEAT103(macro, data)   macro(103, data)
-#define MREPEAT105(macro, data)       MREPEAT104(macro, data)   macro(104, data)
-#define MREPEAT106(macro, data)       MREPEAT105(macro, data)   macro(105, data)
-#define MREPEAT107(macro, data)       MREPEAT106(macro, data)   macro(106, data)
-#define MREPEAT108(macro, data)       MREPEAT107(macro, data)   macro(107, data)
-#define MREPEAT109(macro, data)       MREPEAT108(macro, data)   macro(108, data)
-#define MREPEAT110(macro, data)       MREPEAT109(macro, data)   macro(109, data)
-#define MREPEAT111(macro, data)       MREPEAT110(macro, data)   macro(110, data)
-#define MREPEAT112(macro, data)       MREPEAT111(macro, data)   macro(111, data)
-#define MREPEAT113(macro, data)       MREPEAT112(macro, data)   macro(112, data)
-#define MREPEAT114(macro, data)       MREPEAT113(macro, data)   macro(113, data)
-#define MREPEAT115(macro, data)       MREPEAT114(macro, data)   macro(114, data)
-#define MREPEAT116(macro, data)       MREPEAT115(macro, data)   macro(115, data)
-#define MREPEAT117(macro, data)       MREPEAT116(macro, data)   macro(116, data)
-#define MREPEAT118(macro, data)       MREPEAT117(macro, data)   macro(117, data)
-#define MREPEAT119(macro, data)       MREPEAT118(macro, data)   macro(118, data)
-#define MREPEAT120(macro, data)       MREPEAT119(macro, data)   macro(119, data)
-#define MREPEAT121(macro, data)       MREPEAT120(macro, data)   macro(120, data)
-#define MREPEAT122(macro, data)       MREPEAT121(macro, data)   macro(121, data)
-#define MREPEAT123(macro, data)       MREPEAT122(macro, data)   macro(122, data)
-#define MREPEAT124(macro, data)       MREPEAT123(macro, data)   macro(123, data)
-#define MREPEAT125(macro, data)       MREPEAT124(macro, data)   macro(124, data)
-#define MREPEAT126(macro, data)       MREPEAT125(macro, data)   macro(125, data)
-#define MREPEAT127(macro, data)       MREPEAT126(macro, data)   macro(126, data)
-#define MREPEAT128(macro, data)       MREPEAT127(macro, data)   macro(127, data)
-#define MREPEAT129(macro, data)       MREPEAT128(macro, data)   macro(128, data)
-#define MREPEAT130(macro, data)       MREPEAT129(macro, data)   macro(129, data)
-#define MREPEAT131(macro, data)       MREPEAT130(macro, data)   macro(130, data)
-#define MREPEAT132(macro, data)       MREPEAT131(macro, data)   macro(131, data)
-#define MREPEAT133(macro, data)       MREPEAT132(macro, data)   macro(132, data)
-#define MREPEAT134(macro, data)       MREPEAT133(macro, data)   macro(133, data)
-#define MREPEAT135(macro, data)       MREPEAT134(macro, data)   macro(134, data)
-#define MREPEAT136(macro, data)       MREPEAT135(macro, data)   macro(135, data)
-#define MREPEAT137(macro, data)       MREPEAT136(macro, data)   macro(136, data)
-#define MREPEAT138(macro, data)       MREPEAT137(macro, data)   macro(137, data)
-#define MREPEAT139(macro, data)       MREPEAT138(macro, data)   macro(138, data)
-#define MREPEAT140(macro, data)       MREPEAT139(macro, data)   macro(139, data)
-#define MREPEAT141(macro, data)       MREPEAT140(macro, data)   macro(140, data)
-#define MREPEAT142(macro, data)       MREPEAT141(macro, data)   macro(141, data)
-#define MREPEAT143(macro, data)       MREPEAT142(macro, data)   macro(142, data)
-#define MREPEAT144(macro, data)       MREPEAT143(macro, data)   macro(143, data)
-#define MREPEAT145(macro, data)       MREPEAT144(macro, data)   macro(144, data)
-#define MREPEAT146(macro, data)       MREPEAT145(macro, data)   macro(145, data)
-#define MREPEAT147(macro, data)       MREPEAT146(macro, data)   macro(146, data)
-#define MREPEAT148(macro, data)       MREPEAT147(macro, data)   macro(147, data)
-#define MREPEAT149(macro, data)       MREPEAT148(macro, data)   macro(148, data)
-#define MREPEAT150(macro, data)       MREPEAT149(macro, data)   macro(149, data)
-#define MREPEAT151(macro, data)       MREPEAT150(macro, data)   macro(150, data)
-#define MREPEAT152(macro, data)       MREPEAT151(macro, data)   macro(151, data)
-#define MREPEAT153(macro, data)       MREPEAT152(macro, data)   macro(152, data)
-#define MREPEAT154(macro, data)       MREPEAT153(macro, data)   macro(153, data)
-#define MREPEAT155(macro, data)       MREPEAT154(macro, data)   macro(154, data)
-#define MREPEAT156(macro, data)       MREPEAT155(macro, data)   macro(155, data)
-#define MREPEAT157(macro, data)       MREPEAT156(macro, data)   macro(156, data)
-#define MREPEAT158(macro, data)       MREPEAT157(macro, data)   macro(157, data)
-#define MREPEAT159(macro, data)       MREPEAT158(macro, data)   macro(158, data)
-#define MREPEAT160(macro, data)       MREPEAT159(macro, data)   macro(159, data)
-#define MREPEAT161(macro, data)       MREPEAT160(macro, data)   macro(160, data)
-#define MREPEAT162(macro, data)       MREPEAT161(macro, data)   macro(161, data)
-#define MREPEAT163(macro, data)       MREPEAT162(macro, data)   macro(162, data)
-#define MREPEAT164(macro, data)       MREPEAT163(macro, data)   macro(163, data)
-#define MREPEAT165(macro, data)       MREPEAT164(macro, data)   macro(164, data)
-#define MREPEAT166(macro, data)       MREPEAT165(macro, data)   macro(165, data)
-#define MREPEAT167(macro, data)       MREPEAT166(macro, data)   macro(166, data)
-#define MREPEAT168(macro, data)       MREPEAT167(macro, data)   macro(167, data)
-#define MREPEAT169(macro, data)       MREPEAT168(macro, data)   macro(168, data)
-#define MREPEAT170(macro, data)       MREPEAT169(macro, data)   macro(169, data)
-#define MREPEAT171(macro, data)       MREPEAT170(macro, data)   macro(170, data)
-#define MREPEAT172(macro, data)       MREPEAT171(macro, data)   macro(171, data)
-#define MREPEAT173(macro, data)       MREPEAT172(macro, data)   macro(172, data)
-#define MREPEAT174(macro, data)       MREPEAT173(macro, data)   macro(173, data)
-#define MREPEAT175(macro, data)       MREPEAT174(macro, data)   macro(174, data)
-#define MREPEAT176(macro, data)       MREPEAT175(macro, data)   macro(175, data)
-#define MREPEAT177(macro, data)       MREPEAT176(macro, data)   macro(176, data)
-#define MREPEAT178(macro, data)       MREPEAT177(macro, data)   macro(177, data)
-#define MREPEAT179(macro, data)       MREPEAT178(macro, data)   macro(178, data)
-#define MREPEAT180(macro, data)       MREPEAT179(macro, data)   macro(179, data)
-#define MREPEAT181(macro, data)       MREPEAT180(macro, data)   macro(180, data)
-#define MREPEAT182(macro, data)       MREPEAT181(macro, data)   macro(181, data)
-#define MREPEAT183(macro, data)       MREPEAT182(macro, data)   macro(182, data)
-#define MREPEAT184(macro, data)       MREPEAT183(macro, data)   macro(183, data)
-#define MREPEAT185(macro, data)       MREPEAT184(macro, data)   macro(184, data)
-#define MREPEAT186(macro, data)       MREPEAT185(macro, data)   macro(185, data)
-#define MREPEAT187(macro, data)       MREPEAT186(macro, data)   macro(186, data)
-#define MREPEAT188(macro, data)       MREPEAT187(macro, data)   macro(187, data)
-#define MREPEAT189(macro, data)       MREPEAT188(macro, data)   macro(188, data)
-#define MREPEAT190(macro, data)       MREPEAT189(macro, data)   macro(189, data)
-#define MREPEAT191(macro, data)       MREPEAT190(macro, data)   macro(190, data)
-#define MREPEAT192(macro, data)       MREPEAT191(macro, data)   macro(191, data)
-#define MREPEAT193(macro, data)       MREPEAT192(macro, data)   macro(192, data)
-#define MREPEAT194(macro, data)       MREPEAT193(macro, data)   macro(193, data)
-#define MREPEAT195(macro, data)       MREPEAT194(macro, data)   macro(194, data)
-#define MREPEAT196(macro, data)       MREPEAT195(macro, data)   macro(195, data)
-#define MREPEAT197(macro, data)       MREPEAT196(macro, data)   macro(196, data)
-#define MREPEAT198(macro, data)       MREPEAT197(macro, data)   macro(197, data)
-#define MREPEAT199(macro, data)       MREPEAT198(macro, data)   macro(198, data)
-#define MREPEAT200(macro, data)       MREPEAT199(macro, data)   macro(199, data)
-#define MREPEAT201(macro, data)       MREPEAT200(macro, data)   macro(200, data)
-#define MREPEAT202(macro, data)       MREPEAT201(macro, data)   macro(201, data)
-#define MREPEAT203(macro, data)       MREPEAT202(macro, data)   macro(202, data)
-#define MREPEAT204(macro, data)       MREPEAT203(macro, data)   macro(203, data)
-#define MREPEAT205(macro, data)       MREPEAT204(macro, data)   macro(204, data)
-#define MREPEAT206(macro, data)       MREPEAT205(macro, data)   macro(205, data)
-#define MREPEAT207(macro, data)       MREPEAT206(macro, data)   macro(206, data)
-#define MREPEAT208(macro, data)       MREPEAT207(macro, data)   macro(207, data)
-#define MREPEAT209(macro, data)       MREPEAT208(macro, data)   macro(208, data)
-#define MREPEAT210(macro, data)       MREPEAT209(macro, data)   macro(209, data)
-#define MREPEAT211(macro, data)       MREPEAT210(macro, data)   macro(210, data)
-#define MREPEAT212(macro, data)       MREPEAT211(macro, data)   macro(211, data)
-#define MREPEAT213(macro, data)       MREPEAT212(macro, data)   macro(212, data)
-#define MREPEAT214(macro, data)       MREPEAT213(macro, data)   macro(213, data)
-#define MREPEAT215(macro, data)       MREPEAT214(macro, data)   macro(214, data)
-#define MREPEAT216(macro, data)       MREPEAT215(macro, data)   macro(215, data)
-#define MREPEAT217(macro, data)       MREPEAT216(macro, data)   macro(216, data)
-#define MREPEAT218(macro, data)       MREPEAT217(macro, data)   macro(217, data)
-#define MREPEAT219(macro, data)       MREPEAT218(macro, data)   macro(218, data)
-#define MREPEAT220(macro, data)       MREPEAT219(macro, data)   macro(219, data)
-#define MREPEAT221(macro, data)       MREPEAT220(macro, data)   macro(220, data)
-#define MREPEAT222(macro, data)       MREPEAT221(macro, data)   macro(221, data)
-#define MREPEAT223(macro, data)       MREPEAT222(macro, data)   macro(222, data)
-#define MREPEAT224(macro, data)       MREPEAT223(macro, data)   macro(223, data)
-#define MREPEAT225(macro, data)       MREPEAT224(macro, data)   macro(224, data)
-#define MREPEAT226(macro, data)       MREPEAT225(macro, data)   macro(225, data)
-#define MREPEAT227(macro, data)       MREPEAT226(macro, data)   macro(226, data)
-#define MREPEAT228(macro, data)       MREPEAT227(macro, data)   macro(227, data)
-#define MREPEAT229(macro, data)       MREPEAT228(macro, data)   macro(228, data)
-#define MREPEAT230(macro, data)       MREPEAT229(macro, data)   macro(229, data)
-#define MREPEAT231(macro, data)       MREPEAT230(macro, data)   macro(230, data)
-#define MREPEAT232(macro, data)       MREPEAT231(macro, data)   macro(231, data)
-#define MREPEAT233(macro, data)       MREPEAT232(macro, data)   macro(232, data)
-#define MREPEAT234(macro, data)       MREPEAT233(macro, data)   macro(233, data)
-#define MREPEAT235(macro, data)       MREPEAT234(macro, data)   macro(234, data)
-#define MREPEAT236(macro, data)       MREPEAT235(macro, data)   macro(235, data)
-#define MREPEAT237(macro, data)       MREPEAT236(macro, data)   macro(236, data)
-#define MREPEAT238(macro, data)       MREPEAT237(macro, data)   macro(237, data)
-#define MREPEAT239(macro, data)       MREPEAT238(macro, data)   macro(238, data)
-#define MREPEAT240(macro, data)       MREPEAT239(macro, data)   macro(239, data)
-#define MREPEAT241(macro, data)       MREPEAT240(macro, data)   macro(240, data)
-#define MREPEAT242(macro, data)       MREPEAT241(macro, data)   macro(241, data)
-#define MREPEAT243(macro, data)       MREPEAT242(macro, data)   macro(242, data)
-#define MREPEAT244(macro, data)       MREPEAT243(macro, data)   macro(243, data)
-#define MREPEAT245(macro, data)       MREPEAT244(macro, data)   macro(244, data)
-#define MREPEAT246(macro, data)       MREPEAT245(macro, data)   macro(245, data)
-#define MREPEAT247(macro, data)       MREPEAT246(macro, data)   macro(246, data)
-#define MREPEAT248(macro, data)       MREPEAT247(macro, data)   macro(247, data)
-#define MREPEAT249(macro, data)       MREPEAT248(macro, data)   macro(248, data)
-#define MREPEAT250(macro, data)       MREPEAT249(macro, data)   macro(249, data)
-#define MREPEAT251(macro, data)       MREPEAT250(macro, data)   macro(250, data)
-#define MREPEAT252(macro, data)       MREPEAT251(macro, data)   macro(251, data)
-#define MREPEAT253(macro, data)       MREPEAT252(macro, data)   macro(252, data)
-#define MREPEAT254(macro, data)       MREPEAT253(macro, data)   macro(253, data)
-#define MREPEAT255(macro, data)       MREPEAT254(macro, data)   macro(254, data)
-#define MREPEAT256(macro, data)       MREPEAT255(macro, data)   macro(255, data)
-
-
-#endif  // _MREPEAT_H_
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Preprocessor macro repeating utils.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _MREPEAT_H_
+#define _MREPEAT_H_
+
+#include "preprocessor.h"
+
+
+//! Maximal number of repetitions supported by MREPEAT.
+#define MREPEAT_LIMIT   256
+
+/*! \brief Macro repeat.
+ *
+ * This macro represents a horizontal repetition construct.
+ *
+ * \param count  The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT.
+ * \param macro  A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with
+ *               the current repetition number and the auxiliary data argument.
+ * \param data   Auxiliary data passed to macro.
+ *
+ * \return       <tt>macro(0, data) macro(1, data) ... macro(count - 1, data)</tt>
+ */
+#define MREPEAT(count, macro, data)         TPASTE2(MREPEAT, count)(macro, data)
+
+#define MREPEAT0(  macro, data)
+#define MREPEAT1(  macro, data)       MREPEAT0(  macro, data)   macro(  0, data)
+#define MREPEAT2(  macro, data)       MREPEAT1(  macro, data)   macro(  1, data)
+#define MREPEAT3(  macro, data)       MREPEAT2(  macro, data)   macro(  2, data)
+#define MREPEAT4(  macro, data)       MREPEAT3(  macro, data)   macro(  3, data)
+#define MREPEAT5(  macro, data)       MREPEAT4(  macro, data)   macro(  4, data)
+#define MREPEAT6(  macro, data)       MREPEAT5(  macro, data)   macro(  5, data)
+#define MREPEAT7(  macro, data)       MREPEAT6(  macro, data)   macro(  6, data)
+#define MREPEAT8(  macro, data)       MREPEAT7(  macro, data)   macro(  7, data)
+#define MREPEAT9(  macro, data)       MREPEAT8(  macro, data)   macro(  8, data)
+#define MREPEAT10( macro, data)       MREPEAT9(  macro, data)   macro(  9, data)
+#define MREPEAT11( macro, data)       MREPEAT10( macro, data)   macro( 10, data)
+#define MREPEAT12( macro, data)       MREPEAT11( macro, data)   macro( 11, data)
+#define MREPEAT13( macro, data)       MREPEAT12( macro, data)   macro( 12, data)
+#define MREPEAT14( macro, data)       MREPEAT13( macro, data)   macro( 13, data)
+#define MREPEAT15( macro, data)       MREPEAT14( macro, data)   macro( 14, data)
+#define MREPEAT16( macro, data)       MREPEAT15( macro, data)   macro( 15, data)
+#define MREPEAT17( macro, data)       MREPEAT16( macro, data)   macro( 16, data)
+#define MREPEAT18( macro, data)       MREPEAT17( macro, data)   macro( 17, data)
+#define MREPEAT19( macro, data)       MREPEAT18( macro, data)   macro( 18, data)
+#define MREPEAT20( macro, data)       MREPEAT19( macro, data)   macro( 19, data)
+#define MREPEAT21( macro, data)       MREPEAT20( macro, data)   macro( 20, data)
+#define MREPEAT22( macro, data)       MREPEAT21( macro, data)   macro( 21, data)
+#define MREPEAT23( macro, data)       MREPEAT22( macro, data)   macro( 22, data)
+#define MREPEAT24( macro, data)       MREPEAT23( macro, data)   macro( 23, data)
+#define MREPEAT25( macro, data)       MREPEAT24( macro, data)   macro( 24, data)
+#define MREPEAT26( macro, data)       MREPEAT25( macro, data)   macro( 25, data)
+#define MREPEAT27( macro, data)       MREPEAT26( macro, data)   macro( 26, data)
+#define MREPEAT28( macro, data)       MREPEAT27( macro, data)   macro( 27, data)
+#define MREPEAT29( macro, data)       MREPEAT28( macro, data)   macro( 28, data)
+#define MREPEAT30( macro, data)       MREPEAT29( macro, data)   macro( 29, data)
+#define MREPEAT31( macro, data)       MREPEAT30( macro, data)   macro( 30, data)
+#define MREPEAT32( macro, data)       MREPEAT31( macro, data)   macro( 31, data)
+#define MREPEAT33( macro, data)       MREPEAT32( macro, data)   macro( 32, data)
+#define MREPEAT34( macro, data)       MREPEAT33( macro, data)   macro( 33, data)
+#define MREPEAT35( macro, data)       MREPEAT34( macro, data)   macro( 34, data)
+#define MREPEAT36( macro, data)       MREPEAT35( macro, data)   macro( 35, data)
+#define MREPEAT37( macro, data)       MREPEAT36( macro, data)   macro( 36, data)
+#define MREPEAT38( macro, data)       MREPEAT37( macro, data)   macro( 37, data)
+#define MREPEAT39( macro, data)       MREPEAT38( macro, data)   macro( 38, data)
+#define MREPEAT40( macro, data)       MREPEAT39( macro, data)   macro( 39, data)
+#define MREPEAT41( macro, data)       MREPEAT40( macro, data)   macro( 40, data)
+#define MREPEAT42( macro, data)       MREPEAT41( macro, data)   macro( 41, data)
+#define MREPEAT43( macro, data)       MREPEAT42( macro, data)   macro( 42, data)
+#define MREPEAT44( macro, data)       MREPEAT43( macro, data)   macro( 43, data)
+#define MREPEAT45( macro, data)       MREPEAT44( macro, data)   macro( 44, data)
+#define MREPEAT46( macro, data)       MREPEAT45( macro, data)   macro( 45, data)
+#define MREPEAT47( macro, data)       MREPEAT46( macro, data)   macro( 46, data)
+#define MREPEAT48( macro, data)       MREPEAT47( macro, data)   macro( 47, data)
+#define MREPEAT49( macro, data)       MREPEAT48( macro, data)   macro( 48, data)
+#define MREPEAT50( macro, data)       MREPEAT49( macro, data)   macro( 49, data)
+#define MREPEAT51( macro, data)       MREPEAT50( macro, data)   macro( 50, data)
+#define MREPEAT52( macro, data)       MREPEAT51( macro, data)   macro( 51, data)
+#define MREPEAT53( macro, data)       MREPEAT52( macro, data)   macro( 52, data)
+#define MREPEAT54( macro, data)       MREPEAT53( macro, data)   macro( 53, data)
+#define MREPEAT55( macro, data)       MREPEAT54( macro, data)   macro( 54, data)
+#define MREPEAT56( macro, data)       MREPEAT55( macro, data)   macro( 55, data)
+#define MREPEAT57( macro, data)       MREPEAT56( macro, data)   macro( 56, data)
+#define MREPEAT58( macro, data)       MREPEAT57( macro, data)   macro( 57, data)
+#define MREPEAT59( macro, data)       MREPEAT58( macro, data)   macro( 58, data)
+#define MREPEAT60( macro, data)       MREPEAT59( macro, data)   macro( 59, data)
+#define MREPEAT61( macro, data)       MREPEAT60( macro, data)   macro( 60, data)
+#define MREPEAT62( macro, data)       MREPEAT61( macro, data)   macro( 61, data)
+#define MREPEAT63( macro, data)       MREPEAT62( macro, data)   macro( 62, data)
+#define MREPEAT64( macro, data)       MREPEAT63( macro, data)   macro( 63, data)
+#define MREPEAT65( macro, data)       MREPEAT64( macro, data)   macro( 64, data)
+#define MREPEAT66( macro, data)       MREPEAT65( macro, data)   macro( 65, data)
+#define MREPEAT67( macro, data)       MREPEAT66( macro, data)   macro( 66, data)
+#define MREPEAT68( macro, data)       MREPEAT67( macro, data)   macro( 67, data)
+#define MREPEAT69( macro, data)       MREPEAT68( macro, data)   macro( 68, data)
+#define MREPEAT70( macro, data)       MREPEAT69( macro, data)   macro( 69, data)
+#define MREPEAT71( macro, data)       MREPEAT70( macro, data)   macro( 70, data)
+#define MREPEAT72( macro, data)       MREPEAT71( macro, data)   macro( 71, data)
+#define MREPEAT73( macro, data)       MREPEAT72( macro, data)   macro( 72, data)
+#define MREPEAT74( macro, data)       MREPEAT73( macro, data)   macro( 73, data)
+#define MREPEAT75( macro, data)       MREPEAT74( macro, data)   macro( 74, data)
+#define MREPEAT76( macro, data)       MREPEAT75( macro, data)   macro( 75, data)
+#define MREPEAT77( macro, data)       MREPEAT76( macro, data)   macro( 76, data)
+#define MREPEAT78( macro, data)       MREPEAT77( macro, data)   macro( 77, data)
+#define MREPEAT79( macro, data)       MREPEAT78( macro, data)   macro( 78, data)
+#define MREPEAT80( macro, data)       MREPEAT79( macro, data)   macro( 79, data)
+#define MREPEAT81( macro, data)       MREPEAT80( macro, data)   macro( 80, data)
+#define MREPEAT82( macro, data)       MREPEAT81( macro, data)   macro( 81, data)
+#define MREPEAT83( macro, data)       MREPEAT82( macro, data)   macro( 82, data)
+#define MREPEAT84( macro, data)       MREPEAT83( macro, data)   macro( 83, data)
+#define MREPEAT85( macro, data)       MREPEAT84( macro, data)   macro( 84, data)
+#define MREPEAT86( macro, data)       MREPEAT85( macro, data)   macro( 85, data)
+#define MREPEAT87( macro, data)       MREPEAT86( macro, data)   macro( 86, data)
+#define MREPEAT88( macro, data)       MREPEAT87( macro, data)   macro( 87, data)
+#define MREPEAT89( macro, data)       MREPEAT88( macro, data)   macro( 88, data)
+#define MREPEAT90( macro, data)       MREPEAT89( macro, data)   macro( 89, data)
+#define MREPEAT91( macro, data)       MREPEAT90( macro, data)   macro( 90, data)
+#define MREPEAT92( macro, data)       MREPEAT91( macro, data)   macro( 91, data)
+#define MREPEAT93( macro, data)       MREPEAT92( macro, data)   macro( 92, data)
+#define MREPEAT94( macro, data)       MREPEAT93( macro, data)   macro( 93, data)
+#define MREPEAT95( macro, data)       MREPEAT94( macro, data)   macro( 94, data)
+#define MREPEAT96( macro, data)       MREPEAT95( macro, data)   macro( 95, data)
+#define MREPEAT97( macro, data)       MREPEAT96( macro, data)   macro( 96, data)
+#define MREPEAT98( macro, data)       MREPEAT97( macro, data)   macro( 97, data)
+#define MREPEAT99( macro, data)       MREPEAT98( macro, data)   macro( 98, data)
+#define MREPEAT100(macro, data)       MREPEAT99( macro, data)   macro( 99, data)
+#define MREPEAT101(macro, data)       MREPEAT100(macro, data)   macro(100, data)
+#define MREPEAT102(macro, data)       MREPEAT101(macro, data)   macro(101, data)
+#define MREPEAT103(macro, data)       MREPEAT102(macro, data)   macro(102, data)
+#define MREPEAT104(macro, data)       MREPEAT103(macro, data)   macro(103, data)
+#define MREPEAT105(macro, data)       MREPEAT104(macro, data)   macro(104, data)
+#define MREPEAT106(macro, data)       MREPEAT105(macro, data)   macro(105, data)
+#define MREPEAT107(macro, data)       MREPEAT106(macro, data)   macro(106, data)
+#define MREPEAT108(macro, data)       MREPEAT107(macro, data)   macro(107, data)
+#define MREPEAT109(macro, data)       MREPEAT108(macro, data)   macro(108, data)
+#define MREPEAT110(macro, data)       MREPEAT109(macro, data)   macro(109, data)
+#define MREPEAT111(macro, data)       MREPEAT110(macro, data)   macro(110, data)
+#define MREPEAT112(macro, data)       MREPEAT111(macro, data)   macro(111, data)
+#define MREPEAT113(macro, data)       MREPEAT112(macro, data)   macro(112, data)
+#define MREPEAT114(macro, data)       MREPEAT113(macro, data)   macro(113, data)
+#define MREPEAT115(macro, data)       MREPEAT114(macro, data)   macro(114, data)
+#define MREPEAT116(macro, data)       MREPEAT115(macro, data)   macro(115, data)
+#define MREPEAT117(macro, data)       MREPEAT116(macro, data)   macro(116, data)
+#define MREPEAT118(macro, data)       MREPEAT117(macro, data)   macro(117, data)
+#define MREPEAT119(macro, data)       MREPEAT118(macro, data)   macro(118, data)
+#define MREPEAT120(macro, data)       MREPEAT119(macro, data)   macro(119, data)
+#define MREPEAT121(macro, data)       MREPEAT120(macro, data)   macro(120, data)
+#define MREPEAT122(macro, data)       MREPEAT121(macro, data)   macro(121, data)
+#define MREPEAT123(macro, data)       MREPEAT122(macro, data)   macro(122, data)
+#define MREPEAT124(macro, data)       MREPEAT123(macro, data)   macro(123, data)
+#define MREPEAT125(macro, data)       MREPEAT124(macro, data)   macro(124, data)
+#define MREPEAT126(macro, data)       MREPEAT125(macro, data)   macro(125, data)
+#define MREPEAT127(macro, data)       MREPEAT126(macro, data)   macro(126, data)
+#define MREPEAT128(macro, data)       MREPEAT127(macro, data)   macro(127, data)
+#define MREPEAT129(macro, data)       MREPEAT128(macro, data)   macro(128, data)
+#define MREPEAT130(macro, data)       MREPEAT129(macro, data)   macro(129, data)
+#define MREPEAT131(macro, data)       MREPEAT130(macro, data)   macro(130, data)
+#define MREPEAT132(macro, data)       MREPEAT131(macro, data)   macro(131, data)
+#define MREPEAT133(macro, data)       MREPEAT132(macro, data)   macro(132, data)
+#define MREPEAT134(macro, data)       MREPEAT133(macro, data)   macro(133, data)
+#define MREPEAT135(macro, data)       MREPEAT134(macro, data)   macro(134, data)
+#define MREPEAT136(macro, data)       MREPEAT135(macro, data)   macro(135, data)
+#define MREPEAT137(macro, data)       MREPEAT136(macro, data)   macro(136, data)
+#define MREPEAT138(macro, data)       MREPEAT137(macro, data)   macro(137, data)
+#define MREPEAT139(macro, data)       MREPEAT138(macro, data)   macro(138, data)
+#define MREPEAT140(macro, data)       MREPEAT139(macro, data)   macro(139, data)
+#define MREPEAT141(macro, data)       MREPEAT140(macro, data)   macro(140, data)
+#define MREPEAT142(macro, data)       MREPEAT141(macro, data)   macro(141, data)
+#define MREPEAT143(macro, data)       MREPEAT142(macro, data)   macro(142, data)
+#define MREPEAT144(macro, data)       MREPEAT143(macro, data)   macro(143, data)
+#define MREPEAT145(macro, data)       MREPEAT144(macro, data)   macro(144, data)
+#define MREPEAT146(macro, data)       MREPEAT145(macro, data)   macro(145, data)
+#define MREPEAT147(macro, data)       MREPEAT146(macro, data)   macro(146, data)
+#define MREPEAT148(macro, data)       MREPEAT147(macro, data)   macro(147, data)
+#define MREPEAT149(macro, data)       MREPEAT148(macro, data)   macro(148, data)
+#define MREPEAT150(macro, data)       MREPEAT149(macro, data)   macro(149, data)
+#define MREPEAT151(macro, data)       MREPEAT150(macro, data)   macro(150, data)
+#define MREPEAT152(macro, data)       MREPEAT151(macro, data)   macro(151, data)
+#define MREPEAT153(macro, data)       MREPEAT152(macro, data)   macro(152, data)
+#define MREPEAT154(macro, data)       MREPEAT153(macro, data)   macro(153, data)
+#define MREPEAT155(macro, data)       MREPEAT154(macro, data)   macro(154, data)
+#define MREPEAT156(macro, data)       MREPEAT155(macro, data)   macro(155, data)
+#define MREPEAT157(macro, data)       MREPEAT156(macro, data)   macro(156, data)
+#define MREPEAT158(macro, data)       MREPEAT157(macro, data)   macro(157, data)
+#define MREPEAT159(macro, data)       MREPEAT158(macro, data)   macro(158, data)
+#define MREPEAT160(macro, data)       MREPEAT159(macro, data)   macro(159, data)
+#define MREPEAT161(macro, data)       MREPEAT160(macro, data)   macro(160, data)
+#define MREPEAT162(macro, data)       MREPEAT161(macro, data)   macro(161, data)
+#define MREPEAT163(macro, data)       MREPEAT162(macro, data)   macro(162, data)
+#define MREPEAT164(macro, data)       MREPEAT163(macro, data)   macro(163, data)
+#define MREPEAT165(macro, data)       MREPEAT164(macro, data)   macro(164, data)
+#define MREPEAT166(macro, data)       MREPEAT165(macro, data)   macro(165, data)
+#define MREPEAT167(macro, data)       MREPEAT166(macro, data)   macro(166, data)
+#define MREPEAT168(macro, data)       MREPEAT167(macro, data)   macro(167, data)
+#define MREPEAT169(macro, data)       MREPEAT168(macro, data)   macro(168, data)
+#define MREPEAT170(macro, data)       MREPEAT169(macro, data)   macro(169, data)
+#define MREPEAT171(macro, data)       MREPEAT170(macro, data)   macro(170, data)
+#define MREPEAT172(macro, data)       MREPEAT171(macro, data)   macro(171, data)
+#define MREPEAT173(macro, data)       MREPEAT172(macro, data)   macro(172, data)
+#define MREPEAT174(macro, data)       MREPEAT173(macro, data)   macro(173, data)
+#define MREPEAT175(macro, data)       MREPEAT174(macro, data)   macro(174, data)
+#define MREPEAT176(macro, data)       MREPEAT175(macro, data)   macro(175, data)
+#define MREPEAT177(macro, data)       MREPEAT176(macro, data)   macro(176, data)
+#define MREPEAT178(macro, data)       MREPEAT177(macro, data)   macro(177, data)
+#define MREPEAT179(macro, data)       MREPEAT178(macro, data)   macro(178, data)
+#define MREPEAT180(macro, data)       MREPEAT179(macro, data)   macro(179, data)
+#define MREPEAT181(macro, data)       MREPEAT180(macro, data)   macro(180, data)
+#define MREPEAT182(macro, data)       MREPEAT181(macro, data)   macro(181, data)
+#define MREPEAT183(macro, data)       MREPEAT182(macro, data)   macro(182, data)
+#define MREPEAT184(macro, data)       MREPEAT183(macro, data)   macro(183, data)
+#define MREPEAT185(macro, data)       MREPEAT184(macro, data)   macro(184, data)
+#define MREPEAT186(macro, data)       MREPEAT185(macro, data)   macro(185, data)
+#define MREPEAT187(macro, data)       MREPEAT186(macro, data)   macro(186, data)
+#define MREPEAT188(macro, data)       MREPEAT187(macro, data)   macro(187, data)
+#define MREPEAT189(macro, data)       MREPEAT188(macro, data)   macro(188, data)
+#define MREPEAT190(macro, data)       MREPEAT189(macro, data)   macro(189, data)
+#define MREPEAT191(macro, data)       MREPEAT190(macro, data)   macro(190, data)
+#define MREPEAT192(macro, data)       MREPEAT191(macro, data)   macro(191, data)
+#define MREPEAT193(macro, data)       MREPEAT192(macro, data)   macro(192, data)
+#define MREPEAT194(macro, data)       MREPEAT193(macro, data)   macro(193, data)
+#define MREPEAT195(macro, data)       MREPEAT194(macro, data)   macro(194, data)
+#define MREPEAT196(macro, data)       MREPEAT195(macro, data)   macro(195, data)
+#define MREPEAT197(macro, data)       MREPEAT196(macro, data)   macro(196, data)
+#define MREPEAT198(macro, data)       MREPEAT197(macro, data)   macro(197, data)
+#define MREPEAT199(macro, data)       MREPEAT198(macro, data)   macro(198, data)
+#define MREPEAT200(macro, data)       MREPEAT199(macro, data)   macro(199, data)
+#define MREPEAT201(macro, data)       MREPEAT200(macro, data)   macro(200, data)
+#define MREPEAT202(macro, data)       MREPEAT201(macro, data)   macro(201, data)
+#define MREPEAT203(macro, data)       MREPEAT202(macro, data)   macro(202, data)
+#define MREPEAT204(macro, data)       MREPEAT203(macro, data)   macro(203, data)
+#define MREPEAT205(macro, data)       MREPEAT204(macro, data)   macro(204, data)
+#define MREPEAT206(macro, data)       MREPEAT205(macro, data)   macro(205, data)
+#define MREPEAT207(macro, data)       MREPEAT206(macro, data)   macro(206, data)
+#define MREPEAT208(macro, data)       MREPEAT207(macro, data)   macro(207, data)
+#define MREPEAT209(macro, data)       MREPEAT208(macro, data)   macro(208, data)
+#define MREPEAT210(macro, data)       MREPEAT209(macro, data)   macro(209, data)
+#define MREPEAT211(macro, data)       MREPEAT210(macro, data)   macro(210, data)
+#define MREPEAT212(macro, data)       MREPEAT211(macro, data)   macro(211, data)
+#define MREPEAT213(macro, data)       MREPEAT212(macro, data)   macro(212, data)
+#define MREPEAT214(macro, data)       MREPEAT213(macro, data)   macro(213, data)
+#define MREPEAT215(macro, data)       MREPEAT214(macro, data)   macro(214, data)
+#define MREPEAT216(macro, data)       MREPEAT215(macro, data)   macro(215, data)
+#define MREPEAT217(macro, data)       MREPEAT216(macro, data)   macro(216, data)
+#define MREPEAT218(macro, data)       MREPEAT217(macro, data)   macro(217, data)
+#define MREPEAT219(macro, data)       MREPEAT218(macro, data)   macro(218, data)
+#define MREPEAT220(macro, data)       MREPEAT219(macro, data)   macro(219, data)
+#define MREPEAT221(macro, data)       MREPEAT220(macro, data)   macro(220, data)
+#define MREPEAT222(macro, data)       MREPEAT221(macro, data)   macro(221, data)
+#define MREPEAT223(macro, data)       MREPEAT222(macro, data)   macro(222, data)
+#define MREPEAT224(macro, data)       MREPEAT223(macro, data)   macro(223, data)
+#define MREPEAT225(macro, data)       MREPEAT224(macro, data)   macro(224, data)
+#define MREPEAT226(macro, data)       MREPEAT225(macro, data)   macro(225, data)
+#define MREPEAT227(macro, data)       MREPEAT226(macro, data)   macro(226, data)
+#define MREPEAT228(macro, data)       MREPEAT227(macro, data)   macro(227, data)
+#define MREPEAT229(macro, data)       MREPEAT228(macro, data)   macro(228, data)
+#define MREPEAT230(macro, data)       MREPEAT229(macro, data)   macro(229, data)
+#define MREPEAT231(macro, data)       MREPEAT230(macro, data)   macro(230, data)
+#define MREPEAT232(macro, data)       MREPEAT231(macro, data)   macro(231, data)
+#define MREPEAT233(macro, data)       MREPEAT232(macro, data)   macro(232, data)
+#define MREPEAT234(macro, data)       MREPEAT233(macro, data)   macro(233, data)
+#define MREPEAT235(macro, data)       MREPEAT234(macro, data)   macro(234, data)
+#define MREPEAT236(macro, data)       MREPEAT235(macro, data)   macro(235, data)
+#define MREPEAT237(macro, data)       MREPEAT236(macro, data)   macro(236, data)
+#define MREPEAT238(macro, data)       MREPEAT237(macro, data)   macro(237, data)
+#define MREPEAT239(macro, data)       MREPEAT238(macro, data)   macro(238, data)
+#define MREPEAT240(macro, data)       MREPEAT239(macro, data)   macro(239, data)
+#define MREPEAT241(macro, data)       MREPEAT240(macro, data)   macro(240, data)
+#define MREPEAT242(macro, data)       MREPEAT241(macro, data)   macro(241, data)
+#define MREPEAT243(macro, data)       MREPEAT242(macro, data)   macro(242, data)
+#define MREPEAT244(macro, data)       MREPEAT243(macro, data)   macro(243, data)
+#define MREPEAT245(macro, data)       MREPEAT244(macro, data)   macro(244, data)
+#define MREPEAT246(macro, data)       MREPEAT245(macro, data)   macro(245, data)
+#define MREPEAT247(macro, data)       MREPEAT246(macro, data)   macro(246, data)
+#define MREPEAT248(macro, data)       MREPEAT247(macro, data)   macro(247, data)
+#define MREPEAT249(macro, data)       MREPEAT248(macro, data)   macro(248, data)
+#define MREPEAT250(macro, data)       MREPEAT249(macro, data)   macro(249, data)
+#define MREPEAT251(macro, data)       MREPEAT250(macro, data)   macro(250, data)
+#define MREPEAT252(macro, data)       MREPEAT251(macro, data)   macro(251, data)
+#define MREPEAT253(macro, data)       MREPEAT252(macro, data)   macro(252, data)
+#define MREPEAT254(macro, data)       MREPEAT253(macro, data)   macro(253, data)
+#define MREPEAT255(macro, data)       MREPEAT254(macro, data)   macro(254, data)
+#define MREPEAT256(macro, data)       MREPEAT255(macro, data)   macro(255, data)
+
+
+#endif  // _MREPEAT_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/preprocessor.h

@@ -1,55 +1,55 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Preprocessor utils.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _PREPROCESSOR_H_
-#define _PREPROCESSOR_H_
-
-#include "tpaste.h"
-#include "stringz.h"
-#include "mrepeat.h"
-
-
-#endif  // _PREPROCESSOR_H_
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Preprocessor utils.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _PREPROCESSOR_H_
+#define _PREPROCESSOR_H_
+
+#include "tpaste.h"
+#include "stringz.h"
+#include "mrepeat.h"
+
+
+#endif  // _PREPROCESSOR_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/stringz.h

@@ -1,75 +1,75 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Preprocessor stringizing utils.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _STRINGZ_H_
-#define _STRINGZ_H_
-
-
-/*! \brief Stringize.
- *
- * Stringize a preprocessing token, this token being allowed to be \#defined.
- *
- * May be used only within macros with the token passed as an argument if the token is \#defined.
- *
- * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
- * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
- * writing "A0".
- */
-#define STRINGZ(x)                                #x
-
-/*! \brief Absolute stringize.
- *
- * Stringize a preprocessing token, this token being allowed to be \#defined.
- *
- * No restriction of use if the token is \#defined.
- *
- * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
- * equivalent to writing "A0".
- */
-#define ASTRINGZ(x)                               STRINGZ(x)
-
-
-#endif  // _STRINGZ_H_
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Preprocessor stringizing utils.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _STRINGZ_H_
+#define _STRINGZ_H_
+
+
+/*! \brief Stringize.
+ *
+ * Stringize a preprocessing token, this token being allowed to be \#defined.
+ *
+ * May be used only within macros with the token passed as an argument if the token is \#defined.
+ *
+ * For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
+ * and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
+ * writing "A0".
+ */
+#define STRINGZ(x)                                #x
+
+/*! \brief Absolute stringize.
+ *
+ * Stringize a preprocessing token, this token being allowed to be \#defined.
+ *
+ * No restriction of use if the token is \#defined.
+ *
+ * For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
+ * equivalent to writing "A0".
+ */
+#define ASTRINGZ(x)                               STRINGZ(x)
+
+
+#endif  // _STRINGZ_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/PREPROCESSOR/tpaste.h

@@ -1,95 +1,95 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Preprocessor token pasting utils.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _TPASTE_H_
-#define _TPASTE_H_
-
-
-/*! \name Token Paste
- *
- * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
- *
- * May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
- *
- * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
- * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
- * equivalent to writing U32.
- */
-//! @{
-#define TPASTE2( a, b)                            a##b
-#define TPASTE3( a, b, c)                         a##b##c
-#define TPASTE4( a, b, c, d)                      a##b##c##d
-#define TPASTE5( a, b, c, d, e)                   a##b##c##d##e
-#define TPASTE6( a, b, c, d, e, f)                a##b##c##d##e##f
-#define TPASTE7( a, b, c, d, e, f, g)             a##b##c##d##e##f##g
-#define TPASTE8( a, b, c, d, e, f, g, h)          a##b##c##d##e##f##g##h
-#define TPASTE9( a, b, c, d, e, f, g, h, i)       a##b##c##d##e##f##g##h##i
-#define TPASTE10(a, b, c, d, e, f, g, h, i, j)    a##b##c##d##e##f##g##h##i##j
-//! @}
-
-/*! \name Absolute Token Paste
- *
- * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
- *
- * No restriction of use if the tokens are \#defined.
- *
- * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
- * as 32 is equivalent to writing U32.
- */
-//! @{
-#define ATPASTE2( a, b)                           TPASTE2( a, b)
-#define ATPASTE3( a, b, c)                        TPASTE3( a, b, c)
-#define ATPASTE4( a, b, c, d)                     TPASTE4( a, b, c, d)
-#define ATPASTE5( a, b, c, d, e)                  TPASTE5( a, b, c, d, e)
-#define ATPASTE6( a, b, c, d, e, f)               TPASTE6( a, b, c, d, e, f)
-#define ATPASTE7( a, b, c, d, e, f, g)            TPASTE7( a, b, c, d, e, f, g)
-#define ATPASTE8( a, b, c, d, e, f, g, h)         TPASTE8( a, b, c, d, e, f, g, h)
-#define ATPASTE9( a, b, c, d, e, f, g, h, i)      TPASTE9( a, b, c, d, e, f, g, h, i)
-#define ATPASTE10(a, b, c, d, e, f, g, h, i, j)   TPASTE10(a, b, c, d, e, f, g, h, i, j)
-//! @}
-
-
-#endif  // _TPASTE_H_
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Preprocessor token pasting utils.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _TPASTE_H_
+#define _TPASTE_H_
+
+
+/*! \name Token Paste
+ *
+ * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
+ *
+ * May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
+ *
+ * For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
+ * UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
+ * equivalent to writing U32.
+ */
+//! @{
+#define TPASTE2( a, b)                            a##b
+#define TPASTE3( a, b, c)                         a##b##c
+#define TPASTE4( a, b, c, d)                      a##b##c##d
+#define TPASTE5( a, b, c, d, e)                   a##b##c##d##e
+#define TPASTE6( a, b, c, d, e, f)                a##b##c##d##e##f
+#define TPASTE7( a, b, c, d, e, f, g)             a##b##c##d##e##f##g
+#define TPASTE8( a, b, c, d, e, f, g, h)          a##b##c##d##e##f##g##h
+#define TPASTE9( a, b, c, d, e, f, g, h, i)       a##b##c##d##e##f##g##h##i
+#define TPASTE10(a, b, c, d, e, f, g, h, i, j)    a##b##c##d##e##f##g##h##i##j
+//! @}
+
+/*! \name Absolute Token Paste
+ *
+ * Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
+ *
+ * No restriction of use if the tokens are \#defined.
+ *
+ * For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
+ * as 32 is equivalent to writing U32.
+ */
+//! @{
+#define ATPASTE2( a, b)                           TPASTE2( a, b)
+#define ATPASTE3( a, b, c)                        TPASTE3( a, b, c)
+#define ATPASTE4( a, b, c, d)                     TPASTE4( a, b, c, d)
+#define ATPASTE5( a, b, c, d, e)                  TPASTE5( a, b, c, d, e)
+#define ATPASTE6( a, b, c, d, e, f)               TPASTE6( a, b, c, d, e, f)
+#define ATPASTE7( a, b, c, d, e, f, g)            TPASTE7( a, b, c, d, e, f, g)
+#define ATPASTE8( a, b, c, d, e, f, g, h)         TPASTE8( a, b, c, d, e, f, g, h)
+#define ATPASTE9( a, b, c, d, e, f, g, h, i)      TPASTE9( a, b, c, d, e, f, g, h, i)
+#define ATPASTE10(a, b, c, d, e, f, g, h, i, j)   TPASTE10(a, b, c, d, e, f, g, h, i, j)
+//! @}
+
+
+#endif  // _TPASTE_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/compiler.h

@@ -1,1145 +1,1145 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
-
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Compiler file for AVR32.
- *
- * This file defines commonly used types and macros.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _COMPILER_H_
-#define _COMPILER_H_
-
-#if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__)
-#  include <avr32/io.h>
-#endif
-#if (defined __ICCAVR32__)
-#  include <intrinsics.h>
-#endif
-#include "preprocessor.h"
-
-#include "parts.h"
-
-
-//_____ D E C L A R A T I O N S ____________________________________________
-
-#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-
-#include <stddef.h>
-#include <stdlib.h>
-
-
-#if (defined __ICCAVR32__)
-
-/*! \name Compiler Keywords
- *
- * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32.
- */
-//! @{
-#define __asm__             asm
-#define __inline__          inline
-#define __volatile__
-//! @}
-
-#endif
-
-
-/*! \name Usual Types
- */
-//! @{
-typedef unsigned char           Bool; //!< Boolean.
-#ifndef __cplusplus
-#if !defined(__bool_true_false_are_defined)
-typedef unsigned char           bool; //!< Boolean.
-#endif
-#endif
-typedef signed char             S8 ;  //!< 8-bit signed integer.
-typedef unsigned char           U8 ;  //!< 8-bit unsigned integer.
-typedef signed short int        S16;  //!< 16-bit signed integer.
-typedef unsigned short int      U16;  //!< 16-bit unsigned integer.
-typedef signed long int         S32;  //!< 32-bit signed integer.
-typedef unsigned long int       U32;  //!< 32-bit unsigned integer.
-typedef signed long long int    S64;  //!< 64-bit signed integer.
-typedef unsigned long long int  U64;  //!< 64-bit unsigned integer.
-typedef float                   F32;  //!< 32-bit floating-point number.
-typedef double                  F64;  //!< 64-bit floating-point number.
-//! @}
-
-
-/*! \name Status Types
- */
-//! @{
-typedef Bool                Status_bool_t;  //!< Boolean status.
-typedef U8                  Status_t;       //!< 8-bit-coded status.
-//! @}
-
-
-/*! \name Aliasing Aggregate Types
- */
-//! @{
-
-//! 16-bit union.
-typedef union
-{
-  S16 s16   ;
-  U16 u16   ;
-  S8  s8 [2];
-  U8  u8 [2];
-} Union16;
-
-//! 32-bit union.
-typedef union
-{
-  S32 s32   ;
-  U32 u32   ;
-  S16 s16[2];
-  U16 u16[2];
-  S8  s8 [4];
-  U8  u8 [4];
-} Union32;
-
-//! 64-bit union.
-typedef union
-{
-  S64 s64   ;
-  U64 u64   ;
-  S32 s32[2];
-  U32 u32[2];
-  S16 s16[4];
-  U16 u16[4];
-  S8  s8 [8];
-  U8  u8 [8];
-} Union64;
-
-//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers.
-typedef union
-{
-  S64 *s64ptr;
-  U64 *u64ptr;
-  S32 *s32ptr;
-  U32 *u32ptr;
-  S16 *s16ptr;
-  U16 *u16ptr;
-  S8  *s8ptr ;
-  U8  *u8ptr ;
-} UnionPtr;
-
-//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.
-typedef union
-{
-  volatile S64 *s64ptr;
-  volatile U64 *u64ptr;
-  volatile S32 *s32ptr;
-  volatile U32 *u32ptr;
-  volatile S16 *s16ptr;
-  volatile U16 *u16ptr;
-  volatile S8  *s8ptr ;
-  volatile U8  *u8ptr ;
-} UnionVPtr;
-
-//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.
-typedef union
-{
-  const S64 *s64ptr;
-  const U64 *u64ptr;
-  const S32 *s32ptr;
-  const U32 *u32ptr;
-  const S16 *s16ptr;
-  const U16 *u16ptr;
-  const S8  *s8ptr ;
-  const U8  *u8ptr ;
-} UnionCPtr;
-
-//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.
-typedef union
-{
-  const volatile S64 *s64ptr;
-  const volatile U64 *u64ptr;
-  const volatile S32 *s32ptr;
-  const volatile U32 *u32ptr;
-  const volatile S16 *s16ptr;
-  const volatile U16 *u16ptr;
-  const volatile S8  *s8ptr ;
-  const volatile U8  *u8ptr ;
-} UnionCVPtr;
-
-//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers.
-typedef struct
-{
-  S64 *s64ptr;
-  U64 *u64ptr;
-  S32 *s32ptr;
-  U32 *u32ptr;
-  S16 *s16ptr;
-  U16 *u16ptr;
-  S8  *s8ptr ;
-  U8  *u8ptr ;
-} StructPtr;
-
-//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.
-typedef struct
-{
-  volatile S64 *s64ptr;
-  volatile U64 *u64ptr;
-  volatile S32 *s32ptr;
-  volatile U32 *u32ptr;
-  volatile S16 *s16ptr;
-  volatile U16 *u16ptr;
-  volatile S8  *s8ptr ;
-  volatile U8  *u8ptr ;
-} StructVPtr;
-
-//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.
-typedef struct
-{
-  const S64 *s64ptr;
-  const U64 *u64ptr;
-  const S32 *s32ptr;
-  const U32 *u32ptr;
-  const S16 *s16ptr;
-  const U16 *u16ptr;
-  const S8  *s8ptr ;
-  const U8  *u8ptr ;
-} StructCPtr;
-
-//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.
-typedef struct
-{
-  const volatile S64 *s64ptr;
-  const volatile U64 *u64ptr;
-  const volatile S32 *s32ptr;
-  const volatile U32 *u32ptr;
-  const volatile S16 *s16ptr;
-  const volatile U16 *u16ptr;
-  const volatile S8  *s8ptr ;
-  const volatile U8  *u8ptr ;
-} StructCVPtr;
-
-//! @}
-
-#endif  // __AVR32_ABI_COMPILER__
-
-
-//_____ M A C R O S ________________________________________________________
-
-/*! \name Usual Constants
- */
-//! @{
-#define DISABLE   0
-#define ENABLE    1
-#define DISABLED  0
-#define ENABLED   1
-#define OFF       0
-#define ON        1
-#define FALSE     0
-#define TRUE      1
-#ifndef __cplusplus
-#if !defined(__bool_true_false_are_defined)
-#define false     FALSE
-#define true      TRUE
-#endif
-#endif
-#define KO        0
-#define OK        1
-#define PASS      0
-#define FAIL      1
-#define LOW       0
-#define HIGH      1
-#define CLR       0
-#define SET       1
-//! @}
-
-
-#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-
-/*! \name Bit-Field Handling
- */
-//! @{
-
-/*! \brief Reads the bits of a value specified by a given bit-mask.
- *
- * \param value Value to read bits from.
- * \param mask  Bit-mask indicating bits to read.
- *
- * \return Read bits.
- */
-#define Rd_bits( value, mask)        ((value) & (mask))
-
-/*! \brief Writes the bits of a C lvalue specified by a given bit-mask.
- *
- * \param lvalue  C lvalue to write bits to.
- * \param mask    Bit-mask indicating bits to write.
- * \param bits    Bits to write.
- *
- * \return Resulting value with written bits.
- */
-#define Wr_bits(lvalue, mask, bits)  ((lvalue) = ((lvalue) & ~(mask)) |\
-                                                 ((bits  ) &  (mask)))
-
-/*! \brief Tests the bits of a value specified by a given bit-mask.
- *
- * \param value Value of which to test bits.
- * \param mask  Bit-mask indicating bits to test.
- *
- * \return \c 1 if at least one of the tested bits is set, else \c 0.
- */
-#define Tst_bits( value, mask)  (Rd_bits(value, mask) != 0)
-
-/*! \brief Clears the bits of a C lvalue specified by a given bit-mask.
- *
- * \param lvalue  C lvalue of which to clear bits.
- * \param mask    Bit-mask indicating bits to clear.
- *
- * \return Resulting value with cleared bits.
- */
-#define Clr_bits(lvalue, mask)  ((lvalue) &= ~(mask))
-
-/*! \brief Sets the bits of a C lvalue specified by a given bit-mask.
- *
- * \param lvalue  C lvalue of which to set bits.
- * \param mask    Bit-mask indicating bits to set.
- *
- * \return Resulting value with set bits.
- */
-#define Set_bits(lvalue, mask)  ((lvalue) |=  (mask))
-
-/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask.
- *
- * \param lvalue  C lvalue of which to toggle bits.
- * \param mask    Bit-mask indicating bits to toggle.
- *
- * \return Resulting value with toggled bits.
- */
-#define Tgl_bits(lvalue, mask)  ((lvalue) ^=  (mask))
-
-/*! \brief Reads the bit-field of a value specified by a given bit-mask.
- *
- * \param value Value to read a bit-field from.
- * \param mask  Bit-mask indicating the bit-field to read.
- *
- * \return Read bit-field.
- */
-#define Rd_bitfield( value, mask)           (Rd_bits( value, mask) >> ctz(mask))
-
-/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask.
- *
- * \param lvalue    C lvalue to write a bit-field to.
- * \param mask      Bit-mask indicating the bit-field to write.
- * \param bitfield  Bit-field to write.
- *
- * \return Resulting value with written bit-field.
- */
-#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask)))
-
-//! @}
-
-
-/*! \brief This macro is used to test fatal errors.
- *
- * The macro tests if the expression is FALSE. If it is, a fatal error is
- * detected and the application hangs up.
- *
- * \param expr  Expression to evaluate and supposed to be nonzero.
- */
-#ifdef _ASSERT_ENABLE_
-  #define Assert(expr) \
-  {\
-    if (!(expr)) while (TRUE);\
-  }
-#else
-  #define Assert(expr)
-#endif
-
-
-/*! \name Zero-Bit Counting
- *
- * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when
- * applied to constant expressions (values known at compile time), so they are
- * more optimized than the use of the corresponding assembly instructions and
- * they can be used as constant expressions e.g. to initialize objects having
- * static storage duration, and like the corresponding assembly instructions
- * when applied to non-constant expressions (values unknown at compile time), so
- * they are more optimized than an assembly periphrasis. Hence, clz and ctz
- * ensure a possible and optimized behavior for both constant and non-constant
- * expressions.
- */
-//! @{
-
-/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer.
- *
- * \param u Value of which to count the leading zero bits.
- *
- * \return The count of leading zero bits in \a u.
- */
-#if (defined __GNUC__)
-  #define clz(u)              __builtin_clz(u)
-#elif (defined __ICCAVR32__)
-  #define clz(u)              __count_leading_zeros(u)
-#endif
-
-/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer.
- *
- * \param u Value of which to count the trailing zero bits.
- *
- * \return The count of trailing zero bits in \a u.
- */
-#if (defined __GNUC__)
-  #define ctz(u)              __builtin_ctz(u)
-#elif (defined __ICCAVR32__)
-  #define ctz(u)              __count_trailing_zeros(u)
-#endif
-
-//! @}
-
-
-/*! \name Bit Reversing
- */
-//! @{
-
-/*! \brief Reverses the bits of \a u8.
- *
- * \param u8  U8 of which to reverse the bits.
- *
- * \return Value resulting from \a u8 with reversed bits.
- */
-#define bit_reverse8(u8)    ((U8)(bit_reverse32((U8)(u8)) >> 24))
-
-/*! \brief Reverses the bits of \a u16.
- *
- * \param u16 U16 of which to reverse the bits.
- *
- * \return Value resulting from \a u16 with reversed bits.
- */
-#define bit_reverse16(u16)  ((U16)(bit_reverse32((U16)(u16)) >> 16))
-
-/*! \brief Reverses the bits of \a u32.
- *
- * \param u32 U32 of which to reverse the bits.
- *
- * \return Value resulting from \a u32 with reversed bits.
- */
-#if (defined __GNUC__)
-  #define bit_reverse32(u32) \
-  (\
-    {\
-      unsigned int __value = (U32)(u32);\
-      __asm__ ("brev\t%0" : "+r" (__value) :  : "cc");\
-      (U32)__value;\
-    }\
-  )
-#elif (defined __ICCAVR32__)
-  #define bit_reverse32(u32)  ((U32)__bit_reverse((U32)(u32)))
-#endif
-
-/*! \brief Reverses the bits of \a u64.
- *
- * \param u64 U64 of which to reverse the bits.
- *
- * \return Value resulting from \a u64 with reversed bits.
- */
-#define bit_reverse64(u64)  ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\
-                                   ((U64)bit_reverse32((U64)(u64)) << 32)))
-
-//! @}
-
-
-/*! \name Alignment
- */
-//! @{
-
-/*! \brief Tests alignment of the number \a val with the \a n boundary.
- *
- * \param val Input value.
- * \param n   Boundary.
- *
- * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0.
- */
-#define Test_align(val, n     ) (!Tst_bits( val, (n) - 1     )   )
-
-/*! \brief Gets alignment of the number \a val with respect to the \a n boundary.
- *
- * \param val Input value.
- * \param n   Boundary.
- *
- * \return Alignment of the number \a val with respect to the \a n boundary.
- */
-#define Get_align( val, n     ) (  Rd_bits( val, (n) - 1     )   )
-
-/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary.
- *
- * \param lval  Input/output lvalue.
- * \param n     Boundary.
- * \param alg   Alignment.
- *
- * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary.
- */
-#define Set_align(lval, n, alg) (  Wr_bits(lval, (n) - 1, alg)   )
-
-/*! \brief Aligns the number \a val with the upper \a n boundary.
- *
- * \param val Input value.
- * \param n   Boundary.
- *
- * \return Value resulting from the number \a val aligned with the upper \a n boundary.
- */
-#define Align_up(  val, n     ) (((val) + ((n) - 1)) & ~((n) - 1))
-
-/*! \brief Aligns the number \a val with the lower \a n boundary.
- *
- * \param val Input value.
- * \param n   Boundary.
- *
- * \return Value resulting from the number \a val aligned with the lower \a n boundary.
- */
-#define Align_down(val, n     ) ( (val)              & ~((n) - 1))
-
-//! @}
-
-
-/*! \name Mathematics
- *
- * The same considerations as for clz and ctz apply here but AVR32-GCC does not
- * provide built-in functions to access the assembly instructions abs, min and
- * max and it does not produce them by itself in most cases, so two sets of
- * macros are defined here:
- *   - Abs, Min and Max to apply to constant expressions (values known at
- *     compile time);
- *   - abs, min and max to apply to non-constant expressions (values unknown at
- *     compile time).
- */
-//! @{
-
-/*! \brief Takes the absolute value of \a a.
- *
- * \param a Input value.
- *
- * \return Absolute value of \a a.
- *
- * \note More optimized if only used with values known at compile time.
- */
-#define Abs(a)              (((a) <  0 ) ? -(a) : (a))
-
-/*! \brief Takes the minimal value of \a a and \a b.
- *
- * \param a Input value.
- * \param b Input value.
- *
- * \return Minimal value of \a a and \a b.
- *
- * \note More optimized if only used with values known at compile time.
- */
-#define Min(a, b)           (((a) < (b)) ?  (a) : (b))
-
-/*! \brief Takes the maximal value of \a a and \a b.
- *
- * \param a Input value.
- * \param b Input value.
- *
- * \return Maximal value of \a a and \a b.
- *
- * \note More optimized if only used with values known at compile time.
- */
-#define Max(a, b)           (((a) > (b)) ?  (a) : (b))
-
-/*! \brief Takes the absolute value of \a a.
- *
- * \param a Input value.
- *
- * \return Absolute value of \a a.
- *
- * \note More optimized if only used with values unknown at compile time.
- */
-#if (defined __GNUC__)
-  #define abs(a) \
-  (\
-    {\
-      int __value = (a);\
-      __asm__ ("abs\t%0" : "+r" (__value) :  : "cc");\
-      __value;\
-    }\
-  )
-#elif (defined __ICCAVR32__)
-  #define abs(a)      Abs(a)
-#endif
-
-/*! \brief Takes the minimal value of \a a and \a b.
- *
- * \param a Input value.
- * \param b Input value.
- *
- * \return Minimal value of \a a and \a b.
- *
- * \note More optimized if only used with values unknown at compile time.
- */
-#if (defined __GNUC__)
-  #define min(a, b) \
-  (\
-    {\
-      int __value, __arg_a = (a), __arg_b = (b);\
-      __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
-      __value;\
-    }\
-  )
-#elif (defined __ICCAVR32__)
-  #define min(a, b)   __min(a, b)
-#endif
-
-/*! \brief Takes the maximal value of \a a and \a b.
- *
- * \param a Input value.
- * \param b Input value.
- *
- * \return Maximal value of \a a and \a b.
- *
- * \note More optimized if only used with values unknown at compile time.
- */
-#if (defined __GNUC__)
-  #define max(a, b) \
-  (\
-    {\
-      int __value, __arg_a = (a), __arg_b = (b);\
-      __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
-      __value;\
-    }\
-  )
-#elif (defined __ICCAVR32__)
-  #define max(a, b)   __max(a, b)
-#endif
-
-//! @}
-
-
-/*! \brief Calls the routine at address \a addr.
- *
- * It generates a long call opcode.
- *
- * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if
- * it is invoked from the CPU supervisor mode.
- *
- * \param addr  Address of the routine to call.
- *
- * \note It may be used as a long jump opcode in some special cases.
- */
-#define Long_call(addr)                   ((*(void (*)(void))(addr))())
-
-/*! \brief Resets the CPU by software.
- *
- * \warning It shall not be called from the CPU application mode.
- */
-#if (defined __GNUC__)
-  #define Reset_CPU() \
-  (\
-    {\
-      __asm__ __volatile__ (\
-        "lddpc   r9, 3f\n\t"\
-        "mfsr    r8, %[SR]\n\t"\
-        "bfextu  r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\
-        "cp.w    r8, 0b001\n\t"\
-        "breq    0f\n\t"\
-        "sub     r8, pc, $ - 1f\n\t"\
-        "pushm   r8-r9\n\t"\
-        "rete\n"\
-        "0:\n\t"\
-        "mtsr    %[SR], r9\n"\
-        "1:\n\t"\
-        "mov     r0, 0\n\t"\
-        "mov     r1, 0\n\t"\
-        "mov     r2, 0\n\t"\
-        "mov     r3, 0\n\t"\
-        "mov     r4, 0\n\t"\
-        "mov     r5, 0\n\t"\
-        "mov     r6, 0\n\t"\
-        "mov     r7, 0\n\t"\
-        "mov     r8, 0\n\t"\
-        "mov     r9, 0\n\t"\
-        "mov     r10, 0\n\t"\
-        "mov     r11, 0\n\t"\
-        "mov     r12, 0\n\t"\
-        "mov     sp, 0\n\t"\
-        "stdsp   sp[0], sp\n\t"\
-        "ldmts   sp, sp\n\t"\
-        "mov     lr, 0\n\t"\
-        "lddpc   pc, 2f\n\t"\
-        ".balign 4\n"\
-        "2:\n\t"\
-        ".word   _start\n"\
-        "3:\n\t"\
-        ".word   %[RESET_SR]"\
-        :\
-        : [SR] "i" (AVR32_SR),\
-          [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\
-          [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\
-          [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\
-      );\
-    }\
-  )
-#elif (defined __ICCAVR32__)
-  #define Reset_CPU() \
-  {\
-    extern void *volatile __program_start;\
-    __asm__ __volatile__ (\
-      "mov     r7, LWRD(__program_start)\n\t"\
-      "orh     r7, HWRD(__program_start)\n\t"\
-      "mov     r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\
-      "orh     r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\
-      "mfsr    r8, "ASTRINGZ(AVR32_SR)"\n\t"\
-      "bfextu  r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\
-      "cp.w    r8, 001b\n\t"\
-      "breq    $ + 10\n\t"\
-      "sub     r8, pc, -12\n\t"\
-      "pushm   r8-r9\n\t"\
-      "rete\n\t"\
-      "mtsr    "ASTRINGZ(AVR32_SR)", r9\n\t"\
-      "mov     r0, 0\n\t"\
-      "mov     r1, 0\n\t"\
-      "mov     r2, 0\n\t"\
-      "mov     r3, 0\n\t"\
-      "mov     r4, 0\n\t"\
-      "mov     r5, 0\n\t"\
-      "mov     r6, 0\n\t"\
-      "st.w    r0[4], r7\n\t"\
-      "mov     r7, 0\n\t"\
-      "mov     r8, 0\n\t"\
-      "mov     r9, 0\n\t"\
-      "mov     r10, 0\n\t"\
-      "mov     r11, 0\n\t"\
-      "mov     r12, 0\n\t"\
-      "mov     sp, 0\n\t"\
-      "stdsp   sp[0], sp\n\t"\
-      "ldmts   sp, sp\n\t"\
-      "mov     lr, 0\n\t"\
-      "ld.w    pc, lr[4]"\
-    );\
-    __program_start;\
-  }
-#endif
-
-
-/*! \name System Register Access
- */
-//! @{
-
-/*! \brief Gets the value of the \a sysreg system register.
- *
- * \param sysreg  Address of the system register of which to get the value.
- *
- * \return Value of the \a sysreg system register.
- */
-#if (defined __GNUC__)
-  #define Get_system_register(sysreg)         __builtin_mfsr(sysreg)
-#elif (defined __ICCAVR32__)
-  #define Get_system_register(sysreg)         __get_system_register(sysreg)
-#endif
-
-/*! \brief Sets the value of the \a sysreg system register to \a value.
- *
- * \param sysreg  Address of the system register of which to set the value.
- * \param value   Value to set the \a sysreg system register to.
- */
-#if (defined __GNUC__)
-  #define Set_system_register(sysreg, value)  __builtin_mtsr(sysreg, value)
-#elif (defined __ICCAVR32__)
-  #define Set_system_register(sysreg, value)  __set_system_register(sysreg, value)
-#endif
-
-//! @}
-
-
-/*! \name CPU Status Register Access
- */
-//! @{
-
-/*! \brief Tells whether exceptions are globally enabled.
- *
- * \return \c 1 if exceptions are globally enabled, else \c 0.
- */
-#define Is_global_exception_enabled()         (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK))
-
-/*! \brief Disables exceptions globally.
- */
-#if (defined __GNUC__)
-  #define Disable_global_exception()          ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (AVR32_SR_EM_OFFSET));})
-#elif (defined __ICCAVR32__)
-  #define Disable_global_exception()          (__set_status_flag(AVR32_SR_EM_OFFSET))
-#endif
-
-/*! \brief Enables exceptions globally.
- */
-#if (defined __GNUC__)
-  #define Enable_global_exception()           ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (AVR32_SR_EM_OFFSET));})
-#elif (defined __ICCAVR32__)
-  #define Enable_global_exception()           (__clear_status_flag(AVR32_SR_EM_OFFSET))
-#endif
-
-/*! \brief Tells whether interrupts are globally enabled.
- *
- * \return \c 1 if interrupts are globally enabled, else \c 0.
- */
-#define Is_global_interrupt_enabled()         (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK))
-
-/*! \brief Disables interrupts globally.
- */
-#if (defined __GNUC__)
-  #define Disable_global_interrupt()          ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (AVR32_SR_GM_OFFSET));})
-#elif (defined __ICCAVR32__)
-  #define Disable_global_interrupt()          (__disable_interrupt())
-#endif
-
-/*! \brief Enables interrupts globally.
- */
-#if (defined __GNUC__)
-  #define Enable_global_interrupt()           ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (AVR32_SR_GM_OFFSET));})
-#elif (defined __ICCAVR32__)
-  #define Enable_global_interrupt()           (__enable_interrupt())
-#endif
-
-/*! \brief Tells whether interrupt level \a int_level is enabled.
- *
- * \param int_level Interrupt level (0 to 3).
- *
- * \return \c 1 if interrupt level \a int_level is enabled, else \c 0.
- */
-#define Is_interrupt_level_enabled(int_level) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_level, M_MASK)))
-
-/*! \brief Disables interrupt level \a int_level.
- *
- * \param int_level Interrupt level to disable (0 to 3).
- */
-#if (defined __GNUC__)
-  #define Disable_interrupt_level(int_level)  ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));})
-#elif (defined __ICCAVR32__)
-  #define Disable_interrupt_level(int_level)  (__set_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET)))
-#endif
-
-/*! \brief Enables interrupt level \a int_level.
- *
- * \param int_level Interrupt level to enable (0 to 3).
- */
-#if (defined __GNUC__)
-  #define Enable_interrupt_level(int_level)   ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));})
-#elif (defined __ICCAVR32__)
-  #define Enable_interrupt_level(int_level)   (__clear_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET)))
-#endif
-
-/*! \brief Protects subsequent code from interrupts.
- */
-#define AVR32_ENTER_CRITICAL_REGION( ) \
-  { \
-  Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
-  Disable_global_interrupt(); // Disable the appropriate interrupts.
-
-/*! \brief This macro must always be used in conjunction with AVR32_ENTER_CRITICAL_REGION
- *         so that interrupts are enabled again.
- */
-#define AVR32_LEAVE_CRITICAL_REGION( ) \
-  if (global_interrupt_enabled) Enable_global_interrupt(); \
-  }
-
-//! @}
-
-
-/*! \name Debug Register Access
- */
-//! @{
-
-/*! \brief Gets the value of the \a dbgreg debug register.
- *
- * \param dbgreg  Address of the debug register of which to get the value.
- *
- * \return Value of the \a dbgreg debug register.
- */
-#if (defined __GNUC__)
-  #define Get_debug_register(dbgreg)          __builtin_mfdr(dbgreg)
-#elif (defined __ICCAVR32__)
-  #define Get_debug_register(dbgreg)          __get_debug_register(dbgreg)
-#endif
-
-/*! \brief Sets the value of the \a dbgreg debug register to \a value.
- *
- * \param dbgreg  Address of the debug register of which to set the value.
- * \param value   Value to set the \a dbgreg debug register to.
- */
-#if (defined __GNUC__)
-  #define Set_debug_register(dbgreg, value)   __builtin_mtdr(dbgreg, value)
-#elif (defined __ICCAVR32__)
-  #define Set_debug_register(dbgreg, value)   __set_debug_register(dbgreg, value)
-#endif
-
-//! @}
-
-#endif  // __AVR32_ABI_COMPILER__
-
-
-//! Boolean evaluating MCU little endianism.
-#if ((defined __GNUC__) && (defined __AVR32__)) || ((defined __ICCAVR32__) || (defined __AAVR32__))
-  #define LITTLE_ENDIAN_MCU     FALSE
-#else
-  #error If you are here, you should check what is exactly the processor you are using...
-  #define LITTLE_ENDIAN_MCU     FALSE
-#endif
-
-// Check that MCU endianism is correctly defined.
-#ifndef LITTLE_ENDIAN_MCU
-  #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE
-#endif
-
-//! Boolean evaluating MCU big endianism.
-#define BIG_ENDIAN_MCU        (!LITTLE_ENDIAN_MCU)
-
-
-#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
-
-/*! \name MCU Endianism Handling
- */
-//! @{
-
-#if (LITTLE_ENDIAN_MCU==TRUE)
-  #define LSB(u16)        (((U8  *)&(u16))[0])  //!< Least significant byte of \a u16.
-  #define MSB(u16)        (((U8  *)&(u16))[1])  //!< Most significant byte of \a u16.
-
-  #define LSH(u32)        (((U16 *)&(u32))[0])  //!< Least significant half-word of \a u32.
-  #define MSH(u32)        (((U16 *)&(u32))[1])  //!< Most significant half-word of \a u32.
-  #define LSB0W(u32)      (((U8  *)&(u32))[0])  //!< Least significant byte of 1st rank of \a u32.
-  #define LSB1W(u32)      (((U8  *)&(u32))[1])  //!< Least significant byte of 2nd rank of \a u32.
-  #define LSB2W(u32)      (((U8  *)&(u32))[2])  //!< Least significant byte of 3rd rank of \a u32.
-  #define LSB3W(u32)      (((U8  *)&(u32))[3])  //!< Least significant byte of 4th rank of \a u32.
-  #define MSB3W(u32)      LSB0W(u32)            //!< Most significant byte of 4th rank of \a u32.
-  #define MSB2W(u32)      LSB1W(u32)            //!< Most significant byte of 3rd rank of \a u32.
-  #define MSB1W(u32)      LSB2W(u32)            //!< Most significant byte of 2nd rank of \a u32.
-  #define MSB0W(u32)      LSB3W(u32)            //!< Most significant byte of 1st rank of \a u32.
-
-  #define LSW(u64)        (((U32 *)&(u64))[0])  //!< Least significant word of \a u64.
-  #define MSW(u64)        (((U32 *)&(u64))[1])  //!< Most significant word of \a u64.
-  #define LSH0(u64)       (((U16 *)&(u64))[0])  //!< Least significant half-word of 1st rank of \a u64.
-  #define LSH1(u64)       (((U16 *)&(u64))[1])  //!< Least significant half-word of 2nd rank of \a u64.
-  #define LSH2(u64)       (((U16 *)&(u64))[2])  //!< Least significant half-word of 3rd rank of \a u64.
-  #define LSH3(u64)       (((U16 *)&(u64))[3])  //!< Least significant half-word of 4th rank of \a u64.
-  #define MSH3(u64)       LSH0(u64)             //!< Most significant half-word of 4th rank of \a u64.
-  #define MSH2(u64)       LSH1(u64)             //!< Most significant half-word of 3rd rank of \a u64.
-  #define MSH1(u64)       LSH2(u64)             //!< Most significant half-word of 2nd rank of \a u64.
-  #define MSH0(u64)       LSH3(u64)             //!< Most significant half-word of 1st rank of \a u64.
-  #define LSB0D(u64)      (((U8  *)&(u64))[0])  //!< Least significant byte of 1st rank of \a u64.
-  #define LSB1D(u64)      (((U8  *)&(u64))[1])  //!< Least significant byte of 2nd rank of \a u64.
-  #define LSB2D(u64)      (((U8  *)&(u64))[2])  //!< Least significant byte of 3rd rank of \a u64.
-  #define LSB3D(u64)      (((U8  *)&(u64))[3])  //!< Least significant byte of 4th rank of \a u64.
-  #define LSB4D(u64)      (((U8  *)&(u64))[4])  //!< Least significant byte of 5th rank of \a u64.
-  #define LSB5D(u64)      (((U8  *)&(u64))[5])  //!< Least significant byte of 6th rank of \a u64.
-  #define LSB6D(u64)      (((U8  *)&(u64))[6])  //!< Least significant byte of 7th rank of \a u64.
-  #define LSB7D(u64)      (((U8  *)&(u64))[7])  //!< Least significant byte of 8th rank of \a u64.
-  #define MSB7D(u64)      LSB0D(u64)            //!< Most significant byte of 8th rank of \a u64.
-  #define MSB6D(u64)      LSB1D(u64)            //!< Most significant byte of 7th rank of \a u64.
-  #define MSB5D(u64)      LSB2D(u64)            //!< Most significant byte of 6th rank of \a u64.
-  #define MSB4D(u64)      LSB3D(u64)            //!< Most significant byte of 5th rank of \a u64.
-  #define MSB3D(u64)      LSB4D(u64)            //!< Most significant byte of 4th rank of \a u64.
-  #define MSB2D(u64)      LSB5D(u64)            //!< Most significant byte of 3rd rank of \a u64.
-  #define MSB1D(u64)      LSB6D(u64)            //!< Most significant byte of 2nd rank of \a u64.
-  #define MSB0D(u64)      LSB7D(u64)            //!< Most significant byte of 1st rank of \a u64.
-
-#elif (BIG_ENDIAN_MCU==TRUE) 
-  #define MSB(u16)        (((U8  *)&(u16))[0])  //!< Most significant byte of \a u16.
-  #define LSB(u16)        (((U8  *)&(u16))[1])  //!< Least significant byte of \a u16.
-
-  #define MSH(u32)        (((U16 *)&(u32))[0])  //!< Most significant half-word of \a u32.
-  #define LSH(u32)        (((U16 *)&(u32))[1])  //!< Least significant half-word of \a u32.
-  #define MSB0W(u32)      (((U8  *)&(u32))[0])  //!< Most significant byte of 1st rank of \a u32.
-  #define MSB1W(u32)      (((U8  *)&(u32))[1])  //!< Most significant byte of 2nd rank of \a u32.
-  #define MSB2W(u32)      (((U8  *)&(u32))[2])  //!< Most significant byte of 3rd rank of \a u32.
-  #define MSB3W(u32)      (((U8  *)&(u32))[3])  //!< Most significant byte of 4th rank of \a u32.
-  #define LSB3W(u32)      MSB0W(u32)            //!< Least significant byte of 4th rank of \a u32.
-  #define LSB2W(u32)      MSB1W(u32)            //!< Least significant byte of 3rd rank of \a u32.
-  #define LSB1W(u32)      MSB2W(u32)            //!< Least significant byte of 2nd rank of \a u32.
-  #define LSB0W(u32)      MSB3W(u32)            //!< Least significant byte of 1st rank of \a u32.
-
-  #define MSW(u64)        (((U32 *)&(u64))[0])  //!< Most significant word of \a u64.
-  #define LSW(u64)        (((U32 *)&(u64))[1])  //!< Least significant word of \a u64.
-  #define MSH0(u64)       (((U16 *)&(u64))[0])  //!< Most significant half-word of 1st rank of \a u64.
-  #define MSH1(u64)       (((U16 *)&(u64))[1])  //!< Most significant half-word of 2nd rank of \a u64.
-  #define MSH2(u64)       (((U16 *)&(u64))[2])  //!< Most significant half-word of 3rd rank of \a u64.
-  #define MSH3(u64)       (((U16 *)&(u64))[3])  //!< Most significant half-word of 4th rank of \a u64.
-  #define LSH3(u64)       MSH0(u64)             //!< Least significant half-word of 4th rank of \a u64.
-  #define LSH2(u64)       MSH1(u64)             //!< Least significant half-word of 3rd rank of \a u64.
-  #define LSH1(u64)       MSH2(u64)             //!< Least significant half-word of 2nd rank of \a u64.
-  #define LSH0(u64)       MSH3(u64)             //!< Least significant half-word of 1st rank of \a u64.
-  #define MSB0D(u64)      (((U8  *)&(u64))[0])  //!< Most significant byte of 1st rank of \a u64.
-  #define MSB1D(u64)      (((U8  *)&(u64))[1])  //!< Most significant byte of 2nd rank of \a u64.
-  #define MSB2D(u64)      (((U8  *)&(u64))[2])  //!< Most significant byte of 3rd rank of \a u64.
-  #define MSB3D(u64)      (((U8  *)&(u64))[3])  //!< Most significant byte of 4th rank of \a u64.
-  #define MSB4D(u64)      (((U8  *)&(u64))[4])  //!< Most significant byte of 5th rank of \a u64.
-  #define MSB5D(u64)      (((U8  *)&(u64))[5])  //!< Most significant byte of 6th rank of \a u64.
-  #define MSB6D(u64)      (((U8  *)&(u64))[6])  //!< Most significant byte of 7th rank of \a u64.
-  #define MSB7D(u64)      (((U8  *)&(u64))[7])  //!< Most significant byte of 8th rank of \a u64.
-  #define LSB7D(u64)      MSB0D(u64)            //!< Least significant byte of 8th rank of \a u64.
-  #define LSB6D(u64)      MSB1D(u64)            //!< Least significant byte of 7th rank of \a u64.
-  #define LSB5D(u64)      MSB2D(u64)            //!< Least significant byte of 6th rank of \a u64.
-  #define LSB4D(u64)      MSB3D(u64)            //!< Least significant byte of 5th rank of \a u64.
-  #define LSB3D(u64)      MSB4D(u64)            //!< Least significant byte of 4th rank of \a u64.
-  #define LSB2D(u64)      MSB5D(u64)            //!< Least significant byte of 3rd rank of \a u64.
-  #define LSB1D(u64)      MSB6D(u64)            //!< Least significant byte of 2nd rank of \a u64.
-  #define LSB0D(u64)      MSB7D(u64)            //!< Least significant byte of 1st rank of \a u64.
-
-#else
-  #error  Unknown endianism.
-#endif
-
-//! @}
-
-
-/*! \name Endianism Conversion
- *
- * The same considerations as for clz and ctz apply here but AVR32-GCC's
- * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when
- * applied to constant expressions, so two sets of macros are defined here:
- *   - Swap16, Swap32 and Swap64 to apply to constant expressions (values known
- *     at compile time);
- *   - swap16, swap32 and swap64 to apply to non-constant expressions (values
- *     unknown at compile time).
- */
-//! @{
-
-/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).
- *
- * \param u16 U16 of which to toggle the endianism.
- *
- * \return Value resulting from \a u16 with toggled endianism.
- *
- * \note More optimized if only used with values known at compile time.
- */
-#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\
-                           ((U16)(u16) << 8)))
-
-/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).
- *
- * \param u32 U32 of which to toggle the endianism.
- *
- * \return Value resulting from \a u32 with toggled endianism.
- *
- * \note More optimized if only used with values known at compile time.
- */
-#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\
-                           ((U32)Swap16((U32)(u32)) << 16)))
-
-/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).
- *
- * \param u64 U64 of which to toggle the endianism.
- *
- * \return Value resulting from \a u64 with toggled endianism.
- *
- * \note More optimized if only used with values known at compile time.
- */
-#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\
-                           ((U64)Swap32((U64)(u64)) << 32)))
-
-/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).
- *
- * \param u16 U16 of which to toggle the endianism.
- *
- * \return Value resulting from \a u16 with toggled endianism.
- *
- * \note More optimized if only used with values unknown at compile time.
- */
-#if (defined __GNUC__)
-  #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16)))
-#elif (defined __ICCAVR32__)
-  #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16)))
-#endif
-
-/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).
- *
- * \param u32 U32 of which to toggle the endianism.
- *
- * \return Value resulting from \a u32 with toggled endianism.
- *
- * \note More optimized if only used with values unknown at compile time.
- */
-#if (defined __GNUC__)
-  #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32)))
-#elif (defined __ICCAVR32__)
-  #define swap32(u32) ((U32)__swap_bytes((U32)(u32)))
-#endif
-
-/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).
- *
- * \param u64 U64 of which to toggle the endianism.
- *
- * \return Value resulting from \a u64 with toggled endianism.
- *
- * \note More optimized if only used with values unknown at compile time.
- */
-#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\
-                           ((U64)swap32((U64)(u64)) << 32)))
-
-//! @}
-
-
-/*! \name Target Abstraction
- */
-//! @{
-
-#define _GLOBEXT_           extern      //!< extern storage-class specifier.
-#define _CONST_TYPE_        const       //!< const type qualifier.
-#define _MEM_TYPE_SLOW_                 //!< Slow memory type.
-#define _MEM_TYPE_MEDFAST_              //!< Fairly fast memory type.
-#define _MEM_TYPE_FAST_                 //!< Fast memory type.
-
-typedef U8                  Byte;       //!< 8-bit unsigned integer.
-
-#define memcmp_ram2ram      memcmp      //!< Target-specific memcmp of RAM to RAM.
-#define memcmp_code2ram     memcmp      //!< Target-specific memcmp of RAM to NVRAM.
-#define memcpy_ram2ram      memcpy      //!< Target-specific memcpy from RAM to RAM.
-#define memcpy_code2ram     memcpy      //!< Target-specific memcpy from NVRAM to RAM.
-
-#define LSB0(u32)           LSB0W(u32)  //!< Least significant byte of 1st rank of \a u32.
-#define LSB1(u32)           LSB1W(u32)  //!< Least significant byte of 2nd rank of \a u32.
-#define LSB2(u32)           LSB2W(u32)  //!< Least significant byte of 3rd rank of \a u32.
-#define LSB3(u32)           LSB3W(u32)  //!< Least significant byte of 4th rank of \a u32.
-#define MSB3(u32)           MSB3W(u32)  //!< Most significant byte of 4th rank of \a u32.
-#define MSB2(u32)           MSB2W(u32)  //!< Most significant byte of 3rd rank of \a u32.
-#define MSB1(u32)           MSB1W(u32)  //!< Most significant byte of 2nd rank of \a u32.
-#define MSB0(u32)           MSB0W(u32)  //!< Most significant byte of 1st rank of \a u32.
-
-//! @}
-
-#endif  // __AVR32_ABI_COMPILER__
-
-
-#endif  // _COMPILER_H_
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Compiler file for AVR32.
+ *
+ * This file defines commonly used types and macros.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _COMPILER_H_
+#define _COMPILER_H_
+
+#if ((defined __GNUC__) && (defined __AVR32__)) || (defined __ICCAVR32__ || defined __AAVR32__)
+#  include <avr32/io.h>
+#endif
+#if (defined __ICCAVR32__)
+#  include <intrinsics.h>
+#endif
+#include "preprocessor.h"
+
+#include "parts.h"
+
+
+//_____ D E C L A R A T I O N S ____________________________________________
+
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
+
+#include <stddef.h>
+#include <stdlib.h>
+
+
+#if (defined __ICCAVR32__)
+
+/*! \name Compiler Keywords
+ *
+ * Port of some keywords from GNU GCC for AVR32 to IAR Embedded Workbench for Atmel AVR32.
+ */
+//! @{
+#define __asm__             asm
+#define __inline__          inline
+#define __volatile__
+//! @}
+
+#endif
+
+
+/*! \name Usual Types
+ */
+//! @{
+typedef unsigned char           Bool; //!< Boolean.
+#ifndef __cplusplus
+#if !defined(__bool_true_false_are_defined)
+typedef unsigned char           bool; //!< Boolean.
+#endif
+#endif
+typedef signed char             S8 ;  //!< 8-bit signed integer.
+typedef unsigned char           U8 ;  //!< 8-bit unsigned integer.
+typedef signed short int        S16;  //!< 16-bit signed integer.
+typedef unsigned short int      U16;  //!< 16-bit unsigned integer.
+typedef signed long int         S32;  //!< 32-bit signed integer.
+typedef unsigned long int       U32;  //!< 32-bit unsigned integer.
+typedef signed long long int    S64;  //!< 64-bit signed integer.
+typedef unsigned long long int  U64;  //!< 64-bit unsigned integer.
+typedef float                   F32;  //!< 32-bit floating-point number.
+typedef double                  F64;  //!< 64-bit floating-point number.
+//! @}
+
+
+/*! \name Status Types
+ */
+//! @{
+typedef Bool                Status_bool_t;  //!< Boolean status.
+typedef U8                  Status_t;       //!< 8-bit-coded status.
+//! @}
+
+
+/*! \name Aliasing Aggregate Types
+ */
+//! @{
+
+//! 16-bit union.
+typedef union
+{
+  S16 s16   ;
+  U16 u16   ;
+  S8  s8 [2];
+  U8  u8 [2];
+} Union16;
+
+//! 32-bit union.
+typedef union
+{
+  S32 s32   ;
+  U32 u32   ;
+  S16 s16[2];
+  U16 u16[2];
+  S8  s8 [4];
+  U8  u8 [4];
+} Union32;
+
+//! 64-bit union.
+typedef union
+{
+  S64 s64   ;
+  U64 u64   ;
+  S32 s32[2];
+  U32 u32[2];
+  S16 s16[4];
+  U16 u16[4];
+  S8  s8 [8];
+  U8  u8 [8];
+} Union64;
+
+//! Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers.
+typedef union
+{
+  S64 *s64ptr;
+  U64 *u64ptr;
+  S32 *s32ptr;
+  U32 *u32ptr;
+  S16 *s16ptr;
+  U16 *u16ptr;
+  S8  *s8ptr ;
+  U8  *u8ptr ;
+} UnionPtr;
+
+//! Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.
+typedef union
+{
+  volatile S64 *s64ptr;
+  volatile U64 *u64ptr;
+  volatile S32 *s32ptr;
+  volatile U32 *u32ptr;
+  volatile S16 *s16ptr;
+  volatile U16 *u16ptr;
+  volatile S8  *s8ptr ;
+  volatile U8  *u8ptr ;
+} UnionVPtr;
+
+//! Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.
+typedef union
+{
+  const S64 *s64ptr;
+  const U64 *u64ptr;
+  const S32 *s32ptr;
+  const U32 *u32ptr;
+  const S16 *s16ptr;
+  const U16 *u16ptr;
+  const S8  *s8ptr ;
+  const U8  *u8ptr ;
+} UnionCPtr;
+
+//! Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.
+typedef union
+{
+  const volatile S64 *s64ptr;
+  const volatile U64 *u64ptr;
+  const volatile S32 *s32ptr;
+  const volatile U32 *u32ptr;
+  const volatile S16 *s16ptr;
+  const volatile U16 *u16ptr;
+  const volatile S8  *s8ptr ;
+  const volatile U8  *u8ptr ;
+} UnionCVPtr;
+
+//! Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers.
+typedef struct
+{
+  S64 *s64ptr;
+  U64 *u64ptr;
+  S32 *s32ptr;
+  U32 *u32ptr;
+  S16 *s16ptr;
+  U16 *u16ptr;
+  S8  *s8ptr ;
+  U8  *u8ptr ;
+} StructPtr;
+
+//! Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers.
+typedef struct
+{
+  volatile S64 *s64ptr;
+  volatile U64 *u64ptr;
+  volatile S32 *s32ptr;
+  volatile U32 *u32ptr;
+  volatile S16 *s16ptr;
+  volatile U16 *u16ptr;
+  volatile S8  *s8ptr ;
+  volatile U8  *u8ptr ;
+} StructVPtr;
+
+//! Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers.
+typedef struct
+{
+  const S64 *s64ptr;
+  const U64 *u64ptr;
+  const S32 *s32ptr;
+  const U32 *u32ptr;
+  const S16 *s16ptr;
+  const U16 *u16ptr;
+  const S8  *s8ptr ;
+  const U8  *u8ptr ;
+} StructCPtr;
+
+//! Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers.
+typedef struct
+{
+  const volatile S64 *s64ptr;
+  const volatile U64 *u64ptr;
+  const volatile S32 *s32ptr;
+  const volatile U32 *u32ptr;
+  const volatile S16 *s16ptr;
+  const volatile U16 *u16ptr;
+  const volatile S8  *s8ptr ;
+  const volatile U8  *u8ptr ;
+} StructCVPtr;
+
+//! @}
+
+#endif  // __AVR32_ABI_COMPILER__
+
+
+//_____ M A C R O S ________________________________________________________
+
+/*! \name Usual Constants
+ */
+//! @{
+#define DISABLE   0
+#define ENABLE    1
+#define DISABLED  0
+#define ENABLED   1
+#define OFF       0
+#define ON        1
+#define FALSE     0
+#define TRUE      1
+#ifndef __cplusplus
+#if !defined(__bool_true_false_are_defined)
+#define false     FALSE
+#define true      TRUE
+#endif
+#endif
+#define KO        0
+#define OK        1
+#define PASS      0
+#define FAIL      1
+#define LOW       0
+#define HIGH      1
+#define CLR       0
+#define SET       1
+//! @}
+
+
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
+
+/*! \name Bit-Field Handling
+ */
+//! @{
+
+/*! \brief Reads the bits of a value specified by a given bit-mask.
+ *
+ * \param value Value to read bits from.
+ * \param mask  Bit-mask indicating bits to read.
+ *
+ * \return Read bits.
+ */
+#define Rd_bits( value, mask)        ((value) & (mask))
+
+/*! \brief Writes the bits of a C lvalue specified by a given bit-mask.
+ *
+ * \param lvalue  C lvalue to write bits to.
+ * \param mask    Bit-mask indicating bits to write.
+ * \param bits    Bits to write.
+ *
+ * \return Resulting value with written bits.
+ */
+#define Wr_bits(lvalue, mask, bits)  ((lvalue) = ((lvalue) & ~(mask)) |\
+                                                 ((bits  ) &  (mask)))
+
+/*! \brief Tests the bits of a value specified by a given bit-mask.
+ *
+ * \param value Value of which to test bits.
+ * \param mask  Bit-mask indicating bits to test.
+ *
+ * \return \c 1 if at least one of the tested bits is set, else \c 0.
+ */
+#define Tst_bits( value, mask)  (Rd_bits(value, mask) != 0)
+
+/*! \brief Clears the bits of a C lvalue specified by a given bit-mask.
+ *
+ * \param lvalue  C lvalue of which to clear bits.
+ * \param mask    Bit-mask indicating bits to clear.
+ *
+ * \return Resulting value with cleared bits.
+ */
+#define Clr_bits(lvalue, mask)  ((lvalue) &= ~(mask))
+
+/*! \brief Sets the bits of a C lvalue specified by a given bit-mask.
+ *
+ * \param lvalue  C lvalue of which to set bits.
+ * \param mask    Bit-mask indicating bits to set.
+ *
+ * \return Resulting value with set bits.
+ */
+#define Set_bits(lvalue, mask)  ((lvalue) |=  (mask))
+
+/*! \brief Toggles the bits of a C lvalue specified by a given bit-mask.
+ *
+ * \param lvalue  C lvalue of which to toggle bits.
+ * \param mask    Bit-mask indicating bits to toggle.
+ *
+ * \return Resulting value with toggled bits.
+ */
+#define Tgl_bits(lvalue, mask)  ((lvalue) ^=  (mask))
+
+/*! \brief Reads the bit-field of a value specified by a given bit-mask.
+ *
+ * \param value Value to read a bit-field from.
+ * \param mask  Bit-mask indicating the bit-field to read.
+ *
+ * \return Read bit-field.
+ */
+#define Rd_bitfield( value, mask)           (Rd_bits( value, mask) >> ctz(mask))
+
+/*! \brief Writes the bit-field of a C lvalue specified by a given bit-mask.
+ *
+ * \param lvalue    C lvalue to write a bit-field to.
+ * \param mask      Bit-mask indicating the bit-field to write.
+ * \param bitfield  Bit-field to write.
+ *
+ * \return Resulting value with written bit-field.
+ */
+#define Wr_bitfield(lvalue, mask, bitfield) (Wr_bits(lvalue, mask, (U32)(bitfield) << ctz(mask)))
+
+//! @}
+
+
+/*! \brief This macro is used to test fatal errors.
+ *
+ * The macro tests if the expression is FALSE. If it is, a fatal error is
+ * detected and the application hangs up.
+ *
+ * \param expr  Expression to evaluate and supposed to be nonzero.
+ */
+#ifdef _ASSERT_ENABLE_
+  #define Assert(expr) \
+  {\
+    if (!(expr)) while (TRUE);\
+  }
+#else
+  #define Assert(expr)
+#endif
+
+
+/*! \name Zero-Bit Counting
+ *
+ * Under AVR32-GCC, __builtin_clz and __builtin_ctz behave like macros when
+ * applied to constant expressions (values known at compile time), so they are
+ * more optimized than the use of the corresponding assembly instructions and
+ * they can be used as constant expressions e.g. to initialize objects having
+ * static storage duration, and like the corresponding assembly instructions
+ * when applied to non-constant expressions (values unknown at compile time), so
+ * they are more optimized than an assembly periphrasis. Hence, clz and ctz
+ * ensure a possible and optimized behavior for both constant and non-constant
+ * expressions.
+ */
+//! @{
+
+/*! \brief Counts the leading zero bits of the given value considered as a 32-bit integer.
+ *
+ * \param u Value of which to count the leading zero bits.
+ *
+ * \return The count of leading zero bits in \a u.
+ */
+#if (defined __GNUC__)
+  #define clz(u)              __builtin_clz(u)
+#elif (defined __ICCAVR32__)
+  #define clz(u)              __count_leading_zeros(u)
+#endif
+
+/*! \brief Counts the trailing zero bits of the given value considered as a 32-bit integer.
+ *
+ * \param u Value of which to count the trailing zero bits.
+ *
+ * \return The count of trailing zero bits in \a u.
+ */
+#if (defined __GNUC__)
+  #define ctz(u)              __builtin_ctz(u)
+#elif (defined __ICCAVR32__)
+  #define ctz(u)              __count_trailing_zeros(u)
+#endif
+
+//! @}
+
+
+/*! \name Bit Reversing
+ */
+//! @{
+
+/*! \brief Reverses the bits of \a u8.
+ *
+ * \param u8  U8 of which to reverse the bits.
+ *
+ * \return Value resulting from \a u8 with reversed bits.
+ */
+#define bit_reverse8(u8)    ((U8)(bit_reverse32((U8)(u8)) >> 24))
+
+/*! \brief Reverses the bits of \a u16.
+ *
+ * \param u16 U16 of which to reverse the bits.
+ *
+ * \return Value resulting from \a u16 with reversed bits.
+ */
+#define bit_reverse16(u16)  ((U16)(bit_reverse32((U16)(u16)) >> 16))
+
+/*! \brief Reverses the bits of \a u32.
+ *
+ * \param u32 U32 of which to reverse the bits.
+ *
+ * \return Value resulting from \a u32 with reversed bits.
+ */
+#if (defined __GNUC__)
+  #define bit_reverse32(u32) \
+  (\
+    {\
+      unsigned int __value = (U32)(u32);\
+      __asm__ ("brev\t%0" : "+r" (__value) :  : "cc");\
+      (U32)__value;\
+    }\
+  )
+#elif (defined __ICCAVR32__)
+  #define bit_reverse32(u32)  ((U32)__bit_reverse((U32)(u32)))
+#endif
+
+/*! \brief Reverses the bits of \a u64.
+ *
+ * \param u64 U64 of which to reverse the bits.
+ *
+ * \return Value resulting from \a u64 with reversed bits.
+ */
+#define bit_reverse64(u64)  ((U64)(((U64)bit_reverse32((U64)(u64) >> 32)) |\
+                                   ((U64)bit_reverse32((U64)(u64)) << 32)))
+
+//! @}
+
+
+/*! \name Alignment
+ */
+//! @{
+
+/*! \brief Tests alignment of the number \a val with the \a n boundary.
+ *
+ * \param val Input value.
+ * \param n   Boundary.
+ *
+ * \return \c 1 if the number \a val is aligned with the \a n boundary, else \c 0.
+ */
+#define Test_align(val, n     ) (!Tst_bits( val, (n) - 1     )   )
+
+/*! \brief Gets alignment of the number \a val with respect to the \a n boundary.
+ *
+ * \param val Input value.
+ * \param n   Boundary.
+ *
+ * \return Alignment of the number \a val with respect to the \a n boundary.
+ */
+#define Get_align( val, n     ) (  Rd_bits( val, (n) - 1     )   )
+
+/*! \brief Sets alignment of the lvalue number \a lval to \a alg with respect to the \a n boundary.
+ *
+ * \param lval  Input/output lvalue.
+ * \param n     Boundary.
+ * \param alg   Alignment.
+ *
+ * \return New value of \a lval resulting from its alignment set to \a alg with respect to the \a n boundary.
+ */
+#define Set_align(lval, n, alg) (  Wr_bits(lval, (n) - 1, alg)   )
+
+/*! \brief Aligns the number \a val with the upper \a n boundary.
+ *
+ * \param val Input value.
+ * \param n   Boundary.
+ *
+ * \return Value resulting from the number \a val aligned with the upper \a n boundary.
+ */
+#define Align_up(  val, n     ) (((val) + ((n) - 1)) & ~((n) - 1))
+
+/*! \brief Aligns the number \a val with the lower \a n boundary.
+ *
+ * \param val Input value.
+ * \param n   Boundary.
+ *
+ * \return Value resulting from the number \a val aligned with the lower \a n boundary.
+ */
+#define Align_down(val, n     ) ( (val)              & ~((n) - 1))
+
+//! @}
+
+
+/*! \name Mathematics
+ *
+ * The same considerations as for clz and ctz apply here but AVR32-GCC does not
+ * provide built-in functions to access the assembly instructions abs, min and
+ * max and it does not produce them by itself in most cases, so two sets of
+ * macros are defined here:
+ *   - Abs, Min and Max to apply to constant expressions (values known at
+ *     compile time);
+ *   - abs, min and max to apply to non-constant expressions (values unknown at
+ *     compile time).
+ */
+//! @{
+
+/*! \brief Takes the absolute value of \a a.
+ *
+ * \param a Input value.
+ *
+ * \return Absolute value of \a a.
+ *
+ * \note More optimized if only used with values known at compile time.
+ */
+#define Abs(a)              (((a) <  0 ) ? -(a) : (a))
+
+/*! \brief Takes the minimal value of \a a and \a b.
+ *
+ * \param a Input value.
+ * \param b Input value.
+ *
+ * \return Minimal value of \a a and \a b.
+ *
+ * \note More optimized if only used with values known at compile time.
+ */
+#define Min(a, b)           (((a) < (b)) ?  (a) : (b))
+
+/*! \brief Takes the maximal value of \a a and \a b.
+ *
+ * \param a Input value.
+ * \param b Input value.
+ *
+ * \return Maximal value of \a a and \a b.
+ *
+ * \note More optimized if only used with values known at compile time.
+ */
+#define Max(a, b)           (((a) > (b)) ?  (a) : (b))
+
+/*! \brief Takes the absolute value of \a a.
+ *
+ * \param a Input value.
+ *
+ * \return Absolute value of \a a.
+ *
+ * \note More optimized if only used with values unknown at compile time.
+ */
+#if (defined __GNUC__)
+  #define abs(a) \
+  (\
+    {\
+      int __value = (a);\
+      __asm__ ("abs\t%0" : "+r" (__value) :  : "cc");\
+      __value;\
+    }\
+  )
+#elif (defined __ICCAVR32__)
+  #define abs(a)      Abs(a)
+#endif
+
+/*! \brief Takes the minimal value of \a a and \a b.
+ *
+ * \param a Input value.
+ * \param b Input value.
+ *
+ * \return Minimal value of \a a and \a b.
+ *
+ * \note More optimized if only used with values unknown at compile time.
+ */
+#if (defined __GNUC__)
+  #define min(a, b) \
+  (\
+    {\
+      int __value, __arg_a = (a), __arg_b = (b);\
+      __asm__ ("min\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
+      __value;\
+    }\
+  )
+#elif (defined __ICCAVR32__)
+  #define min(a, b)   __min(a, b)
+#endif
+
+/*! \brief Takes the maximal value of \a a and \a b.
+ *
+ * \param a Input value.
+ * \param b Input value.
+ *
+ * \return Maximal value of \a a and \a b.
+ *
+ * \note More optimized if only used with values unknown at compile time.
+ */
+#if (defined __GNUC__)
+  #define max(a, b) \
+  (\
+    {\
+      int __value, __arg_a = (a), __arg_b = (b);\
+      __asm__ ("max\t%0, %1, %2" : "=r" (__value) : "r" (__arg_a), "r" (__arg_b));\
+      __value;\
+    }\
+  )
+#elif (defined __ICCAVR32__)
+  #define max(a, b)   __max(a, b)
+#endif
+
+//! @}
+
+
+/*! \brief Calls the routine at address \a addr.
+ *
+ * It generates a long call opcode.
+ *
+ * For example, `Long_call(0x80000000)' generates a software reset on a UC3 if
+ * it is invoked from the CPU supervisor mode.
+ *
+ * \param addr  Address of the routine to call.
+ *
+ * \note It may be used as a long jump opcode in some special cases.
+ */
+#define Long_call(addr)                   ((*(void (*)(void))(addr))())
+
+/*! \brief Resets the CPU by software.
+ *
+ * \warning It shall not be called from the CPU application mode.
+ */
+#if (defined __GNUC__)
+  #define Reset_CPU() \
+  (\
+    {\
+      __asm__ __volatile__ (\
+        "lddpc   r9, 3f\n\t"\
+        "mfsr    r8, %[SR]\n\t"\
+        "bfextu  r8, r8, %[SR_M_OFFSET], %[SR_M_SIZE]\n\t"\
+        "cp.w    r8, 0b001\n\t"\
+        "breq    0f\n\t"\
+        "sub     r8, pc, $ - 1f\n\t"\
+        "pushm   r8-r9\n\t"\
+        "rete\n"\
+        "0:\n\t"\
+        "mtsr    %[SR], r9\n"\
+        "1:\n\t"\
+        "mov     r0, 0\n\t"\
+        "mov     r1, 0\n\t"\
+        "mov     r2, 0\n\t"\
+        "mov     r3, 0\n\t"\
+        "mov     r4, 0\n\t"\
+        "mov     r5, 0\n\t"\
+        "mov     r6, 0\n\t"\
+        "mov     r7, 0\n\t"\
+        "mov     r8, 0\n\t"\
+        "mov     r9, 0\n\t"\
+        "mov     r10, 0\n\t"\
+        "mov     r11, 0\n\t"\
+        "mov     r12, 0\n\t"\
+        "mov     sp, 0\n\t"\
+        "stdsp   sp[0], sp\n\t"\
+        "ldmts   sp, sp\n\t"\
+        "mov     lr, 0\n\t"\
+        "lddpc   pc, 2f\n\t"\
+        ".balign 4\n"\
+        "2:\n\t"\
+        ".word   _start\n"\
+        "3:\n\t"\
+        ".word   %[RESET_SR]"\
+        :\
+        : [SR] "i" (AVR32_SR),\
+          [SR_M_OFFSET] "i" (AVR32_SR_M_OFFSET),\
+          [SR_M_SIZE] "i" (AVR32_SR_M_SIZE),\
+          [RESET_SR] "i" (AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))\
+      );\
+    }\
+  )
+#elif (defined __ICCAVR32__)
+  #define Reset_CPU() \
+  {\
+    extern void *volatile __program_start;\
+    __asm__ __volatile__ (\
+      "mov     r7, LWRD(__program_start)\n\t"\
+      "orh     r7, HWRD(__program_start)\n\t"\
+      "mov     r9, LWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\
+      "orh     r9, HWRD("ASTRINGZ(AVR32_SR_GM_MASK | AVR32_SR_EM_MASK | (AVR32_SR_M_SUP << AVR32_SR_M_OFFSET))")\n\t"\
+      "mfsr    r8, "ASTRINGZ(AVR32_SR)"\n\t"\
+      "bfextu  r8, r8, "ASTRINGZ(AVR32_SR_M_OFFSET)", "ASTRINGZ(AVR32_SR_M_SIZE)"\n\t"\
+      "cp.w    r8, 001b\n\t"\
+      "breq    $ + 10\n\t"\
+      "sub     r8, pc, -12\n\t"\
+      "pushm   r8-r9\n\t"\
+      "rete\n\t"\
+      "mtsr    "ASTRINGZ(AVR32_SR)", r9\n\t"\
+      "mov     r0, 0\n\t"\
+      "mov     r1, 0\n\t"\
+      "mov     r2, 0\n\t"\
+      "mov     r3, 0\n\t"\
+      "mov     r4, 0\n\t"\
+      "mov     r5, 0\n\t"\
+      "mov     r6, 0\n\t"\
+      "st.w    r0[4], r7\n\t"\
+      "mov     r7, 0\n\t"\
+      "mov     r8, 0\n\t"\
+      "mov     r9, 0\n\t"\
+      "mov     r10, 0\n\t"\
+      "mov     r11, 0\n\t"\
+      "mov     r12, 0\n\t"\
+      "mov     sp, 0\n\t"\
+      "stdsp   sp[0], sp\n\t"\
+      "ldmts   sp, sp\n\t"\
+      "mov     lr, 0\n\t"\
+      "ld.w    pc, lr[4]"\
+    );\
+    __program_start;\
+  }
+#endif
+
+
+/*! \name System Register Access
+ */
+//! @{
+
+/*! \brief Gets the value of the \a sysreg system register.
+ *
+ * \param sysreg  Address of the system register of which to get the value.
+ *
+ * \return Value of the \a sysreg system register.
+ */
+#if (defined __GNUC__)
+  #define Get_system_register(sysreg)         __builtin_mfsr(sysreg)
+#elif (defined __ICCAVR32__)
+  #define Get_system_register(sysreg)         __get_system_register(sysreg)
+#endif
+
+/*! \brief Sets the value of the \a sysreg system register to \a value.
+ *
+ * \param sysreg  Address of the system register of which to set the value.
+ * \param value   Value to set the \a sysreg system register to.
+ */
+#if (defined __GNUC__)
+  #define Set_system_register(sysreg, value)  __builtin_mtsr(sysreg, value)
+#elif (defined __ICCAVR32__)
+  #define Set_system_register(sysreg, value)  __set_system_register(sysreg, value)
+#endif
+
+//! @}
+
+
+/*! \name CPU Status Register Access
+ */
+//! @{
+
+/*! \brief Tells whether exceptions are globally enabled.
+ *
+ * \return \c 1 if exceptions are globally enabled, else \c 0.
+ */
+#define Is_global_exception_enabled()         (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_EM_MASK))
+
+/*! \brief Disables exceptions globally.
+ */
+#if (defined __GNUC__)
+  #define Disable_global_exception()          ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (AVR32_SR_EM_OFFSET));})
+#elif (defined __ICCAVR32__)
+  #define Disable_global_exception()          (__set_status_flag(AVR32_SR_EM_OFFSET))
+#endif
+
+/*! \brief Enables exceptions globally.
+ */
+#if (defined __GNUC__)
+  #define Enable_global_exception()           ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (AVR32_SR_EM_OFFSET));})
+#elif (defined __ICCAVR32__)
+  #define Enable_global_exception()           (__clear_status_flag(AVR32_SR_EM_OFFSET))
+#endif
+
+/*! \brief Tells whether interrupts are globally enabled.
+ *
+ * \return \c 1 if interrupts are globally enabled, else \c 0.
+ */
+#define Is_global_interrupt_enabled()         (!Tst_bits(Get_system_register(AVR32_SR), AVR32_SR_GM_MASK))
+
+/*! \brief Disables interrupts globally.
+ */
+#if (defined __GNUC__)
+  #define Disable_global_interrupt()          ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (AVR32_SR_GM_OFFSET));})
+#elif (defined __ICCAVR32__)
+  #define Disable_global_interrupt()          (__disable_interrupt())
+#endif
+
+/*! \brief Enables interrupts globally.
+ */
+#if (defined __GNUC__)
+  #define Enable_global_interrupt()           ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (AVR32_SR_GM_OFFSET));})
+#elif (defined __ICCAVR32__)
+  #define Enable_global_interrupt()           (__enable_interrupt())
+#endif
+
+/*! \brief Tells whether interrupt level \a int_level is enabled.
+ *
+ * \param int_level Interrupt level (0 to 3).
+ *
+ * \return \c 1 if interrupt level \a int_level is enabled, else \c 0.
+ */
+#define Is_interrupt_level_enabled(int_level) (!Tst_bits(Get_system_register(AVR32_SR), TPASTE3(AVR32_SR_I, int_level, M_MASK)))
+
+/*! \brief Disables interrupt level \a int_level.
+ *
+ * \param int_level Interrupt level to disable (0 to 3).
+ */
+#if (defined __GNUC__)
+  #define Disable_interrupt_level(int_level)  ({__asm__ __volatile__ ("ssrf\t%0" :  : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));})
+#elif (defined __ICCAVR32__)
+  #define Disable_interrupt_level(int_level)  (__set_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET)))
+#endif
+
+/*! \brief Enables interrupt level \a int_level.
+ *
+ * \param int_level Interrupt level to enable (0 to 3).
+ */
+#if (defined __GNUC__)
+  #define Enable_interrupt_level(int_level)   ({__asm__ __volatile__ ("csrf\t%0" :  : "i" (TPASTE3(AVR32_SR_I, int_level, M_OFFSET)));})
+#elif (defined __ICCAVR32__)
+  #define Enable_interrupt_level(int_level)   (__clear_status_flag(TPASTE3(AVR32_SR_I, int_level, M_OFFSET)))
+#endif
+
+/*! \brief Protects subsequent code from interrupts.
+ */
+#define AVR32_ENTER_CRITICAL_REGION( ) \
+  { \
+  Bool global_interrupt_enabled = Is_global_interrupt_enabled(); \
+  Disable_global_interrupt(); // Disable the appropriate interrupts.
+
+/*! \brief This macro must always be used in conjunction with AVR32_ENTER_CRITICAL_REGION
+ *         so that interrupts are enabled again.
+ */
+#define AVR32_LEAVE_CRITICAL_REGION( ) \
+  if (global_interrupt_enabled) Enable_global_interrupt(); \
+  }
+
+//! @}
+
+
+/*! \name Debug Register Access
+ */
+//! @{
+
+/*! \brief Gets the value of the \a dbgreg debug register.
+ *
+ * \param dbgreg  Address of the debug register of which to get the value.
+ *
+ * \return Value of the \a dbgreg debug register.
+ */
+#if (defined __GNUC__)
+  #define Get_debug_register(dbgreg)          __builtin_mfdr(dbgreg)
+#elif (defined __ICCAVR32__)
+  #define Get_debug_register(dbgreg)          __get_debug_register(dbgreg)
+#endif
+
+/*! \brief Sets the value of the \a dbgreg debug register to \a value.
+ *
+ * \param dbgreg  Address of the debug register of which to set the value.
+ * \param value   Value to set the \a dbgreg debug register to.
+ */
+#if (defined __GNUC__)
+  #define Set_debug_register(dbgreg, value)   __builtin_mtdr(dbgreg, value)
+#elif (defined __ICCAVR32__)
+  #define Set_debug_register(dbgreg, value)   __set_debug_register(dbgreg, value)
+#endif
+
+//! @}
+
+#endif  // __AVR32_ABI_COMPILER__
+
+
+//! Boolean evaluating MCU little endianism.
+#if ((defined __GNUC__) && (defined __AVR32__)) || ((defined __ICCAVR32__) || (defined __AAVR32__))
+  #define LITTLE_ENDIAN_MCU     FALSE
+#else
+  #error If you are here, you should check what is exactly the processor you are using...
+  #define LITTLE_ENDIAN_MCU     FALSE
+#endif
+
+// Check that MCU endianism is correctly defined.
+#ifndef LITTLE_ENDIAN_MCU
+  #error YOU MUST define the MCU endianism with LITTLE_ENDIAN_MCU: either FALSE or TRUE
+#endif
+
+//! Boolean evaluating MCU big endianism.
+#define BIG_ENDIAN_MCU        (!LITTLE_ENDIAN_MCU)
+
+
+#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
+
+/*! \name MCU Endianism Handling
+ */
+//! @{
+
+#if (LITTLE_ENDIAN_MCU==TRUE)
+  #define LSB(u16)        (((U8  *)&(u16))[0])  //!< Least significant byte of \a u16.
+  #define MSB(u16)        (((U8  *)&(u16))[1])  //!< Most significant byte of \a u16.
+
+  #define LSH(u32)        (((U16 *)&(u32))[0])  //!< Least significant half-word of \a u32.
+  #define MSH(u32)        (((U16 *)&(u32))[1])  //!< Most significant half-word of \a u32.
+  #define LSB0W(u32)      (((U8  *)&(u32))[0])  //!< Least significant byte of 1st rank of \a u32.
+  #define LSB1W(u32)      (((U8  *)&(u32))[1])  //!< Least significant byte of 2nd rank of \a u32.
+  #define LSB2W(u32)      (((U8  *)&(u32))[2])  //!< Least significant byte of 3rd rank of \a u32.
+  #define LSB3W(u32)      (((U8  *)&(u32))[3])  //!< Least significant byte of 4th rank of \a u32.
+  #define MSB3W(u32)      LSB0W(u32)            //!< Most significant byte of 4th rank of \a u32.
+  #define MSB2W(u32)      LSB1W(u32)            //!< Most significant byte of 3rd rank of \a u32.
+  #define MSB1W(u32)      LSB2W(u32)            //!< Most significant byte of 2nd rank of \a u32.
+  #define MSB0W(u32)      LSB3W(u32)            //!< Most significant byte of 1st rank of \a u32.
+
+  #define LSW(u64)        (((U32 *)&(u64))[0])  //!< Least significant word of \a u64.
+  #define MSW(u64)        (((U32 *)&(u64))[1])  //!< Most significant word of \a u64.
+  #define LSH0(u64)       (((U16 *)&(u64))[0])  //!< Least significant half-word of 1st rank of \a u64.
+  #define LSH1(u64)       (((U16 *)&(u64))[1])  //!< Least significant half-word of 2nd rank of \a u64.
+  #define LSH2(u64)       (((U16 *)&(u64))[2])  //!< Least significant half-word of 3rd rank of \a u64.
+  #define LSH3(u64)       (((U16 *)&(u64))[3])  //!< Least significant half-word of 4th rank of \a u64.
+  #define MSH3(u64)       LSH0(u64)             //!< Most significant half-word of 4th rank of \a u64.
+  #define MSH2(u64)       LSH1(u64)             //!< Most significant half-word of 3rd rank of \a u64.
+  #define MSH1(u64)       LSH2(u64)             //!< Most significant half-word of 2nd rank of \a u64.
+  #define MSH0(u64)       LSH3(u64)             //!< Most significant half-word of 1st rank of \a u64.
+  #define LSB0D(u64)      (((U8  *)&(u64))[0])  //!< Least significant byte of 1st rank of \a u64.
+  #define LSB1D(u64)      (((U8  *)&(u64))[1])  //!< Least significant byte of 2nd rank of \a u64.
+  #define LSB2D(u64)      (((U8  *)&(u64))[2])  //!< Least significant byte of 3rd rank of \a u64.
+  #define LSB3D(u64)      (((U8  *)&(u64))[3])  //!< Least significant byte of 4th rank of \a u64.
+  #define LSB4D(u64)      (((U8  *)&(u64))[4])  //!< Least significant byte of 5th rank of \a u64.
+  #define LSB5D(u64)      (((U8  *)&(u64))[5])  //!< Least significant byte of 6th rank of \a u64.
+  #define LSB6D(u64)      (((U8  *)&(u64))[6])  //!< Least significant byte of 7th rank of \a u64.
+  #define LSB7D(u64)      (((U8  *)&(u64))[7])  //!< Least significant byte of 8th rank of \a u64.
+  #define MSB7D(u64)      LSB0D(u64)            //!< Most significant byte of 8th rank of \a u64.
+  #define MSB6D(u64)      LSB1D(u64)            //!< Most significant byte of 7th rank of \a u64.
+  #define MSB5D(u64)      LSB2D(u64)            //!< Most significant byte of 6th rank of \a u64.
+  #define MSB4D(u64)      LSB3D(u64)            //!< Most significant byte of 5th rank of \a u64.
+  #define MSB3D(u64)      LSB4D(u64)            //!< Most significant byte of 4th rank of \a u64.
+  #define MSB2D(u64)      LSB5D(u64)            //!< Most significant byte of 3rd rank of \a u64.
+  #define MSB1D(u64)      LSB6D(u64)            //!< Most significant byte of 2nd rank of \a u64.
+  #define MSB0D(u64)      LSB7D(u64)            //!< Most significant byte of 1st rank of \a u64.
+
+#elif (BIG_ENDIAN_MCU==TRUE) 
+  #define MSB(u16)        (((U8  *)&(u16))[0])  //!< Most significant byte of \a u16.
+  #define LSB(u16)        (((U8  *)&(u16))[1])  //!< Least significant byte of \a u16.
+
+  #define MSH(u32)        (((U16 *)&(u32))[0])  //!< Most significant half-word of \a u32.
+  #define LSH(u32)        (((U16 *)&(u32))[1])  //!< Least significant half-word of \a u32.
+  #define MSB0W(u32)      (((U8  *)&(u32))[0])  //!< Most significant byte of 1st rank of \a u32.
+  #define MSB1W(u32)      (((U8  *)&(u32))[1])  //!< Most significant byte of 2nd rank of \a u32.
+  #define MSB2W(u32)      (((U8  *)&(u32))[2])  //!< Most significant byte of 3rd rank of \a u32.
+  #define MSB3W(u32)      (((U8  *)&(u32))[3])  //!< Most significant byte of 4th rank of \a u32.
+  #define LSB3W(u32)      MSB0W(u32)            //!< Least significant byte of 4th rank of \a u32.
+  #define LSB2W(u32)      MSB1W(u32)            //!< Least significant byte of 3rd rank of \a u32.
+  #define LSB1W(u32)      MSB2W(u32)            //!< Least significant byte of 2nd rank of \a u32.
+  #define LSB0W(u32)      MSB3W(u32)            //!< Least significant byte of 1st rank of \a u32.
+
+  #define MSW(u64)        (((U32 *)&(u64))[0])  //!< Most significant word of \a u64.
+  #define LSW(u64)        (((U32 *)&(u64))[1])  //!< Least significant word of \a u64.
+  #define MSH0(u64)       (((U16 *)&(u64))[0])  //!< Most significant half-word of 1st rank of \a u64.
+  #define MSH1(u64)       (((U16 *)&(u64))[1])  //!< Most significant half-word of 2nd rank of \a u64.
+  #define MSH2(u64)       (((U16 *)&(u64))[2])  //!< Most significant half-word of 3rd rank of \a u64.
+  #define MSH3(u64)       (((U16 *)&(u64))[3])  //!< Most significant half-word of 4th rank of \a u64.
+  #define LSH3(u64)       MSH0(u64)             //!< Least significant half-word of 4th rank of \a u64.
+  #define LSH2(u64)       MSH1(u64)             //!< Least significant half-word of 3rd rank of \a u64.
+  #define LSH1(u64)       MSH2(u64)             //!< Least significant half-word of 2nd rank of \a u64.
+  #define LSH0(u64)       MSH3(u64)             //!< Least significant half-word of 1st rank of \a u64.
+  #define MSB0D(u64)      (((U8  *)&(u64))[0])  //!< Most significant byte of 1st rank of \a u64.
+  #define MSB1D(u64)      (((U8  *)&(u64))[1])  //!< Most significant byte of 2nd rank of \a u64.
+  #define MSB2D(u64)      (((U8  *)&(u64))[2])  //!< Most significant byte of 3rd rank of \a u64.
+  #define MSB3D(u64)      (((U8  *)&(u64))[3])  //!< Most significant byte of 4th rank of \a u64.
+  #define MSB4D(u64)      (((U8  *)&(u64))[4])  //!< Most significant byte of 5th rank of \a u64.
+  #define MSB5D(u64)      (((U8  *)&(u64))[5])  //!< Most significant byte of 6th rank of \a u64.
+  #define MSB6D(u64)      (((U8  *)&(u64))[6])  //!< Most significant byte of 7th rank of \a u64.
+  #define MSB7D(u64)      (((U8  *)&(u64))[7])  //!< Most significant byte of 8th rank of \a u64.
+  #define LSB7D(u64)      MSB0D(u64)            //!< Least significant byte of 8th rank of \a u64.
+  #define LSB6D(u64)      MSB1D(u64)            //!< Least significant byte of 7th rank of \a u64.
+  #define LSB5D(u64)      MSB2D(u64)            //!< Least significant byte of 6th rank of \a u64.
+  #define LSB4D(u64)      MSB3D(u64)            //!< Least significant byte of 5th rank of \a u64.
+  #define LSB3D(u64)      MSB4D(u64)            //!< Least significant byte of 4th rank of \a u64.
+  #define LSB2D(u64)      MSB5D(u64)            //!< Least significant byte of 3rd rank of \a u64.
+  #define LSB1D(u64)      MSB6D(u64)            //!< Least significant byte of 2nd rank of \a u64.
+  #define LSB0D(u64)      MSB7D(u64)            //!< Least significant byte of 1st rank of \a u64.
+
+#else
+  #error  Unknown endianism.
+#endif
+
+//! @}
+
+
+/*! \name Endianism Conversion
+ *
+ * The same considerations as for clz and ctz apply here but AVR32-GCC's
+ * __builtin_bswap_16 and __builtin_bswap_32 do not behave like macros when
+ * applied to constant expressions, so two sets of macros are defined here:
+ *   - Swap16, Swap32 and Swap64 to apply to constant expressions (values known
+ *     at compile time);
+ *   - swap16, swap32 and swap64 to apply to non-constant expressions (values
+ *     unknown at compile time).
+ */
+//! @{
+
+/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).
+ *
+ * \param u16 U16 of which to toggle the endianism.
+ *
+ * \return Value resulting from \a u16 with toggled endianism.
+ *
+ * \note More optimized if only used with values known at compile time.
+ */
+#define Swap16(u16) ((U16)(((U16)(u16) >> 8) |\
+                           ((U16)(u16) << 8)))
+
+/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).
+ *
+ * \param u32 U32 of which to toggle the endianism.
+ *
+ * \return Value resulting from \a u32 with toggled endianism.
+ *
+ * \note More optimized if only used with values known at compile time.
+ */
+#define Swap32(u32) ((U32)(((U32)Swap16((U32)(u32) >> 16)) |\
+                           ((U32)Swap16((U32)(u32)) << 16)))
+
+/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).
+ *
+ * \param u64 U64 of which to toggle the endianism.
+ *
+ * \return Value resulting from \a u64 with toggled endianism.
+ *
+ * \note More optimized if only used with values known at compile time.
+ */
+#define Swap64(u64) ((U64)(((U64)Swap32((U64)(u64) >> 32)) |\
+                           ((U64)Swap32((U64)(u64)) << 32)))
+
+/*! \brief Toggles the endianism of \a u16 (by swapping its bytes).
+ *
+ * \param u16 U16 of which to toggle the endianism.
+ *
+ * \return Value resulting from \a u16 with toggled endianism.
+ *
+ * \note More optimized if only used with values unknown at compile time.
+ */
+#if (defined __GNUC__)
+  #define swap16(u16) ((U16)__builtin_bswap_16((U16)(u16)))
+#elif (defined __ICCAVR32__)
+  #define swap16(u16) ((U16)__swap_bytes_in_halfwords((U16)(u16)))
+#endif
+
+/*! \brief Toggles the endianism of \a u32 (by swapping its bytes).
+ *
+ * \param u32 U32 of which to toggle the endianism.
+ *
+ * \return Value resulting from \a u32 with toggled endianism.
+ *
+ * \note More optimized if only used with values unknown at compile time.
+ */
+#if (defined __GNUC__)
+  #define swap32(u32) ((U32)__builtin_bswap_32((U32)(u32)))
+#elif (defined __ICCAVR32__)
+  #define swap32(u32) ((U32)__swap_bytes((U32)(u32)))
+#endif
+
+/*! \brief Toggles the endianism of \a u64 (by swapping its bytes).
+ *
+ * \param u64 U64 of which to toggle the endianism.
+ *
+ * \return Value resulting from \a u64 with toggled endianism.
+ *
+ * \note More optimized if only used with values unknown at compile time.
+ */
+#define swap64(u64) ((U64)(((U64)swap32((U64)(u64) >> 32)) |\
+                           ((U64)swap32((U64)(u64)) << 32)))
+
+//! @}
+
+
+/*! \name Target Abstraction
+ */
+//! @{
+
+#define _GLOBEXT_           extern      //!< extern storage-class specifier.
+#define _CONST_TYPE_        const       //!< const type qualifier.
+#define _MEM_TYPE_SLOW_                 //!< Slow memory type.
+#define _MEM_TYPE_MEDFAST_              //!< Fairly fast memory type.
+#define _MEM_TYPE_FAST_                 //!< Fast memory type.
+
+typedef U8                  Byte;       //!< 8-bit unsigned integer.
+
+#define memcmp_ram2ram      memcmp      //!< Target-specific memcmp of RAM to RAM.
+#define memcmp_code2ram     memcmp      //!< Target-specific memcmp of RAM to NVRAM.
+#define memcpy_ram2ram      memcpy      //!< Target-specific memcpy from RAM to RAM.
+#define memcpy_code2ram     memcpy      //!< Target-specific memcpy from NVRAM to RAM.
+
+#define LSB0(u32)           LSB0W(u32)  //!< Least significant byte of 1st rank of \a u32.
+#define LSB1(u32)           LSB1W(u32)  //!< Least significant byte of 2nd rank of \a u32.
+#define LSB2(u32)           LSB2W(u32)  //!< Least significant byte of 3rd rank of \a u32.
+#define LSB3(u32)           LSB3W(u32)  //!< Least significant byte of 4th rank of \a u32.
+#define MSB3(u32)           MSB3W(u32)  //!< Most significant byte of 4th rank of \a u32.
+#define MSB2(u32)           MSB2W(u32)  //!< Most significant byte of 3rd rank of \a u32.
+#define MSB1(u32)           MSB1W(u32)  //!< Most significant byte of 2nd rank of \a u32.
+#define MSB0(u32)           MSB0W(u32)  //!< Most significant byte of 1st rank of \a u32.
+
+//! @}
+
+#endif  // __AVR32_ABI_COMPILER__
+
+
+#endif  // _COMPILER_H_

bsp/avr32uc3b0/SOFTWARE_FRAMEWORK/UTILS/parts.h

@@ -1,203 +1,203 @@
-/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
+/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
 
-/*This file is prepared for Doxygen automatic documentation generation.*/
-/*! \file *********************************************************************
- *
- * \brief Arch file for AVR32.
- *
- * This file defines common AVR32 UC3 series.
- *
- * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
- * - Supported devices:  All AVR32 devices can be used.
- * - AppNote:
- *
- * \author               Atmel Corporation: http://www.atmel.com \n
- *                       Support and FAQ: http://support.atmel.no/
- *
- ******************************************************************************/
-
-/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an Atmel
- * AVR product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
- *
- */
-
-#ifndef _ARCH_H_
-#define _ARCH_H_
-
-// UC3 A Series
-#define UC3A0    ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3A0128__)   || \
-                     defined (__AVR32_UC3A0256__)   || \
-                     defined (__AVR32_UC3A0512__)   || \
-                     defined (__AVR32_UC3A0512ES__)))  \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3A0128__)     || \
-                     defined (__AT32UC3A0256__)     || \
-                     defined (__AT32UC3A0512__)     || \
-                     defined (__AT32UC3A0512ES__)))
-                     
-#define UC3A1    ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3A1128__)   || \
-                     defined (__AVR32_UC3A1256__)   || \
-                     defined (__AVR32_UC3A1512__)   || \
-                     defined (__AVR32_UC3A1512ES__)))  \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3A1128__)     || \
-                     defined (__AT32UC3A1256__)     || \
-                     defined (__AT32UC3A1512__)     || \
-                     defined (__AT32UC3A1512ES__)))
-                     
-#define UC3A3  ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3A364__)    || \
-                     defined (__AVR32_UC3A364S__)   || \
-                     defined (__AVR32_UC3A3128__)   || \
-                     defined (__AVR32_UC3A3128S__)  || \
-                     defined (__AVR32_UC3A3256__)   || \
-                     defined (__AVR32_UC3A3256S__)))  \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3A364__)      || \
-                     defined (__AT32UC3A364S__)     || \
-                     defined (__AT32UC3A3128__)     || \
-                     defined (__AT32UC3A3128S__)    || \
-                     defined (__AT32UC3A3256__)     || \
-                     defined (__AT32UC3A3256S__)))
-                     
-#define UC3A (UC3A0 || UC3A1 || UC3A3)
-
-// UC3 B Series
-#define UC3B0  ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3B064__)     || \
-                     defined (__AVR32_UC3B0128__)    || \
-                     defined (__AVR32_UC3B0256__)    || \
-                     defined (__AVR32_UC3B0256ES__)  || \
-                     defined (__AVR32_UC3B0512__)    || \
-                     defined (__AVR32_UC3B0512REVC_))) \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3B064__)       || \
-                     defined (__AT32UC3B0128__)      || \
-                     defined (__AT32UC3B0256__)      || \
-                     defined (__AT32UC3B0256ES__)    || \
-                     defined (__AT32UC3B0512__)      || \
-                     defined (__AT32UC3B0512REVC__)))
-
-#define UC3B1  ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3B164__)     || \
-                     defined (__AVR32_UC3B1128__)    || \
-                     defined (__AVR32_UC3B1256__)    || \
-                     defined (__AVR32_UC3B1256ES__)  || \
-                     defined (__AVR32_UC3B1512__)    || \
-                     defined (__AVR32_UC3B1512ES__))) \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3B164__)       || \
-                     defined (__AT32UC3B1128__)      || \
-                     defined (__AT32UC3B1256__)      || \
-                     defined (__AT32UC3B1256ES__)    || \
-                     defined (__AT32UC3B1512__)      || \
-                     defined (__AT32UC3B1512REVC__)))
-
-#define UC3B (UC3B0 || UC3B1 )
-
-// UC3 C Series
-#define UC3C0    ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3C064C__)       || \
-                     defined (__AVR32_UC3C0128C__)      || \
-                     defined (__AVR32_UC3C0256C__)      || \
-                     defined (__AVR32_UC3C0512CREVC__)))  \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3C064C__)         || \
-                     defined (__AT32UC3C0128C__)        || \
-                     defined (__AT32UC3C0256C__)        || \
-                     defined (__AT32UC3C0512C__)))
-                     
-#define UC3C1    ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3C164C__)       || \
-                     defined (__AVR32_UC3C1128C__)      || \
-                     defined (__AVR32_UC3C1256C__)      || \
-                     defined (__AVR32_UC3C1512CREVC__)))  \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3C164C__)         || \
-                     defined (__AT32UC3C1128C__)        || \
-                     defined (__AT32UC3C1256C__)        || \
-                     defined (__AT32UC3C1512C__)))
-                     
-#define UC3C2    ( defined (__GNUC__) && \
-                   ( defined (__AVR32_UC3C264C__)       || \
-                     defined (__AVR32_UC3C2128C__)      || \
-                     defined (__AVR32_UC3C2256C__)      || \
-                     defined (__AVR32_UC3C2512CREVC__)))  \
-            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                   ( defined (__AT32UC3C264C__)         || \
-                     defined (__AT32UC3C2128C__)        || \
-                     defined (__AT32UC3C2256C__)        || \
-                     defined (__AT32UC3C2512C__)))
-
-#define UC3C (UC3C0 || UC3C1 || UC3C2)
-
-// UC3 L Device series
-#define UC3L0 ( defined (__GNUC__) && \
-                  ( defined (__AVR32_UC3L016__)     || \
-                    defined (__AVR32_UC3L032__)     || \
-                    defined (__AVR32_UC3L064__)     || \
-                    defined (__AVR32_UC3L064REVB__))) \
-           ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                  ( defined (__AT32UC3L016__)     || \
-                    defined (__AT32UC3L032__)     || \
-                    defined (__AT32UC3L064__)     || \
-                    defined (__AT32UC3L064REVB__)))
-                    
-#define UC3L1 ( defined (__GNUC__) && \
-                  ( defined (__AVR32_UC3L116__)     || \
-                    defined (__AVR32_UC3L132__)     || \
-                    defined (__AVR32_UC3L164__))) \
-           ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                  ( defined (__AT32UC3L116__)     || \
-                    defined (__AT32UC3L132__)     || \
-                    defined (__AT32UC3L164__)))
-                    
-#define UC3L2 ( defined (__GNUC__) && \
-                  ( defined (__AVR32_UC3L216__)     || \
-                    defined (__AVR32_UC3L232__)     || \
-                    defined (__AVR32_UC3L264__))) \
-           ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                  ( defined (__AT32UC3L216__)     || \
-                    defined (__AT32UC3L232__)     || \
-                    defined (__AT32UC3L264__)))
-                    
-#define UC3L3 ( defined (__GNUC__) && \
-                  ( defined (__AVR32_UC3L316__)     || \
-                    defined (__AVR32_UC3L332__)     || \
-                    defined (__AVR32_UC3L364__))) \
-             ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
-                  ( defined (__AT32UC3L316__)     || \
-                    defined (__AT32UC3L332__)     || \
-                    defined (__AT32UC3L364__)))
-
-#define UC3L (UC3L0 || UC3L1 || UC3L2 || UC3L3)
-
-#endif  // _ARCH_H_
+/*This file is prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief Arch file for AVR32.
+ *
+ * This file defines common AVR32 UC3 series.
+ *
+ * - Compiler:           IAR EWAVR32 and GNU GCC for AVR32
+ * - Supported devices:  All AVR32 devices can be used.
+ * - AppNote:
+ *
+ * \author               Atmel Corporation: http://www.atmel.com \n
+ *                       Support and FAQ: http://support.atmel.no/
+ *
+ ******************************************************************************/
+
+/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an Atmel
+ * AVR product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
+ *
+ */
+
+#ifndef _ARCH_H_
+#define _ARCH_H_
+
+// UC3 A Series
+#define UC3A0    ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3A0128__)   || \
+                     defined (__AVR32_UC3A0256__)   || \
+                     defined (__AVR32_UC3A0512__)   || \
+                     defined (__AVR32_UC3A0512ES__)))  \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3A0128__)     || \
+                     defined (__AT32UC3A0256__)     || \
+                     defined (__AT32UC3A0512__)     || \
+                     defined (__AT32UC3A0512ES__)))
+                     
+#define UC3A1    ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3A1128__)   || \
+                     defined (__AVR32_UC3A1256__)   || \
+                     defined (__AVR32_UC3A1512__)   || \
+                     defined (__AVR32_UC3A1512ES__)))  \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3A1128__)     || \
+                     defined (__AT32UC3A1256__)     || \
+                     defined (__AT32UC3A1512__)     || \
+                     defined (__AT32UC3A1512ES__)))
+                     
+#define UC3A3  ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3A364__)    || \
+                     defined (__AVR32_UC3A364S__)   || \
+                     defined (__AVR32_UC3A3128__)   || \
+                     defined (__AVR32_UC3A3128S__)  || \
+                     defined (__AVR32_UC3A3256__)   || \
+                     defined (__AVR32_UC3A3256S__)))  \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3A364__)      || \
+                     defined (__AT32UC3A364S__)     || \
+                     defined (__AT32UC3A3128__)     || \
+                     defined (__AT32UC3A3128S__)    || \
+                     defined (__AT32UC3A3256__)     || \
+                     defined (__AT32UC3A3256S__)))
+                     
+#define UC3A (UC3A0 || UC3A1 || UC3A3)
+
+// UC3 B Series
+#define UC3B0  ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3B064__)     || \
+                     defined (__AVR32_UC3B0128__)    || \
+                     defined (__AVR32_UC3B0256__)    || \
+                     defined (__AVR32_UC3B0256ES__)  || \
+                     defined (__AVR32_UC3B0512__)    || \
+                     defined (__AVR32_UC3B0512REVC_))) \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3B064__)       || \
+                     defined (__AT32UC3B0128__)      || \
+                     defined (__AT32UC3B0256__)      || \
+                     defined (__AT32UC3B0256ES__)    || \
+                     defined (__AT32UC3B0512__)      || \
+                     defined (__AT32UC3B0512REVC__)))
+
+#define UC3B1  ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3B164__)     || \
+                     defined (__AVR32_UC3B1128__)    || \
+                     defined (__AVR32_UC3B1256__)    || \
+                     defined (__AVR32_UC3B1256ES__)  || \
+                     defined (__AVR32_UC3B1512__)    || \
+                     defined (__AVR32_UC3B1512ES__))) \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3B164__)       || \
+                     defined (__AT32UC3B1128__)      || \
+                     defined (__AT32UC3B1256__)      || \
+                     defined (__AT32UC3B1256ES__)    || \
+                     defined (__AT32UC3B1512__)      || \
+                     defined (__AT32UC3B1512REVC__)))
+
+#define UC3B (UC3B0 || UC3B1 )
+
+// UC3 C Series
+#define UC3C0    ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3C064C__)       || \
+                     defined (__AVR32_UC3C0128C__)      || \
+                     defined (__AVR32_UC3C0256C__)      || \
+                     defined (__AVR32_UC3C0512CREVC__)))  \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3C064C__)         || \
+                     defined (__AT32UC3C0128C__)        || \
+                     defined (__AT32UC3C0256C__)        || \
+                     defined (__AT32UC3C0512C__)))
+                     
+#define UC3C1    ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3C164C__)       || \
+                     defined (__AVR32_UC3C1128C__)      || \
+                     defined (__AVR32_UC3C1256C__)      || \
+                     defined (__AVR32_UC3C1512CREVC__)))  \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3C164C__)         || \
+                     defined (__AT32UC3C1128C__)        || \
+                     defined (__AT32UC3C1256C__)        || \
+                     defined (__AT32UC3C1512C__)))
+                     
+#define UC3C2    ( defined (__GNUC__) && \
+                   ( defined (__AVR32_UC3C264C__)       || \
+                     defined (__AVR32_UC3C2128C__)      || \
+                     defined (__AVR32_UC3C2256C__)      || \
+                     defined (__AVR32_UC3C2512CREVC__)))  \
+            ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                   ( defined (__AT32UC3C264C__)         || \
+                     defined (__AT32UC3C2128C__)        || \
+                     defined (__AT32UC3C2256C__)        || \
+                     defined (__AT32UC3C2512C__)))
+
+#define UC3C (UC3C0 || UC3C1 || UC3C2)
+
+// UC3 L Device series
+#define UC3L0 ( defined (__GNUC__) && \
+                  ( defined (__AVR32_UC3L016__)     || \
+                    defined (__AVR32_UC3L032__)     || \
+                    defined (__AVR32_UC3L064__)     || \
+                    defined (__AVR32_UC3L064REVB__))) \
+           ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                  ( defined (__AT32UC3L016__)     || \
+                    defined (__AT32UC3L032__)     || \
+                    defined (__AT32UC3L064__)     || \
+                    defined (__AT32UC3L064REVB__)))
+                    
+#define UC3L1 ( defined (__GNUC__) && \
+                  ( defined (__AVR32_UC3L116__)     || \
+                    defined (__AVR32_UC3L132__)     || \
+                    defined (__AVR32_UC3L164__))) \
+           ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                  ( defined (__AT32UC3L116__)     || \
+                    defined (__AT32UC3L132__)     || \
+                    defined (__AT32UC3L164__)))
+                    
+#define UC3L2 ( defined (__GNUC__) && \
+                  ( defined (__AVR32_UC3L216__)     || \
+                    defined (__AVR32_UC3L232__)     || \
+                    defined (__AVR32_UC3L264__))) \
+           ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                  ( defined (__AT32UC3L216__)     || \
+                    defined (__AT32UC3L232__)     || \
+                    defined (__AT32UC3L264__)))
+                    
+#define UC3L3 ( defined (__GNUC__) && \
+                  ( defined (__AVR32_UC3L316__)     || \
+                    defined (__AVR32_UC3L332__)     || \
+                    defined (__AVR32_UC3L364__))) \
+             ||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
+                  ( defined (__AT32UC3L316__)     || \
+                    defined (__AT32UC3L332__)     || \
+                    defined (__AT32UC3L364__)))
+
+#define UC3L (UC3L0 || UC3L1 || UC3L2 || UC3L3)
+
+#endif  // _ARCH_H_

bsp/avr32uc3b0/application.c

@@ -1,76 +1,76 @@
-/*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2010, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2010-03-30     Kyle         First version
- */
-
-#include <rtthread.h>
-#include "compiler.h"
-#include "gpio.h"
-
-char thread_led1_stack[1024];
-struct rt_thread thread_led1;
-static void rt_thread_entry_led1(void* parameter)
-{
-    while (1)
-    {
-        /* led on */
-        rt_kprintf("LED1 on\r\n");
-        gpio_tgl_gpio_pin(AVR32_PIN_PA08);
-        rt_thread_delay(RT_TICK_PER_SECOND / 2); /* sleep 0.5 second and switch to other thread */
-
-        /* led off */
-        rt_kprintf("LED1 off\r\n");
-        gpio_tgl_gpio_pin(AVR32_PIN_PA08);
-        rt_thread_delay(RT_TICK_PER_SECOND / 2);
-    }
-}
-
-char thread_led2_stack[1024];
-struct rt_thread thread_led2;
-void rt_thread_entry_led2(void* parameter)
-{
-    while (1)
-    {
-        /* led on */
-        rt_kprintf("LED2 on");
-        gpio_tgl_gpio_pin(AVR32_PIN_PA07);
-        rt_thread_delay(RT_TICK_PER_SECOND);
-
-        /* led off */
-        rt_kprintf("LED2 off\r\n");
-        gpio_tgl_gpio_pin(AVR32_PIN_PA07);
-        rt_thread_delay(RT_TICK_PER_SECOND);
-    }
-}
-
-int rt_application_init()
-{
-    /* create led1 thread */
-    rt_thread_init(&thread_led1,
-				   "led1",
-                   rt_thread_entry_led1,
-                   RT_NULL,
-                   &thread_led1_stack[0],
-                   sizeof(thread_led1_stack), 5, 5);
-    rt_thread_startup(&thread_led1);
-
-    //------- init led2 thread
-    rt_thread_init(&thread_led2,
-                   "led2",
-                   rt_thread_entry_led2,
-                   RT_NULL,
-                   &thread_led2_stack[0],
-                   sizeof(thread_led2_stack),5,10);
-    rt_thread_startup(&thread_led2);
-
-    return 0;
-}
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-03-30     Kyle         First version
+ */
+
+#include <rtthread.h>
+#include "compiler.h"
+#include "gpio.h"
+
+char thread_led1_stack[1024];
+struct rt_thread thread_led1;
+static void rt_thread_entry_led1(void* parameter)
+{
+    while (1)
+    {
+        /* led on */
+        rt_kprintf("LED1 on\r\n");
+        gpio_tgl_gpio_pin(AVR32_PIN_PA08);
+        rt_thread_delay(RT_TICK_PER_SECOND / 2); /* sleep 0.5 second and switch to other thread */
+
+        /* led off */
+        rt_kprintf("LED1 off\r\n");
+        gpio_tgl_gpio_pin(AVR32_PIN_PA08);
+        rt_thread_delay(RT_TICK_PER_SECOND / 2);
+    }
+}
+
+char thread_led2_stack[1024];
+struct rt_thread thread_led2;
+void rt_thread_entry_led2(void* parameter)
+{
+    while (1)
+    {
+        /* led on */
+        rt_kprintf("LED2 on");
+        gpio_tgl_gpio_pin(AVR32_PIN_PA07);
+        rt_thread_delay(RT_TICK_PER_SECOND);
+
+        /* led off */
+        rt_kprintf("LED2 off\r\n");
+        gpio_tgl_gpio_pin(AVR32_PIN_PA07);
+        rt_thread_delay(RT_TICK_PER_SECOND);
+    }
+}
+
+int rt_application_init()
+{
+    /* create led1 thread */
+    rt_thread_init(&thread_led1,
+				   "led1",
+                   rt_thread_entry_led1,
+                   RT_NULL,
+                   &thread_led1_stack[0],
+                   sizeof(thread_led1_stack), 5, 5);
+    rt_thread_startup(&thread_led1);
+
+    //------- init led2 thread
+    rt_thread_init(&thread_led2,
+                   "led2",
+                   rt_thread_entry_led2,
+                   RT_NULL,
+                   &thread_led2_stack[0],
+                   sizeof(thread_led2_stack),5,10);
+    rt_thread_startup(&thread_led2);
+
+    return 0;
+}

bsp/avr32uc3b0/board.c

@@ -1,101 +1,101 @@
-/*
- * File      : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2010, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2010-03-30     Kyle         First version
- */
-
-#include <rtthread.h>
-#include "compiler.h"
-#include "pm.h"
-#include "gpio.h"
-#include "usart.h"
-#include "intc.h"
-#include "serial.h"
-
-#define FOSC0	12000000
-#define FCPU	60000000
-#define FHSB	FCPU
-#define FPBA	FCPU
-#define FPBB	FCPU
-
-extern void rt_hw_serial_isr(void);
-extern void rt_hw_usart_init(void);
-
-/**
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-03-30     Kyle         First version
+ */
+
+#include <rtthread.h>
+#include "compiler.h"
+#include "pm.h"
+#include "gpio.h"
+#include "usart.h"
+#include "intc.h"
+#include "serial.h"
+
+#define FOSC0	12000000
+#define FCPU	60000000
+#define FHSB	FCPU
+#define FPBA	FCPU
+#define FPBB	FCPU
+
+extern void rt_hw_serial_isr(void);
+extern void rt_hw_usart_init(void);
+
+/**
  * System tick interrupt handler.
- */
-static void rt_hw_timer_handler(void)
-{
-	// Clears the interrupt request.
-	Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
-
-	rt_tick_increase();
-}
-
-/**
+ */
+static void rt_hw_timer_handler(void)
+{
+	// Clears the interrupt request.
+	Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
+
+	rt_tick_increase();
+}
+
+/**
  * Initialize system clock and all peripherals.
- */
-static void peripherals_init(void)
-{
-	/*
-	 * PM initialization: OSC0 = 12MHz XTAL, PLL0 = 60MHz System Clock
-	 */
-	pm_freq_param_t pm_freq_param =
-	{
-		.cpu_f = FCPU,
-		.pba_f = FPBA,
-		.osc0_f = FOSC0,
-		.osc0_startup = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC
-	};
-	pm_configure_clocks(&pm_freq_param);
-
-	/*
-	 * USART1 initialization
-	 */
-	gpio_enable_module_pin(AVR32_USART1_TXD_0_1_PIN, AVR32_USART1_TXD_0_1_FUNCTION);
-	gpio_enable_module_pin(AVR32_USART1_RXD_0_1_PIN, AVR32_USART1_RXD_0_1_FUNCTION);
-	static const usart_options_t usartOptions = {
-		.baudrate = 115200,
-		.charlength = 8,
-		.paritytype = USART_NO_PARITY,
-		.stopbits = USART_1_STOPBIT,
-		.channelmode = USART_NORMAL_CHMODE
-	};
-	usart_init_rs232(&AVR32_USART1, &usartOptions, FCPU);
-
-	INTC_init_interrupts();
-	INTC_register_interrupt(&rt_hw_serial_isr, AVR32_USART1_IRQ, AVR32_INTC_INT0);
-	AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
-}
-
-/**
+ */
+static void peripherals_init(void)
+{
+	/*
+	 * PM initialization: OSC0 = 12MHz XTAL, PLL0 = 60MHz System Clock
+	 */
+	pm_freq_param_t pm_freq_param =
+	{
+		.cpu_f = FCPU,
+		.pba_f = FPBA,
+		.osc0_f = FOSC0,
+		.osc0_startup = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC
+	};
+	pm_configure_clocks(&pm_freq_param);
+
+	/*
+	 * USART1 initialization
+	 */
+	gpio_enable_module_pin(AVR32_USART1_TXD_0_1_PIN, AVR32_USART1_TXD_0_1_FUNCTION);
+	gpio_enable_module_pin(AVR32_USART1_RXD_0_1_PIN, AVR32_USART1_RXD_0_1_FUNCTION);
+	static const usart_options_t usartOptions = {
+		.baudrate = 115200,
+		.charlength = 8,
+		.paritytype = USART_NO_PARITY,
+		.stopbits = USART_1_STOPBIT,
+		.channelmode = USART_NORMAL_CHMODE
+	};
+	usart_init_rs232(&AVR32_USART1, &usartOptions, FCPU);
+
+	INTC_init_interrupts();
+	INTC_register_interrupt(&rt_hw_serial_isr, AVR32_USART1_IRQ, AVR32_INTC_INT0);
+	AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
+}
+
+/**
  * Initialize CPU cycle counter for system tick.
- */
-static void cpu_counter_init(void)
-{
-	INTC_register_interrupt(&rt_hw_timer_handler, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT3);
-	Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
-	Set_system_register(AVR32_COUNT, 0);
-}
-
-void rt_hw_board_init(void)
-{
-	extern struct rt_device _rt_usart_device;
-	extern struct avr32_serial_device uart;
-
-	Disable_global_interrupt();
-
-	peripherals_init();
-	cpu_counter_init();
-
-	rt_hw_serial_register(&_rt_usart_device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, &uart);
-	rt_console_set_device("uart1");
-}
+ */
+static void cpu_counter_init(void)
+{
+	INTC_register_interrupt(&rt_hw_timer_handler, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT3);
+	Set_system_register(AVR32_COMPARE, FCPU / RT_TICK_PER_SECOND);
+	Set_system_register(AVR32_COUNT, 0);
+}
+
+void rt_hw_board_init(void)
+{
+	extern struct rt_device _rt_usart_device;
+	extern struct avr32_serial_device uart;
+
+	Disable_global_interrupt();
+
+	peripherals_init();
+	cpu_counter_init();
+
+	rt_hw_serial_register(&_rt_usart_device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, &uart);
+	rt_console_set_device("uart1");
+}

bsp/avr32uc3b0/rtconfig.h

@@ -1,121 +1,121 @@
-/*
- * File      : rtconfig.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2010, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2010-03-30     Kyle         First version
- */
-
-#ifndef RTCONFIG_H_
-#define RTCONFIG_H_
-
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX	8
-
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
-
-/* PRIORITY_MAX*/
-#define RT_THREAD_PRIORITY_MAX	32
-
-/* Tick per Second*/
-#define RT_TICK_PER_SECOND	100
-
-/* SECTION: RT_DEBUG */
-/* Thread Debug*/
-//#define RT_DEBUG
-/* #define RT_THREAD_DEBUG */
-
-#define RT_USING_OVERFLOW_CHECK
-
-/* Using Hook*/
-//#define RT_USING_HOOK
-
-/* SECTION: IPC */
-/* Using Semaphore*/
-#define RT_USING_SEMAPHORE
-
-/* Using Mutex*/
-//#define RT_USING_MUTEX
-
-/* Using Event*/
-//#define RT_USING_EVENT
-
-/* Using MailBox*/
-//#define RT_USING_MAILBOX
-
-/* Using Message Queue*/
-//#define RT_USING_MESSAGEQUEUE
-
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-#define RT_USING_MEMPOOL
-
-/* Using Dynamic Heap Management*/
-#define RT_USING_HEAP
-
-/* Using Small MM*/
-#define RT_USING_SMALL_MEM
-
-/* Using SLAB Allocator*/
-/* #define RT_USING_SLAB */
-
-/* SECTION: Device System */
-/* Using Device System*/
-#define RT_USING_DEVICE
-
-/* SECTION: Console options */
-/* the buffer size of console*/
-#define RT_USING_CONSOLE
-#define RT_CONSOLEBUF_SIZE	128
-
-/* SECTION: FinSH shell options */
-/* Using FinSH as Shell*/
-#define RT_USING_FINSH
-/* Using symbol table */
-#define FINSH_USING_SYMTAB
-#define FINSH_USING_DESCRIPTION
-#define FINSH_DEVICE_NAME   "uart1"
-
-/* SECTION: RT-Thread/GUI */
-//#define RT_USING_DFS
-
-#define RT_USING_DFS_ELMFAT
-#define RT_DFS_ELM_WORD_ACCESS
-#define RT_DFS_ELM_DRIVES			2
-
-/* SECTION: DFS options */
-/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX			2
-/* the max number of opened files 		*/
-#define DFS_FD_MAX					8
-/* the max number of cached sector 		*/
-#define DFS_CACHE_MAX_NUM   		4
-
-/* SECTION: RT-Thread/GUI */
-//#define RT_USING_RTGUI
-
-/* name length of RTGUI object */
-#define RTGUI_NAME_MAX		12
-/* support 16 weight font */
-#define RTGUI_USING_FONT16
-/* support Chinese font */
-#define RTGUI_USING_FONTHZ
-/* use DFS as file interface */
-#define RTGUI_USING_DFS_FILERW
-/* use font file as Chinese font */
-#define RTGUI_USING_HZ_FILE
-/* use small size in RTGUI */
-#define RTGUI_USING_SMALL_SIZE
-/* use mouse cursor */
-/* #define RTGUI_USING_MOUSE_CURSOR */
-/* default font size in RTGUI */
-#define RTGUI_DEFAULT_FONT_SIZE	16
-
-#endif /* RTCONFIG_H_ */
+/*
+ * File      : rtconfig.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-03-30     Kyle         First version
+ */
+
+#ifndef RTCONFIG_H_
+#define RTCONFIG_H_
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX	8
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE	4
+
+/* PRIORITY_MAX*/
+#define RT_THREAD_PRIORITY_MAX	32
+
+/* Tick per Second*/
+#define RT_TICK_PER_SECOND	100
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug*/
+//#define RT_DEBUG
+/* #define RT_THREAD_DEBUG */
+
+#define RT_USING_OVERFLOW_CHECK
+
+/* Using Hook*/
+//#define RT_USING_HOOK
+
+/* SECTION: IPC */
+/* Using Semaphore*/
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex*/
+//#define RT_USING_MUTEX
+
+/* Using Event*/
+//#define RT_USING_EVENT
+
+/* Using MailBox*/
+//#define RT_USING_MAILBOX
+
+/* Using Message Queue*/
+//#define RT_USING_MESSAGEQUEUE
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+#define RT_USING_MEMPOOL
+
+/* Using Dynamic Heap Management*/
+#define RT_USING_HEAP
+
+/* Using Small MM*/
+#define RT_USING_SMALL_MEM
+
+/* Using SLAB Allocator*/
+/* #define RT_USING_SLAB */
+
+/* SECTION: Device System */
+/* Using Device System*/
+#define RT_USING_DEVICE
+
+/* SECTION: Console options */
+/* the buffer size of console*/
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE	128
+
+/* SECTION: FinSH shell options */
+/* Using FinSH as Shell*/
+#define RT_USING_FINSH
+/* Using symbol table */
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_DEVICE_NAME   "uart1"
+
+/* SECTION: RT-Thread/GUI */
+//#define RT_USING_DFS
+
+#define RT_USING_DFS_ELMFAT
+#define RT_DFS_ELM_WORD_ACCESS
+#define RT_DFS_ELM_DRIVES			2
+
+/* SECTION: DFS options */
+/* the max number of mounted filesystem */
+#define DFS_FILESYSTEMS_MAX			2
+/* the max number of opened files 		*/
+#define DFS_FD_MAX					8
+/* the max number of cached sector 		*/
+#define DFS_CACHE_MAX_NUM   		4
+
+/* SECTION: RT-Thread/GUI */
+//#define RT_USING_RTGUI
+
+/* name length of RTGUI object */
+#define RTGUI_NAME_MAX		12
+/* support 16 weight font */
+#define RTGUI_USING_FONT16
+/* support Chinese font */
+#define RTGUI_USING_FONTHZ
+/* use DFS as file interface */
+#define RTGUI_USING_DFS_FILERW
+/* use font file as Chinese font */
+#define RTGUI_USING_HZ_FILE
+/* use small size in RTGUI */
+#define RTGUI_USING_SMALL_SIZE
+/* use mouse cursor */
+/* #define RTGUI_USING_MOUSE_CURSOR */
+/* default font size in RTGUI */
+#define RTGUI_DEFAULT_FONT_SIZE	16
+
+#endif /* RTCONFIG_H_ */

bsp/avr32uc3b0/rtconfig.py

@@ -1,60 +1,60 @@
-import os
-
-# toolchains options
-ARCH     = 'avr32'
-CPU      = 'uc3'
-PART     = 'uc3b0256'
-BOARD    = 'USERBOARD'
-
-CROSS_TOOL 	= 'gcc'
-
-if os.getenv('RTT_CC'):
-	CROSS_TOOL = os.getenv('RTT_CC')
-
-if  CROSS_TOOL == 'gcc':
-	PLATFORM 	= 'gcc'
-	EXEC_PATH 	= 'C:/Program Files/Atmel/AVR Tools/AVR Toolchain/bin'
-elif CROSS_TOOL == 'keil':
-    print '================ERROR============================'
-    print 'Not support keil yet!'
-    print '================================================='
-    exit(0)
-elif CROSS_TOOL == 'iar':
-    print '================ERROR============================'
-    print 'Not support iar yet!'
-    print '================================================='
-    exit(0)
-
-if os.getenv('RTT_EXEC_PATH'):
-	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
-
-#BUILD = 'debug'
-BUILD = 'release'
-
-if PLATFORM == 'gcc':
-    # toolchains
-    PREFIX = 'avr32-'
-    CC = PREFIX + 'gcc'
-    AS = PREFIX + 'gcc'
-    AR = PREFIX + 'ar'
-    LINK = PREFIX + 'gcc'
-    TARGET_EXT = 'elf'
-    SIZE = PREFIX + 'size'
-    OBJDUMP = PREFIX + 'objdump'
-    OBJCPY = PREFIX + 'objcopy'
-
-    DEVICE = ' -mpart=' + PART
-    CFLAGS = DEVICE + ' -DBOARD=' + BOARD + ' -fmessage-length=0 -ffunction-sections -masm-addr-pseudos'
-    AFLAGS = ' -c -x assembler-with-cpp' + DEVICE
-    LFLAGS = DEVICE + ' -Wl,--gc-sections --rodata-writable -Wl,--direct-data -LSOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS -T avr32elf_uc3b0256.lds'
-
-    CPATH = ''
-    LPATH = ''
-
-    if BUILD == 'debug':
-        CFLAGS += ' -O0 -g3 -Wall'
-        AFLAGS += ' -g3'
-    else:
-        CFLAGS += ' -O2 -Wall'
-
-    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+import os
+
+# toolchains options
+ARCH     = 'avr32'
+CPU      = 'uc3'
+PART     = 'uc3b0256'
+BOARD    = 'USERBOARD'
+
+CROSS_TOOL 	= 'gcc'
+
+if os.getenv('RTT_CC'):
+	CROSS_TOOL = os.getenv('RTT_CC')
+
+if  CROSS_TOOL == 'gcc':
+	PLATFORM 	= 'gcc'
+	EXEC_PATH 	= 'C:/Program Files/Atmel/AVR Tools/AVR Toolchain/bin'
+elif CROSS_TOOL == 'keil':
+    print '================ERROR============================'
+    print 'Not support keil yet!'
+    print '================================================='
+    exit(0)
+elif CROSS_TOOL == 'iar':
+    print '================ERROR============================'
+    print 'Not support iar yet!'
+    print '================================================='
+    exit(0)
+
+if os.getenv('RTT_EXEC_PATH'):
+	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+#BUILD = 'debug'
+BUILD = 'release'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'avr32-'
+    CC = PREFIX + 'gcc'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mpart=' + PART
+    CFLAGS = DEVICE + ' -DBOARD=' + BOARD + ' -fmessage-length=0 -ffunction-sections -masm-addr-pseudos'
+    AFLAGS = ' -c -x assembler-with-cpp' + DEVICE
+    LFLAGS = DEVICE + ' -Wl,--gc-sections --rodata-writable -Wl,--direct-data -LSOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS -T avr32elf_uc3b0256.lds'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -g3 -Wall'
+        AFLAGS += ' -g3'
+    else:
+        CFLAGS += ' -O2 -Wall'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

bsp/avr32uc3b0/startup.c

@@ -1,55 +1,55 @@
-/*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2010, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2010-03-30     Kyle         First version
- */
-
-#include <rtthread.h>
-
-extern void rt_hw_board_init(void);
-extern void rt_application_init(void);
-
-#ifdef RT_USING_FINSH
-extern void finsh_system_init(void);
-extern void finsh_set_device(const char* device);
-#endif
-
-int main(void)
-{
-#ifdef RT_USING_HEAP
-	extern void __heap_start__;
-	extern void __heap_end__;
-#endif
-
-	rt_hw_board_init();
-	rt_system_tick_init();
-	rt_system_object_init();
-	rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-	rt_system_heap_init(&__heap_start__, &__heap_end__);
-#endif
-
-	rt_system_scheduler_init();
-	rt_device_init_all();
-	rt_application_init();
-
-#ifdef RT_USING_FINSH
-    /* init finsh */
-    finsh_system_init();
-    finsh_set_device(FINSH_DEVICE_NAME);
-#endif
-
-    rt_thread_idle_init();
-	rt_system_scheduler_start();
-
-	return 0;
-}
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-03-30     Kyle         First version
+ */
+
+#include <rtthread.h>
+
+extern void rt_hw_board_init(void);
+extern void rt_application_init(void);
+
+#ifdef RT_USING_FINSH
+extern void finsh_system_init(void);
+extern void finsh_set_device(const char* device);
+#endif
+
+int main(void)
+{
+#ifdef RT_USING_HEAP
+	extern void __heap_start__;
+	extern void __heap_end__;
+#endif
+
+	rt_hw_board_init();
+	rt_system_tick_init();
+	rt_system_object_init();
+	rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+	rt_system_heap_init(&__heap_start__, &__heap_end__);
+#endif
+
+	rt_system_scheduler_init();
+	rt_device_init_all();
+	rt_application_init();
+
+#ifdef RT_USING_FINSH
+    /* init finsh */
+    finsh_system_init();
+    finsh_set_device(FINSH_DEVICE_NAME);
+#endif
+
+    rt_thread_idle_init();
+	rt_system_scheduler_start();
+
+	return 0;
+}

bsp/bf533/application.c

@@ -1,41 +1,41 @@
-/*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date         Author      Notes
- * 2012-02-13   mojingxian  first version
- */
-
-#include "application.h"
-#include "board.h"
-#include "rtthread.h"
-
-void app_init_entry(void *parg)
-{
-    parg = parg;
-
-    rt_hw_core_timer_init();//start system tick in first thread.
-
-    rt_hw_isr_install();
-}
-
-
-void rt_application_init(void)
-{
-    rt_thread_t led_thread;
-
-#ifdef RT_USING_HEAP
-    led_thread = rt_thread_create("init", app_init_entry, RT_NULL, 512, 200, 20);
-#endif
-
-    if (led_thread != RT_NULL)
-    {
-        rt_thread_startup(led_thread);
-    }
-}
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date         Author      Notes
+ * 2012-02-13   mojingxian  first version
+ */
+
+#include "application.h"
+#include "board.h"
+#include "rtthread.h"
+
+void app_init_entry(void *parg)
+{
+    parg = parg;
+
+    rt_hw_core_timer_init();//start system tick in first thread.
+
+    rt_hw_isr_install();
+}
+
+
+void rt_application_init(void)
+{
+    rt_thread_t led_thread;
+
+#ifdef RT_USING_HEAP
+    led_thread = rt_thread_create("init", app_init_entry, RT_NULL, 512, 200, 20);
+#endif
+
+    if (led_thread != RT_NULL)
+    {
+        rt_thread_startup(led_thread);
+    }
+}

bsp/bf533/application.h

@@ -1,28 +1,28 @@
-/*
- * File      : application.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date         Author      Notes
- * 2012-02-13   mojingxian  first version
- */
-
-#ifndef __APPLICATION_H__
-#define __APPLICATION_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void rt_application_init(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __APPLICATION_H__ */
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date         Author      Notes
+ * 2012-02-13   mojingxian  first version
+ */
+
+#ifndef __APPLICATION_H__
+#define __APPLICATION_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void rt_application_init(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __APPLICATION_H__ */

bsp/bf533/board.c

@@ -1,257 +1,257 @@
-/*
- * File      : board.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date         Author      Notes
- * 2012-02-13   mojingxian  first version
- */
-
-#include "board.h"
-#include "rtconfig.h"
-#include "rtdef.h"
-#include "rthw.h"
-#include "serial.h"
-
-#include <signal.h>
-#include <sys/platform.h>
-#include <ccblkfn.h>
-#include <sysreg.h>
-#include <string.h>
-#include <sys\exception.h>
-#include <stdio.h>
-
-#define IVG_CLR(index)     (index > 0 ? ((0xFFFFFFF0 << (index * 0x04)) | \
-                           (0xFFFFFFF0 >> ((0x08 - index) * 0x04))):0xFFFFFFF0)
-#define IVG_SET(index,ivg) ((((ivg) - 0x07) & 0x0F) << (index * 0x04))
-
-#define UART0   ((struct uartport *)pUART_THR)
-struct serial_int_rx uart0_int_rx;
-struct serial_device uart0 =
-{
-    UART0,
-    &uart0_int_rx,
-    RT_NULL
-};
-struct rt_device uart0_device;
-
-/**
- * This function is to set the EBIU(EXTERNAL BUS INTERFACE UNIT).
- */
-static void rt_hw_ebiu_init(void)
-{
-    *pEBIU_AMBCTL0  = 0xffc2ffc2;
-
-    *pEBIU_AMBCTL1  = 0xffc2ffc3;
-
-    *pEBIU_AMGCTL   = 0x010f;
-}
-
-/**
- * This is the timer interrupt service routine.
- */
-EX_INTERRUPT_HANDLER(rt_hw_timer_handler)
-{
-    /* enter interrupt */
-    rt_interrupt_enter();
-
-    rt_tick_increase();
-
-    /* leave interrupt */
-    rt_interrupt_leave();
-}
-
-/**
- * This function is called to initialize system tick source (typically a
- * timer generating interrupts every 1 to 100 mS).
- * We decided to use Core Timer as the tick interrupt source.
- */
-void rt_hw_core_timer_init(void)
-{
-    *pTCNTL   = 1;     // Turn on timer, TMPWR
-    *pTSCALE  = 0x00;
-    *pTCOUNT  = CCLKSPEED / RT_TICK_PER_SECOND;
-    *pTPERIOD = CCLKSPEED / RT_TICK_PER_SECOND;
-    register_handler(ik_timer,rt_hw_timer_handler);
-    *pTCNTL    = 0x07; // Start Timer and set Auto-reload
-}
-
-void rt_hw_interrupt_init(void)
-{
-    extern rt_uint32_t rt_interrupt_from_thread;
-    extern rt_uint32_t rt_interrupt_to_thread;
-    extern rt_uint32_t rt_thread_switch_interrupt_flag;
-    extern rt_uint8_t  rt_interrupt_nest;
-    extern void interrupt_thread_switch(void);
-
-    register_handler(ik_ivg14,interrupt_thread_switch); //context_vdsp.S
-
-    /* init interrupt nest, and context in thread sp */
-    rt_interrupt_nest               = 0;
-    rt_interrupt_from_thread        = 0;
-    rt_interrupt_to_thread          = 0;
-    rt_thread_switch_interrupt_flag = 0;
-}
-
-static void rt_hw_pll_init(void)
-{
-    unsigned long imask;
-
-    sysreg_write(reg_SYSCFG, 0x32);
-
-    *pSIC_IWR = 0x01;
-
-    *pPLL_CTL = SET_MSEL(SPEED_MULTIPLE);
-
-    // PLL Re-programming Sequence.
-    // Core is idle'ed to allow the PPL to re-lock.
-    imask = cli();
-    idle();
-    sti(imask);
-    *pVR_CTL = 0x00FB;
-
-    // PLL Re-programming Sequence.
-    // Core is idle'ed to allow the PPL to re-lock.
-    imask = cli();
-    idle();
-    sti(imask);
-
-    *pPLL_DIV = BUS_DIVISOR;
-}
-
-/**
- * This function is called to initialize external sdram.
- */
-static void rt_hw_exdram_init(void)
-{
-    // Initalize EBIU control registers to enable all banks
-    *pEBIU_AMBCTL1 = 0xFFFFFF02;
-    ssync();
-
-    *pEBIU_AMGCTL = 0x00FF;
-    ssync();
-
-    // Check if already enabled
-    if (SDRS != ((*pEBIU_SDSTAT) & SDRS))
-    {
-        return;
-    }
-
-    //SDRAM Refresh Rate Control Register
-    *pEBIU_SDRRC = 0x01A0;
-
-    //SDRAM Memory Bank Control Register
-    *pEBIU_SDBCTL = 0x0025; //1.7   64 MB
-
-    //SDRAM Memory Global Control Register
-    *pEBIU_SDGCTL = 0x0091998D;//0x998D0491
-
-    ssync();
-}
-
-short uart_set_bitrate(unsigned long bit_rate)
-{
-    unsigned short int divisor;
-
-    switch (bit_rate)
-    {
-        case 1200:
-        case 2400:
-        case 4800:
-        case 9600:
-        case 19200:
-        case 28800:
-        case 38400:
-        case 57600:
-        case 115200:
-        case 125000:
-            divisor = (unsigned short int) ((float) SCLKSPEED / ((float) bit_rate * 16.0f) + 0.5f);
-
-            *(pUART_LCR) |= DLAB;            // Enable access to DLL and DLH registers
-            *(pUART_DLL) = divisor & 0xFF;
-            *(pUART_DLH) = divisor >> 8;
-            *(pUART_LCR) &= ~DLAB;           // clear DLAB bit
-
-            break;
-
-        default: // baud rate not supported
-            break;
-    }
-
-    return 0;
-}
-
-void rt_hw_uart_init(void)
-{
-    // Apply UART configuration 8 bit data, No parity, 1 stop bit
-    *pUART_LCR = 0x0000; // Reset value
-    *pUART_LCR = WLS(8);
-
-     // Ensure that Loopback mode is disabled by clearing LOOP_ENA bit
-    *pUART_MCR = 0x0000; //Reset value
-
-    uart_set_bitrate(19200);// Set communication baudrate 115200
-
-    *pUART_IER = ERBFI;
-
-    // Enable UART clock
-    *pUART_GCTL = UCEN;
-}
-
-int uart_put_char(const char c)
-{
-    while (!(*pUART_LSR & THRE))
-    {
-        /* wait */
-    }
-
-    *pUART_THR = c;
-
-    return c;
-}
-
-void rt_hw_console_output(const char *str)
-{
-    while (*str != '\0')
-    {
-        if (*str == '\n')
-            uart_put_char('\r');
-        uart_put_char(*str++);
-    }
-}
-
-EX_INTERRUPT_HANDLER(uart_rx_isr)
-{
-    rt_interrupt_enter();
-
-    rt_hw_serial_isr(&uart0_device);
-
-    rt_interrupt_leave();
-}
-
-void rt_hw_isr_install(void)
-{
-    *pSIC_IWR   = 0xFFFFFFFF;
-    *pSIC_IMASK = 0x00000000;
-
-    *pSIC_IAR1 &= IVG_CLR(IAR1_DMA6_UARTRX_IVG);
-    *pSIC_IAR1 |= IVG_SET(IAR1_DMA6_UARTRX_IVG,ik_ivg9);
-    register_handler(ik_ivg9,uart_rx_isr);
-    *pSIC_IMASK |= DMA6_UART_RX_INT_MASK;/*  ¿ªÖÐ¶Ï      */
-}
-
-void rt_hw_board_init(void)
-{
-    rt_hw_pll_init();
-
-    rt_hw_ebiu_init();
-
-    rt_hw_exdram_init();
-
-    rt_hw_uart_init();
-}
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date         Author      Notes
+ * 2012-02-13   mojingxian  first version
+ */
+
+#include "board.h"
+#include "rtconfig.h"
+#include "rtdef.h"
+#include "rthw.h"
+#include "serial.h"
+
+#include <signal.h>
+#include <sys/platform.h>
+#include <ccblkfn.h>
+#include <sysreg.h>
+#include <string.h>
+#include <sys\exception.h>
+#include <stdio.h>
+
+#define IVG_CLR(index)     (index > 0 ? ((0xFFFFFFF0 << (index * 0x04)) | \
+                           (0xFFFFFFF0 >> ((0x08 - index) * 0x04))):0xFFFFFFF0)
+#define IVG_SET(index,ivg) ((((ivg) - 0x07) & 0x0F) << (index * 0x04))
+
+#define UART0   ((struct uartport *)pUART_THR)
+struct serial_int_rx uart0_int_rx;
+struct serial_device uart0 =
+{
+    UART0,
+    &uart0_int_rx,
+    RT_NULL
+};
+struct rt_device uart0_device;
+
+/**
+ * This function is to set the EBIU(EXTERNAL BUS INTERFACE UNIT).
+ */
+static void rt_hw_ebiu_init(void)
+{
+    *pEBIU_AMBCTL0  = 0xffc2ffc2;
+
+    *pEBIU_AMBCTL1  = 0xffc2ffc3;
+
+    *pEBIU_AMGCTL   = 0x010f;
+}
+
+/**
+ * This is the timer interrupt service routine.
+ */
+EX_INTERRUPT_HANDLER(rt_hw_timer_handler)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+/**
+ * This function is called to initialize system tick source (typically a
+ * timer generating interrupts every 1 to 100 mS).
+ * We decided to use Core Timer as the tick interrupt source.
+ */
+void rt_hw_core_timer_init(void)
+{
+    *pTCNTL   = 1;     // Turn on timer, TMPWR
+    *pTSCALE  = 0x00;
+    *pTCOUNT  = CCLKSPEED / RT_TICK_PER_SECOND;
+    *pTPERIOD = CCLKSPEED / RT_TICK_PER_SECOND;
+    register_handler(ik_timer,rt_hw_timer_handler);
+    *pTCNTL    = 0x07; // Start Timer and set Auto-reload
+}
+
+void rt_hw_interrupt_init(void)
+{
+    extern rt_uint32_t rt_interrupt_from_thread;
+    extern rt_uint32_t rt_interrupt_to_thread;
+    extern rt_uint32_t rt_thread_switch_interrupt_flag;
+    extern rt_uint8_t  rt_interrupt_nest;
+    extern void interrupt_thread_switch(void);
+
+    register_handler(ik_ivg14,interrupt_thread_switch); //context_vdsp.S
+
+    /* init interrupt nest, and context in thread sp */
+    rt_interrupt_nest               = 0;
+    rt_interrupt_from_thread        = 0;
+    rt_interrupt_to_thread          = 0;
+    rt_thread_switch_interrupt_flag = 0;
+}
+
+static void rt_hw_pll_init(void)
+{
+    unsigned long imask;
+
+    sysreg_write(reg_SYSCFG, 0x32);
+
+    *pSIC_IWR = 0x01;
+
+    *pPLL_CTL = SET_MSEL(SPEED_MULTIPLE);
+
+    // PLL Re-programming Sequence.
+    // Core is idle'ed to allow the PPL to re-lock.
+    imask = cli();
+    idle();
+    sti(imask);
+    *pVR_CTL = 0x00FB;
+
+    // PLL Re-programming Sequence.
+    // Core is idle'ed to allow the PPL to re-lock.
+    imask = cli();
+    idle();
+    sti(imask);
+
+    *pPLL_DIV = BUS_DIVISOR;
+}
+
+/**
+ * This function is called to initialize external sdram.
+ */
+static void rt_hw_exdram_init(void)
+{
+    // Initalize EBIU control registers to enable all banks
+    *pEBIU_AMBCTL1 = 0xFFFFFF02;
+    ssync();
+
+    *pEBIU_AMGCTL = 0x00FF;
+    ssync();
+
+    // Check if already enabled
+    if (SDRS != ((*pEBIU_SDSTAT) & SDRS))
+    {
+        return;
+    }
+
+    //SDRAM Refresh Rate Control Register
+    *pEBIU_SDRRC = 0x01A0;
+
+    //SDRAM Memory Bank Control Register
+    *pEBIU_SDBCTL = 0x0025; //1.7   64 MB
+
+    //SDRAM Memory Global Control Register
+    *pEBIU_SDGCTL = 0x0091998D;//0x998D0491
+
+    ssync();
+}
+
+short uart_set_bitrate(unsigned long bit_rate)
+{
+    unsigned short int divisor;
+
+    switch (bit_rate)
+    {
+        case 1200:
+        case 2400:
+        case 4800:
+        case 9600:
+        case 19200:
+        case 28800:
+        case 38400:
+        case 57600:
+        case 115200:
+        case 125000:
+            divisor = (unsigned short int) ((float) SCLKSPEED / ((float) bit_rate * 16.0f) + 0.5f);
+
+            *(pUART_LCR) |= DLAB;            // Enable access to DLL and DLH registers
+            *(pUART_DLL) = divisor & 0xFF;
+            *(pUART_DLH) = divisor >> 8;
+            *(pUART_LCR) &= ~DLAB;           // clear DLAB bit
+
+            break;
+
+        default: // baud rate not supported
+            break;
+    }
+
+    return 0;
+}
+
+void rt_hw_uart_init(void)
+{
+    // Apply UART configuration 8 bit data, No parity, 1 stop bit
+    *pUART_LCR = 0x0000; // Reset value
+    *pUART_LCR = WLS(8);
+
+     // Ensure that Loopback mode is disabled by clearing LOOP_ENA bit
+    *pUART_MCR = 0x0000; //Reset value
+
+    uart_set_bitrate(19200);// Set communication baudrate 115200
+
+    *pUART_IER = ERBFI;
+
+    // Enable UART clock
+    *pUART_GCTL = UCEN;
+}
+
+int uart_put_char(const char c)
+{
+    while (!(*pUART_LSR & THRE))
+    {
+        /* wait */
+    }
+
+    *pUART_THR = c;
+
+    return c;
+}
+
+void rt_hw_console_output(const char *str)
+{
+    while (*str != '\0')
+    {
+        if (*str == '\n')
+            uart_put_char('\r');
+        uart_put_char(*str++);
+    }
+}
+
+EX_INTERRUPT_HANDLER(uart_rx_isr)
+{
+    rt_interrupt_enter();
+
+    rt_hw_serial_isr(&uart0_device);
+
+    rt_interrupt_leave();
+}
+
+void rt_hw_isr_install(void)
+{
+    *pSIC_IWR   = 0xFFFFFFFF;
+    *pSIC_IMASK = 0x00000000;
+
+    *pSIC_IAR1 &= IVG_CLR(IAR1_DMA6_UARTRX_IVG);
+    *pSIC_IAR1 |= IVG_SET(IAR1_DMA6_UARTRX_IVG,ik_ivg9);
+    register_handler(ik_ivg9,uart_rx_isr);
+    *pSIC_IMASK |= DMA6_UART_RX_INT_MASK;/*  ¿ªÖÐ¶Ï      */
+}
+
+void rt_hw_board_init(void)
+{
+    rt_hw_pll_init();
+
+    rt_hw_ebiu_init();
+
+    rt_hw_exdram_init();
+
+    rt_hw_uart_init();
+}

bsp/bf533/board.h

@@ -1,94 +1,94 @@
-/*
- * File      : board.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date         Author      Notes
- * 2012-02-13   mojingxian  first version
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-#define CLKIN           33333000LL
-#define SPEED_MULTIPLE  16
-#define BUS_DIVISOR     4
-#define CCLKSPEED       (CLKIN * SPEED_MULTIPLE)
-#define SCLKSPEED       (CLKIN * BUS_DIVISOR)
-#define CLOCKS_PER_SECD CCLKSPEED
-#define SCLOCKS_PER_SEC SCLKSPEED
-
-//SIC_IMASK¼Ä´æÆ÷
-#define PLL_WAKEUP_INT_MASK     0x00000001
-#define DMA_ERROR_INT_MASK      0x00000002
-#define PPI_ERROR_INT_MASK      0x00000004
-#define SPORT0_ERROR_INT_MASK   0x00000008
-#define SPORT1_ERROR_INT_MASK   0x00000010
-#define SPI_ERROR_INT_MASK      0x00000020
-#define UART_ERROR_INT_MASK     0x00000040
-#define RTC_INT_MASK            0x00000080
-#define DMA0_PPI_INT_MASK       0x00000100
-#define DMA1_SPORT0_RX_INT_MASK 0x00000200
-#define DMA2_SPORT0_TX_INT_MASK 0x00000400
-#define DMA3_SPORT1_RX_INT_MASK 0x00000800
-#define DMA4_SPORT1_TX_INT_MASK 0x00001000
-#define DMA5_SPI_INT_MASK       0x00002000
-#define DMA6_UART_RX_INT_MASK   0x00004000
-#define DMA7_UART_TX_INT_MASK   0x00008000
-#define TIMER0_INT_MASK         0x00010000
-#define TIMER1_INT_MASK         0x00020000
-#define TIMER2_INT_MASK         0x00040000
-#define PF_INTA_MASK            0x00080000
-#define PF_INTB_MASK            0x00100000
-#define MEM_DMA_STREAM0_MASK    0x00200000
-#define MEM_DMA_STREAM1_MASK    0x00400000
-#define SOFT_WATCHDOG_TMER_MASK 0x00800000
-
-//SIC_IAR0
-#define IAR0_PLL_WAKEUP_INT_IVG      0x00
-#define IAR0_DMA_ERROR_INT_IVG       0x01
-#define IAR0_PPI_ERROR_INT_IVG       0x02
-#define IAR0_SPORT0_ERROR_INT_IVG    0x03
-#define IAR0_SPORT1_ERROR_INT_IVG    0x04
-#define IAR0_SPI_ERROR_INT_IVG       0x05
-#define IAR0_UART_ERROR_INT_IVG      0x06
-#define IAR0_RTC_INT_IVG             0x07
-
-//SIC_IAR1
-#define IAR1_DMA0_PPI_INT_IVG        0x00
-#define IAR1_DMA1_SPORT0RX_IVG       0x01
-#define IAR1_DMA2_SPORT0TX_IVG       0x02
-#define IAR1_DMA3_SPORT1RX_IVG       0x03
-#define IAR1_DMA4_SPORT1TX_IVG       0x04
-#define IAR1_DMA5_SPI_INT_IVG        0x05
-#define IAR1_DMA6_UARTRX_IVG         0x06
-#define IAR1_DMA7_UARTTX_IVG         0x07
-
-//SIC_IAR2
-#define IAR2_TIMER0_INT_IVG          0x00
-#define IAR2_TIMER1_INT_IVG          0x01
-#define IAR2_TIMER2_INT_IVG          0x02
-#define IAR2_PF_A_INT_IVG            0x03
-#define IAR2_PF_B_INT_IVG            0x04
-#define IAR2_MEM_DMA_STREAM0_INT_IVG 0x05
-#define IAR2_MEM_DMA_STREAM1_INT_IVG 0x06
-#define IAR2_SWATCHDOG_TIMER_INT_IVG 0x07
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void rt_hw_core_timer_init(void);
-void rt_hw_board_init(void);
-void rt_hw_isr_install(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _BSP_H_ */
+/*
+ * File      : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date         Author      Notes
+ * 2012-02-13   mojingxian  first version
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#define CLKIN           33333000LL
+#define SPEED_MULTIPLE  16
+#define BUS_DIVISOR     4
+#define CCLKSPEED       (CLKIN * SPEED_MULTIPLE)
+#define SCLKSPEED       (CLKIN * BUS_DIVISOR)
+#define CLOCKS_PER_SECD CCLKSPEED
+#define SCLOCKS_PER_SEC SCLKSPEED
+
+//SIC_IMASK¼Ä´æÆ÷
+#define PLL_WAKEUP_INT_MASK     0x00000001
+#define DMA_ERROR_INT_MASK      0x00000002
+#define PPI_ERROR_INT_MASK      0x00000004
+#define SPORT0_ERROR_INT_MASK   0x00000008
+#define SPORT1_ERROR_INT_MASK   0x00000010
+#define SPI_ERROR_INT_MASK      0x00000020
+#define UART_ERROR_INT_MASK     0x00000040
+#define RTC_INT_MASK            0x00000080
+#define DMA0_PPI_INT_MASK       0x00000100
+#define DMA1_SPORT0_RX_INT_MASK 0x00000200
+#define DMA2_SPORT0_TX_INT_MASK 0x00000400
+#define DMA3_SPORT1_RX_INT_MASK 0x00000800
+#define DMA4_SPORT1_TX_INT_MASK 0x00001000
+#define DMA5_SPI_INT_MASK       0x00002000
+#define DMA6_UART_RX_INT_MASK   0x00004000
+#define DMA7_UART_TX_INT_MASK   0x00008000
+#define TIMER0_INT_MASK         0x00010000
+#define TIMER1_INT_MASK         0x00020000
+#define TIMER2_INT_MASK         0x00040000
+#define PF_INTA_MASK            0x00080000
+#define PF_INTB_MASK            0x00100000
+#define MEM_DMA_STREAM0_MASK    0x00200000
+#define MEM_DMA_STREAM1_MASK    0x00400000
+#define SOFT_WATCHDOG_TMER_MASK 0x00800000
+
+//SIC_IAR0
+#define IAR0_PLL_WAKEUP_INT_IVG      0x00
+#define IAR0_DMA_ERROR_INT_IVG       0x01
+#define IAR0_PPI_ERROR_INT_IVG       0x02
+#define IAR0_SPORT0_ERROR_INT_IVG    0x03
+#define IAR0_SPORT1_ERROR_INT_IVG    0x04
+#define IAR0_SPI_ERROR_INT_IVG       0x05
+#define IAR0_UART_ERROR_INT_IVG      0x06
+#define IAR0_RTC_INT_IVG             0x07
+
+//SIC_IAR1
+#define IAR1_DMA0_PPI_INT_IVG        0x00
+#define IAR1_DMA1_SPORT0RX_IVG       0x01
+#define IAR1_DMA2_SPORT0TX_IVG       0x02
+#define IAR1_DMA3_SPORT1RX_IVG       0x03
+#define IAR1_DMA4_SPORT1TX_IVG       0x04
+#define IAR1_DMA5_SPI_INT_IVG        0x05
+#define IAR1_DMA6_UARTRX_IVG         0x06
+#define IAR1_DMA7_UARTTX_IVG         0x07
+
+//SIC_IAR2
+#define IAR2_TIMER0_INT_IVG          0x00
+#define IAR2_TIMER1_INT_IVG          0x01
+#define IAR2_TIMER2_INT_IVG          0x02
+#define IAR2_PF_A_INT_IVG            0x03
+#define IAR2_PF_B_INT_IVG            0x04
+#define IAR2_MEM_DMA_STREAM0_INT_IVG 0x05
+#define IAR2_MEM_DMA_STREAM1_INT_IVG 0x06
+#define IAR2_SWATCHDOG_TIMER_INT_IVG 0x07
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void rt_hw_core_timer_init(void);
+void rt_hw_board_init(void);
+void rt_hw_isr_install(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BSP_H_ */

bsp/bf533/rtconfig.h

@@ -1,243 +1,243 @@
-/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
-
-//add by mojingxian.defualt idle stack is too small.
-#define IDLE_THREAD_STACK_SIZE 512
-
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX	32
-
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
-
-/* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX	256
-
-/* Tick per Second */
-#define RT_TICK_PER_SECOND	1000
-
-/* SECTION: RT_DEBUG */
-/* Thread Debug */
-/* #define RT_DEBUG */
-/* #define RT_THREAD_DEBUG */
-
-#define RT_USING_OVERFLOW_CHECK
-
-/* Using Hook */
-#define RT_USING_HOOK
-
-/* Using Software Timer */
-//#define RT_USING_TIMER_SOFT
-#define RT_TIMER_THREAD_PRIO		8
-#define RT_TIMER_THREAD_STACK_SIZE	512
-#define RT_TIMER_TICK_PER_SECOND	1000
-
-/* SECTION: IPC */
-/* Using Semaphore */
-#define RT_USING_SEMAPHORE
-
-/* Using Mutex */
-#define RT_USING_MUTEX
-
-/* Using Event */
-#define RT_USING_EVENT
-
-/* Using MailBox */
-#define RT_USING_MAILBOX
-
-/* Using Message Queue */
-#define RT_USING_MESSAGEQUEUE
-
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-#define RT_USING_MEMPOOL
-
-/* Using Dynamic Heap Management */
-#define RT_USING_HEAP
-
-/* Using Small MM */
-#define RT_USING_SMALL_MEM
-
-/* Using SLAB Allocator */
-//#define RT_USING_SLAB
-
-/* SECTION: Device System */
-/* Using Device System */
-#define RT_USING_DEVICE
-
-/* Using Module System */
-//#define RT_USING_MODULE
-#define RT_USING_LIBDL
-
-/* SECTION: Console options */
-#define RT_USING_CONSOLE
-
-/* the buffer size of console */
-#define RT_CONSOLEBUF_SIZE	128
-
-/* SECTION: finsh, a C-Express shell */
-/* Using FinSH as Shell*/
-#define RT_USING_FINSH
-/* Using symbol table */
-#define FINSH_USING_SYMTAB
-#define FINSH_USING_DESCRIPTION
-#define FINSH_THREAD_STACK_SIZE 1024
-
-/* SECTION: a runtime libc library */
-/* a runtime libc library */
-//#define RT_USING_NEWLIB
-//#define RT_USING_PTHREADS
-
-/* SECTION: C++ support */
-/* Using C++ support */
-/* #define RT_USING_CPLUSPLUS */
-
-/* SECTION: Device filesystem support */
-/* using DFS support */
-//#define RT_USING_DFS
-#define RT_USING_DFS_ELMFAT
-/* use long file name feature 			*/
-#define RT_DFS_ELM_USE_LFN			1
-/* the max number of file length 		*/
-#define RT_DFS_ELM_MAX_LFN		128
-/* #define RT_USING_DFS_YAFFS2 */
-/* #define RT_USING_DFS_UFFS */
-#define RT_USING_DFS_DEVFS
-
-/* #define RT_USING_DFS_NFS */
-#define RT_NFS_HOST_EXPORT		"192.168.1.5:/"
-
-#define DFS_USING_WORKDIR
-
-/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX		4
-/* the max number of opened files 		*/
-#define DFS_FD_MAX					16
-/* the max number of cached sector 		*/
-#define DFS_CACHE_MAX_NUM   		4
-
-/* Enable freemodbus protocal stack*/
-/* #define RT_USING_MODBUS */
-
-/* SECTION: lwip, a lighwight TCP/IP protocol stack */
-/* Using lighweight TCP/IP protocol stack */
-/* #define RT_USING_LWIP */
-//#define RT_LWIP_DNS
-
-/* Trace LwIP protocol */
-/* #define RT_LWIP_DEBUG */
-
-/* Enable ICMP protocol */
-#define RT_LWIP_ICMP
-
-/* Enable IGMP protocol */
-#define RT_LWIP_IGMP
-
-/* Enable UDP protocol */
-#define RT_LWIP_UDP
-
-/* Enable TCP protocol */
-#define RT_LWIP_TCP
-
-/* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM	5
-
-/* TCP sender buffer space */
-#define RT_LWIP_TCP_SND_BUF	1024*8
-
-/* TCP receive window. */
-#define RT_LWIP_TCP_WND	1024*8
-
-/* Enable SNMP protocol */
-/* #define RT_LWIP_SNMP */
-
-/* Using DHCP */
-/* #define RT_LWIP_DHCP */
-
-/* ip address of target */
-#define RT_LWIP_IPADDR0	192
-#define RT_LWIP_IPADDR1	168
-#define RT_LWIP_IPADDR2	1
-#define RT_LWIP_IPADDR3	30
-
-/* gateway address of target */
-#define RT_LWIP_GWADDR0	192
-#define RT_LWIP_GWADDR1	168
-#define RT_LWIP_GWADDR2	1
-#define RT_LWIP_GWADDR3	1
-
-/* mask address of target */
-#define RT_LWIP_MSKADDR0	255
-#define RT_LWIP_MSKADDR1	255
-#define RT_LWIP_MSKADDR2	255
-#define RT_LWIP_MSKADDR3	0
-
-/* the number of blocks for pbuf */
-#define RT_LWIP_PBUF_NUM	16
-
-/* the number of simultaneously queued TCP */
-#define RT_LWIP_TCP_SEG_NUM    40
-
-/* thread priority of tcpip thread */
-#define RT_LWIP_TCPTHREAD_PRIORITY	128
-
-/* mail box size of tcpip thread to wait for */
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE	32
-
-/* thread stack size of tcpip thread */
-#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
-
-/* thread priority of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_PRIORITY	144
-
-/* mail box size of ethnetif thread to wait for */
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE	32
-
-/* thread stack size of ethnetif thread */
-#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
-
-/* SECTION: RTGUI support */
-/* using RTGUI support */
-#define RT_USING_RTGUI
-
-/* name length of RTGUI object */
-#define RTGUI_NAME_MAX		16
-/* support 16 weight font */
-#define RTGUI_USING_FONT16
-/* support 16 weight font */
-#define RTGUI_USING_FONT12
-/* support Chinese font */
-#define RTGUI_USING_FONTHZ
-/* use DFS as file interface */
-#define RTGUI_USING_DFS_FILERW
-/* use font file as Chinese font */
-/* #define RTGUI_USING_HZ_FILE */
-/* use Chinese bitmap font */
-#define RTGUI_USING_HZ_BMP
-/* use small size in RTGUI */
-/* #define RTGUI_USING_SMALL_SIZE */
-/* use mouse cursor */
-/* #define RTGUI_USING_MOUSE_CURSOR */
-/* RTGUI image options */
-//#define RTGUI_IMAGE_XPM
-//#define RTGUI_IMAGE_JPEG
-//#define RTGUI_IMAGE_PNG
-//#define RTGUI_IMAGE_BMP
-
-/* SECTION: FTK support */
-/* using FTK support */
-/* #define RT_USING_FTK */
-
-/*
- * Note on FTK:
- * 
- * FTK depends :
- * #define RT_USING_NEWLIB
- * #define DFS_USING_WORKDIR
- * 
- * And the maximal length must great than 64
- * #define RT_DFS_ELM_MAX_LFN	128
- */
-
-#endif
+/* RT-Thread config file */
+#ifndef __RTTHREAD_CFG_H__
+#define __RTTHREAD_CFG_H__
+
+//add by mojingxian.defualt idle stack is too small.
+#define IDLE_THREAD_STACK_SIZE 512
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX	32
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE	4
+
+/* PRIORITY_MAX */
+#define RT_THREAD_PRIORITY_MAX	256
+
+/* Tick per Second */
+#define RT_TICK_PER_SECOND	1000
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug */
+/* #define RT_DEBUG */
+/* #define RT_THREAD_DEBUG */
+
+#define RT_USING_OVERFLOW_CHECK
+
+/* Using Hook */
+#define RT_USING_HOOK
+
+/* Using Software Timer */
+//#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO		8
+#define RT_TIMER_THREAD_STACK_SIZE	512
+#define RT_TIMER_TICK_PER_SECOND	1000
+
+/* SECTION: IPC */
+/* Using Semaphore */
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex */
+#define RT_USING_MUTEX
+
+/* Using Event */
+#define RT_USING_EVENT
+
+/* Using MailBox */
+#define RT_USING_MAILBOX
+
+/* Using Message Queue */
+#define RT_USING_MESSAGEQUEUE
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+#define RT_USING_MEMPOOL
+
+/* Using Dynamic Heap Management */
+#define RT_USING_HEAP
+
+/* Using Small MM */
+#define RT_USING_SMALL_MEM
+
+/* Using SLAB Allocator */
+//#define RT_USING_SLAB
+
+/* SECTION: Device System */
+/* Using Device System */
+#define RT_USING_DEVICE
+
+/* Using Module System */
+//#define RT_USING_MODULE
+#define RT_USING_LIBDL
+
+/* SECTION: Console options */
+#define RT_USING_CONSOLE
+
+/* the buffer size of console */
+#define RT_CONSOLEBUF_SIZE	128
+
+/* SECTION: finsh, a C-Express shell */
+/* Using FinSH as Shell*/
+#define RT_USING_FINSH
+/* Using symbol table */
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_STACK_SIZE 1024
+
+/* SECTION: a runtime libc library */
+/* a runtime libc library */
+//#define RT_USING_NEWLIB
+//#define RT_USING_PTHREADS
+
+/* SECTION: C++ support */
+/* Using C++ support */
+/* #define RT_USING_CPLUSPLUS */
+
+/* SECTION: Device filesystem support */
+/* using DFS support */
+//#define RT_USING_DFS
+#define RT_USING_DFS_ELMFAT
+/* use long file name feature 			*/
+#define RT_DFS_ELM_USE_LFN			1
+/* the max number of file length 		*/
+#define RT_DFS_ELM_MAX_LFN		128
+/* #define RT_USING_DFS_YAFFS2 */
+/* #define RT_USING_DFS_UFFS */
+#define RT_USING_DFS_DEVFS
+
+/* #define RT_USING_DFS_NFS */
+#define RT_NFS_HOST_EXPORT		"192.168.1.5:/"
+
+#define DFS_USING_WORKDIR
+
+/* the max number of mounted filesystem */
+#define DFS_FILESYSTEMS_MAX		4
+/* the max number of opened files 		*/
+#define DFS_FD_MAX					16
+/* the max number of cached sector 		*/
+#define DFS_CACHE_MAX_NUM   		4
+
+/* Enable freemodbus protocal stack*/
+/* #define RT_USING_MODBUS */
+
+/* SECTION: lwip, a lighwight TCP/IP protocol stack */
+/* Using lighweight TCP/IP protocol stack */
+/* #define RT_USING_LWIP */
+//#define RT_LWIP_DNS
+
+/* Trace LwIP protocol */
+/* #define RT_LWIP_DEBUG */
+
+/* Enable ICMP protocol */
+#define RT_LWIP_ICMP
+
+/* Enable IGMP protocol */
+#define RT_LWIP_IGMP
+
+/* Enable UDP protocol */
+#define RT_LWIP_UDP
+
+/* Enable TCP protocol */
+#define RT_LWIP_TCP
+
+/* the number of simulatenously active TCP connections*/
+#define RT_LWIP_TCP_PCB_NUM	5
+
+/* TCP sender buffer space */
+#define RT_LWIP_TCP_SND_BUF	1024*8
+
+/* TCP receive window. */
+#define RT_LWIP_TCP_WND	1024*8
+
+/* Enable SNMP protocol */
+/* #define RT_LWIP_SNMP */
+
+/* Using DHCP */
+/* #define RT_LWIP_DHCP */
+
+/* ip address of target */
+#define RT_LWIP_IPADDR0	192
+#define RT_LWIP_IPADDR1	168
+#define RT_LWIP_IPADDR2	1
+#define RT_LWIP_IPADDR3	30
+
+/* gateway address of target */
+#define RT_LWIP_GWADDR0	192
+#define RT_LWIP_GWADDR1	168
+#define RT_LWIP_GWADDR2	1
+#define RT_LWIP_GWADDR3	1
+
+/* mask address of target */
+#define RT_LWIP_MSKADDR0	255
+#define RT_LWIP_MSKADDR1	255
+#define RT_LWIP_MSKADDR2	255
+#define RT_LWIP_MSKADDR3	0
+
+/* the number of blocks for pbuf */
+#define RT_LWIP_PBUF_NUM	16
+
+/* the number of simultaneously queued TCP */
+#define RT_LWIP_TCP_SEG_NUM    40
+
+/* thread priority of tcpip thread */
+#define RT_LWIP_TCPTHREAD_PRIORITY	128
+
+/* mail box size of tcpip thread to wait for */
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE	32
+
+/* thread stack size of tcpip thread */
+#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
+
+/* thread priority of ethnetif thread */
+#define RT_LWIP_ETHTHREAD_PRIORITY	144
+
+/* mail box size of ethnetif thread to wait for */
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE	32
+
+/* thread stack size of ethnetif thread */
+#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
+
+/* SECTION: RTGUI support */
+/* using RTGUI support */
+#define RT_USING_RTGUI
+
+/* name length of RTGUI object */
+#define RTGUI_NAME_MAX		16
+/* support 16 weight font */
+#define RTGUI_USING_FONT16
+/* support 16 weight font */
+#define RTGUI_USING_FONT12
+/* support Chinese font */
+#define RTGUI_USING_FONTHZ
+/* use DFS as file interface */
+#define RTGUI_USING_DFS_FILERW
+/* use font file as Chinese font */
+/* #define RTGUI_USING_HZ_FILE */
+/* use Chinese bitmap font */
+#define RTGUI_USING_HZ_BMP
+/* use small size in RTGUI */
+/* #define RTGUI_USING_SMALL_SIZE */
+/* use mouse cursor */
+/* #define RTGUI_USING_MOUSE_CURSOR */
+/* RTGUI image options */
+//#define RTGUI_IMAGE_XPM
+//#define RTGUI_IMAGE_JPEG
+//#define RTGUI_IMAGE_PNG
+//#define RTGUI_IMAGE_BMP
+
+/* SECTION: FTK support */
+/* using FTK support */
+/* #define RT_USING_FTK */
+
+/*
+ * Note on FTK:
+ * 
+ * FTK depends :
+ * #define RT_USING_NEWLIB
+ * #define DFS_USING_WORKDIR
+ * 
+ * And the maximal length must great than 64
+ * #define RT_DFS_ELM_MAX_LFN	128
+ */
+
+#endif

bsp/bf533/startup.c

@@ -1,102 +1,102 @@
-/*
- * File      : startup.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date         Author      Notes
- * 2012-02-13   mojingxian  first version
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-#include "application.h"
-#include "board.h"
-#include "serial.h"
-#include "finsh.h"
-
-extern "asm" int rtt_heap_start;
-extern "asm" int rtt_heap_end;
-extern struct serial_device uart0;
-extern struct rt_device uart0_device;
-
-void rtthread_startup(void)
-{
-    /* init hardware interrupt */
-    rt_hw_interrupt_init();
-
-    /* init board */
-    rt_hw_board_init();
-
-    /* show version */
-    rt_show_version();
-
-    /* init tick */
-    rt_system_tick_init();
-
-    /* init kernel object */
-    rt_system_object_init();
-
-    /* init timer system */
-    rt_system_timer_init();
-
-#ifdef RT_USING_HEAP
-    rt_system_heap_init((void*)&rtt_heap_start, (void*)&rtt_heap_end);
-#endif
-
-#ifdef RT_USING_MODULE
-    /* init module system*/
-    rt_system_module_init();
-#endif
-
-    /* init scheduler system */
-    rt_system_scheduler_init();
-
-#ifdef RT_USING_DEVICE
-    /* register uart0 */
-    rt_hw_serial_register(&uart0_device, "uart0",
-        RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
-        &uart0);
-
-    /* init all device */
-    rt_device_init_all();
-
-    rt_console_set_device("uart0");
-#endif
-
-    /* init application */
-    rt_application_init();
-
-#ifdef RT_USING_FINSH
-    /* init finsh */
-    extern void finsh_system_init(void);
-    finsh_system_init();
-    finsh_set_device("uart0");
-#endif
-
-    rt_system_timer_thread_init();
-
-    /* init idle thread */
-    rt_thread_idle_init();
-
-    /* start scheduler */
-    rt_system_scheduler_start();
-
-    /* never reach here */
-    return ;
-}
-
-int main(void)
-{
-    /* disable interrupt first */
-    rt_hw_interrupt_disable();
-
-    /* startup RT-Thread RTOS */
-    rtthread_startup();
-
-    return 0;
-}
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date         Author      Notes
+ * 2012-02-13   mojingxian  first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "application.h"
+#include "board.h"
+#include "serial.h"
+#include "finsh.h"
+
+extern "asm" int rtt_heap_start;
+extern "asm" int rtt_heap_end;
+extern struct serial_device uart0;
+extern struct rt_device uart0_device;
+
+void rtthread_startup(void)
+{
+    /* init hardware interrupt */
+    rt_hw_interrupt_init();
+
+    /* init board */
+    rt_hw_board_init();
+
+    /* show version */
+    rt_show_version();
+
+    /* init tick */
+    rt_system_tick_init();
+
+    /* init kernel object */
+    rt_system_object_init();
+
+    /* init timer system */
+    rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+    rt_system_heap_init((void*)&rtt_heap_start, (void*)&rtt_heap_end);
+#endif
+
+#ifdef RT_USING_MODULE
+    /* init module system*/
+    rt_system_module_init();
+#endif
+
+    /* init scheduler system */
+    rt_system_scheduler_init();
+
+#ifdef RT_USING_DEVICE
+    /* register uart0 */
+    rt_hw_serial_register(&uart0_device, "uart0",
+        RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+        &uart0);
+
+    /* init all device */
+    rt_device_init_all();
+
+    rt_console_set_device("uart0");
+#endif
+
+    /* init application */
+    rt_application_init();
+
+#ifdef RT_USING_FINSH
+    /* init finsh */
+    extern void finsh_system_init(void);
+    finsh_system_init();
+    finsh_set_device("uart0");
+#endif
+
+    rt_system_timer_thread_init();
+
+    /* init idle thread */
+    rt_thread_idle_init();
+
+    /* start scheduler */
+    rt_system_scheduler_start();
+
+    /* never reach here */
+    return ;
+}
+
+int main(void)
+{
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
+
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
+
+    return 0;
+}

bsp/bf533/vdsp/bf533.dpj

@@ -1,740 +1,740 @@
-<?xml version="1.0" encoding='ISO-8859-1'?>
-<visualdsp-project schema="17" name="bf533" file="bf533.dpj" version="1">
-	<!-- Project build target -->
-	<target>
-		<processor revision="Automatic">ADSP-BF533</processor>
-		<extension>.ldr</extension>
-		<type>Loader file</type>
-	</target>
-	<!-- Configurations -->
-	<configurations active="Debug">
-		<configuration name="Debug">
-			<intermediate-dir>.\Debug</intermediate-dir>
-			<output-dir>.\Debug</output-dir>
-			<changed-property-page-flags>0</changed-property-page-flags>
-			<tools>
-				<tool type="Compiler">
-					<option><![CDATA[|-Version>5.0|-O>0|-O1>0|-Ov>50|-ipa>0|-g>1|-no-annotate>0|-save-temps -path-output>0|-ED>0|-no-auto-attrs>0|-no-builtin>0|-no-extra-keywords>0|-enum-is-int>0|-no-fp-associative>0|-structs-do-not-overlap>1|-implicit-pointers>0|-eh >0|-rtti>0|-check-init-order>0|-ignore-std>1|-const-read-write>0|-const-strings>0|-no-multiline>1|-misra>0|-misra-strict>0|-misra-no-cross-module>0|-misra-no-runtime>0|-misra-testing>0|-misra-suppress-advisory>0|-I>../../../include;../;../../../components/finsh;../../../libcpu/blackfin/bf53x;../../../src;|-no-std-inc>0|-double-size-64>1|-double-size-any>0|-Ofp>0|-full-io>0|-guard-vol-loads>0|-decls-strong>1|-no-saturation>0|-cplbs>0|-sdram>0|-multicore>0|-pguide>0|NOSWITCH>0|-flags-compiler --diag_warning,implicit_func_decl>0|-warn-protos>1|-flags-compiler --diag_warning,call_not_inlined>0|-Wremarks>0|-w>0]]></option>
-				</tool>
-				<tool type="Assembler">
-					<option><![CDATA[|-Version>4.5|-v>0|-g>1|-l>0|-save-temps>0|-sp>0|-i>../../../include;../;../../../components/finsh;../../../libcpu/blackfin/bf53x;../../../src;]]></option>
-				</tool>
-				<tool type="Linker">
-					<option><![CDATA[|-Version>5.0|-flags-link -t>0|-flags-link -S>0|-flags-link -s>0|-mem>0|-flags-link -warnonce>0|-map>1|-flags-link -xref>0|-flags-link -save-temps>0|-flags-link -ip>0|-MD>USE_FILEIO,__cplusplus,USER_CRT="bf533_basiccrt.doj",USE_CACHE,USE_INSTRUCTION_CACHE|-flags-link -e>1|-flags-link -ev>0|-add-debug-libpaths>1|-flags-link -MD__ADI_LIBEH__>0|-multicore>0|NOSWITCH>1|AdditionalOptions>-T ./bf533_ram.ldf]]></option>
-				</tool>
-				<tool type="Archiver">
-					<option><![CDATA[]]></option>
-				</tool>
-				<tool type="Loader">
-					<option><![CDATA[|-Version>4.5|-b Flash>1|-f BINARY>1|-Width 16>1|-p>0x0|DefaultStart>0|-v>0|-waits >-1|-BaudRate 500k>1|-HoldTime >-1|-pFlag >0|-init>"./bf533_init.dxe"|-o>bf533.ldr|-zinit>0|-COMPRESSION>0|-COMPRESSIONOVERLAY>0|-RETAINSECONDSTAGEKERNEL>0|-COMPRESSWS>9|-No2Kernel>0|-o2>0|-kb Flash>1|-kf HEX>1|-kWidth 8>1|-kp>0x0|DefaultKernelStart>1|UserKernel>1|-romsplitter>0|split HEX>1|-maskaddr>0]]></option>
-				</tool>
-				<tool type="VdkGen">
-					<option><![CDATA[]]></option>
-				</tool>
-			</tools>
-		</configuration>
-		<configuration name="Release">
-			<intermediate-dir>.\Release</intermediate-dir>
-			<output-dir>.\Release</output-dir>
-			<changed-property-page-flags>12</changed-property-page-flags>
-			<tools>
-				<tool type="Compiler">
-					<option><![CDATA[|-Version>5.0|-O>1|-O1>1|-Ov>100|-ipa>0|-g>0|-no-annotate>0|-save-temps -path-output>0|-ED>0|-no-auto-attrs>0|-no-builtin>0|-no-extra-keywords>0|-enum-is-int>0|-no-fp-associative>0|-structs-do-not-overlap>1|-implicit-pointers>0|-eh >0|-rtti>0|-check-init-order>0|-ignore-std>0|-const-read-write>0|-const-strings>0|-no-multiline>1|-misra>0|-misra-strict>0|-misra-no-cross-module>0|-misra-no-runtime>1|-misra-testing>1|-misra-suppress-advisory>0|-I>../uCOS-II/Source;../uCOS-II/Config;../uCOS-II/Ports;../Apps;../BSP|-no-std-inc>0|-double-size-32>1|-double-size-any>0|-Ofp>0|-full-io>0|-guard-vol-loads>0|-decls-strong>1|-no-saturation>0|-cplbs>0|-sdram>0|-multicore>0|-pguide>0|NOSWITCH>0|-flags-compiler --diag_warning,implicit_func_decl>0|-warn-protos>1|-flags-compiler --diag_warning,call_not_inlined>0|-Wremarks>0|-w>0]]></option>
-				</tool>
-				<tool type="Assembler">
-					<option><![CDATA[|-Version>4.5|-v>0|-g>0|-l>0|-save-temps>0|-sp>0|-i>../uCOS-II/Source;../uCOS-II/Config;../uCOS-II/Ports;../Apps;../BSP]]></option>
-				</tool>
-				<tool type="Linker">
-					<option><![CDATA[|-Version>5.0|-flags-link -t>0|-flags-link -S>0|-flags-link -s>0|-mem>0|-flags-link -warnonce>0|-map>1|-flags-link -xref>0|-flags-link -save-temps>0|-flags-link -ip>1|-flags-link -e>1|-flags-link -ev>0|-add-debug-libpaths>0|-flags-link -MD__ADI_LIBEH__>0|-multicore>0|NOSWITCH>1|-flags-link -MDUSE_CACHE>0|-MD>USE_FILEIO,__cplusplus,USER_CRT="ARZ-3B_basiccrt.doj",USER_CRT="ARZ-3B-DSP_basiccrt.doj",USER_CRT="ARZ-3M3B_basiccrt.doj",USER_CRT="bf533_basiccrt.doj",USE_CACHE,USE_INSTRUCTION_CACHE]]></option>
-				</tool>
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-									<intermediate-dir>.\Release</intermediate-dir>
-									<output-dir>.\Release</output-dir>
-								</file-configuration>
-							</file-configurations>
-						</file>
-					</files>
-				</folder>
-				<folder name="startup">
-					<files>
-						<file name="..\application.c">
-							<file-configurations>
-								<file-configuration name="Debug">
-									<excluded-flag value="no"/>
-									<build-with-flag value="project"/>
-									<intermediate-dir>.\Debug</intermediate-dir>
-									<output-dir>.\Debug</output-dir>
-								</file-configuration>
-								<file-configuration name="Release">
-									<excluded-flag value="no"/>
-									<build-with-flag value="project"/>
-									<intermediate-dir>.\Release</intermediate-dir>
-									<output-dir>.\Release</output-dir>
-								</file-configuration>
-							</file-configurations>
-						</file>
-						<file name="..\board.c">
-							<file-configurations>
-								<file-configuration name="Debug">
-									<excluded-flag value="no"/>
-									<build-with-flag value="project"/>
-									<intermediate-dir>.\Debug</intermediate-dir>
-									<output-dir>.\Debug</output-dir>
-								</file-configuration>
-								<file-configuration name="Release">
-									<excluded-flag value="no"/>
-									<build-with-flag value="project"/>
-									<intermediate-dir>.\Release</intermediate-dir>
-									<output-dir>.\Release</output-dir>
-								</file-configuration>
-							</file-configurations>
-						</file>
-						<file name="..\startup.c">
-							<file-configurations>
-								<file-configuration name="Debug">
-									<excluded-flag value="no"/>
-									<build-with-flag value="project"/>
-									<intermediate-dir>.\Debug</intermediate-dir>
-									<output-dir>.\Debug</output-dir>
-								</file-configuration>
-								<file-configuration name="Release">
-									<excluded-flag value="no"/>
-									<build-with-flag value="project"/>
-									<intermediate-dir>.\Release</intermediate-dir>
-									<output-dir>.\Release</output-dir>
-								</file-configuration>
-							</file-configurations>
-						</file>
-					</files>
-				</folder>
-			</folders>
-		</folder>
-	</folders>
-	<!-- System Builder Components -->
-	<system-builder-component-tables>
-		<system-builder-plugin name="Standard application">
-			<system-builder-component name="Application Settings">
-				<property name="Add source code"><![CDATA[False]]></property>
-				<property name="Output type"><![CDATA[Loader file]]></property>
-			</system-builder-component>
-			<system-builder-component name="Select Processor">
-				<property name="Processor family"><![CDATA[Blackfin]]></property>
-			</system-builder-component>
-		</system-builder-plugin>
-		<system-builder-plugin name="Startup Code Wizard" version="2.0">
-			<system-builder-component name="Cache and Memory Protection">
-				<property name="DCBS"><![CDATA[Set]]></property>
-				<property name="Data cache memory configuration"><![CDATA[RAM with no memory protection]]></property>
-				<property name="Generate support for memory protection"><![CDATA[False]]></property>
-				<property name="Instruction cache memory configuration"><![CDATA[Instruction cache]]></property>
-				<property name="Write-back cache"><![CDATA[False]]></property>
-				<property name="Write-through cache"><![CDATA[False]]></property>
-			</system-builder-component>
-			<system-builder-component name="Compiler Instrumented Profiling">
-				<property name="Enable profiling"><![CDATA[False]]></property>
-				<property name="Profiling output"><![CDATA[mon.out]]></property>
-			</system-builder-component>
-			<system-builder-component name="Configuration">
-				<property name="Add startup code"><![CDATA[True]]></property>
-				<property name="Startup code template schema"><![CDATA[3.6]]></property>
-			</system-builder-component>
-			<system-builder-component name="Linker Options">
-				<property name="Search Directory"><![CDATA[]]></property>
-			</system-builder-component>
-			<system-builder-component name="Processor clock and power settings">
-				<property name="Clock and power settings"><![CDATA[Optimize for speed]]></property>
-				<property name="Configure clock and power settings"><![CDATA[False]]></property>
-				<property name="EZ-KIT"><![CDATA[600 MHz ADSP-BF533 EZ-KIT (silicon revisions up to 1.6)]]></property>
-			</system-builder-component>
-			<system-builder-component name="Program Running From">
-				<property name="Internal Memory"><![CDATA[True]]></property>
-			</system-builder-component>
-			<system-builder-component name="Project Options">
-				<property name="Compiler Multicore"><![CDATA[False]]></property>
-				<property name="Configuration"><![CDATA[Debug]]></property>
-				<property name="Intermediate Directory"><![CDATA[.\Debug]]></property>
-				<property name="Linker Multicore"><![CDATA[False]]></property>
-				<property name="Name"><![CDATA[bf533]]></property>
-				<property name="Processor"><![CDATA[ADSP-BF533]]></property>
-				<property name="Silicon Revision"><![CDATA[Automatic]]></property>
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-			</system-builder-component>
-			<system-builder-component name="Run-time Initialization">
-				<property name="I/O device initialization"><![CDATA[True]]></property>
-				<property name="Initialize data registers"><![CDATA[False]]></property>
-				<property name="Initialize return registers to zero"><![CDATA[False]]></property>
-				<property name="Run-time memory initialization"><![CDATA[False]]></property>
-			</system-builder-component>
-			<system-builder-component name="Welcome">
-				<property name="Enabled"><![CDATA[True]]></property>
-			</system-builder-component>
-		</system-builder-plugin>
-	</system-builder-component-tables>
-</visualdsp-project>
+<?xml version="1.0" encoding='ISO-8859-1'?>
+<visualdsp-project schema="17" name="bf533" file="bf533.dpj" version="1">
+	<!-- Project build target -->
+	<target>
+		<processor revision="Automatic">ADSP-BF533</processor>
+		<extension>.ldr</extension>
+		<type>Loader file</type>
+	</target>
+	<!-- Configurations -->
+	<configurations active="Debug">
+		<configuration name="Debug">
+			<intermediate-dir>.\Debug</intermediate-dir>
+			<output-dir>.\Debug</output-dir>
+			<changed-property-page-flags>0</changed-property-page-flags>
+			<tools>
+				<tool type="Compiler">
+					<option><![CDATA[|-Version>5.0|-O>0|-O1>0|-Ov>50|-ipa>0|-g>1|-no-annotate>0|-save-temps -path-output>0|-ED>0|-no-auto-attrs>0|-no-builtin>0|-no-extra-keywords>0|-enum-is-int>0|-no-fp-associative>0|-structs-do-not-overlap>1|-implicit-pointers>0|-eh >0|-rtti>0|-check-init-order>0|-ignore-std>1|-const-read-write>0|-const-strings>0|-no-multiline>1|-misra>0|-misra-strict>0|-misra-no-cross-module>0|-misra-no-runtime>0|-misra-testing>0|-misra-suppress-advisory>0|-I>../../../include;../;../../../components/finsh;../../../libcpu/blackfin/bf53x;../../../src;|-no-std-inc>0|-double-size-64>1|-double-size-any>0|-Ofp>0|-full-io>0|-guard-vol-loads>0|-decls-strong>1|-no-saturation>0|-cplbs>0|-sdram>0|-multicore>0|-pguide>0|NOSWITCH>0|-flags-compiler --diag_warning,implicit_func_decl>0|-warn-protos>1|-flags-compiler --diag_warning,call_not_inlined>0|-Wremarks>0|-w>0]]></option>
+				</tool>
+				<tool type="Assembler">
+					<option><![CDATA[|-Version>4.5|-v>0|-g>1|-l>0|-save-temps>0|-sp>0|-i>../../../include;../;../../../components/finsh;../../../libcpu/blackfin/bf53x;../../../src;]]></option>
+				</tool>
+				<tool type="Linker">
+					<option><![CDATA[|-Version>5.0|-flags-link -t>0|-flags-link -S>0|-flags-link -s>0|-mem>0|-flags-link -warnonce>0|-map>1|-flags-link -xref>0|-flags-link -save-temps>0|-flags-link -ip>0|-MD>USE_FILEIO,__cplusplus,USER_CRT="bf533_basiccrt.doj",USE_CACHE,USE_INSTRUCTION_CACHE|-flags-link -e>1|-flags-link -ev>0|-add-debug-libpaths>1|-flags-link -MD__ADI_LIBEH__>0|-multicore>0|NOSWITCH>1|AdditionalOptions>-T ./bf533_ram.ldf]]></option>
+				</tool>
+				<tool type="Archiver">
+					<option><![CDATA[]]></option>
+				</tool>
+				<tool type="Loader">
+					<option><![CDATA[|-Version>4.5|-b Flash>1|-f BINARY>1|-Width 16>1|-p>0x0|DefaultStart>0|-v>0|-waits >-1|-BaudRate 500k>1|-HoldTime >-1|-pFlag >0|-init>"./bf533_init.dxe"|-o>bf533.ldr|-zinit>0|-COMPRESSION>0|-COMPRESSIONOVERLAY>0|-RETAINSECONDSTAGEKERNEL>0|-COMPRESSWS>9|-No2Kernel>0|-o2>0|-kb Flash>1|-kf HEX>1|-kWidth 8>1|-kp>0x0|DefaultKernelStart>1|UserKernel>1|-romsplitter>0|split HEX>1|-maskaddr>0]]></option>
+				</tool>
+				<tool type="VdkGen">
+					<option><![CDATA[]]></option>
+				</tool>
+			</tools>
+		</configuration>
+		<configuration name="Release">
+			<intermediate-dir>.\Release</intermediate-dir>
+			<output-dir>.\Release</output-dir>
+			<changed-property-page-flags>12</changed-property-page-flags>
+			<tools>
+				<tool type="Compiler">
+					<option><![CDATA[|-Version>5.0|-O>1|-O1>1|-Ov>100|-ipa>0|-g>0|-no-annotate>0|-save-temps -path-output>0|-ED>0|-no-auto-attrs>0|-no-builtin>0|-no-extra-keywords>0|-enum-is-int>0|-no-fp-associative>0|-structs-do-not-overlap>1|-implicit-pointers>0|-eh >0|-rtti>0|-check-init-order>0|-ignore-std>0|-const-read-write>0|-const-strings>0|-no-multiline>1|-misra>0|-misra-strict>0|-misra-no-cross-module>0|-misra-no-runtime>1|-misra-testing>1|-misra-suppress-advisory>0|-I>../uCOS-II/Source;../uCOS-II/Config;../uCOS-II/Ports;../Apps;../BSP|-no-std-inc>0|-double-size-32>1|-double-size-any>0|-Ofp>0|-full-io>0|-guard-vol-loads>0|-decls-strong>1|-no-saturation>0|-cplbs>0|-sdram>0|-multicore>0|-pguide>0|NOSWITCH>0|-flags-compiler --diag_warning,implicit_func_decl>0|-warn-protos>1|-flags-compiler --diag_warning,call_not_inlined>0|-Wremarks>0|-w>0]]></option>
+				</tool>
+				<tool type="Assembler">
+					<option><![CDATA[|-Version>4.5|-v>0|-g>0|-l>0|-save-temps>0|-sp>0|-i>../uCOS-II/Source;../uCOS-II/Config;../uCOS-II/Ports;../Apps;../BSP]]></option>
+				</tool>
+				<tool type="Linker">
+					<option><![CDATA[|-Version>5.0|-flags-link -t>0|-flags-link -S>0|-flags-link -s>0|-mem>0|-flags-link -warnonce>0|-map>1|-flags-link -xref>0|-flags-link -save-temps>0|-flags-link -ip>1|-flags-link -e>1|-flags-link -ev>0|-add-debug-libpaths>0|-flags-link -MD__ADI_LIBEH__>0|-multicore>0|NOSWITCH>1|-flags-link -MDUSE_CACHE>0|-MD>USE_FILEIO,__cplusplus,USER_CRT="ARZ-3B_basiccrt.doj",USER_CRT="ARZ-3B-DSP_basiccrt.doj",USER_CRT="ARZ-3M3B_basiccrt.doj",USER_CRT="bf533_basiccrt.doj",USE_CACHE,USE_INSTRUCTION_CACHE]]></option>
+				</tool>
+				<tool type="Archiver">
+					<option><![CDATA[]]></option>
+				</tool>
+				<tool type="Loader">
+					<option><![CDATA[|-Version>4.5|-b Flash>1|-f BINARY>1|-Width 16>1|-p>0x0|DefaultStart>0|-v>0|-waits >-1|-HoldTime >-1|-pFlag >0|-zinit>0|-COMPRESSION>0|-COMPRESSIONOVERLAY>0|-RETAINSECONDSTAGEKERNEL>0|-COMPRESSWS>9|-No2Kernel>0|-o2>0|-kb Flash>1|-kf HEX>1|-kWidth 8>1|-kp>0x0|DefaultKernelStart>1|UserKernel>1|-romsplitter>0|split HEX>1|-maskaddr>0]]></option>
+				</tool>
+				<tool type="VdkGen">
+					<option><![CDATA[]]></option>
+				</tool>
+			</tools>
+		</configuration>
+	</configurations>
+	<!-- Project folders -->
+	<folders>
+		<folder name="Generated Files">
+			<folders>
+				<folder name="Startup">
+					<files>
+						<file name=".\bf533_basiccrt.s">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+					</files>
+				</folder>
+				<folder name="User Heap">
+					<files>
+						<file name=".\bf533_heaptab.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+					</files>
+				</folder>
+			</folders>
+		</folder>
+		<folder name="Header Files" ext=".h,.hpp,.hxx">
+		</folder>
+		<folder name="Linker Files" ext=".ldf,.dlb">
+		</folder>
+		<folder name="Source Files" ext=".c,.cpp,.cxx,.asm,.dsp,.s">
+			<folders>
+				<folder name="finsh">
+					<files>
+						<file name="..\..\..\components\finsh\cmd.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_compiler.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_error.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_heap.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_init.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_node.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_ops.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_parser.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_token.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_var.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\finsh_vm.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\shell.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\components\finsh\symbol.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+					</files>
+				</folder>
+				<folder name="kernel">
+					<files>
+						<file name="..\..\..\src\clock.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\device.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\idle.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\ipc.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\irq.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\kservice.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\mem.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\mempool.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\module.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\module.h">
+						</file>
+						<file name="..\..\..\src\object.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\rtm.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\scheduler.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\slab.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\thread.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\src\timer.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+					</files>
+				</folder>
+				<folder name="port">
+					<files>
+						<file name="..\..\..\libcpu\blackfin\bf53x\context_vdsp.S">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\libcpu\blackfin\bf53x\cpuport.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\..\..\libcpu\blackfin\bf53x\serial.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+					</files>
+				</folder>
+				<folder name="startup">
+					<files>
+						<file name="..\application.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\board.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+						<file name="..\startup.c">
+							<file-configurations>
+								<file-configuration name="Debug">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Debug</intermediate-dir>
+									<output-dir>.\Debug</output-dir>
+								</file-configuration>
+								<file-configuration name="Release">
+									<excluded-flag value="no"/>
+									<build-with-flag value="project"/>
+									<intermediate-dir>.\Release</intermediate-dir>
+									<output-dir>.\Release</output-dir>
+								</file-configuration>
+							</file-configurations>
+						</file>
+					</files>
+				</folder>
+			</folders>
+		</folder>
+	</folders>
+	<!-- System Builder Components -->
+	<system-builder-component-tables>
+		<system-builder-plugin name="Standard application">
+			<system-builder-component name="Application Settings">
+				<property name="Add source code"><![CDATA[False]]></property>
+				<property name="Output type"><![CDATA[Loader file]]></property>
+			</system-builder-component>
+			<system-builder-component name="Select Processor">
+				<property name="Processor family"><![CDATA[Blackfin]]></property>
+			</system-builder-component>
+		</system-builder-plugin>
+		<system-builder-plugin name="Startup Code Wizard" version="2.0">
+			<system-builder-component name="Cache and Memory Protection">
+				<property name="DCBS"><![CDATA[Set]]></property>
+				<property name="Data cache memory configuration"><![CDATA[RAM with no memory protection]]></property>
+				<property name="Generate support for memory protection"><![CDATA[False]]></property>
+				<property name="Instruction cache memory configuration"><![CDATA[Instruction cache]]></property>
+				<property name="Write-back cache"><![CDATA[False]]></property>
+				<property name="Write-through cache"><![CDATA[False]]></property>
+			</system-builder-component>
+			<system-builder-component name="Compiler Instrumented Profiling">
+				<property name="Enable profiling"><![CDATA[False]]></property>
+				<property name="Profiling output"><![CDATA[mon.out]]></property>
+			</system-builder-component>
+			<system-builder-component name="Configuration">
+				<property name="Add startup code"><![CDATA[True]]></property>
+				<property name="Startup code template schema"><![CDATA[3.6]]></property>
+			</system-builder-component>
+			<system-builder-component name="Linker Options">
+				<property name="Search Directory"><![CDATA[]]></property>
+			</system-builder-component>
+			<system-builder-component name="Processor clock and power settings">
+				<property name="Clock and power settings"><![CDATA[Optimize for speed]]></property>
+				<property name="Configure clock and power settings"><![CDATA[False]]></property>
+				<property name="EZ-KIT"><![CDATA[600 MHz ADSP-BF533 EZ-KIT (silicon revisions up to 1.6)]]></property>
+			</system-builder-component>
+			<system-builder-component name="Program Running From">
+				<property name="Internal Memory"><![CDATA[True]]></property>
+			</system-builder-component>
+			<system-builder-component name="Project Options">
+				<property name="Compiler Multicore"><![CDATA[False]]></property>
+				<property name="Configuration"><![CDATA[Debug]]></property>
+				<property name="Intermediate Directory"><![CDATA[.\Debug]]></property>
+				<property name="Linker Multicore"><![CDATA[False]]></property>
+				<property name="Name"><![CDATA[bf533]]></property>
+				<property name="Processor"><![CDATA[ADSP-BF533]]></property>
+				<property name="Silicon Revision"><![CDATA[Automatic]]></property>
+				<property name="Strict IEEE Floating Point Compliance"><![CDATA[False]]></property>
+				<property name="Use C++ exceptions libraries"><![CDATA[False]]></property>
+			</system-builder-component>
+			<system-builder-component name="Run-time Initialization">
+				<property name="I/O device initialization"><![CDATA[True]]></property>
+				<property name="Initialize data registers"><![CDATA[False]]></property>
+				<property name="Initialize return registers to zero"><![CDATA[False]]></property>
+				<property name="Run-time memory initialization"><![CDATA[False]]></property>
+			</system-builder-component>
+			<system-builder-component name="Welcome">
+				<property name="Enabled"><![CDATA[True]]></property>
+			</system-builder-component>
+		</system-builder-plugin>
+	</system-builder-component-tables>
+</visualdsp-project>

bsp/bf533/vdsp/bf533.mak

@@ -1,244 +1,244 @@
-# Generated by the VisualDSP++ IDDE
-
-# Note:  Any changes made to this Makefile will be lost the next time the
-# matching project file is loaded into the IDDE.  If you wish to preserve
-# changes, rename this file and run it externally to the IDDE.
-
-# The syntax of this Makefile is such that GNU Make v3.77 or higher is
-# required.
-
-# The current working directory should be the directory in which this
-# Makefile resides.
-
-# Supported targets:
-#     bf533_Debug
-#     bf533_Debug_clean
-
-# Define this variable if you wish to run this Makefile on a host
-# other than the host that created it and VisualDSP++ may be installed
-# in a different directory.
-
-ADI_DSP=C:\Program Files (x86)\Analog Devices\VisualDSP 5.0
-
-
-# $VDSP is a gmake-friendly version of ADI_DIR
-
-empty:=
-space:= $(empty) $(empty)
-VDSP_INTERMEDIATE=$(subst \,/,$(ADI_DSP))
-VDSP=$(subst $(space),\$(space),$(VDSP_INTERMEDIATE))
-
-RM=cmd /C del /F /Q
-
-#
-# Begin "bf533_Debug" configuration
-#
-
-ifeq ($(MAKECMDGOALS),bf533_Debug)
-
-bf533_Debug : ./Debug/bf533.ldr 
-
-./Debug/application.doj :../application.c ../application.h ../board.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\application.c"
-	$(VDSP)/ccblkfn.exe -c ..\application.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\application.doj -MM
-
-./Debug/bf533_basiccrt.doj :./bf533_basiccrt.s $(VDSP)/Blackfin/include/cplb.h $(VDSP)/Blackfin/include/defBF532.h $(VDSP)/Blackfin/include/defBF533.h $(VDSP)/Blackfin/include/def_LPBlackfin.h $(VDSP)/Blackfin/include/sys/_adi_platform.h $(VDSP)/Blackfin/include/sys/anomaly_macros_rtl.h $(VDSP)/Blackfin/include/sys/platform.h 
-	@echo ".\bf533_basiccrt.s"
-	$(VDSP)/easmblkfn.exe .\bf533_basiccrt.s -proc ADSP-BF533 -file-attr ProjectName=bf533 -g -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -o .\Debug\bf533_basiccrt.doj -MM
-
-./Debug/bf533_heaptab.doj :bf533_heaptab.c 
-	@echo ".\bf533_heaptab.c"
-	$(VDSP)/ccblkfn.exe -c .\bf533_heaptab.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\bf533_heaptab.doj -MM
-
-./Debug/board.doj :../board.c ../board.h ../rtconfig.h ../../../include/rtdef.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../libcpu/blackfin/bf53x/serial.h $(VDSP)/Blackfin/include/signal.h $(VDSP)/Blackfin/include/sys/signal_bf.h $(VDSP)/Blackfin/include/sys/platform.h $(VDSP)/Blackfin/include/sys/_adi_platform.h $(VDSP)/Blackfin/include/cdefBF533.h $(VDSP)/Blackfin/include/cdefBF532.h $(VDSP)/Blackfin/include/defBF532.h $(VDSP)/Blackfin/include/def_LPBlackfin.h $(VDSP)/Blackfin/include/cdef_LPBlackfin.h $(VDSP)/Blackfin/include/ccblkfn.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/builtins.h $(VDSP)/Blackfin/include/sys/builtins_support.h $(VDSP)/Blackfin/include/fract_typedef.h $(VDSP)/Blackfin/include/fr2x16_typedef.h $(VDSP)/Blackfin/include/r2x16_typedef.h $(VDSP)/Blackfin/include/raw_typedef.h $(VDSP)/Blackfin/include/sys/anomaly_macros_rtl.h $(VDSP)/Blackfin/include/sys/mc_typedef.h $(VDSP)/Blackfin/include/sysreg.h $(VDSP)/Blackfin/include/string.h $(VDSP)/Blackfin/include/sys/exception.h $(VDSP)/Blackfin/include/stdio.h $(VDSP)/Blackfin/include/sys/stdio_bf.h 
-	@echo "..\board.c"
-	$(VDSP)/ccblkfn.exe -c ..\board.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\board.doj -MM
-
-./Debug/clock.doj :../../../src/clock.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\..\..\src\clock.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\clock.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\clock.doj -MM
-
-./Debug/cmd.doj :../../../components/finsh/cmd.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
-	@echo "..\..\..\components\finsh\cmd.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\cmd.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\cmd.doj -MM
-
-./Debug/context_vdsp.doj :../../../libcpu/blackfin/bf53x/context_vdsp.S 
-	@echo "..\..\..\libcpu\blackfin\bf53x\context_vdsp.S"
-	$(VDSP)/easmblkfn.exe ..\..\..\libcpu\blackfin\bf53x\context_vdsp.S -proc ADSP-BF533 -file-attr ProjectName=bf533 -g -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -o .\Debug\context_vdsp.doj -MM
-
-./Debug/cpuport.doj :../../../libcpu/blackfin/bf53x/cpuport.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\..\..\libcpu\blackfin\bf53x\cpuport.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\libcpu\blackfin\bf53x\cpuport.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\cpuport.doj -MM
-
-./Debug/device.doj :../../../src/device.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\..\..\src\device.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\device.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\device.doj -MM
-
-./Debug/finsh_compiler.doj :../../../components/finsh/finsh_compiler.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_ops.h ../../../components/finsh/finsh_vm.h 
-	@echo "..\..\..\components\finsh\finsh_compiler.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_compiler.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_compiler.doj -MM
-
-./Debug/finsh_error.doj :../../../components/finsh/finsh_error.c ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
-	@echo "..\..\..\components\finsh\finsh_error.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_error.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_error.doj -MM
-
-./Debug/finsh_heap.doj :../../../components/finsh/finsh_heap.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_var.h 
-	@echo "..\..\..\components\finsh\finsh_heap.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_heap.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_heap.doj -MM
-
-./Debug/finsh_init.doj :../../../components/finsh/finsh_init.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_vm.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_parser.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_heap.h 
-	@echo "..\..\..\components\finsh\finsh_init.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_init.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_init.doj -MM
-
-./Debug/finsh_node.doj :../../../components/finsh/finsh_node.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_heap.h 
-	@echo "..\..\..\components\finsh\finsh_node.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_node.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_node.doj -MM
-
-./Debug/finsh_ops.doj :../../../components/finsh/finsh_ops.c ../../../components/finsh/finsh_ops.h ../../../components/finsh/finsh_vm.h ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_var.h 
-	@echo "..\..\..\components\finsh\finsh_ops.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_ops.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_ops.doj -MM
-
-./Debug/finsh_parser.doj :../../../components/finsh/finsh_parser.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_token.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_parser.h ../../../components/finsh/finsh_var.h 
-	@echo "..\..\..\components\finsh\finsh_parser.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_parser.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_parser.doj -MM
-
-./Debug/finsh_token.doj :../../../components/finsh/finsh_token.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_token.h ../../../components/finsh/finsh_error.h 
-	@echo "..\..\..\components\finsh\finsh_token.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_token.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_token.doj -MM
-
-./Debug/finsh_var.doj :../../../components/finsh/finsh_var.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_var.h 
-	@echo "..\..\..\components\finsh\finsh_var.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_var.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_var.doj -MM
-
-./Debug/finsh_vm.doj :../../../components/finsh/finsh_vm.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_vm.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_ops.h 
-	@echo "..\..\..\components\finsh\finsh_vm.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_vm.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_vm.doj -MM
-
-./Debug/idle.doj :../../../src/idle.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\..\..\src\idle.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\idle.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\idle.doj -MM
-
-./Debug/ipc.doj :../../../src/ipc.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
-	@echo "..\..\..\src\ipc.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\ipc.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\ipc.doj -MM
-
-./Debug/irq.doj :../../../src/irq.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\..\..\src\irq.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\irq.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\irq.doj -MM
-
-./Debug/kservice.doj :../../../src/kservice.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
-	@echo "..\..\..\src\kservice.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\kservice.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\kservice.doj -MM
-
-./Debug/mem.doj :../../../src/mem.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
-	@echo "..\..\..\src\mem.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\mem.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\mem.doj -MM
-
-./Debug/mempool.doj :../../../src/mempool.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\..\..\src\mempool.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\mempool.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\mempool.doj -MM
-
-./Debug/module.doj :../../../src/module.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rtm.h $(VDSP)/Blackfin/include/string.h 
-	@echo "..\..\..\src\module.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\module.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\module.doj -MM
-
-./Debug/object.doj :../../../src/object.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
-	@echo "..\..\..\src\object.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\object.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\object.doj -MM
-
-./Debug/rtm.doj :../../../src/rtm.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/assert.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h $(VDSP)/Blackfin/include/stdio.h $(VDSP)/Blackfin/include/sys/stdio_bf.h 
-	@echo "..\..\..\src\rtm.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\rtm.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\rtm.doj -MM
-
-./Debug/scheduler.doj :../../../src/scheduler.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
-	@echo "..\..\..\src\scheduler.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\scheduler.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\scheduler.doj -MM
-
-./Debug/serial.doj :../../../libcpu/blackfin/bf53x/serial.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../libcpu/blackfin/bf53x/serial.h ../../../include/rthw.h 
-	@echo "..\..\..\libcpu\blackfin\bf53x\serial.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\libcpu\blackfin\bf53x\serial.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\serial.doj -MM
-
-./Debug/shell.doj :../../../components/finsh/shell.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/shell.h 
-	@echo "..\..\..\components\finsh\shell.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\shell.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\shell.doj -MM
-
-./Debug/slab.doj :../../../src/slab.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
-	@echo "..\..\..\src\slab.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\slab.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\slab.doj -MM
-
-./Debug/startup.doj :../startup.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../application.h ../board.h ../../../libcpu/blackfin/bf53x/serial.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
-	@echo "..\startup.c"
-	$(VDSP)/ccblkfn.exe -c ..\startup.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\startup.doj -MM
-
-./Debug/symbol.doj :../../../components/finsh/symbol.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
-	@echo "..\..\..\components\finsh\symbol.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\symbol.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\symbol.doj -MM
-
-./Debug/thread.doj :../../../src/thread.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
-	@echo "..\..\..\src\thread.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\thread.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\thread.doj -MM
-
-./Debug/timer.doj :../../../src/timer.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
-	@echo "..\..\..\src\timer.c"
-	$(VDSP)/ccblkfn.exe -c ..\..\..\src\timer.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\timer.doj -MM
-
-./Debug/bf533.dxe :./bf533_ram.ldf ./Debug/bf533_basiccrt.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/libprofile532y.dlb ./Debug/application.doj ./Debug/bf533_heaptab.doj ./Debug/board.doj ./Debug/clock.doj ./Debug/cmd.doj ./Debug/context_vdsp.doj ./Debug/cpuport.doj ./Debug/device.doj ./Debug/finsh_compiler.doj ./Debug/finsh_error.doj ./Debug/finsh_heap.doj ./Debug/finsh_init.doj ./Debug/finsh_node.doj ./Debug/finsh_ops.doj ./Debug/finsh_parser.doj ./Debug/finsh_token.doj ./Debug/finsh_var.doj ./Debug/finsh_vm.doj ./Debug/idle.doj ./Debug/ipc.doj ./Debug/irq.doj ./Debug/kservice.doj ./Debug/mem.doj ./Debug/mempool.doj ./Debug/module.doj ./Debug/object.doj ./Debug/rtm.doj ./Debug/scheduler.doj ./Debug/serial.doj ./Debug/shell.doj ./Debug/slab.doj ./Debug/startup.doj ./Debug/symbol.doj ./Debug/thread.doj ./Debug/timer.doj $(VDSP)/Blackfin/lib/cplbtab533.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/crtn532y.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/libsmall532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libio532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libc532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libevent532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libx532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libcpp532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libcpprt532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libf64ieee532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libdsp532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libsftflt532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libetsi532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/Debug/libssl532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/Debug/libdrv532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/Debug/libusb532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/idle532mty.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/librt_fileio532y.dlb 
-	@echo "Linking..."
-	$(VDSP)/ccblkfn.exe .\Debug\application.doj .\Debug\bf533_basiccrt.doj .\Debug\bf533_heaptab.doj .\Debug\board.doj .\Debug\clock.doj .\Debug\cmd.doj .\Debug\context_vdsp.doj .\Debug\cpuport.doj .\Debug\device.doj .\Debug\finsh_compiler.doj .\Debug\finsh_error.doj .\Debug\finsh_heap.doj .\Debug\finsh_init.doj .\Debug\finsh_node.doj .\Debug\finsh_ops.doj .\Debug\finsh_parser.doj .\Debug\finsh_token.doj .\Debug\finsh_var.doj .\Debug\finsh_vm.doj .\Debug\idle.doj .\Debug\ipc.doj .\Debug\irq.doj .\Debug\kservice.doj .\Debug\mem.doj .\Debug\mempool.doj .\Debug\module.doj .\Debug\object.doj .\Debug\rtm.doj .\Debug\scheduler.doj .\Debug\serial.doj .\Debug\shell.doj .\Debug\slab.doj .\Debug\startup.doj .\Debug\symbol.doj .\Debug\thread.doj .\Debug\timer.doj -map .\Debug\bf533.map.xml -L .\Debug -flags-link -MDUSE_FILEIO,-MD__cplusplus,-MDUSER_CRT=ADI_QUOTEbf533_basiccrt.dojADI_QUOTE,-MDUSE_CACHE,-MDUSE_INSTRUCTION_CACHE -flags-link -e -add-debug-libpaths -flags-link -od,.\Debug -o .\Debug\bf533.dxe -proc ADSP-BF533 -flags-link -T,./bf533_ram.ldf -MM
-
-./Debug/bf533.ldr :./Debug/bf533.dxe 
-	@echo "Creating loader file..."
-	$(VDSP)/elfloader.exe .\Debug\bf533.dxe -b Flash -f BINARY -Width 16 -init ./bf533_init.dxe -o .\Debug\bf533.ldr -proc ADSP-BF533 -MM
-
-endif
-
-ifeq ($(MAKECMDGOALS),bf533_Debug_clean)
-
-bf533_Debug_clean:
-	-$(RM) ".\Debug\application.doj"
-	-$(RM) ".\Debug\bf533_basiccrt.doj"
-	-$(RM) ".\Debug\bf533_heaptab.doj"
-	-$(RM) ".\Debug\board.doj"
-	-$(RM) ".\Debug\clock.doj"
-	-$(RM) ".\Debug\cmd.doj"
-	-$(RM) ".\Debug\context_vdsp.doj"
-	-$(RM) ".\Debug\cpuport.doj"
-	-$(RM) ".\Debug\device.doj"
-	-$(RM) ".\Debug\finsh_compiler.doj"
-	-$(RM) ".\Debug\finsh_error.doj"
-	-$(RM) ".\Debug\finsh_heap.doj"
-	-$(RM) ".\Debug\finsh_init.doj"
-	-$(RM) ".\Debug\finsh_node.doj"
-	-$(RM) ".\Debug\finsh_ops.doj"
-	-$(RM) ".\Debug\finsh_parser.doj"
-	-$(RM) ".\Debug\finsh_token.doj"
-	-$(RM) ".\Debug\finsh_var.doj"
-	-$(RM) ".\Debug\finsh_vm.doj"
-	-$(RM) ".\Debug\idle.doj"
-	-$(RM) ".\Debug\ipc.doj"
-	-$(RM) ".\Debug\irq.doj"
-	-$(RM) ".\Debug\kservice.doj"
-	-$(RM) ".\Debug\mem.doj"
-	-$(RM) ".\Debug\mempool.doj"
-	-$(RM) ".\Debug\module.doj"
-	-$(RM) ".\Debug\object.doj"
-	-$(RM) ".\Debug\rtm.doj"
-	-$(RM) ".\Debug\scheduler.doj"
-	-$(RM) ".\Debug\serial.doj"
-	-$(RM) ".\Debug\shell.doj"
-	-$(RM) ".\Debug\slab.doj"
-	-$(RM) ".\Debug\startup.doj"
-	-$(RM) ".\Debug\symbol.doj"
-	-$(RM) ".\Debug\thread.doj"
-	-$(RM) ".\Debug\timer.doj"
-	-$(RM) ".\Debug\bf533.dxe"
-	-$(RM) ".\Debug\bf533.ldr"
-	-$(RM) ".\Debug\*.ipa"
-	-$(RM) ".\Debug\*.opa"
-	-$(RM) ".\Debug\*.ti"
-	-$(RM) ".\Debug\*.pgi"
-	-$(RM) ".\*.rbld"
-
-endif
-
-
+# Generated by the VisualDSP++ IDDE
+
+# Note:  Any changes made to this Makefile will be lost the next time the
+# matching project file is loaded into the IDDE.  If you wish to preserve
+# changes, rename this file and run it externally to the IDDE.
+
+# The syntax of this Makefile is such that GNU Make v3.77 or higher is
+# required.
+
+# The current working directory should be the directory in which this
+# Makefile resides.
+
+# Supported targets:
+#     bf533_Debug
+#     bf533_Debug_clean
+
+# Define this variable if you wish to run this Makefile on a host
+# other than the host that created it and VisualDSP++ may be installed
+# in a different directory.
+
+ADI_DSP=C:\Program Files (x86)\Analog Devices\VisualDSP 5.0
+
+
+# $VDSP is a gmake-friendly version of ADI_DIR
+
+empty:=
+space:= $(empty) $(empty)
+VDSP_INTERMEDIATE=$(subst \,/,$(ADI_DSP))
+VDSP=$(subst $(space),\$(space),$(VDSP_INTERMEDIATE))
+
+RM=cmd /C del /F /Q
+
+#
+# Begin "bf533_Debug" configuration
+#
+
+ifeq ($(MAKECMDGOALS),bf533_Debug)
+
+bf533_Debug : ./Debug/bf533.ldr 
+
+./Debug/application.doj :../application.c ../application.h ../board.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\application.c"
+	$(VDSP)/ccblkfn.exe -c ..\application.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\application.doj -MM
+
+./Debug/bf533_basiccrt.doj :./bf533_basiccrt.s $(VDSP)/Blackfin/include/cplb.h $(VDSP)/Blackfin/include/defBF532.h $(VDSP)/Blackfin/include/defBF533.h $(VDSP)/Blackfin/include/def_LPBlackfin.h $(VDSP)/Blackfin/include/sys/_adi_platform.h $(VDSP)/Blackfin/include/sys/anomaly_macros_rtl.h $(VDSP)/Blackfin/include/sys/platform.h 
+	@echo ".\bf533_basiccrt.s"
+	$(VDSP)/easmblkfn.exe .\bf533_basiccrt.s -proc ADSP-BF533 -file-attr ProjectName=bf533 -g -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -o .\Debug\bf533_basiccrt.doj -MM
+
+./Debug/bf533_heaptab.doj :bf533_heaptab.c 
+	@echo ".\bf533_heaptab.c"
+	$(VDSP)/ccblkfn.exe -c .\bf533_heaptab.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\bf533_heaptab.doj -MM
+
+./Debug/board.doj :../board.c ../board.h ../rtconfig.h ../../../include/rtdef.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../libcpu/blackfin/bf53x/serial.h $(VDSP)/Blackfin/include/signal.h $(VDSP)/Blackfin/include/sys/signal_bf.h $(VDSP)/Blackfin/include/sys/platform.h $(VDSP)/Blackfin/include/sys/_adi_platform.h $(VDSP)/Blackfin/include/cdefBF533.h $(VDSP)/Blackfin/include/cdefBF532.h $(VDSP)/Blackfin/include/defBF532.h $(VDSP)/Blackfin/include/def_LPBlackfin.h $(VDSP)/Blackfin/include/cdef_LPBlackfin.h $(VDSP)/Blackfin/include/ccblkfn.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/builtins.h $(VDSP)/Blackfin/include/sys/builtins_support.h $(VDSP)/Blackfin/include/fract_typedef.h $(VDSP)/Blackfin/include/fr2x16_typedef.h $(VDSP)/Blackfin/include/r2x16_typedef.h $(VDSP)/Blackfin/include/raw_typedef.h $(VDSP)/Blackfin/include/sys/anomaly_macros_rtl.h $(VDSP)/Blackfin/include/sys/mc_typedef.h $(VDSP)/Blackfin/include/sysreg.h $(VDSP)/Blackfin/include/string.h $(VDSP)/Blackfin/include/sys/exception.h $(VDSP)/Blackfin/include/stdio.h $(VDSP)/Blackfin/include/sys/stdio_bf.h 
+	@echo "..\board.c"
+	$(VDSP)/ccblkfn.exe -c ..\board.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\board.doj -MM
+
+./Debug/clock.doj :../../../src/clock.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\..\..\src\clock.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\clock.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\clock.doj -MM
+
+./Debug/cmd.doj :../../../components/finsh/cmd.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
+	@echo "..\..\..\components\finsh\cmd.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\cmd.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\cmd.doj -MM
+
+./Debug/context_vdsp.doj :../../../libcpu/blackfin/bf53x/context_vdsp.S 
+	@echo "..\..\..\libcpu\blackfin\bf53x\context_vdsp.S"
+	$(VDSP)/easmblkfn.exe ..\..\..\libcpu\blackfin\bf53x\context_vdsp.S -proc ADSP-BF533 -file-attr ProjectName=bf533 -g -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -o .\Debug\context_vdsp.doj -MM
+
+./Debug/cpuport.doj :../../../libcpu/blackfin/bf53x/cpuport.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\..\..\libcpu\blackfin\bf53x\cpuport.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\libcpu\blackfin\bf53x\cpuport.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\cpuport.doj -MM
+
+./Debug/device.doj :../../../src/device.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\..\..\src\device.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\device.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\device.doj -MM
+
+./Debug/finsh_compiler.doj :../../../components/finsh/finsh_compiler.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_ops.h ../../../components/finsh/finsh_vm.h 
+	@echo "..\..\..\components\finsh\finsh_compiler.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_compiler.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_compiler.doj -MM
+
+./Debug/finsh_error.doj :../../../components/finsh/finsh_error.c ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
+	@echo "..\..\..\components\finsh\finsh_error.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_error.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_error.doj -MM
+
+./Debug/finsh_heap.doj :../../../components/finsh/finsh_heap.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_var.h 
+	@echo "..\..\..\components\finsh\finsh_heap.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_heap.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_heap.doj -MM
+
+./Debug/finsh_init.doj :../../../components/finsh/finsh_init.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_vm.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_parser.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_heap.h 
+	@echo "..\..\..\components\finsh\finsh_init.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_init.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_init.doj -MM
+
+./Debug/finsh_node.doj :../../../components/finsh/finsh_node.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_heap.h 
+	@echo "..\..\..\components\finsh\finsh_node.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_node.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_node.doj -MM
+
+./Debug/finsh_ops.doj :../../../components/finsh/finsh_ops.c ../../../components/finsh/finsh_ops.h ../../../components/finsh/finsh_vm.h ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_var.h 
+	@echo "..\..\..\components\finsh\finsh_ops.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_ops.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_ops.doj -MM
+
+./Debug/finsh_parser.doj :../../../components/finsh/finsh_parser.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_token.h ../../../components/finsh/finsh_node.h ../../../components/finsh/finsh_error.h ../../../components/finsh/finsh_parser.h ../../../components/finsh/finsh_var.h 
+	@echo "..\..\..\components\finsh\finsh_parser.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_parser.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_parser.doj -MM
+
+./Debug/finsh_token.doj :../../../components/finsh/finsh_token.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_token.h ../../../components/finsh/finsh_error.h 
+	@echo "..\..\..\components\finsh\finsh_token.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_token.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_token.doj -MM
+
+./Debug/finsh_var.doj :../../../components/finsh/finsh_var.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_var.h 
+	@echo "..\..\..\components\finsh\finsh_var.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_var.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_var.doj -MM
+
+./Debug/finsh_vm.doj :../../../components/finsh/finsh_vm.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/finsh_vm.h ../../../components/finsh/finsh_var.h ../../../components/finsh/finsh_ops.h 
+	@echo "..\..\..\components\finsh\finsh_vm.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\finsh_vm.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\finsh_vm.doj -MM
+
+./Debug/idle.doj :../../../src/idle.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\..\..\src\idle.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\idle.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\idle.doj -MM
+
+./Debug/ipc.doj :../../../src/ipc.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
+	@echo "..\..\..\src\ipc.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\ipc.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\ipc.doj -MM
+
+./Debug/irq.doj :../../../src/irq.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\..\..\src\irq.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\irq.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\irq.doj -MM
+
+./Debug/kservice.doj :../../../src/kservice.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
+	@echo "..\..\..\src\kservice.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\kservice.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\kservice.doj -MM
+
+./Debug/mem.doj :../../../src/mem.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
+	@echo "..\..\..\src\mem.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\mem.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\mem.doj -MM
+
+./Debug/mempool.doj :../../../src/mempool.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\..\..\src\mempool.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\mempool.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\mempool.doj -MM
+
+./Debug/module.doj :../../../src/module.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rtm.h $(VDSP)/Blackfin/include/string.h 
+	@echo "..\..\..\src\module.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\module.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\module.doj -MM
+
+./Debug/object.doj :../../../src/object.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
+	@echo "..\..\..\src\object.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\object.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\object.doj -MM
+
+./Debug/rtm.doj :../../../src/rtm.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/assert.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h $(VDSP)/Blackfin/include/stdio.h $(VDSP)/Blackfin/include/sys/stdio_bf.h 
+	@echo "..\..\..\src\rtm.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\rtm.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\rtm.doj -MM
+
+./Debug/scheduler.doj :../../../src/scheduler.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
+	@echo "..\..\..\src\scheduler.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\scheduler.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\scheduler.doj -MM
+
+./Debug/serial.doj :../../../libcpu/blackfin/bf53x/serial.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../libcpu/blackfin/bf53x/serial.h ../../../include/rthw.h 
+	@echo "..\..\..\libcpu\blackfin\bf53x\serial.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\libcpu\blackfin\bf53x\serial.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\serial.doj -MM
+
+./Debug/shell.doj :../../../components/finsh/shell.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h ../../../components/finsh/shell.h 
+	@echo "..\..\..\components\finsh\shell.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\shell.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\shell.doj -MM
+
+./Debug/slab.doj :../../../src/slab.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h 
+	@echo "..\..\..\src\slab.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\slab.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\slab.doj -MM
+
+./Debug/startup.doj :../startup.c ../../../include/rthw.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../application.h ../board.h ../../../libcpu/blackfin/bf53x/serial.h ../../../components/finsh/finsh.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
+	@echo "..\startup.c"
+	$(VDSP)/ccblkfn.exe -c ..\startup.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\startup.doj -MM
+
+./Debug/symbol.doj :../../../components/finsh/symbol.c ../../../components/finsh/finsh.h ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h $(VDSP)/Blackfin/include/ctype.h $(VDSP)/Blackfin/include/stdlib.h $(VDSP)/Blackfin/include/stdlib_bf.h $(VDSP)/Blackfin/include/string.h 
+	@echo "..\..\..\components\finsh\symbol.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\components\finsh\symbol.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\symbol.doj -MM
+
+./Debug/thread.doj :../../../src/thread.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
+	@echo "..\..\..\src\thread.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\thread.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\thread.doj -MM
+
+./Debug/timer.doj :../../../src/timer.c ../../../include/rtthread.h ../../../include/rtdef.h ../rtconfig.h $(VDSP)/Blackfin/include/stdarg.h $(VDSP)/Blackfin/include/yvals.h ../../../include/rtdebug.h ../../../include/rtservice.h ../../../include/rthw.h 
+	@echo "..\..\..\src\timer.c"
+	$(VDSP)/ccblkfn.exe -c ..\..\..\src\timer.c -file-attr ProjectName=bf533 -g -structs-do-not-overlap -no-multiline -I ../../../include -I ../ -I ../../../components/finsh -I ../../../libcpu/blackfin/bf53x -I ../../../src -double-size-64 -decls-strong -warn-protos -proc ADSP-BF533 -o .\Debug\timer.doj -MM
+
+./Debug/bf533.dxe :./bf533_ram.ldf ./Debug/bf533_basiccrt.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/libprofile532y.dlb ./Debug/application.doj ./Debug/bf533_heaptab.doj ./Debug/board.doj ./Debug/clock.doj ./Debug/cmd.doj ./Debug/context_vdsp.doj ./Debug/cpuport.doj ./Debug/device.doj ./Debug/finsh_compiler.doj ./Debug/finsh_error.doj ./Debug/finsh_heap.doj ./Debug/finsh_init.doj ./Debug/finsh_node.doj ./Debug/finsh_ops.doj ./Debug/finsh_parser.doj ./Debug/finsh_token.doj ./Debug/finsh_var.doj ./Debug/finsh_vm.doj ./Debug/idle.doj ./Debug/ipc.doj ./Debug/irq.doj ./Debug/kservice.doj ./Debug/mem.doj ./Debug/mempool.doj ./Debug/module.doj ./Debug/object.doj ./Debug/rtm.doj ./Debug/scheduler.doj ./Debug/serial.doj ./Debug/shell.doj ./Debug/slab.doj ./Debug/startup.doj ./Debug/symbol.doj ./Debug/thread.doj ./Debug/timer.doj $(VDSP)/Blackfin/lib/cplbtab533.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/crtn532y.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/libsmall532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libio532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libc532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libevent532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libx532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libcpp532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libcpprt532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libf64ieee532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libdsp532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libsftflt532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/libetsi532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/Debug/libssl532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/Debug/libdrv532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/Debug/libusb532y.dlb $(VDSP)/Blackfin/lib/bf532_rev_0.5/idle532mty.doj $(VDSP)/Blackfin/lib/bf532_rev_0.5/librt_fileio532y.dlb 
+	@echo "Linking..."
+	$(VDSP)/ccblkfn.exe .\Debug\application.doj .\Debug\bf533_basiccrt.doj .\Debug\bf533_heaptab.doj .\Debug\board.doj .\Debug\clock.doj .\Debug\cmd.doj .\Debug\context_vdsp.doj .\Debug\cpuport.doj .\Debug\device.doj .\Debug\finsh_compiler.doj .\Debug\finsh_error.doj .\Debug\finsh_heap.doj .\Debug\finsh_init.doj .\Debug\finsh_node.doj .\Debug\finsh_ops.doj .\Debug\finsh_parser.doj .\Debug\finsh_token.doj .\Debug\finsh_var.doj .\Debug\finsh_vm.doj .\Debug\idle.doj .\Debug\ipc.doj .\Debug\irq.doj .\Debug\kservice.doj .\Debug\mem.doj .\Debug\mempool.doj .\Debug\module.doj .\Debug\object.doj .\Debug\rtm.doj .\Debug\scheduler.doj .\Debug\serial.doj .\Debug\shell.doj .\Debug\slab.doj .\Debug\startup.doj .\Debug\symbol.doj .\Debug\thread.doj .\Debug\timer.doj -map .\Debug\bf533.map.xml -L .\Debug -flags-link -MDUSE_FILEIO,-MD__cplusplus,-MDUSER_CRT=ADI_QUOTEbf533_basiccrt.dojADI_QUOTE,-MDUSE_CACHE,-MDUSE_INSTRUCTION_CACHE -flags-link -e -add-debug-libpaths -flags-link -od,.\Debug -o .\Debug\bf533.dxe -proc ADSP-BF533 -flags-link -T,./bf533_ram.ldf -MM
+
+./Debug/bf533.ldr :./Debug/bf533.dxe 
+	@echo "Creating loader file..."
+	$(VDSP)/elfloader.exe .\Debug\bf533.dxe -b Flash -f BINARY -Width 16 -init ./bf533_init.dxe -o .\Debug\bf533.ldr -proc ADSP-BF533 -MM
+
+endif
+
+ifeq ($(MAKECMDGOALS),bf533_Debug_clean)
+
+bf533_Debug_clean:
+	-$(RM) ".\Debug\application.doj"
+	-$(RM) ".\Debug\bf533_basiccrt.doj"
+	-$(RM) ".\Debug\bf533_heaptab.doj"
+	-$(RM) ".\Debug\board.doj"
+	-$(RM) ".\Debug\clock.doj"
+	-$(RM) ".\Debug\cmd.doj"
+	-$(RM) ".\Debug\context_vdsp.doj"
+	-$(RM) ".\Debug\cpuport.doj"
+	-$(RM) ".\Debug\device.doj"
+	-$(RM) ".\Debug\finsh_compiler.doj"
+	-$(RM) ".\Debug\finsh_error.doj"
+	-$(RM) ".\Debug\finsh_heap.doj"
+	-$(RM) ".\Debug\finsh_init.doj"
+	-$(RM) ".\Debug\finsh_node.doj"
+	-$(RM) ".\Debug\finsh_ops.doj"
+	-$(RM) ".\Debug\finsh_parser.doj"
+	-$(RM) ".\Debug\finsh_token.doj"
+	-$(RM) ".\Debug\finsh_var.doj"
+	-$(RM) ".\Debug\finsh_vm.doj"
+	-$(RM) ".\Debug\idle.doj"
+	-$(RM) ".\Debug\ipc.doj"
+	-$(RM) ".\Debug\irq.doj"
+	-$(RM) ".\Debug\kservice.doj"
+	-$(RM) ".\Debug\mem.doj"
+	-$(RM) ".\Debug\mempool.doj"
+	-$(RM) ".\Debug\module.doj"
+	-$(RM) ".\Debug\object.doj"
+	-$(RM) ".\Debug\rtm.doj"
+	-$(RM) ".\Debug\scheduler.doj"
+	-$(RM) ".\Debug\serial.doj"
+	-$(RM) ".\Debug\shell.doj"
+	-$(RM) ".\Debug\slab.doj"
+	-$(RM) ".\Debug\startup.doj"
+	-$(RM) ".\Debug\symbol.doj"
+	-$(RM) ".\Debug\thread.doj"
+	-$(RM) ".\Debug\timer.doj"
+	-$(RM) ".\Debug\bf533.dxe"
+	-$(RM) ".\Debug\bf533.ldr"
+	-$(RM) ".\Debug\*.ipa"
+	-$(RM) ".\Debug\*.opa"
+	-$(RM) ".\Debug\*.ti"
+	-$(RM) ".\Debug\*.pgi"
+	-$(RM) ".\*.rbld"
+
+endif
+
+

bsp/dev3210/SConscript

@@ -1,13 +1,13 @@
-Import('RTT_ROOT')
-from building import *
-
-src_bsp = ['application.c', 'startup.c', 'board.c']
-if GetDepend('RT_USING_NEWLIB'):
-	src_bsp = src_bsp + ['newlib_stub.c']
-
-src_drv = ['uart.c', 'lnn800x480.c']
-src	= File(src_bsp + src_drv)
-CPPPATH = [GetCurrentDir()]
-group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
-
-Return('group')
+Import('RTT_ROOT')
+from building import *
+
+src_bsp = ['application.c', 'startup.c', 'board.c']
+if GetDepend('RT_USING_NEWLIB'):
+	src_bsp = src_bsp + ['newlib_stub.c']
+
+src_drv = ['uart.c', 'lnn800x480.c']
+src	= File(src_bsp + src_drv)
+CPPPATH = [GetCurrentDir()]
+group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/dev3210/SConstruct

@@ -1,32 +1,32 @@
-import os
-import sys
-import rtconfig
-
-if os.getenv('RTT_ROOT'):
-    RTT_ROOT = os.getenv('RTT_ROOT')
-else:
-    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
-
-sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
-from building import *
-
-TARGET = 'rtthread.' + rtconfig.TARGET_EXT
-
-env = Environment(tools = ['mingw'],
-	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-	AR = rtconfig.AR, ARFLAGS = '-rc',
-	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
-env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
-
-Export('RTT_ROOT')
-Export('rtconfig')
-
-# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT)
-
-# build program 
-env.Program(TARGET, objs)
-
-# end building 
-EndBuilding(TARGET)
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+	AR = rtconfig.AR, ARFLAGS = '-rc',
+	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+
+# build program 
+env.Program(TARGET, objs)
+
+# end building 
+EndBuilding(TARGET)

bsp/dev3210/dw.txt

@@ -1,11 +1,11 @@
-# download script for boot loader
-ifaddr dmfe0 192.168.1.100
-load tftp://192.168.1.5/boot_3210 0x80200000
-
-# download script for RT-Thread
-ifaddr dmfe0 192.168.1.100
-load tftp://192.168.1.5/rtthread.elf
-
-# burn script for RT-Thread
-ifaddr dmfe0 192.168.1.100
-devcp tftp://192.168.1.5/rtthread.elf /dev/mtd0
+# download script for boot loader
+ifaddr dmfe0 192.168.1.100
+load tftp://192.168.1.5/boot_3210 0x80200000
+
+# download script for RT-Thread
+ifaddr dmfe0 192.168.1.100
+load tftp://192.168.1.5/rtthread.elf
+
+# burn script for RT-Thread
+ifaddr dmfe0 192.168.1.100
+devcp tftp://192.168.1.5/rtthread.elf /dev/mtd0

bsp/dev3210/lnn800x480.c

@@ -1,102 +1,102 @@
-/*
- * File      : lnn800x480.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2010 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- * 2010-01-01     bernard      first version from QiuYi's driver
- */
-
-#include <rtthread.h>
-#include <soc3210.h>
-
-/* LCD driver for 800x480 16bit */
-#define RT_HW_LCD_WIDTH		800
-#define RT_HW_LCD_HEIGHT	480
-
-#define K1BASE				0xA0000000
-#define KSEG1(addr)			((void *)(K1BASE | (rt_uint32_t)(addr)))
-#define HW_FB_ADDR			KSEG1(_rt_framebuffer)
-#define HW_FB_PIXEL(x, y)	*(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * RT_HW_LCD_WIDTH * 2) + x * 2)
-
-ALIGN(4)
-volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
-static struct rt_device_graphic_info _lcd_info;
-
-static rt_err_t rt_lcd_init (rt_device_t dev)
-{
-	/* disable LCD controller */
-	LCD_CTRL = LCD_CTRL & 0xfffe;
-
-	/* set LCD clock */
-	HSB_MISC_REG = (HSB_MISC_REG & 0xFFFD01FF) | 
-		(0x01 << 17) | /* enable LCD */
-		(0x05 << 9);    /* clock */
-
-	LCD_VBARA = (rt_uint32_t)_rt_framebuffer - 0x80000000;
-	LCD_VBARB = (rt_uint32_t)_rt_framebuffer - 0x80000000;
-
-	LCD_HTIM  = 0x12c031f;
-	LCD_VTIM  = 0x11501df;
-	LCD_HVLEN = 0x41e0279;
-
-	LCD_CTRL = 0x8709;
-
-	rt_kprintf("VBARA 0x%08x\n", LCD_VBARA);
-	rt_kprintf("CTRL 0x%08x\n", LCD_CTRL);
-	rt_kprintf("HTIM 0x%08x\n", LCD_HTIM);
-	rt_kprintf("VTIM 0x%08x\n", LCD_VTIM);
-	rt_kprintf("HVLEN 0x%08x\n", LCD_HVLEN);
-	rt_kprintf("HSB_MISC 0x%08x\n", HSB_MISC_REG);
-
-	return RT_EOK;
-}
-
-static rt_err_t rt_lcd_control (rt_device_t dev, rt_uint8_t cmd, void *args)
-{
-	switch (cmd)
-	{
-	case RTGRAPHIC_CTRL_RECT_UPDATE:
-		break;
-	case RTGRAPHIC_CTRL_POWERON:
-		break;
-	case RTGRAPHIC_CTRL_POWEROFF:
-		break;
-	case RTGRAPHIC_CTRL_GET_INFO:		
-		rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
-		break;
-	case RTGRAPHIC_CTRL_SET_MODE:
-		break;
-	}
-
-	return RT_EOK;
-}
-
-void rt_hw_lcd_init(void)
-{
-	rt_device_t lcd = rt_malloc(sizeof(struct rt_device));
-	if (lcd == RT_NULL)
-		return; /* no memory yet */
-
-	_lcd_info.bits_per_pixel = 16;
-	_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
-	_lcd_info.framebuffer = (rt_uint8_t*)HW_FB_ADDR;
-	_lcd_info.width = RT_HW_LCD_WIDTH;
-	_lcd_info.height = RT_HW_LCD_HEIGHT;
-
-	/* init device structure */
-	lcd->type = RT_Device_Class_Graphic;
-	lcd->init = rt_lcd_init;
-	lcd->open = RT_NULL;
-	lcd->close = RT_NULL;
-	lcd->control = rt_lcd_control;
-	lcd->user_data = (void*)&_lcd_info;
-	
-	/* register lcd device to RT-Thread */
-	rt_device_register(lcd, "lcd", RT_DEVICE_FLAG_RDWR);
-}
+/*
+ * File      : lnn800x480.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2010 - 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-01-01     bernard      first version from QiuYi's driver
+ */
+
+#include <rtthread.h>
+#include <soc3210.h>
+
+/* LCD driver for 800x480 16bit */
+#define RT_HW_LCD_WIDTH		800
+#define RT_HW_LCD_HEIGHT	480
+
+#define K1BASE				0xA0000000
+#define KSEG1(addr)			((void *)(K1BASE | (rt_uint32_t)(addr)))
+#define HW_FB_ADDR			KSEG1(_rt_framebuffer)
+#define HW_FB_PIXEL(x, y)	*(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * RT_HW_LCD_WIDTH * 2) + x * 2)
+
+ALIGN(4)
+volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
+static struct rt_device_graphic_info _lcd_info;
+
+static rt_err_t rt_lcd_init (rt_device_t dev)
+{
+	/* disable LCD controller */
+	LCD_CTRL = LCD_CTRL & 0xfffe;
+
+	/* set LCD clock */
+	HSB_MISC_REG = (HSB_MISC_REG & 0xFFFD01FF) | 
+		(0x01 << 17) | /* enable LCD */
+		(0x05 << 9);    /* clock */
+
+	LCD_VBARA = (rt_uint32_t)_rt_framebuffer - 0x80000000;
+	LCD_VBARB = (rt_uint32_t)_rt_framebuffer - 0x80000000;
+
+	LCD_HTIM  = 0x12c031f;
+	LCD_VTIM  = 0x11501df;
+	LCD_HVLEN = 0x41e0279;
+
+	LCD_CTRL = 0x8709;
+
+	rt_kprintf("VBARA 0x%08x\n", LCD_VBARA);
+	rt_kprintf("CTRL 0x%08x\n", LCD_CTRL);
+	rt_kprintf("HTIM 0x%08x\n", LCD_HTIM);
+	rt_kprintf("VTIM 0x%08x\n", LCD_VTIM);
+	rt_kprintf("HVLEN 0x%08x\n", LCD_HVLEN);
+	rt_kprintf("HSB_MISC 0x%08x\n", HSB_MISC_REG);
+
+	return RT_EOK;
+}
+
+static rt_err_t rt_lcd_control (rt_device_t dev, rt_uint8_t cmd, void *args)
+{
+	switch (cmd)
+	{
+	case RTGRAPHIC_CTRL_RECT_UPDATE:
+		break;
+	case RTGRAPHIC_CTRL_POWERON:
+		break;
+	case RTGRAPHIC_CTRL_POWEROFF:
+		break;
+	case RTGRAPHIC_CTRL_GET_INFO:		
+		rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
+		break;
+	case RTGRAPHIC_CTRL_SET_MODE:
+		break;
+	}
+
+	return RT_EOK;
+}
+
+void rt_hw_lcd_init(void)
+{
+	rt_device_t lcd = rt_malloc(sizeof(struct rt_device));
+	if (lcd == RT_NULL)
+		return; /* no memory yet */
+
+	_lcd_info.bits_per_pixel = 16;
+	_lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
+	_lcd_info.framebuffer = (rt_uint8_t*)HW_FB_ADDR;
+	_lcd_info.width = RT_HW_LCD_WIDTH;
+	_lcd_info.height = RT_HW_LCD_HEIGHT;
+
+	/* init device structure */
+	lcd->type = RT_Device_Class_Graphic;
+	lcd->init = rt_lcd_init;
+	lcd->open = RT_NULL;
+	lcd->close = RT_NULL;
+	lcd->control = rt_lcd_control;
+	lcd->user_data = (void*)&_lcd_info;
+	
+	/* register lcd device to RT-Thread */
+	rt_device_register(lcd, "lcd", RT_DEVICE_FLAG_RDWR);
+}

bsp/dev3210/newlib_stub.c

@@ -1,43 +1,43 @@
-/*
- * File      : newlib_stub.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- */
-
-#include <rtthread.h>
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <sys/time.h>
-
-/* some newlib leaked function in CodeSourcery G++ Lite for MIPS version */
-
-int getpid(void)
-{
-	return 0;
-}
-
-int gettimeofday(struct timeval *__tp, void *__tzp)
-{
-	struct timespec tp;
-
-	if (libc_get_time(&tp) == 0)
-	{
-		if (__tp != RT_NULL)
-		{
-			__tp->tv_sec  = tp.tv_sec;
-			__tp->tv_usec = tp.tv_nsec * 1000UL;
-		}
-
-		return tp.tv_sec;
-	}
-
-	return 0;
-}
+/*
+ * File      : newlib_stub.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+#include <rtthread.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/time.h>
+
+/* some newlib leaked function in CodeSourcery G++ Lite for MIPS version */
+
+int getpid(void)
+{
+	return 0;
+}
+
+int gettimeofday(struct timeval *__tp, void *__tzp)
+{
+	struct timespec tp;
+
+	if (libc_get_time(&tp) == 0)
+	{
+		if (__tp != RT_NULL)
+		{
+			__tp->tv_sec  = tp.tv_sec;
+			__tp->tv_usec = tp.tv_nsec * 1000UL;
+		}
+
+		return tp.tv_sec;
+	}
+
+	return 0;
+}

bsp/dev3210/rtconfig.h

@@ -1,164 +1,164 @@
-/* RT-Thread config file */
-#ifndef __RTTHREAD_CFG_H__
-#define __RTTHREAD_CFG_H__
-
-/* RT_NAME_MAX*/
-#define RT_NAME_MAX	10
-
-/* RT_ALIGN_SIZE*/
-#define RT_ALIGN_SIZE	4
-
-/* PRIORITY_MAX */
-#define RT_THREAD_PRIORITY_MAX	256
-
-/* Tick per Second */
-#define RT_TICK_PER_SECOND	100
-
-/* SECTION: RT_DEBUG */
-/* Thread Debug */
-#define RT_DEBUG
-#define RT_USING_OVERFLOW_CHECK
-
-/* Using Hook */
-#define RT_USING_HOOK
-
-/* Using Software Timer */
-/* #define RT_USING_TIMER_SOFT */
-#define RT_TIMER_THREAD_PRIO		4
-#define RT_TIMER_THREAD_STACK_SIZE	512
-#define RT_TIMER_TICK_PER_SECOND	10
-
-/* SECTION: IPC */
-/* Using Semaphore */
-#define RT_USING_SEMAPHORE
-
-/* Using Mutex */
-#define RT_USING_MUTEX
-
-/* Using Event */
-#define RT_USING_EVENT
-
-/* Using MailBox */
-#define RT_USING_MAILBOX
-
-/* Using Message Queue */
-#define RT_USING_MESSAGEQUEUE
-
-/* SECTION: Memory Management */
-/* Using Memory Pool Management*/
-#define RT_USING_MEMPOOL
-
-/* Using Dynamic Heap Management */
-#define RT_USING_HEAP
-
-/* Using SLAB MM */
-#define RT_USING_SLAB
-/* #define RT_USING_SMALL_MEM */
-
-/* SECTION: Device System */
-/* Using Device System */
-#define RT_USING_DEVICE
-#define RT_USING_UART
-#define RT_USING_UART1
-#define RT_UART_RX_BUFFER_SIZE	64
-
-/* SECTION: Console options */
-/* the buffer size of console */
-#define RT_USING_CONSOLE
-#define RT_CONSOLEBUF_SIZE	128
-
-/* SECTION: the runtime libc library */
-/* the runtime libc library */
-/* #define RT_USING_NEWLIB */
-/* #define RT_USING_PTHREADS */
-
-/* SECTION: finsh, a C-Express shell */
-/* Using FinSH as Shell*/
-#define RT_USING_FINSH
-/* Using symbol table */
-#define FINSH_USING_SYMTAB
-#define FINSH_USING_DESCRIPTION
-#define FINSH_DEVICE_NAME "uart"
-
-/* SECTION: device filesystem support */
-#define RT_USING_DFS
-/* #define RT_USING_DFS_ELMFAT */
-#define RT_USING_DFS_ROMFS
-/* #define RT_USING_DFS_DEVFS */
-
-/* the max number of mounted filesystem */
-#define DFS_FILESYSTEMS_MAX			2
-/* the max number of opened files 		*/
-#define DFS_FD_MAX					4
-/* the max number of cached sector 		*/
-#define DFS_CACHE_MAX_NUM   		4
-/* Using working directory */
-#define DFS_USING_WORKDIR
-
-/* SECTION: lwip, a lighwight TCP/IP protocol stack */
-/* #define RT_USING_LWIP */
-#define RT_LWIP_USING_RT_MEM
-
-/* Enable ICMP protocol*/
-#define RT_LWIP_ICMP
-/* Enable UDP protocol*/
-#define RT_LWIP_UDP
-/* Enable TCP protocol*/
-#define RT_LWIP_TCP
-/* Enable DNS */
-#define RT_LWIP_DNS
-
-/* the number of simulatenously active TCP connections*/
-#define RT_LWIP_TCP_PCB_NUM	5
-
-/* ip address of target*/
-#define RT_LWIP_IPADDR0	192
-#define RT_LWIP_IPADDR1	168
-#define RT_LWIP_IPADDR2	1
-#define RT_LWIP_IPADDR3	30
-
-/* gateway address of target*/
-#define RT_LWIP_GWADDR0	192
-#define RT_LWIP_GWADDR1	168
-#define RT_LWIP_GWADDR2	1
-#define RT_LWIP_GWADDR3	1
-
-/* mask address of target*/
-#define RT_LWIP_MSKADDR0	255
-#define RT_LWIP_MSKADDR1	255
-#define RT_LWIP_MSKADDR2	255
-#define RT_LWIP_MSKADDR3	0
-
-/* tcp thread options */
-#define RT_LWIP_TCPTHREAD_PRIORITY		12
-#define RT_LWIP_TCPTHREAD_MBOX_SIZE		4
-#define RT_LWIP_TCPTHREAD_STACKSIZE		1024
-
-/* ethernet if thread options */
-#define RT_LWIP_ETHTHREAD_PRIORITY		15
-#define RT_LWIP_ETHTHREAD_MBOX_SIZE		4
-#define RT_LWIP_ETHTHREAD_STACKSIZE		512
-
-/* SECTION: RT-Thread/GUI */
-#define RT_USING_RTGUI
-
-/* name length of RTGUI object */
-#define RTGUI_NAME_MAX		12
-/* support 16 weight font */
-#define RTGUI_USING_FONT16
-/* support 12 weight font */
-#define RTGUI_USING_FONT12
-/* support Chinese font */
-#define RTGUI_USING_FONTHZ
-/* use DFS as file interface */
-#define RTGUI_USING_DFS_FILERW
-/* use bmp font as Chinese font */
-#define RTGUI_USING_HZ_BMP
-/* use small size in RTGUI */
-#define RTGUI_USING_SMALL_SIZE
-/* use mouse cursor */
-/* #define RTGUI_USING_MOUSE_CURSOR */
-/* default font size in RTGUI */
-#define RTGUI_DEFAULT_FONT_SIZE	16
-
-#endif
+/* RT-Thread config file */
+#ifndef __RTTHREAD_CFG_H__
+#define __RTTHREAD_CFG_H__
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX	10
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE	4
+
+/* PRIORITY_MAX */
+#define RT_THREAD_PRIORITY_MAX	256
+
+/* Tick per Second */
+#define RT_TICK_PER_SECOND	100
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug */
+#define RT_DEBUG
+#define RT_USING_OVERFLOW_CHECK
+
+/* Using Hook */
+#define RT_USING_HOOK
+
+/* Using Software Timer */
+/* #define RT_USING_TIMER_SOFT */
+#define RT_TIMER_THREAD_PRIO		4
+#define RT_TIMER_THREAD_STACK_SIZE	512
+#define RT_TIMER_TICK_PER_SECOND	10
+
+/* SECTION: IPC */
+/* Using Semaphore */
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex */
+#define RT_USING_MUTEX
+
+/* Using Event */
+#define RT_USING_EVENT
+
+/* Using MailBox */
+#define RT_USING_MAILBOX
+
+/* Using Message Queue */
+#define RT_USING_MESSAGEQUEUE
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+#define RT_USING_MEMPOOL
+
+/* Using Dynamic Heap Management */
+#define RT_USING_HEAP
+
+/* Using SLAB MM */
+#define RT_USING_SLAB
+/* #define RT_USING_SMALL_MEM */
+
+/* SECTION: Device System */
+/* Using Device System */
+#define RT_USING_DEVICE
+#define RT_USING_UART
+#define RT_USING_UART1
+#define RT_UART_RX_BUFFER_SIZE	64
+
+/* SECTION: Console options */
+/* the buffer size of console */
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE	128
+
+/* SECTION: the runtime libc library */
+/* the runtime libc library */
+/* #define RT_USING_NEWLIB */
+/* #define RT_USING_PTHREADS */
+
+/* SECTION: finsh, a C-Express shell */
+/* Using FinSH as Shell*/
+#define RT_USING_FINSH
+/* Using symbol table */
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_DEVICE_NAME "uart"
+
+/* SECTION: device filesystem support */
+#define RT_USING_DFS
+/* #define RT_USING_DFS_ELMFAT */
+#define RT_USING_DFS_ROMFS
+/* #define RT_USING_DFS_DEVFS */
+
+/* the max number of mounted filesystem */
+#define DFS_FILESYSTEMS_MAX			2
+/* the max number of opened files 		*/
+#define DFS_FD_MAX					4
+/* the max number of cached sector 		*/
+#define DFS_CACHE_MAX_NUM   		4
+/* Using working directory */
+#define DFS_USING_WORKDIR
+
+/* SECTION: lwip, a lighwight TCP/IP protocol stack */
+/* #define RT_USING_LWIP */
+#define RT_LWIP_USING_RT_MEM
+
+/* Enable ICMP protocol*/
+#define RT_LWIP_ICMP
+/* Enable UDP protocol*/
+#define RT_LWIP_UDP
+/* Enable TCP protocol*/
+#define RT_LWIP_TCP
+/* Enable DNS */
+#define RT_LWIP_DNS
+
+/* the number of simulatenously active TCP connections*/
+#define RT_LWIP_TCP_PCB_NUM	5
+
+/* ip address of target*/
+#define RT_LWIP_IPADDR0	192
+#define RT_LWIP_IPADDR1	168
+#define RT_LWIP_IPADDR2	1
+#define RT_LWIP_IPADDR3	30
+
+/* gateway address of target*/
+#define RT_LWIP_GWADDR0	192
+#define RT_LWIP_GWADDR1	168
+#define RT_LWIP_GWADDR2	1
+#define RT_LWIP_GWADDR3	1
+
+/* mask address of target*/
+#define RT_LWIP_MSKADDR0	255
+#define RT_LWIP_MSKADDR1	255
+#define RT_LWIP_MSKADDR2	255
+#define RT_LWIP_MSKADDR3	0
+
+/* tcp thread options */
+#define RT_LWIP_TCPTHREAD_PRIORITY		12
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE		4
+#define RT_LWIP_TCPTHREAD_STACKSIZE		1024
+
+/* ethernet if thread options */
+#define RT_LWIP_ETHTHREAD_PRIORITY		15
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE		4
+#define RT_LWIP_ETHTHREAD_STACKSIZE		512
+
+/* SECTION: RT-Thread/GUI */
+#define RT_USING_RTGUI
+
+/* name length of RTGUI object */
+#define RTGUI_NAME_MAX		12
+/* support 16 weight font */
+#define RTGUI_USING_FONT16
+/* support 12 weight font */
+#define RTGUI_USING_FONT12
+/* support Chinese font */
+#define RTGUI_USING_FONTHZ
+/* use DFS as file interface */
+#define RTGUI_USING_DFS_FILERW
+/* use bmp font as Chinese font */
+#define RTGUI_USING_HZ_BMP
+/* use small size in RTGUI */
+#define RTGUI_USING_SMALL_SIZE
+/* use mouse cursor */
+/* #define RTGUI_USING_MOUSE_CURSOR */
+/* default font size in RTGUI */
+#define RTGUI_DEFAULT_FONT_SIZE	16
+
+#endif

bsp/dev3210/rtconfig.py

@@ -1,59 +1,59 @@
-import os
-
-# CPU options
-ARCH='mips'
-CPU ='loongson'
-
-# toolchains options
-CROSS_TOOL  = 'gcc'
-
-if os.getenv('RTT_CC'):
-	CROSS_TOOL = os.getenv('RTT_CC')
-
-if  CROSS_TOOL == 'gcc':
-	PLATFORM    = 'gcc'
-	EXEC_PATH   = 'C:/Program Files/CodeSourcery/Sourcery_CodeBench_Lite_for_MIPS_ELF/bin'
-elif CROSS_TOOL == 'keil':
-    print '================ERROR============================'
-    print 'Not support keil yet!'
-    print '================================================='
-    exit(0)
-elif CROSS_TOOL == 'iar':
-    print '================ERROR============================'
-    print 'Not support iar yet!'
-    print '================================================='
-    exit(0)
-
-if os.getenv('RTT_EXEC_PATH'):
-	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
-
-BUILD       = 'debug'
-
-PREFIX = 'mips-sde-elf-'
-CC = PREFIX + 'gcc'
-AS = PREFIX + 'gcc'
-AR = PREFIX + 'ar'
-LINK = PREFIX + 'gcc'
-TARGET_EXT = 'elf'
-SIZE = PREFIX + 'size'
-OBJDUMP = PREFIX + 'objdump'
-OBJCPY = PREFIX + 'objcopy'
-READELF = PREFIX + 'readelf'
-
-DEVICE = ' -mips2'
-CFLAGS = DEVICE + ' -EL -G0 -mno-abicalls -fno-pic -fno-builtin -fno-exceptions -ffunction-sections -fomit-frame-pointer'
-AFLAGS = ' -c' + DEVICE + ' -EL -fno-pic -fno-builtin -mno-abicalls -x assembler-with-cpp'
-LFLAGS = DEVICE + ' -EL -Wl,--gc-sections,-Map=rtthread-3210.map,-cref,-u,Reset_Handler -T dev3210_ram.lds'
-
-CPATH = ''
-LPATH = ''
-
-if BUILD == 'debug':
-    CFLAGS += ' -O0 -gdwarf-2'
-    AFLAGS += ' -gdwarf-2'
-else:
-    CFLAGS += ' -O2'
-
-DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
-READELF_ACTION = READELF + ' -a $TARGET > rtt.map\n'
-POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+import os
+
+# CPU options
+ARCH='mips'
+CPU ='loongson'
+
+# toolchains options
+CROSS_TOOL  = 'gcc'
+
+if os.getenv('RTT_CC'):
+	CROSS_TOOL = os.getenv('RTT_CC')
+
+if  CROSS_TOOL == 'gcc':
+	PLATFORM    = 'gcc'
+	EXEC_PATH   = 'C:/Program Files/CodeSourcery/Sourcery_CodeBench_Lite_for_MIPS_ELF/bin'
+elif CROSS_TOOL == 'keil':
+    print '================ERROR============================'
+    print 'Not support keil yet!'
+    print '================================================='
+    exit(0)
+elif CROSS_TOOL == 'iar':
+    print '================ERROR============================'
+    print 'Not support iar yet!'
+    print '================================================='
+    exit(0)
+
+if os.getenv('RTT_EXEC_PATH'):
+	EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD       = 'debug'
+
+PREFIX = 'mips-sde-elf-'
+CC = PREFIX + 'gcc'
+AS = PREFIX + 'gcc'
+AR = PREFIX + 'ar'
+LINK = PREFIX + 'gcc'
+TARGET_EXT = 'elf'
+SIZE = PREFIX + 'size'
+OBJDUMP = PREFIX + 'objdump'
+OBJCPY = PREFIX + 'objcopy'
+READELF = PREFIX + 'readelf'
+
+DEVICE = ' -mips2'
+CFLAGS = DEVICE + ' -EL -G0 -mno-abicalls -fno-pic -fno-builtin -fno-exceptions -ffunction-sections -fomit-frame-pointer'
+AFLAGS = ' -c' + DEVICE + ' -EL -fno-pic -fno-builtin -mno-abicalls -x assembler-with-cpp'
+LFLAGS = DEVICE + ' -EL -Wl,--gc-sections,-Map=rtthread-3210.map,-cref,-u,Reset_Handler -T dev3210_ram.lds'
+
+CPATH = ''
+LPATH = ''
+
+if BUILD == 'debug':
+    CFLAGS += ' -O0 -gdwarf-2'
+    AFLAGS += ' -gdwarf-2'
+else:
+    CFLAGS += ' -O2'
+
+DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
+READELF_ACTION = READELF + ' -a $TARGET > rtt.map\n'
+POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

bsp/dev3210/uart.c

@@ -1,295 +1,295 @@
-/*
- * File      : uart.c
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- */
-
-#include <rthw.h>
-#include <rtthread.h>
-
-#include <soc3210.h>
-
-/**
- * @addtogroup Loongson SoC3210
- */
-
-/*@{*/
-#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)
-
-/* UART interrupt enable register value */
-#define UARTIER_IME		(1 << 3)
-#define UARTIER_ILE		(1 << 2) 
-#define UARTIER_ITXE	(1 << 1)
-#define UARTIER_IRXE	(1 << 0)
-
-/* UART line control register value */
-#define UARTLCR_DLAB	(1 << 7)
-#define UARTLCR_BCB		(1 << 6)
-#define UARTLCR_SPB		(1 << 5)
-#define UARTLCR_EPS		(1 << 4)
-#define UARTLCR_PE		(1 << 3)
-#define UARTLCR_SB		(1 << 2)
-
-/* UART line status register value */
-#define UARTLSR_ERROR	(1 << 7)
-#define UARTLSR_TE		(1 << 6)
-#define UARTLSR_TFE		(1 << 5)
-#define UARTLSR_BI		(1 << 4)
-#define UARTLSR_FE		(1 << 3)
-#define UARTLSR_PE		(1 << 2)
-#define UARTLSR_OE		(1 << 1)
-#define UARTLSR_DR		(1 << 0)
-
-struct rt_uart_soc3210
-{
-	struct rt_device parent;
-
-	rt_uint32_t hw_base;
-	rt_uint32_t irq;
-
-	/* buffer for reception */
-	rt_uint8_t read_index, save_index;
-	rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
-}uart_device;
-
-static void rt_uart_irqhandler(int irqno)
-{
-	rt_ubase_t level;
-	rt_uint8_t isr;
-	struct rt_uart_soc3210* uart = &uart_device;
-
-	/* read interrupt status and clear it */
-	isr = UART_IIR(uart->hw_base);
-	isr = (isr >> 1) & 0x3;
-
-	if (isr & 0x02) /* receive data available */
-	{
-		/* Receive Data Available */
-		while (UART_LSR(uart->hw_base) & UARTLSR_DR)
-		{
-			uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);
-
-			level = rt_hw_interrupt_disable();
-			uart->save_index ++;
-			if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
-				uart->save_index = 0;
-			rt_hw_interrupt_enable(level);
-		}
-
-		/* invoke callback */
-		if (uart->parent.rx_indicate != RT_NULL)
-		{
-			rt_size_t length;
-			if (uart->read_index > uart->save_index)
-				length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
-			else
-				length = uart->save_index - uart->read_index;
-
-			uart->parent.rx_indicate(&uart->parent, length);
-		}
-	}
-
-	return;
-}
-
-static rt_err_t rt_uart_init (rt_device_t dev)
-{
-	rt_uint32_t baud_div;
-	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;
-
-	RT_ASSERT(uart != RT_NULL);
-
-#if 0
-	/* init UART Hardware */
-	UART_IER(uart->hw_base) = 0; /* clear interrupt */
-	UART_FCR(uart->hw_base) = 0x60; /* reset UART Rx/Tx */
-
-	/* enable UART clock */
-	/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
-	UART_LCR(uart->hw_base) = 0x3;
-
-    /* set baudrate */
-	baud_div = DEV_CLK / 16 / UART_BAUDRATE;
-	UART_LCR(uart->hw_base) |= UARTLCR_DLAB;
-
-	UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;
-	UART_LSB(uart->hw_base) = baud_div & 0xff;
-
-	UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
-
-	/* Enable UART unit, enable and clear FIFO */
-	UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
-#endif
-
-	return RT_EOK;
-}
-
-static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
-{
-	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;
-
-	RT_ASSERT(uart != RT_NULL);
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* Enable the UART Interrupt */
-		UART_IER(uart->hw_base) |= UARTIER_IRXE;
-
-		/* install interrupt */
-		rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL);
-		rt_hw_interrupt_umask(uart->irq);
-	}
-	return RT_EOK;
-}
-
-static rt_err_t rt_uart_close(rt_device_t dev)
-{
-	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;
-
-	RT_ASSERT(uart != RT_NULL);
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		/* Disable the UART Interrupt */
-		UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);
-	}
-
-	return RT_EOK;
-}
-
-static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
-{
-	rt_uint8_t *ptr;
-	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210 *)dev;
-
-	RT_ASSERT(uart != RT_NULL);
-
-	/* point to buffer */
-	ptr = (rt_uint8_t*) buffer;
-	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
-	{
-		while (size)
-		{
-			/* interrupt receive */
-			rt_base_t level;
-
-			/* disable interrupt */
-			level = rt_hw_interrupt_disable();
-			if (uart->read_index != uart->save_index)
-			{
-				*ptr = uart->rx_buffer[uart->read_index];
-
-				uart->read_index ++;
-				if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
-					uart->read_index = 0;
-			}
-			else
-			{
-				/* no data in rx buffer */
-
-				/* enable interrupt */
-				rt_hw_interrupt_enable(level);
-				break;
-			}
-
-			/* enable interrupt */
-			rt_hw_interrupt_enable(level);
-
-			ptr ++;
-			size --;
-		}
-
-		return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
-	}
-
-	return 0;
-}
-
-static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
-{
-	char *ptr;
-	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210 *)dev;
-
-	RT_ASSERT(uart != RT_NULL);
-
-	ptr = (char *)buffer;
-
-	if (dev->flag & RT_DEVICE_FLAG_STREAM)
-	{
-		/* stream mode */
-		while (size)
-		{
-			if (*ptr == '\n')
-			{
-				/* FIFO status, contain valid data */
-				while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
-				/* write data */
-				UART_DAT(uart->hw_base) = '\r';
-			}
-
-			/* FIFO status, contain valid data */
-			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
-			/* write data */
-			UART_DAT(uart->hw_base) = *ptr;
-
-			ptr ++;
-			size --;
-		}
-	}
-	else
-	{
-		while (size != 0)
-		{
-			/* FIFO status, contain valid data */
-			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
-
-			/* write data */
-			UART_DAT(uart->hw_base) = *ptr;
-
-			ptr++;
-			size--;
-		}
-	}
-
-	return (rt_size_t) ptr - (rt_size_t) buffer;
-}
-
-void rt_hw_uart_init(void)
-{
-	struct rt_uart_soc3210 *uart;
-
-	/* get uart device */
-	uart = &uart_device;
-
-	/* device initialization */
-	uart->parent.type = RT_Device_Class_Char;
-	rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
-	uart->read_index = uart->save_index = 0;
-#if defined(RT_USING_UART1)
-	uart->hw_base = UART0_BASE;
-	uart->irq = IRQ_UART0;
-#elif defined(RT_USING_UART2)
-	uart->hw_base = UART1_BASE;
-	uart->irq = IRQ_UART1;
-#endif
-
-	/* device interface */
-	uart->parent.init 	    = rt_uart_init;
-	uart->parent.open 	    = rt_uart_open;
-	uart->parent.close      = rt_uart_close;
-	uart->parent.read 	    = rt_uart_read;
-	uart->parent.write      = rt_uart_write;
-	uart->parent.control    = RT_NULL;
-	uart->parent.user_data  = RT_NULL;
-
-	rt_device_register(&uart->parent,
-		"uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);
-}
-#endif /* end of UART */
-
-/*@}*/
+/*
+ * File      : uart.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include <soc3210.h>
+
+/**
+ * @addtogroup Loongson SoC3210
+ */
+
+/*@{*/
+#if defined(RT_USING_UART) && defined(RT_USING_DEVICE)
+
+/* UART interrupt enable register value */
+#define UARTIER_IME		(1 << 3)
+#define UARTIER_ILE		(1 << 2) 
+#define UARTIER_ITXE	(1 << 1)
+#define UARTIER_IRXE	(1 << 0)
+
+/* UART line control register value */
+#define UARTLCR_DLAB	(1 << 7)
+#define UARTLCR_BCB		(1 << 6)
+#define UARTLCR_SPB		(1 << 5)
+#define UARTLCR_EPS		(1 << 4)
+#define UARTLCR_PE		(1 << 3)
+#define UARTLCR_SB		(1 << 2)
+
+/* UART line status register value */
+#define UARTLSR_ERROR	(1 << 7)
+#define UARTLSR_TE		(1 << 6)
+#define UARTLSR_TFE		(1 << 5)
+#define UARTLSR_BI		(1 << 4)
+#define UARTLSR_FE		(1 << 3)
+#define UARTLSR_PE		(1 << 2)
+#define UARTLSR_OE		(1 << 1)
+#define UARTLSR_DR		(1 << 0)
+
+struct rt_uart_soc3210
+{
+	struct rt_device parent;
+
+	rt_uint32_t hw_base;
+	rt_uint32_t irq;
+
+	/* buffer for reception */
+	rt_uint8_t read_index, save_index;
+	rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
+}uart_device;
+
+static void rt_uart_irqhandler(int irqno)
+{
+	rt_ubase_t level;
+	rt_uint8_t isr;
+	struct rt_uart_soc3210* uart = &uart_device;
+
+	/* read interrupt status and clear it */
+	isr = UART_IIR(uart->hw_base);
+	isr = (isr >> 1) & 0x3;
+
+	if (isr & 0x02) /* receive data available */
+	{
+		/* Receive Data Available */
+		while (UART_LSR(uart->hw_base) & UARTLSR_DR)
+		{
+			uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);
+
+			level = rt_hw_interrupt_disable();
+			uart->save_index ++;
+			if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
+				uart->save_index = 0;
+			rt_hw_interrupt_enable(level);
+		}
+
+		/* invoke callback */
+		if (uart->parent.rx_indicate != RT_NULL)
+		{
+			rt_size_t length;
+			if (uart->read_index > uart->save_index)
+				length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
+			else
+				length = uart->save_index - uart->read_index;
+
+			uart->parent.rx_indicate(&uart->parent, length);
+		}
+	}
+
+	return;
+}
+
+static rt_err_t rt_uart_init (rt_device_t dev)
+{
+	rt_uint32_t baud_div;
+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;
+
+	RT_ASSERT(uart != RT_NULL);
+
+#if 0
+	/* init UART Hardware */
+	UART_IER(uart->hw_base) = 0; /* clear interrupt */
+	UART_FCR(uart->hw_base) = 0x60; /* reset UART Rx/Tx */
+
+	/* enable UART clock */
+	/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
+	UART_LCR(uart->hw_base) = 0x3;
+
+    /* set baudrate */
+	baud_div = DEV_CLK / 16 / UART_BAUDRATE;
+	UART_LCR(uart->hw_base) |= UARTLCR_DLAB;
+
+	UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;
+	UART_LSB(uart->hw_base) = baud_div & 0xff;
+
+	UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
+
+	/* Enable UART unit, enable and clear FIFO */
+	UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
+#endif
+
+	return RT_EOK;
+}
+
+static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
+{
+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;
+
+	RT_ASSERT(uart != RT_NULL);
+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+	{
+		/* Enable the UART Interrupt */
+		UART_IER(uart->hw_base) |= UARTIER_IRXE;
+
+		/* install interrupt */
+		rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL);
+		rt_hw_interrupt_umask(uart->irq);
+	}
+	return RT_EOK;
+}
+
+static rt_err_t rt_uart_close(rt_device_t dev)
+{
+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210*)dev;
+
+	RT_ASSERT(uart != RT_NULL);
+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+	{
+		/* Disable the UART Interrupt */
+		UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);
+	}
+
+	return RT_EOK;
+}
+
+static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
+{
+	rt_uint8_t *ptr;
+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210 *)dev;
+
+	RT_ASSERT(uart != RT_NULL);
+
+	/* point to buffer */
+	ptr = (rt_uint8_t*) buffer;
+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+	{
+		while (size)
+		{
+			/* interrupt receive */
+			rt_base_t level;
+
+			/* disable interrupt */
+			level = rt_hw_interrupt_disable();
+			if (uart->read_index != uart->save_index)
+			{
+				*ptr = uart->rx_buffer[uart->read_index];
+
+				uart->read_index ++;
+				if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
+					uart->read_index = 0;
+			}
+			else
+			{
+				/* no data in rx buffer */
+
+				/* enable interrupt */
+				rt_hw_interrupt_enable(level);
+				break;
+			}
+
+			/* enable interrupt */
+			rt_hw_interrupt_enable(level);
+
+			ptr ++;
+			size --;
+		}
+
+		return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+	}
+
+	return 0;
+}
+
+static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
+{
+	char *ptr;
+	struct rt_uart_soc3210 *uart = (struct rt_uart_soc3210 *)dev;
+
+	RT_ASSERT(uart != RT_NULL);
+
+	ptr = (char *)buffer;
+
+	if (dev->flag & RT_DEVICE_FLAG_STREAM)
+	{
+		/* stream mode */
+		while (size)
+		{
+			if (*ptr == '\n')
+			{
+				/* FIFO status, contain valid data */
+				while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
+				/* write data */
+				UART_DAT(uart->hw_base) = '\r';
+			}
+
+			/* FIFO status, contain valid data */
+			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
+			/* write data */
+			UART_DAT(uart->hw_base) = *ptr;
+
+			ptr ++;
+			size --;
+		}
+	}
+	else
+	{
+		while (size != 0)
+		{
+			/* FIFO status, contain valid data */
+			while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
+
+			/* write data */
+			UART_DAT(uart->hw_base) = *ptr;
+
+			ptr++;
+			size--;
+		}
+	}
+
+	return (rt_size_t) ptr - (rt_size_t) buffer;
+}
+
+void rt_hw_uart_init(void)
+{
+	struct rt_uart_soc3210 *uart;
+
+	/* get uart device */
+	uart = &uart_device;
+
+	/* device initialization */
+	uart->parent.type = RT_Device_Class_Char;
+	rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
+	uart->read_index = uart->save_index = 0;
+#if defined(RT_USING_UART1)
+	uart->hw_base = UART0_BASE;
+	uart->irq = IRQ_UART0;
+#elif defined(RT_USING_UART2)
+	uart->hw_base = UART1_BASE;
+	uart->irq = IRQ_UART1;
+#endif
+
+	/* device interface */
+	uart->parent.init 	    = rt_uart_init;
+	uart->parent.open 	    = rt_uart_open;
+	uart->parent.close      = rt_uart_close;
+	uart->parent.read 	    = rt_uart_read;
+	uart->parent.write      = rt_uart_write;
+	uart->parent.control    = RT_NULL;
+	uart->parent.user_data  = RT_NULL;
+
+	rt_device_register(&uart->parent,
+		"uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX);
+}
+#endif /* end of UART */
+
+/*@}*/

bsp/dev3210/uart.h

@@ -1,19 +1,19 @@
-/*
- * File      : uart.h
- * This file is part of RT-Thread RTOS
- * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rt-thread.org/license/LICENSE
- *
- * Change Logs:
- * Date           Author       Notes
- */
-
-#ifndef __UART_H__
-#define __UART_H__
-
-void rt_hw_uart_init(void);
-
-#endif
+/*
+ * File      : uart.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009 - 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+#ifndef __UART_H__
+#define __UART_H__
+
+void rt_hw_uart_init(void);
+
+#endif

bsp/efm32/EFM32GG_DK3750/dvk.c

@@ -1,576 +1,576 @@
-/**************************************************************************//**
- * @file
- * @brief EFM32GG_DK3750 board support package
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-/**************************************************************************//**
- * @addtogroup BSP
- * @{
- *****************************************************************************/
-
-#include "efm32.h"
-#include "em_gpio.h"
-#include "em_cmu.h"
-#include "em_usart.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-/** Keep intialization mode */
-DVK_Init_TypeDef dvkOperationMode;
-
-/**************************************************************************//**
- * @brief Initialize EFM32GG_DK3750 board support package functionality
- * @param[in] mode Initialize in EBI or SPI mode
- *****************************************************************************/
-void DVK_init(DVK_Init_TypeDef mode)
-{
-  bool ret = false;
-
-  if (mode == DVK_Init_EBI)
-  {
-    dvkOperationMode = mode;
-    DVK_busControlMode(DVK_BusControl_EBI);
-    ret = DVK_EBI_init();
-  }
-  if (mode == DVK_Init_SPI)
-  {
-    dvkOperationMode = mode;
-    DVK_busControlMode(DVK_BusControl_SPI);
-    ret = DVK_SPI_init();
-  }
-
-  if (ret == false)
-  {
-    /* Unable to access board control, this is an abornomal situation. */
-    /* Try to restart kit and reprogram EFM32 with a standard example */
-    /* as this is most likely caused by a peripheral misconfiguration. */
-    while (1) ;
-  }
-
-  DVK_setEnergyMode(0);
-}
-
-
-/**************************************************************************//**
- * @brief Disable EFM32GG_DK3750 board support package functionality
- *****************************************************************************/
-void DVK_disable(void)
-{
-  if (dvkOperationMode == DVK_Init_EBI)
-  {
-    DVK_EBI_disable();
-  }
-  if (dvkOperationMode == DVK_Init_SPI)
-  {
-    DVK_SPI_disable();
-  }
-  DVK_busControlMode(DVK_BusControl_OFF);
-}
-
-
-/**************************************************************************//**
- * @brief Configure Board Controller bus decode logic
- * @param[in] mode Mode of operation for decode logic
- *****************************************************************************/
-void DVK_busControlMode(DVK_BusControl_TypeDef mode)
-{
-  /* Configure GPIO pins for Board Bus mode */
-  /* Note: Inverter on GPIO lines to BC, so signals are active low */
-  CMU_ClockEnable(cmuClock_GPIO, true);
-
-  switch (mode)
-  {
-  case DVK_BusControl_OFF:
-    /* Configure board for OFF mode on PB15 MCU_EBI_CONNECT */
-    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
-    /* Configure board for OFF mode on PD13 MCU_SPI_CONNECT */
-    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
-    break;
-  case DVK_BusControl_DIRECT:
-    /* Configure board for DIRECT on PB15 MCU_EBI_CONNECT */
-    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
-    /* Configure board for DIRECT on PD13 MCU_SPI_CONNECT */
-    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
-    break;
-  case DVK_BusControl_SPI:
-    /* Configure board for SPI mode on PB15 MCU_EBI_CONNECT */
-    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
-    /* Configure board for SPI mode on PD13 MCU_SPI_CONNECT */
-    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
-    break;
-  case DVK_BusControl_EBI:
-  default:
-    /* Configure board for EBI mode on PB15 MCU_EBI_CONNECT */
-    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
-    /* Configure board for EBI mode on PD13 MCU_SPI_CONNECT */
-    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
-    break;
-  }
-}
-
-
-/**************************************************************************//**
- * @brief Set board LEDs
- *
- * @param[in] leds
- *    16 bits enabling or disabling individual board LEDs
- *****************************************************************************/
-void DVK_setLEDs(uint16_t leds)
-{
-  DVK_writeRegister(&BC_REGISTER->UIF_LEDS, leds);
-}
-
-
-/**************************************************************************//**
- * @brief Get board LED configuration
- *
- * @return
- *    16 bits of LED status
- *****************************************************************************/
-uint16_t DVK_getLEDs(void)
-{
-  return DVK_readRegister(&BC_REGISTER->UIF_LEDS);
-}
-
-
-/**************************************************************************//**
- * @brief DK3750 Peripheral Access Control
- *    Enable or disable access to on-board peripherals through switches
- *    and SPI switch where applicable. Turn off conflicting peripherals when
- *    enabling another.
- * @param[in] perf
- *    Which peripheral to configure
- * @param[in] enable
- *    If true, sets up access to peripheral, if false disables it
- *****************************************************************************/
-void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
-{
-  uint16_t perfControl;
-
-  perfControl = DVK_readRegister(&BC_REGISTER->PERICON);
-
-  /* Enable or disable the specificed peripheral by setting board control switch */
-  if (enable)
-  {
-    switch (perf)
-    {
-    case DVK_RS232_SHUTDOWN:
-      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
-      break;
-
-    case DVK_RS232_UART:
-      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
-      perfControl |= (1 << BC_PERICON_RS232_UART_SHIFT);
-      break;
-
-    case DVK_RS232_LEUART:
-      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
-      perfControl |= (1 << BC_PERICON_RS232_LEUART_SHIFT);
-      break;
-
-    case DVK_I2C:
-      perfControl |= (1 << BC_PERICON_I2C_SHIFT);
-      break;
-
-    case DVK_ETH:
-      /* Enable SPI interface */
-      DVK_spiControl(DVK_SPI_Ethernet);
-
-      /* Enable Ethernet analog switches */
-      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl |= (1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-
-      /* Disable Analog Diff Input - pins PD0 and PD1 is shared */
-      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
-      /* Disable Touch Inputs - pin PD3 is shared */
-      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
-      /* Disable Analog SE Input - pin PD2 is shared */
-      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
-      break;
-
-    case DVK_I2S:
-      /* Direct SPI interface to I2S DAC */
-      DVK_spiControl(DVK_SPI_Audio);
-
-      /* Also make surea Audio out is connected for I2S operation */
-      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
-      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
-      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-
-      /* Disable Analog Diff Input - pins PD0 and PD1 is shared */
-      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
-      /* Disable Touch Inputs - pin PD3 is shared */
-      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
-      /* Disable Analog SE Input - pin PD2 is shared */
-      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
-      break;
-
-    case DVK_TRACE:
-      perfControl |= (1 << BC_PERICON_TRACE_SHIFT);
-      break;
-
-    case DVK_TOUCH:
-      perfControl |= (1 << BC_PERICON_TOUCH_SHIFT);
-      /* Disconnect SPI switch, pin PD3 is shared */
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-      DVK_spiControl(DVK_SPI_OFF);
-      break;
-
-    case DVK_AUDIO_IN:
-      perfControl |= (1 << BC_PERICON_AUDIO_IN_SHIFT);
-      break;
-
-    case DVK_AUDIO_OUT:
-      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
-      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
-      break;
-
-    case DVK_ANALOG_DIFF:
-      perfControl |= (1 << BC_PERICON_ANALOG_DIFF_SHIFT);
-      /* Disconnect SPI switch, pin PD0 and PD1 is shared */
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-      DVK_spiControl(DVK_SPI_OFF);
-      break;
-
-    case DVK_ANALOG_SE:
-      perfControl |= (1 << BC_PERICON_ANALOG_SE_SHIFT);
-      /* Disconnect SPI switch, pin PD2 is shared */
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-      DVK_spiControl(DVK_SPI_OFF);
-      break;
-
-    case DVK_MICROSD:
-      perfControl |= (1 << BC_PERICON_SPI_SHIFT);
-      break;
-
-    case DVK_TFT:
-      /* Enable SPI to SSD2119 */
-      DVK_spiControl(DVK_SPI_Display);
-      /* Enable SPI analog switch */
-      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
-      /* Disable Analog Diff Input - pins D0 and D1 is shared */
-      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
-      /* Disable Touch Inputs - pin D3 is shared */
-      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
-      /* Disable Analog SE Input - pin D2 is shared */
-      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
-      break;
-    }
-  }
-  else
-  {
-    switch (perf)
-    {
-    case DVK_RS232_SHUTDOWN:
-      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
-      break;
-
-    case DVK_RS232_UART:
-      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
-      break;
-
-    case DVK_RS232_LEUART:
-      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
-      break;
-
-    case DVK_I2C:
-      perfControl &= ~(1 << BC_PERICON_I2C_SHIFT);
-      break;
-
-    case DVK_ETH:
-      /* Disable SPI interface */
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-      DVK_spiControl(DVK_SPI_OFF);
-      break;
-
-    case DVK_I2S:
-      /* Disable SPI interface and audio out */
-      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-      DVK_spiControl(DVK_SPI_OFF);
-      break;
-
-    case DVK_TRACE:
-      perfControl &= ~(1 << BC_PERICON_TRACE_SHIFT);
-      break;
-
-    case DVK_TOUCH:
-      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
-      break;
-
-    case DVK_AUDIO_IN:
-      perfControl &= ~(1 << BC_PERICON_AUDIO_IN_SHIFT);
-      break;
-
-    case DVK_AUDIO_OUT:
-      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
-      break;
-
-    case DVK_ANALOG_DIFF:
-      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
-      break;
-
-    case DVK_ANALOG_SE:
-      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
-      break;
-
-    case DVK_MICROSD:
-      perfControl &= ~(1 << BC_PERICON_SPI_SHIFT);
-      break;
-
-    case DVK_TFT:
-      /* Disable SPI interface */
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
-      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
-      DVK_spiControl(DVK_SPI_OFF);
-      break;
-    }
-  }
-  /* Write back register */
-  DVK_writeRegister(&BC_REGISTER->PERICON, perfControl);
-}
-
-
-/**************************************************************************//**
- * @brief Get status of push buttons on kit
- *
- * @return
- *    Button state, each bit representing each push button PB0-PB4
- *****************************************************************************/
-uint16_t DVK_getPushButtons(void)
-{
-  uint16_t tmp;
-
-  tmp = DVK_readRegister(&BC_REGISTER->UIF_PB);
-
-  return (~tmp) & 0x000F;
-}
-
-
-/**************************************************************************//**
- * @brief Configure SPI for correct peripheral
- *
- * @param[in] device
- *    Device to enable SPI bus for
- *****************************************************************************/
-void DVK_spiControl(DVK_SpiControl_TypeDef device)
-{
-  switch (device)
-  {
-  case DVK_SPI_Audio:
-    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_AUDIO);
-    break;
-
-  case DVK_SPI_Ethernet:
-    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_ETHERNET);
-    break;
-
-  case DVK_SPI_Display:
-    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_DISPLAY);
-    break;
-
-  case DVK_SPI_OFF:
-    USART_Reset(USART1);
-    CMU_ClockEnable(cmuClock_USART1, false);
-    break;
-  }
-}
-
-
-/**************************************************************************//**
- * @brief Inform AEM/Board Controller about what energy mode we are currently
- *        entering. This information can be used for better visual feedback of
- *        EFM32GG activity for the board controller and PC applications
- * @param energyMode What energy mode we are going to use next
- *****************************************************************************/
-void DVK_setEnergyMode(uint16_t energyMode)
-{
-  DVK_writeRegister(&BC_REGISTER->EM, energyMode);
-}
-
-
-/**************************************************************************//**
- * @brief Enable "Control" buttons/joystick/dip switch interrupts
- * @param flags Board control interrupt flags, INTEN_<something>
- *****************************************************************************/
-void DVK_enableInterrupt(uint16_t flags)
-{
-  uint16_t tmp;
-
-  /* Add flags to interrupt enable register */
-  tmp  = DVK_readRegister(&BC_REGISTER->INTEN);
-  tmp |= flags;
-  DVK_writeRegister(&BC_REGISTER->INTEN, tmp);
-}
-
-
-/**************************************************************************//**
- * @brief Disable "Control" buttons/joystick/dip switch interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_disableInterrupt(uint16_t flags)
-{
-  uint16_t tmp;
-
-  /* Clear flags from interrupt enable register */
-  tmp   = DVK_readRegister(&BC_REGISTER->INTEN);
-  flags = ~(flags);
-  tmp  &= flags;
-  DVK_writeRegister(&BC_REGISTER->INTEN, tmp);
-}
-
-
-/**************************************************************************//**
- * @brief Clear interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_clearInterruptFlags(uint16_t flags)
-{
-  uint16_t tmp;
-  tmp  = DVK_readRegister(&BC_REGISTER->INTFLAG);
-  tmp &= ~(flags);
-  DVK_writeRegister(&BC_REGISTER->INTFLAG, tmp);
-}
-
-
-/**************************************************************************//**
- * @brief Read interrupt flags
- * @return Returns currently triggered interrupts
- *****************************************************************************/
-uint16_t DVK_getInterruptFlags(void)
-{
-  return DVK_readRegister(&BC_REGISTER->INTFLAG);
-}
-
-
-/**************************************************************************//**
- * @brief Get joystick button status
- * @return Joystick controller status
- *****************************************************************************/
-uint16_t DVK_getJoystick(void)
-{
-  uint16_t joyStick = 0;
-
-  joyStick = ~(DVK_readRegister(&BC_REGISTER->UIF_JOYSTICK)) & 0x001f;
-
-  return joyStick;
-}
-
-
-/**************************************************************************//**
- * @brief Get dipswitch status
- *        The DIP switches are free for user programmable purposes
- * @return Dip switch
- *****************************************************************************/
-uint16_t DVK_getDipSwitch(void)
-{
-  return DVK_readRegister(&BC_REGISTER->UIF_DIP) & 0x000f;
-}
-
-
-/**************************************************************************//**
- * @brief Configure display control
- *****************************************************************************/
-void DVK_displayControl(DVK_Display_TypeDef option)
-{
-  uint16_t tmp;
-
-  switch (option)
-  {
-  case DVK_Display_EBI:
-    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_EBI);
-    break;
-
-  case DVK_Display_SPI:
-    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_SPI);
-    break;
-
-  case DVK_Display_BC:
-    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_BC);
-    break;
-
-  case DVK_Display_PowerEnable:
-    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
-    tmp |= (BC_DISPLAY_CTRL_POWER_ENABLE);
-    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
-    break;
-
-  case DVK_Display_PowerDisable:
-    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
-    tmp &= ~(BC_DISPLAY_CTRL_POWER_ENABLE);
-    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
-    break;
-
-  case DVK_Display_ResetAssert:
-    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
-    tmp |= (BC_DISPLAY_CTRL_RESET);
-    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
-    break;
-
-  case DVK_Display_ResetRelease:
-    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
-    tmp &= ~(BC_DISPLAY_CTRL_RESET);
-    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
-    break;
-
-  case DVK_Display_Mode8080:
-    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
-    tmp &= ~(BC_DISPLAY_CTRL_MODE_GENERIC);
-    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
-    break;
-
-  case DVK_Display_ModeGeneric:
-    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
-    tmp |= (BC_DISPLAY_CTRL_MODE_GENERIC);
-    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
-    break;
-
-  default:
-    /* Unknown command */
-    while (1) ;
-  }
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/**************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ *****************************************************************************/
+
+#include "efm32.h"
+#include "em_gpio.h"
+#include "em_cmu.h"
+#include "em_usart.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+/** Keep intialization mode */
+DVK_Init_TypeDef dvkOperationMode;
+
+/**************************************************************************//**
+ * @brief Initialize EFM32GG_DK3750 board support package functionality
+ * @param[in] mode Initialize in EBI or SPI mode
+ *****************************************************************************/
+void DVK_init(DVK_Init_TypeDef mode)
+{
+  bool ret = false;
+
+  if (mode == DVK_Init_EBI)
+  {
+    dvkOperationMode = mode;
+    DVK_busControlMode(DVK_BusControl_EBI);
+    ret = DVK_EBI_init();
+  }
+  if (mode == DVK_Init_SPI)
+  {
+    dvkOperationMode = mode;
+    DVK_busControlMode(DVK_BusControl_SPI);
+    ret = DVK_SPI_init();
+  }
+
+  if (ret == false)
+  {
+    /* Unable to access board control, this is an abornomal situation. */
+    /* Try to restart kit and reprogram EFM32 with a standard example */
+    /* as this is most likely caused by a peripheral misconfiguration. */
+    while (1) ;
+  }
+
+  DVK_setEnergyMode(0);
+}
+
+
+/**************************************************************************//**
+ * @brief Disable EFM32GG_DK3750 board support package functionality
+ *****************************************************************************/
+void DVK_disable(void)
+{
+  if (dvkOperationMode == DVK_Init_EBI)
+  {
+    DVK_EBI_disable();
+  }
+  if (dvkOperationMode == DVK_Init_SPI)
+  {
+    DVK_SPI_disable();
+  }
+  DVK_busControlMode(DVK_BusControl_OFF);
+}
+
+
+/**************************************************************************//**
+ * @brief Configure Board Controller bus decode logic
+ * @param[in] mode Mode of operation for decode logic
+ *****************************************************************************/
+void DVK_busControlMode(DVK_BusControl_TypeDef mode)
+{
+  /* Configure GPIO pins for Board Bus mode */
+  /* Note: Inverter on GPIO lines to BC, so signals are active low */
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  switch (mode)
+  {
+  case DVK_BusControl_OFF:
+    /* Configure board for OFF mode on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
+    /* Configure board for OFF mode on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
+    break;
+  case DVK_BusControl_DIRECT:
+    /* Configure board for DIRECT on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
+    /* Configure board for DIRECT on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
+    break;
+  case DVK_BusControl_SPI:
+    /* Configure board for SPI mode on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 1);
+    /* Configure board for SPI mode on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 0);
+    break;
+  case DVK_BusControl_EBI:
+  default:
+    /* Configure board for EBI mode on PB15 MCU_EBI_CONNECT */
+    GPIO_PinModeSet(gpioPortB, 15, gpioModePushPull, 0);
+    /* Configure board for EBI mode on PD13 MCU_SPI_CONNECT */
+    GPIO_PinModeSet(gpioPortD, 13, gpioModePushPull, 1);
+    break;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Set board LEDs
+ *
+ * @param[in] leds
+ *    16 bits enabling or disabling individual board LEDs
+ *****************************************************************************/
+void DVK_setLEDs(uint16_t leds)
+{
+  DVK_writeRegister(&BC_REGISTER->UIF_LEDS, leds);
+}
+
+
+/**************************************************************************//**
+ * @brief Get board LED configuration
+ *
+ * @return
+ *    16 bits of LED status
+ *****************************************************************************/
+uint16_t DVK_getLEDs(void)
+{
+  return DVK_readRegister(&BC_REGISTER->UIF_LEDS);
+}
+
+
+/**************************************************************************//**
+ * @brief DK3750 Peripheral Access Control
+ *    Enable or disable access to on-board peripherals through switches
+ *    and SPI switch where applicable. Turn off conflicting peripherals when
+ *    enabling another.
+ * @param[in] perf
+ *    Which peripheral to configure
+ * @param[in] enable
+ *    If true, sets up access to peripheral, if false disables it
+ *****************************************************************************/
+void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable)
+{
+  uint16_t perfControl;
+
+  perfControl = DVK_readRegister(&BC_REGISTER->PERICON);
+
+  /* Enable or disable the specificed peripheral by setting board control switch */
+  if (enable)
+  {
+    switch (perf)
+    {
+    case DVK_RS232_SHUTDOWN:
+      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      break;
+
+    case DVK_RS232_UART:
+      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
+      perfControl |= (1 << BC_PERICON_RS232_UART_SHIFT);
+      break;
+
+    case DVK_RS232_LEUART:
+      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
+      perfControl |= (1 << BC_PERICON_RS232_LEUART_SHIFT);
+      break;
+
+    case DVK_I2C:
+      perfControl |= (1 << BC_PERICON_I2C_SHIFT);
+      break;
+
+    case DVK_ETH:
+      /* Enable SPI interface */
+      DVK_spiControl(DVK_SPI_Ethernet);
+
+      /* Enable Ethernet analog switches */
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+
+      /* Disable Analog Diff Input - pins PD0 and PD1 is shared */
+      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
+      /* Disable Touch Inputs - pin PD3 is shared */
+      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
+      /* Disable Analog SE Input - pin PD2 is shared */
+      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
+      break;
+
+    case DVK_I2S:
+      /* Direct SPI interface to I2S DAC */
+      DVK_spiControl(DVK_SPI_Audio);
+
+      /* Also make surea Audio out is connected for I2S operation */
+      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+
+      /* Disable Analog Diff Input - pins PD0 and PD1 is shared */
+      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
+      /* Disable Touch Inputs - pin PD3 is shared */
+      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
+      /* Disable Analog SE Input - pin PD2 is shared */
+      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
+      break;
+
+    case DVK_TRACE:
+      perfControl |= (1 << BC_PERICON_TRACE_SHIFT);
+      break;
+
+    case DVK_TOUCH:
+      perfControl |= (1 << BC_PERICON_TOUCH_SHIFT);
+      /* Disconnect SPI switch, pin PD3 is shared */
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      DVK_spiControl(DVK_SPI_OFF);
+      break;
+
+    case DVK_AUDIO_IN:
+      perfControl |= (1 << BC_PERICON_AUDIO_IN_SHIFT);
+      break;
+
+    case DVK_AUDIO_OUT:
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl |= (1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      break;
+
+    case DVK_ANALOG_DIFF:
+      perfControl |= (1 << BC_PERICON_ANALOG_DIFF_SHIFT);
+      /* Disconnect SPI switch, pin PD0 and PD1 is shared */
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      DVK_spiControl(DVK_SPI_OFF);
+      break;
+
+    case DVK_ANALOG_SE:
+      perfControl |= (1 << BC_PERICON_ANALOG_SE_SHIFT);
+      /* Disconnect SPI switch, pin PD2 is shared */
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      DVK_spiControl(DVK_SPI_OFF);
+      break;
+
+    case DVK_MICROSD:
+      perfControl |= (1 << BC_PERICON_SPI_SHIFT);
+      break;
+
+    case DVK_TFT:
+      /* Enable SPI to SSD2119 */
+      DVK_spiControl(DVK_SPI_Display);
+      /* Enable SPI analog switch */
+      perfControl |= (1 << BC_PERICON_I2S_ETH_SHIFT);
+      /* Disable Analog Diff Input - pins D0 and D1 is shared */
+      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
+      /* Disable Touch Inputs - pin D3 is shared */
+      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
+      /* Disable Analog SE Input - pin D2 is shared */
+      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
+      break;
+    }
+  }
+  else
+  {
+    switch (perf)
+    {
+    case DVK_RS232_SHUTDOWN:
+      perfControl &= ~(1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      break;
+
+    case DVK_RS232_UART:
+      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_UART_SHIFT);
+      break;
+
+    case DVK_RS232_LEUART:
+      perfControl |= (1 << BC_PERICON_RS232_SHUTDOWN_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_RS232_LEUART_SHIFT);
+      break;
+
+    case DVK_I2C:
+      perfControl &= ~(1 << BC_PERICON_I2C_SHIFT);
+      break;
+
+    case DVK_ETH:
+      /* Disable SPI interface */
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      DVK_spiControl(DVK_SPI_OFF);
+      break;
+
+    case DVK_I2S:
+      /* Disable SPI interface and audio out */
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      DVK_spiControl(DVK_SPI_OFF);
+      break;
+
+    case DVK_TRACE:
+      perfControl &= ~(1 << BC_PERICON_TRACE_SHIFT);
+      break;
+
+    case DVK_TOUCH:
+      perfControl &= ~(1 << BC_PERICON_TOUCH_SHIFT);
+      break;
+
+    case DVK_AUDIO_IN:
+      perfControl &= ~(1 << BC_PERICON_AUDIO_IN_SHIFT);
+      break;
+
+    case DVK_AUDIO_OUT:
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SEL_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_AUDIO_OUT_SHIFT);
+      break;
+
+    case DVK_ANALOG_DIFF:
+      perfControl &= ~(1 << BC_PERICON_ANALOG_DIFF_SHIFT);
+      break;
+
+    case DVK_ANALOG_SE:
+      perfControl &= ~(1 << BC_PERICON_ANALOG_SE_SHIFT);
+      break;
+
+    case DVK_MICROSD:
+      perfControl &= ~(1 << BC_PERICON_SPI_SHIFT);
+      break;
+
+    case DVK_TFT:
+      /* Disable SPI interface */
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SHIFT);
+      perfControl &= ~(1 << BC_PERICON_I2S_ETH_SEL_SHIFT);
+      DVK_spiControl(DVK_SPI_OFF);
+      break;
+    }
+  }
+  /* Write back register */
+  DVK_writeRegister(&BC_REGISTER->PERICON, perfControl);
+}
+
+
+/**************************************************************************//**
+ * @brief Get status of push buttons on kit
+ *
+ * @return
+ *    Button state, each bit representing each push button PB0-PB4
+ *****************************************************************************/
+uint16_t DVK_getPushButtons(void)
+{
+  uint16_t tmp;
+
+  tmp = DVK_readRegister(&BC_REGISTER->UIF_PB);
+
+  return (~tmp) & 0x000F;
+}
+
+
+/**************************************************************************//**
+ * @brief Configure SPI for correct peripheral
+ *
+ * @param[in] device
+ *    Device to enable SPI bus for
+ *****************************************************************************/
+void DVK_spiControl(DVK_SpiControl_TypeDef device)
+{
+  switch (device)
+  {
+  case DVK_SPI_Audio:
+    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_AUDIO);
+    break;
+
+  case DVK_SPI_Ethernet:
+    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_ETHERNET);
+    break;
+
+  case DVK_SPI_Display:
+    DVK_writeRegister(&BC_REGISTER->SPI_DEMUX, BC_SPI_DEMUX_SLAVE_DISPLAY);
+    break;
+
+  case DVK_SPI_OFF:
+    USART_Reset(USART1);
+    CMU_ClockEnable(cmuClock_USART1, false);
+    break;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Inform AEM/Board Controller about what energy mode we are currently
+ *        entering. This information can be used for better visual feedback of
+ *        EFM32GG activity for the board controller and PC applications
+ * @param energyMode What energy mode we are going to use next
+ *****************************************************************************/
+void DVK_setEnergyMode(uint16_t energyMode)
+{
+  DVK_writeRegister(&BC_REGISTER->EM, energyMode);
+}
+
+
+/**************************************************************************//**
+ * @brief Enable "Control" buttons/joystick/dip switch interrupts
+ * @param flags Board control interrupt flags, INTEN_<something>
+ *****************************************************************************/
+void DVK_enableInterrupt(uint16_t flags)
+{
+  uint16_t tmp;
+
+  /* Add flags to interrupt enable register */
+  tmp  = DVK_readRegister(&BC_REGISTER->INTEN);
+  tmp |= flags;
+  DVK_writeRegister(&BC_REGISTER->INTEN, tmp);
+}
+
+
+/**************************************************************************//**
+ * @brief Disable "Control" buttons/joystick/dip switch interrupts
+ * @param flags Board control interrupt flags, BC_INTEN_<something>
+ *****************************************************************************/
+void DVK_disableInterrupt(uint16_t flags)
+{
+  uint16_t tmp;
+
+  /* Clear flags from interrupt enable register */
+  tmp   = DVK_readRegister(&BC_REGISTER->INTEN);
+  flags = ~(flags);
+  tmp  &= flags;
+  DVK_writeRegister(&BC_REGISTER->INTEN, tmp);
+}
+
+
+/**************************************************************************//**
+ * @brief Clear interrupts
+ * @param flags Board control interrupt flags, BC_INTEN_<something>
+ *****************************************************************************/
+void DVK_clearInterruptFlags(uint16_t flags)
+{
+  uint16_t tmp;
+  tmp  = DVK_readRegister(&BC_REGISTER->INTFLAG);
+  tmp &= ~(flags);
+  DVK_writeRegister(&BC_REGISTER->INTFLAG, tmp);
+}
+
+
+/**************************************************************************//**
+ * @brief Read interrupt flags
+ * @return Returns currently triggered interrupts
+ *****************************************************************************/
+uint16_t DVK_getInterruptFlags(void)
+{
+  return DVK_readRegister(&BC_REGISTER->INTFLAG);
+}
+
+
+/**************************************************************************//**
+ * @brief Get joystick button status
+ * @return Joystick controller status
+ *****************************************************************************/
+uint16_t DVK_getJoystick(void)
+{
+  uint16_t joyStick = 0;
+
+  joyStick = ~(DVK_readRegister(&BC_REGISTER->UIF_JOYSTICK)) & 0x001f;
+
+  return joyStick;
+}
+
+
+/**************************************************************************//**
+ * @brief Get dipswitch status
+ *        The DIP switches are free for user programmable purposes
+ * @return Dip switch
+ *****************************************************************************/
+uint16_t DVK_getDipSwitch(void)
+{
+  return DVK_readRegister(&BC_REGISTER->UIF_DIP) & 0x000f;
+}
+
+
+/**************************************************************************//**
+ * @brief Configure display control
+ *****************************************************************************/
+void DVK_displayControl(DVK_Display_TypeDef option)
+{
+  uint16_t tmp;
+
+  switch (option)
+  {
+  case DVK_Display_EBI:
+    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_EBI);
+    break;
+
+  case DVK_Display_SPI:
+    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_SPI);
+    break;
+
+  case DVK_Display_BC:
+    DVK_writeRegister(&BC_REGISTER->ARB_CTRL, BC_ARB_CTRL_BC);
+    break;
+
+  case DVK_Display_PowerEnable:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp |= (BC_DISPLAY_CTRL_POWER_ENABLE);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_PowerDisable:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp &= ~(BC_DISPLAY_CTRL_POWER_ENABLE);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_ResetAssert:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp |= (BC_DISPLAY_CTRL_RESET);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_ResetRelease:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp &= ~(BC_DISPLAY_CTRL_RESET);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_Mode8080:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp &= ~(BC_DISPLAY_CTRL_MODE_GENERIC);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  case DVK_Display_ModeGeneric:
+    tmp  = DVK_readRegister(&BC_REGISTER->DISPLAY_CTRL);
+    tmp |= (BC_DISPLAY_CTRL_MODE_GENERIC);
+    DVK_writeRegister(&BC_REGISTER->DISPLAY_CTRL, tmp);
+    break;
+
+  default:
+    /* Unknown command */
+    while (1) ;
+  }
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/dvk.h

@@ -1,234 +1,234 @@
-/**************************************************************************//**
- * @file
- * @brief EFM32GG_DK3750 board support package API
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-#ifndef __DVK_H
-#define __DVK_H
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include <stdbool.h>
-#include <stdint.h>
-#include "efm32.h"
-#include "dvk_bcregisters.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/** DVK board control access method */
-typedef enum
-{
-  DVK_Init_EBI,    /**< Use EBI to interface board control functionality */
-  DVK_Init_SPI,    /**< Use SPI to interface board control functionality */
-  DVK_Init_DIRECT, /**< No board control, only GPIO */
-  DVK_Init_OFF,    /**< Disabled */
-} DVK_Init_TypeDef;
-
-extern DVK_Init_TypeDef dvkOperationMode;
-
-/** Bus control access */
-typedef enum
-{
-  DVK_BusControl_OFF,    /**< Board control disable */
-  DVK_BusControl_DIRECT, /**< GPIO direct drive (n/a) */
-  DVK_BusControl_SPI,    /**< Configure Board controller for SPI mode */
-  DVK_BusControl_EBI,    /**< Configure Board controller for EBI mode */
-} DVK_BusControl_TypeDef;
-
-
-/** Display Control */
-typedef enum
-{
-  DVK_Display_EBI,          /**< SSD2119 TFT controller driven by EFM32GG EBI interface */
-  DVK_Display_SPI,          /**< SSD2119 TFT controller driven by EFM32GG SPI interface */
-  DVK_Display_BC,           /**< SSD2119 TFT controller driven by board controller (AEM) */
-  DVK_Display_PowerEnable,  /**< SSD2119 Enable power  */
-  DVK_Display_PowerDisable, /**< SSD2119 Disable power  */
-  DVK_Display_ResetAssert,  /**< Hold SSD2119 in reset */
-  DVK_Display_ResetRelease, /**< Release SSD2119 in reset */
-  DVK_Display_Mode8080,     /**< Configure SSD2119 for 8080 mode of operation  */
-  DVK_Display_ModeGeneric,  /**< Configure SSD2119 for Generic+SPI mode of operation */
-} DVK_Display_TypeDef;
-
-
-/** SPI control */
-typedef enum
-{
-  DVK_SPI_Audio,    /**< Configure switchable SPI interface to Audio I2S */
-  DVK_SPI_Ethernet, /**< Configure switchable SPI interface to Ethernet */
-  DVK_SPI_Display,  /**< Configure switchable SPI interface to SSD2119 */
-  DVK_SPI_OFF,      /**< Disable SPI interface */
-} DVK_SpiControl_TypeDef;
-
-
-/** Peripherals control structure */
-typedef enum
-{
-  DVK_RS232_SHUTDOWN, /**< Disable RS232 */
-  DVK_RS232_UART,     /**< UART control of RS232 */
-  DVK_RS232_LEUART,   /**< LEUART control of RS232 */
-  DVK_I2C,            /**< I2C */
-  DVK_ETH,            /**< Ethernet */
-  DVK_I2S,            /**< Audio I2S */
-  DVK_TRACE,          /**< ETM Trace */
-  DVK_TOUCH,          /**< Display touch interface */
-  DVK_AUDIO_IN,       /**< Audio In */
-  DVK_AUDIO_OUT,      /**< Audio Out */
-  DVK_ANALOG_DIFF,    /**< Analog DIFF */
-  DVK_ANALOG_SE,      /**< Analog SE */
-  DVK_MICROSD,        /**< MicroSD SPI interace */
-  DVK_TFT,            /**< SSD2119 TFT controller */
-} DVK_Peripheral_TypeDef;
-
-
-/* Initalize DVK board for access to external PSRAM, Flash and BC registers */
-void DVK_init(DVK_Init_TypeDef mode);
-void DVK_disable(void);
-
-/* Board controller control API */
-void DVK_busControlMode(DVK_BusControl_TypeDef mode);
-void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable);
-void DVK_spiControl(DVK_SpiControl_TypeDef device);
-
-/* Board controller access function  */
-uint16_t DVK_getPushButtons(void);
-uint16_t DVK_getJoystick(void);
-uint16_t DVK_getDipSwitch(void);
-void DVK_setLEDs(uint16_t leds);
-uint16_t DVK_getLEDs(void);
-
-/* Miscellaneous */
-void DVK_setEnergyMode(uint16_t energyMode);
-void DVK_displayControl(DVK_Display_TypeDef option);
-
-/* Board controller interrupt support */
-void DVK_enableInterrupt(uint16_t flags);
-void DVK_disableInterrupt(uint16_t flags);
-uint16_t DVK_getInterruptFlags(void);
-void DVK_clearInterruptFlags(uint16_t flags);
-
-/* EBI access */
-bool DVK_EBI_init(void);
-void DVK_EBI_disable(void);
-void DVK_EBI_extendedAddressRange(bool enable);
-__STATIC_INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
-__STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
-
-/* SPI access */
-bool DVK_SPI_init(void);
-void DVK_SPI_disable(void);
-uint16_t DVK_SPI_readRegister(volatile uint16_t *addr);
-void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data);
-
-/* MCU-plug-in-board (BRD3600) API */
-void DVK_BRD3600A_init(void);
-void DVK_BRD3600A_deInit(void);
-void DVK_BRD3600A_usbStatusLEDEnable(int enable);
-void DVK_BRD3600A_usbVBUSSwitchEnable(int enable);
-int  DVK_BRD3600A_usbVBUSGetOCFlagState(void);
-
-
-/* For "backward compatibility" with DVK */
-/** DVK_enablePeripheral() backward compatibility */
-#define DVK_enablePeripheral(X)     DVK_peripheralAccess(X, true) 
-/** DVK_disablePeripheral() backward compatibility */
-#define DVK_disablePeripheral(X)    DVK_peripheralAccess(X, false)
-
-/**************************************************************************//**
- * @brief Write data into 16-bit board control register using mem.mapped EBI
- * @param addr Address of board controller register
- * @param data Data to write into register
- *****************************************************************************/
-__STATIC_INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
-{
-  *addr = data;
-}
-
-
-/**************************************************************************//**
- * @brief Read data from 16-bit board control register using memory mapped EBI
- * @param addr Register to read from
- * @return Value of board controller register
- *****************************************************************************/
-__STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
-{
-  return *addr;
-}
-
-
-/**************************************************************************//**
- * @brief Read data from 16-bit board control register
- * @param addr Register to read
- * @return Value of board controller register 
- *****************************************************************************/
-__STATIC_INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
-{
-  if (dvkOperationMode == DVK_Init_EBI)
-  {
-    return DVK_EBI_readRegister(addr);
-  }
-  else
-  {
-    return DVK_SPI_readRegister(addr);
-  }
-}
-
-
-/**************************************************************************//**
- * @brief Write data into 16-bit board control register
- * @param addr Address to board control register
- * @param data Data to write into register
- *****************************************************************************/
-__STATIC_INLINE void DVK_writeRegister(volatile uint16_t *addr, uint16_t data)
-{
-  if (dvkOperationMode == DVK_Init_EBI)
-  {
-    DVK_EBI_writeRegister(addr, data);
-  }
-  else
-  {
-    DVK_SPI_writeRegister(addr, data);
-  }
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} (end group BSP) */
-
-#endif
+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package API
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#ifndef __DVK_H
+#define __DVK_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "efm32.h"
+#include "dvk_bcregisters.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** DVK board control access method */
+typedef enum
+{
+  DVK_Init_EBI,    /**< Use EBI to interface board control functionality */
+  DVK_Init_SPI,    /**< Use SPI to interface board control functionality */
+  DVK_Init_DIRECT, /**< No board control, only GPIO */
+  DVK_Init_OFF,    /**< Disabled */
+} DVK_Init_TypeDef;
+
+extern DVK_Init_TypeDef dvkOperationMode;
+
+/** Bus control access */
+typedef enum
+{
+  DVK_BusControl_OFF,    /**< Board control disable */
+  DVK_BusControl_DIRECT, /**< GPIO direct drive (n/a) */
+  DVK_BusControl_SPI,    /**< Configure Board controller for SPI mode */
+  DVK_BusControl_EBI,    /**< Configure Board controller for EBI mode */
+} DVK_BusControl_TypeDef;
+
+
+/** Display Control */
+typedef enum
+{
+  DVK_Display_EBI,          /**< SSD2119 TFT controller driven by EFM32GG EBI interface */
+  DVK_Display_SPI,          /**< SSD2119 TFT controller driven by EFM32GG SPI interface */
+  DVK_Display_BC,           /**< SSD2119 TFT controller driven by board controller (AEM) */
+  DVK_Display_PowerEnable,  /**< SSD2119 Enable power  */
+  DVK_Display_PowerDisable, /**< SSD2119 Disable power  */
+  DVK_Display_ResetAssert,  /**< Hold SSD2119 in reset */
+  DVK_Display_ResetRelease, /**< Release SSD2119 in reset */
+  DVK_Display_Mode8080,     /**< Configure SSD2119 for 8080 mode of operation  */
+  DVK_Display_ModeGeneric,  /**< Configure SSD2119 for Generic+SPI mode of operation */
+} DVK_Display_TypeDef;
+
+
+/** SPI control */
+typedef enum
+{
+  DVK_SPI_Audio,    /**< Configure switchable SPI interface to Audio I2S */
+  DVK_SPI_Ethernet, /**< Configure switchable SPI interface to Ethernet */
+  DVK_SPI_Display,  /**< Configure switchable SPI interface to SSD2119 */
+  DVK_SPI_OFF,      /**< Disable SPI interface */
+} DVK_SpiControl_TypeDef;
+
+
+/** Peripherals control structure */
+typedef enum
+{
+  DVK_RS232_SHUTDOWN, /**< Disable RS232 */
+  DVK_RS232_UART,     /**< UART control of RS232 */
+  DVK_RS232_LEUART,   /**< LEUART control of RS232 */
+  DVK_I2C,            /**< I2C */
+  DVK_ETH,            /**< Ethernet */
+  DVK_I2S,            /**< Audio I2S */
+  DVK_TRACE,          /**< ETM Trace */
+  DVK_TOUCH,          /**< Display touch interface */
+  DVK_AUDIO_IN,       /**< Audio In */
+  DVK_AUDIO_OUT,      /**< Audio Out */
+  DVK_ANALOG_DIFF,    /**< Analog DIFF */
+  DVK_ANALOG_SE,      /**< Analog SE */
+  DVK_MICROSD,        /**< MicroSD SPI interace */
+  DVK_TFT,            /**< SSD2119 TFT controller */
+} DVK_Peripheral_TypeDef;
+
+
+/* Initalize DVK board for access to external PSRAM, Flash and BC registers */
+void DVK_init(DVK_Init_TypeDef mode);
+void DVK_disable(void);
+
+/* Board controller control API */
+void DVK_busControlMode(DVK_BusControl_TypeDef mode);
+void DVK_peripheralAccess(DVK_Peripheral_TypeDef perf, bool enable);
+void DVK_spiControl(DVK_SpiControl_TypeDef device);
+
+/* Board controller access function  */
+uint16_t DVK_getPushButtons(void);
+uint16_t DVK_getJoystick(void);
+uint16_t DVK_getDipSwitch(void);
+void DVK_setLEDs(uint16_t leds);
+uint16_t DVK_getLEDs(void);
+
+/* Miscellaneous */
+void DVK_setEnergyMode(uint16_t energyMode);
+void DVK_displayControl(DVK_Display_TypeDef option);
+
+/* Board controller interrupt support */
+void DVK_enableInterrupt(uint16_t flags);
+void DVK_disableInterrupt(uint16_t flags);
+uint16_t DVK_getInterruptFlags(void);
+void DVK_clearInterruptFlags(uint16_t flags);
+
+/* EBI access */
+bool DVK_EBI_init(void);
+void DVK_EBI_disable(void);
+void DVK_EBI_extendedAddressRange(bool enable);
+__STATIC_INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
+__STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
+
+/* SPI access */
+bool DVK_SPI_init(void);
+void DVK_SPI_disable(void);
+uint16_t DVK_SPI_readRegister(volatile uint16_t *addr);
+void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data);
+
+/* MCU-plug-in-board (BRD3600) API */
+void DVK_BRD3600A_init(void);
+void DVK_BRD3600A_deInit(void);
+void DVK_BRD3600A_usbStatusLEDEnable(int enable);
+void DVK_BRD3600A_usbVBUSSwitchEnable(int enable);
+int  DVK_BRD3600A_usbVBUSGetOCFlagState(void);
+
+
+/* For "backward compatibility" with DVK */
+/** DVK_enablePeripheral() backward compatibility */
+#define DVK_enablePeripheral(X)     DVK_peripheralAccess(X, true) 
+/** DVK_disablePeripheral() backward compatibility */
+#define DVK_disablePeripheral(X)    DVK_peripheralAccess(X, false)
+
+/**************************************************************************//**
+ * @brief Write data into 16-bit board control register using mem.mapped EBI
+ * @param addr Address of board controller register
+ * @param data Data to write into register
+ *****************************************************************************/
+__STATIC_INLINE void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  *addr = data;
+}
+
+
+/**************************************************************************//**
+ * @brief Read data from 16-bit board control register using memory mapped EBI
+ * @param addr Register to read from
+ * @return Value of board controller register
+ *****************************************************************************/
+__STATIC_INLINE uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
+{
+  return *addr;
+}
+
+
+/**************************************************************************//**
+ * @brief Read data from 16-bit board control register
+ * @param addr Register to read
+ * @return Value of board controller register 
+ *****************************************************************************/
+__STATIC_INLINE uint16_t DVK_readRegister(volatile uint16_t *addr)
+{
+  if (dvkOperationMode == DVK_Init_EBI)
+  {
+    return DVK_EBI_readRegister(addr);
+  }
+  else
+  {
+    return DVK_SPI_readRegister(addr);
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Write data into 16-bit board control register
+ * @param addr Address to board control register
+ * @param data Data to write into register
+ *****************************************************************************/
+__STATIC_INLINE void DVK_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  if (dvkOperationMode == DVK_Init_EBI)
+  {
+    DVK_EBI_writeRegister(addr, data);
+  }
+  else
+  {
+    DVK_SPI_writeRegister(addr, data);
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif

bsp/efm32/EFM32GG_DK3750/dvk_bcregisters.h

@@ -1,258 +1,258 @@
-/**************************************************************************//**
- * @file
- * @brief Board Control register definitions
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-#ifndef __DVK_BCREGISTERS_H
-#define __DVK_BCREGISTERS_H
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**************************************************************************//**
- * Defines FPGA register bank for Energy Micro Development Kit (DVK) board,
- * i.e. board control registers
- *****************************************************************************/
-#define BC_REGISTER_BASE    0x80000000  /**< Board Controller registers base address */
-#define BC_SSD2119_BASE     0x84000000  /**< TFT-LCD controller */
-#define BC_PSRAM_BASE       0x88000000  /**< PSRAM base address */
-#define BC_FLASH_BASE       0x8C000000  /**< External Flash base address */
-
-
-/**************************************************************************//**
- * Defines bit fields for board control registers
- *****************************************************************************/
-
-/* Define registers in a similar manner to CMSIS standards */
-/** Read/Write board controller register */
-#define __IO    volatile
-
-/** Board Controller Register definiton */
-typedef struct
-{
-  __IO uint16_t RESERVERD0;        /**< 0x00 - Reserved */
-  __IO uint16_t EM;                /**< 0x02 - Energy Mode indicator  */
-  __IO uint16_t MAGIC;             /**< 0x04 - Should always read 0xEF32 */
-
-  __IO uint16_t UIF_LEDS;          /**< 0x06 - On board LEDs */
-  __IO uint16_t UIF_PB;            /**< 0x08 - Push button PB0-PB4 status */
-  __IO uint16_t UIF_DIP;           /**< 0x0A - DIP switch status */
-  __IO uint16_t UIF_JOYSTICK;      /**< 0x0C - Joystick presses */
-  __IO uint16_t UIF_AEM;           /**< 0x0E - AEM button */
-  __IO uint16_t UIF_CTRL;          /**< 0x10 - CPLD control register */
-  __IO uint16_t DISPLAY_CTRL;      /**< 0x12 - SSD2119 TFT display control */
-  __IO uint16_t EBI_CTRL;          /**< 0x14 - Extended Address Mode control */
-  __IO uint16_t ARB_CTRL;          /**< 0x16 - Arbiter control, board control or EFM32GG access to display */
-  __IO uint16_t PERICON;           /**< 0x18 - Peripheral Control, on board switches */
-  __IO uint16_t SPI_DEMUX;         /**< 0x1A - SPI DEMUX */
-  __IO uint16_t RESERVERD1[0x02];  /**< 0x1C - Reserved */
-
-  __IO uint16_t ADC_WRITE;         /**< 0x20 - AEM ADC SPI interface */
-  __IO uint16_t ADC_STATUS;        /**< 0x22 - AEM ADC SPI interface */
-  __IO uint16_t ADC_READ;          /**< 0x24 - AEM ADC SPI interface */
-
-  __IO uint16_t CLKRST;            /**< 0x26 - Clock and reset control */
-
-  __IO uint16_t HW_VERSION;        /**< 0x28 - Hardware version */
-  __IO uint16_t FW_BUILDNO;        /**< 0x2A - Firmware build number */
-  __IO uint16_t FW_VERSION;        /**< 0x2C - Firmware version */
-
-  __IO uint16_t SCRATCH_COMMON;    /**< 0x2E - Shared register between board controller and EFM32 */
-
-  __IO uint16_t SCRATCH_EFM0;      /**< 0x30 - EFM32 accessible registers */
-  __IO uint16_t SCRATCH_EFM1;      /**< 0x32 */
-  __IO uint16_t SCRATCH_EFM2;      /**< 0x34 */
-  __IO uint16_t SCRATCH_EFM3;      /**< 0x36 */
-
-  __IO uint16_t SCRATCH_BC0;       /**< 0x38 - Board Control registers */
-  __IO uint16_t SCRATCH_BC1;       /**< 0x3A */
-  __IO uint16_t SCRATCH_BC2;       /**< 0x3C */
-  __IO uint16_t SCRATCH_BC3;       /**< 0x3E */
-
-  __IO uint16_t INTFLAG;           /**< 0x40 - Interrupt Status flags */
-  __IO uint16_t INTEN;             /**< 0x42 - Interrupt Enable flags */
-
-  __IO uint16_t RESERVERD3[0x1e];  /**< 0x44 - Reserved */
-
-  __IO uint16_t BC_MBOX_TXCTRL;    /**< 0x80 - BC <-> EFM32 communication channel */
-  __IO uint16_t BC_MBOX_TXDATA;    /**< 0x82 */
-  __IO uint16_t BC_MBOX_TXSTATUS0; /**< 0x84 */
-  __IO uint16_t BC_MBOX_TXSTATUS1; /**< 0x86 */
-
-  __IO uint16_t RESERVED4[0x0d];   /**< 0xa0 - Reserved */
-
-  __IO uint16_t MBOX_TXCTRL;       /**< 0xa2 - BC <-> EFM32 communication channel */
-  __IO uint16_t MBOX_TXDATA;       /**< 0xa4 */
-  __IO uint16_t MBOX_TXSTATUS0;    /**< 0xa6 */
-  __IO uint16_t MBOX_TXSTATUS1;    /**< 0xa8 */
-
-  __IO uint16_t RESERVED5[0x0b];   /**< 0xaa - Reserved */
-
-  __IO uint16_t BUF_CTRL;          /**< 0xc0 - Buffer Controller Control */
-} BC_TypeDef;
-
-/* Cast into register structure */
-#define BC_REGISTER                         ((BC_TypeDef *) BC_REGISTER_BASE) /**< Register block base */
-
-/* Energy Mode indicator */
-#define BC_EM_EM0                           (0)  /**< Indicate EM0 */
-#define BC_EM_EM1                           (1)  /**< Indicate EM1 */
-#define BC_EM_EM2                           (2)  /**< Indicate EM2 */
-#define BC_EM_EM3                           (3)  /**< Indicate EM3 */
-#define BC_EM_EM4                           (4)  /**< Indicate EM4 */
-
-/* Magic value */
-#define BC_MAGIC_VALUE                      (0xef32)  /**< Magic */
-
-/* Push buttons, PB1-PB4 */
-#define BC_UIF_PB_MASK                      (0x000f) /**< Push button mask */
-#define BC_UIF_PB1                          (1 << 0) /**< Push button PB1 */
-#define BC_UIF_PB2                          (1 << 1) /**< Push button PB2 */
-#define BC_UIF_PB3                          (1 << 2) /**< Push button PB3 */
-#define BC_UIF_PB4                          (1 << 3) /**< Push button PB4 */
-
-/* Dip switch */
-#define BC_DIPSWITCH_MASK                   (0x000f)  /**< Dip switch mask */
-
-/* Joystick directions */
-#define BC_UIF_JOYSTICK_MASK                (0x001f)      /**< Joystick mask */
-#define BC_UIF_JOYSTICK_DOWN                (1 << 0)      /**< Joystick down */
-#define BC_UIF_JOYSTICK_RIGHT               (1 << 1)      /**< Joystick right */
-#define BC_UIF_JOYSTICK_UP                  (1 << 2)      /**< Joystick up */
-#define BC_UIF_JOYSTICK_LEFT                (1 << 3)      /**< Joystick left */
-#define BC_UIF_JOYSTICK_CENTER              (1 << 4)      /**< Joystick center button */
-
-/* AEM state */
-#define BC_UIF_AEM_BC                       (0) /**< AEM button state, BC controls buttons */
-#define BC_UIF_AEM_EFM                      (1) /**< AEM button state, EFM32 controls buttons */
-
-/* Display control */
-#define BC_DISPLAY_CTRL_RESET               (1 << 1)                          /**< Reset */
-#define BC_DISPLAY_CTRL_POWER_ENABLE        (1 << 0)                          /**< Display Control Power and Backlight Enable */
-#define BC_DISPLAY_CTRL_MODE_SHIFT          2                                 /**< Bit offset value for Display_Mode setting */
-#define BC_DISPLAY_CTRL_MODE_8080           (0 << BC_DISPLAY_CTRL_MODE_SHIFT) /**< Address mapped mode */
-#define BC_DISPLAY_CTRL_MODE_GENERIC        (1 << BC_DISPLAY_CTRL_MODE_SHIFT) /**< Direct Drive + SPI mode */
-
-/* EBI control - extended address range enable bit  */
-#define BC_EBI_CTRL_EXTADDR_MASK            (0x0001) /**< Enable extended addressing support */
-
-/* Arbiter control - directs access to display controller  */
-#define BC_ARB_CTRL_SHIFT                   0 /**< Bit offset value for ARB_CTRL setting */
-#define BC_ARB_CTRL_BC                      (0 << BC_ARB_CTRL_SHIFT) /**< BC drives display */
-#define BC_ARB_CTRL_EBI                     (1 << BC_ARB_CTRL_SHIFT) /**< EFM32GG EBI drives display, memory mapped or direct drive */
-#define BC_ARB_CTRL_SPI                     (2 << BC_ARB_CTRL_SHIFT) /**< EFM32GG SPI drives display */
-
-/* Interrupt flag registers, INTEN and INTFLAG */
-#define BC_INTEN_MASK                       (0x000f)  /**< Interrupt enable mask */
-#define BC_INTEN_PB                         (1 << 0)  /**< Push Button Interrupt enable */
-#define BC_INTEN_DIP                        (1 << 1)  /**< DIP Switch Interrupt enable */
-#define BC_INTEN_JOYSTICK                   (1 << 2)  /**< Joystick Interrupt enable */
-#define BC_INTEN_AEM                        (1 << 3)  /**< AEM Interrupt enable */
-#define BC_INTEN_ETH                        (1 << 4)  /**< Ethernet Interrupt enable */
-
-#define BC_INTFLAG_MASK                     (0x000f)  /**< Interrupt flag mask */
-#define BC_INTFLAG_PB                       (1 << 0)  /**< Push Button interrupt triggered */
-#define BC_INTFLAG_DIP                      (1 << 1)  /**< DIP interrupt triggered */
-#define BC_INTFLAG_JOYSTICK                 (1 << 2)  /**< Joystick interrupt triggered */
-#define BC_INTFLAG_AEM                      (1 << 3)  /**< AEM Interrupt triggered */
-#define BC_INTFLAG_ETH                      (1 << 4)  /**< Ethernet Interrupt triggered */
-
-/* Peripheral control registers */
-#define BC_PERICON_RS232_SHUTDOWN_SHIFT     13 /**< RS232 enable MUX bit */
-#define BC_PERICON_RS232_UART_SHIFT         12 /**< UART enable */
-#define BC_PERICON_RS232_LEUART_SHIFT       11 /**< LEUART enable */
-#define BC_PERICON_I2C_SHIFT                10 /**< I2C enable */
-#define BC_PERICON_I2S_ETH_SEL_SHIFT        9 /**< I2S/ETH/TFT SPI enable */
-#define BC_PERICON_I2S_ETH_SHIFT            8 /**< I2S/ETH mux select */
-#define BC_PERICON_TRACE_SHIFT              7 /**< ETM Trace enable */
-#define BC_PERICON_TOUCH_SHIFT              6 /**< Touch enable */
-#define BC_PERICON_AUDIO_IN_SHIFT           5 /**< Audio In enable */
-#define BC_PERICON_AUDIO_OUT_SEL_SHIFT      4 /**< Audio Out I2S/DAC select */
-#define BC_PERICON_AUDIO_OUT_SHIFT          3 /**< Audio Out enable */
-#define BC_PERICON_ANALOG_DIFF_SHIFT        2 /**< Analog Diff enable */
-#define BC_PERICON_ANALOG_SE_SHIFT          1 /**< Anallog SE enable */
-#define BC_PERICON_SPI_SHIFT                0 /**< Micro-SD SPI enable */
-
-/* SPI DEMUX control */
-#define BC_SPI_DEMUX_SLAVE_MASK             (0x0003) /**< Mask for SPI MUX bits */
-#define BC_SPI_DEMUX_SLAVE_AUDIO            (0) /**< SPI interface to I2S Audio */
-#define BC_SPI_DEMUX_SLAVE_ETHERNET         (1) /**< SPI interface to Ethernet controller */
-#define BC_SPI_DEMUX_SLAVE_DISPLAY          (2) /**< SPI interface to TFT-LCD-SSD2119 controller */
-
-/* ADC */
-#define BC_ADC_STATUS_DONE                  (0)  /**< ADC Status Done */
-#define BC_ADC_STATUS_BUSY                  (1)  /**< ADC Status Busy */
-
-/* Clock and Reset Control */
-#define BC_CLKRST_FLASH_SHIFT               (1 << 1) /**< Flash Reset Control */
-#define BC_CLKRST_ETH_SHIFT                 (1 << 2) /**< Ethernet Reset Control */
-
-/* Hardware version information */
-#define BC_HW_VERSION_PCB_MASK              (0x07f0)  /**< PCB Version mask */
-#define BC_HW_VERSION_PCB_SHIFT             (4)       /**< PCB Version shift */
-#define BC_HW_VERSION_BOARD_MASK            (0x000f)  /**< Board version mask */
-#define BC_HW_VERSION_BOARD_SHIFT           (0)       /**< Board version shift  */
-
-/* Firmware version information */
-#define BC_FW_VERSION_MAJOR_MASK            (0xf000) /**< FW Version major mask */
-#define BC_FW_VERSION_MAJOR_SHIFT           (12)     /**< FW version major shift */
-#define BC_FW_VERSION_MINOR_MASK            (0x0f00) /**< FW version minor mask */
-#define BC_FW_VERSION_MINOR_SHIFT           (8)      /**< FW version minor shift */
-#define BC_FW_VERSION_PATCHLEVEL_MASK       (0x00ff) /**< FW Patchlevel mask */
-#define BC_FW_VERSION_PATCHLEVEL_SHIFT      (0)      /**< FW Patchlevel shift */
-
-/* MBOX - BC <-> EFM32 communication */
-#define BC_MBOX_TXSTATUS0_FIFOEMPTY         (1 << 0) /**< BC/EFM32 communication register */
-#define BC_MBOX_TXSTATUS0_FIFOFULL          (1 << 1) /**< BC/EFM32 communication register */
-#define BC_MBOX_TXSTATUS0_FIFOUNDERFLOW     (1 << 4) /**< BC/EFM32 communication register */
-#define BC_MBOX_TXSTATUS0_FIFOOVERFLOW      (1 << 5) /**< BC/EFM32 communication register */
-
-#define BC_MBOX_TXSTATUS1_WORDCOUNT_MASK    (0x07FF) /**< BC/EFM32 communication register */
-
-/* Buffer Controller */
-#define BC_BUF_CTRL_CS_ENABLE               (1 << 0) /**< BC/EFM32 communication register */
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} (end group BSP) */
-
-#endif
+/**************************************************************************//**
+ * @file
+ * @brief Board Control register definitions
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#ifndef __DVK_BCREGISTERS_H
+#define __DVK_BCREGISTERS_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**************************************************************************//**
+ * Defines FPGA register bank for Energy Micro Development Kit (DVK) board,
+ * i.e. board control registers
+ *****************************************************************************/
+#define BC_REGISTER_BASE    0x80000000  /**< Board Controller registers base address */
+#define BC_SSD2119_BASE     0x84000000  /**< TFT-LCD controller */
+#define BC_PSRAM_BASE       0x88000000  /**< PSRAM base address */
+#define BC_FLASH_BASE       0x8C000000  /**< External Flash base address */
+
+
+/**************************************************************************//**
+ * Defines bit fields for board control registers
+ *****************************************************************************/
+
+/* Define registers in a similar manner to CMSIS standards */
+/** Read/Write board controller register */
+#define __IO    volatile
+
+/** Board Controller Register definiton */
+typedef struct
+{
+  __IO uint16_t RESERVERD0;        /**< 0x00 - Reserved */
+  __IO uint16_t EM;                /**< 0x02 - Energy Mode indicator  */
+  __IO uint16_t MAGIC;             /**< 0x04 - Should always read 0xEF32 */
+
+  __IO uint16_t UIF_LEDS;          /**< 0x06 - On board LEDs */
+  __IO uint16_t UIF_PB;            /**< 0x08 - Push button PB0-PB4 status */
+  __IO uint16_t UIF_DIP;           /**< 0x0A - DIP switch status */
+  __IO uint16_t UIF_JOYSTICK;      /**< 0x0C - Joystick presses */
+  __IO uint16_t UIF_AEM;           /**< 0x0E - AEM button */
+  __IO uint16_t UIF_CTRL;          /**< 0x10 - CPLD control register */
+  __IO uint16_t DISPLAY_CTRL;      /**< 0x12 - SSD2119 TFT display control */
+  __IO uint16_t EBI_CTRL;          /**< 0x14 - Extended Address Mode control */
+  __IO uint16_t ARB_CTRL;          /**< 0x16 - Arbiter control, board control or EFM32GG access to display */
+  __IO uint16_t PERICON;           /**< 0x18 - Peripheral Control, on board switches */
+  __IO uint16_t SPI_DEMUX;         /**< 0x1A - SPI DEMUX */
+  __IO uint16_t RESERVERD1[0x02];  /**< 0x1C - Reserved */
+
+  __IO uint16_t ADC_WRITE;         /**< 0x20 - AEM ADC SPI interface */
+  __IO uint16_t ADC_STATUS;        /**< 0x22 - AEM ADC SPI interface */
+  __IO uint16_t ADC_READ;          /**< 0x24 - AEM ADC SPI interface */
+
+  __IO uint16_t CLKRST;            /**< 0x26 - Clock and reset control */
+
+  __IO uint16_t HW_VERSION;        /**< 0x28 - Hardware version */
+  __IO uint16_t FW_BUILDNO;        /**< 0x2A - Firmware build number */
+  __IO uint16_t FW_VERSION;        /**< 0x2C - Firmware version */
+
+  __IO uint16_t SCRATCH_COMMON;    /**< 0x2E - Shared register between board controller and EFM32 */
+
+  __IO uint16_t SCRATCH_EFM0;      /**< 0x30 - EFM32 accessible registers */
+  __IO uint16_t SCRATCH_EFM1;      /**< 0x32 */
+  __IO uint16_t SCRATCH_EFM2;      /**< 0x34 */
+  __IO uint16_t SCRATCH_EFM3;      /**< 0x36 */
+
+  __IO uint16_t SCRATCH_BC0;       /**< 0x38 - Board Control registers */
+  __IO uint16_t SCRATCH_BC1;       /**< 0x3A */
+  __IO uint16_t SCRATCH_BC2;       /**< 0x3C */
+  __IO uint16_t SCRATCH_BC3;       /**< 0x3E */
+
+  __IO uint16_t INTFLAG;           /**< 0x40 - Interrupt Status flags */
+  __IO uint16_t INTEN;             /**< 0x42 - Interrupt Enable flags */
+
+  __IO uint16_t RESERVERD3[0x1e];  /**< 0x44 - Reserved */
+
+  __IO uint16_t BC_MBOX_TXCTRL;    /**< 0x80 - BC <-> EFM32 communication channel */
+  __IO uint16_t BC_MBOX_TXDATA;    /**< 0x82 */
+  __IO uint16_t BC_MBOX_TXSTATUS0; /**< 0x84 */
+  __IO uint16_t BC_MBOX_TXSTATUS1; /**< 0x86 */
+
+  __IO uint16_t RESERVED4[0x0d];   /**< 0xa0 - Reserved */
+
+  __IO uint16_t MBOX_TXCTRL;       /**< 0xa2 - BC <-> EFM32 communication channel */
+  __IO uint16_t MBOX_TXDATA;       /**< 0xa4 */
+  __IO uint16_t MBOX_TXSTATUS0;    /**< 0xa6 */
+  __IO uint16_t MBOX_TXSTATUS1;    /**< 0xa8 */
+
+  __IO uint16_t RESERVED5[0x0b];   /**< 0xaa - Reserved */
+
+  __IO uint16_t BUF_CTRL;          /**< 0xc0 - Buffer Controller Control */
+} BC_TypeDef;
+
+/* Cast into register structure */
+#define BC_REGISTER                         ((BC_TypeDef *) BC_REGISTER_BASE) /**< Register block base */
+
+/* Energy Mode indicator */
+#define BC_EM_EM0                           (0)  /**< Indicate EM0 */
+#define BC_EM_EM1                           (1)  /**< Indicate EM1 */
+#define BC_EM_EM2                           (2)  /**< Indicate EM2 */
+#define BC_EM_EM3                           (3)  /**< Indicate EM3 */
+#define BC_EM_EM4                           (4)  /**< Indicate EM4 */
+
+/* Magic value */
+#define BC_MAGIC_VALUE                      (0xef32)  /**< Magic */
+
+/* Push buttons, PB1-PB4 */
+#define BC_UIF_PB_MASK                      (0x000f) /**< Push button mask */
+#define BC_UIF_PB1                          (1 << 0) /**< Push button PB1 */
+#define BC_UIF_PB2                          (1 << 1) /**< Push button PB2 */
+#define BC_UIF_PB3                          (1 << 2) /**< Push button PB3 */
+#define BC_UIF_PB4                          (1 << 3) /**< Push button PB4 */
+
+/* Dip switch */
+#define BC_DIPSWITCH_MASK                   (0x000f)  /**< Dip switch mask */
+
+/* Joystick directions */
+#define BC_UIF_JOYSTICK_MASK                (0x001f)      /**< Joystick mask */
+#define BC_UIF_JOYSTICK_DOWN                (1 << 0)      /**< Joystick down */
+#define BC_UIF_JOYSTICK_RIGHT               (1 << 1)      /**< Joystick right */
+#define BC_UIF_JOYSTICK_UP                  (1 << 2)      /**< Joystick up */
+#define BC_UIF_JOYSTICK_LEFT                (1 << 3)      /**< Joystick left */
+#define BC_UIF_JOYSTICK_CENTER              (1 << 4)      /**< Joystick center button */
+
+/* AEM state */
+#define BC_UIF_AEM_BC                       (0) /**< AEM button state, BC controls buttons */
+#define BC_UIF_AEM_EFM                      (1) /**< AEM button state, EFM32 controls buttons */
+
+/* Display control */
+#define BC_DISPLAY_CTRL_RESET               (1 << 1)                          /**< Reset */
+#define BC_DISPLAY_CTRL_POWER_ENABLE        (1 << 0)                          /**< Display Control Power and Backlight Enable */
+#define BC_DISPLAY_CTRL_MODE_SHIFT          2                                 /**< Bit offset value for Display_Mode setting */
+#define BC_DISPLAY_CTRL_MODE_8080           (0 << BC_DISPLAY_CTRL_MODE_SHIFT) /**< Address mapped mode */
+#define BC_DISPLAY_CTRL_MODE_GENERIC        (1 << BC_DISPLAY_CTRL_MODE_SHIFT) /**< Direct Drive + SPI mode */
+
+/* EBI control - extended address range enable bit  */
+#define BC_EBI_CTRL_EXTADDR_MASK            (0x0001) /**< Enable extended addressing support */
+
+/* Arbiter control - directs access to display controller  */
+#define BC_ARB_CTRL_SHIFT                   0 /**< Bit offset value for ARB_CTRL setting */
+#define BC_ARB_CTRL_BC                      (0 << BC_ARB_CTRL_SHIFT) /**< BC drives display */
+#define BC_ARB_CTRL_EBI                     (1 << BC_ARB_CTRL_SHIFT) /**< EFM32GG EBI drives display, memory mapped or direct drive */
+#define BC_ARB_CTRL_SPI                     (2 << BC_ARB_CTRL_SHIFT) /**< EFM32GG SPI drives display */
+
+/* Interrupt flag registers, INTEN and INTFLAG */
+#define BC_INTEN_MASK                       (0x000f)  /**< Interrupt enable mask */
+#define BC_INTEN_PB                         (1 << 0)  /**< Push Button Interrupt enable */
+#define BC_INTEN_DIP                        (1 << 1)  /**< DIP Switch Interrupt enable */
+#define BC_INTEN_JOYSTICK                   (1 << 2)  /**< Joystick Interrupt enable */
+#define BC_INTEN_AEM                        (1 << 3)  /**< AEM Interrupt enable */
+#define BC_INTEN_ETH                        (1 << 4)  /**< Ethernet Interrupt enable */
+
+#define BC_INTFLAG_MASK                     (0x000f)  /**< Interrupt flag mask */
+#define BC_INTFLAG_PB                       (1 << 0)  /**< Push Button interrupt triggered */
+#define BC_INTFLAG_DIP                      (1 << 1)  /**< DIP interrupt triggered */
+#define BC_INTFLAG_JOYSTICK                 (1 << 2)  /**< Joystick interrupt triggered */
+#define BC_INTFLAG_AEM                      (1 << 3)  /**< AEM Interrupt triggered */
+#define BC_INTFLAG_ETH                      (1 << 4)  /**< Ethernet Interrupt triggered */
+
+/* Peripheral control registers */
+#define BC_PERICON_RS232_SHUTDOWN_SHIFT     13 /**< RS232 enable MUX bit */
+#define BC_PERICON_RS232_UART_SHIFT         12 /**< UART enable */
+#define BC_PERICON_RS232_LEUART_SHIFT       11 /**< LEUART enable */
+#define BC_PERICON_I2C_SHIFT                10 /**< I2C enable */
+#define BC_PERICON_I2S_ETH_SEL_SHIFT        9 /**< I2S/ETH/TFT SPI enable */
+#define BC_PERICON_I2S_ETH_SHIFT            8 /**< I2S/ETH mux select */
+#define BC_PERICON_TRACE_SHIFT              7 /**< ETM Trace enable */
+#define BC_PERICON_TOUCH_SHIFT              6 /**< Touch enable */
+#define BC_PERICON_AUDIO_IN_SHIFT           5 /**< Audio In enable */
+#define BC_PERICON_AUDIO_OUT_SEL_SHIFT      4 /**< Audio Out I2S/DAC select */
+#define BC_PERICON_AUDIO_OUT_SHIFT          3 /**< Audio Out enable */
+#define BC_PERICON_ANALOG_DIFF_SHIFT        2 /**< Analog Diff enable */
+#define BC_PERICON_ANALOG_SE_SHIFT          1 /**< Anallog SE enable */
+#define BC_PERICON_SPI_SHIFT                0 /**< Micro-SD SPI enable */
+
+/* SPI DEMUX control */
+#define BC_SPI_DEMUX_SLAVE_MASK             (0x0003) /**< Mask for SPI MUX bits */
+#define BC_SPI_DEMUX_SLAVE_AUDIO            (0) /**< SPI interface to I2S Audio */
+#define BC_SPI_DEMUX_SLAVE_ETHERNET         (1) /**< SPI interface to Ethernet controller */
+#define BC_SPI_DEMUX_SLAVE_DISPLAY          (2) /**< SPI interface to TFT-LCD-SSD2119 controller */
+
+/* ADC */
+#define BC_ADC_STATUS_DONE                  (0)  /**< ADC Status Done */
+#define BC_ADC_STATUS_BUSY                  (1)  /**< ADC Status Busy */
+
+/* Clock and Reset Control */
+#define BC_CLKRST_FLASH_SHIFT               (1 << 1) /**< Flash Reset Control */
+#define BC_CLKRST_ETH_SHIFT                 (1 << 2) /**< Ethernet Reset Control */
+
+/* Hardware version information */
+#define BC_HW_VERSION_PCB_MASK              (0x07f0)  /**< PCB Version mask */
+#define BC_HW_VERSION_PCB_SHIFT             (4)       /**< PCB Version shift */
+#define BC_HW_VERSION_BOARD_MASK            (0x000f)  /**< Board version mask */
+#define BC_HW_VERSION_BOARD_SHIFT           (0)       /**< Board version shift  */
+
+/* Firmware version information */
+#define BC_FW_VERSION_MAJOR_MASK            (0xf000) /**< FW Version major mask */
+#define BC_FW_VERSION_MAJOR_SHIFT           (12)     /**< FW version major shift */
+#define BC_FW_VERSION_MINOR_MASK            (0x0f00) /**< FW version minor mask */
+#define BC_FW_VERSION_MINOR_SHIFT           (8)      /**< FW version minor shift */
+#define BC_FW_VERSION_PATCHLEVEL_MASK       (0x00ff) /**< FW Patchlevel mask */
+#define BC_FW_VERSION_PATCHLEVEL_SHIFT      (0)      /**< FW Patchlevel shift */
+
+/* MBOX - BC <-> EFM32 communication */
+#define BC_MBOX_TXSTATUS0_FIFOEMPTY         (1 << 0) /**< BC/EFM32 communication register */
+#define BC_MBOX_TXSTATUS0_FIFOFULL          (1 << 1) /**< BC/EFM32 communication register */
+#define BC_MBOX_TXSTATUS0_FIFOUNDERFLOW     (1 << 4) /**< BC/EFM32 communication register */
+#define BC_MBOX_TXSTATUS0_FIFOOVERFLOW      (1 << 5) /**< BC/EFM32 communication register */
+
+#define BC_MBOX_TXSTATUS1_WORDCOUNT_MASK    (0x07FF) /**< BC/EFM32 communication register */
+
+/* Buffer Controller */
+#define BC_BUF_CTRL_CS_ENABLE               (1 << 0) /**< BC/EFM32 communication register */
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif

bsp/efm32/EFM32GG_DK3750/dvk_brd3600.c

@@ -1,114 +1,114 @@
-/**************************************************************************//**
- * @file
- * @brief EFM32GG_DK3750 board support package BRD3600A API implementation
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include "efm32.h"
-#include "em_gpio.h"
-#include "em_ebi.h"
-#include "em_cmu.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-/**************************************************************************//**
- * @brief Configure BRD3600A on-board peripherals.
- *****************************************************************************/
-void DVK_BRD3600A_init(void)
-{
-  /* Enable CMU GPIO clocks */
-  CMU_ClockEnable(cmuClock_GPIO, true);
-
-  /* USB status LED - configure PE1 as push pull */
-  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, 0);
-
-  /* USB overcurrent status - configure PE2 as push pull */
-  GPIO_PinModeSet(gpioPortE, 2, gpioModeInput, 0);
-
-  /* USB VBUS switch - configure PF5 as push pull - Default OFF */
-  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, 0);
-
-  return;
-}
-
-
-/**************************************************************************//**
- * @brief Disable EFM32GG_DK3750 EBI board support package functionality
- *****************************************************************************/
-void DVK_BRD3600A_deInit(void)
-{
-  /* Disable PE1 */
-  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, 0);
-
-  /* Disable CMU GPIO clocks */
-  CMU_ClockEnable(cmuClock_GPIO, false);
-
-
-  return;
-}
-
-/**************************************************************************//**
- * @brief Set state of USB status LED
- * @param[in] enable Set to true to light LED, false to dim it
- *****************************************************************************/
-void DVK_BRD3600A_usbStatusLEDEnable(int enable)
-{
-  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, enable);
-
-  return;
-}
-
-/**************************************************************************//**
- * @brief Enable VBUS switch
- * @param[in] enable Set to true to enable switch
- *****************************************************************************/
-void DVK_BRD3600A_usbVBUSSwitchEnable(int enable)
-{
-  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, enable);
-
-  return;
-}
-
-/**************************************************************************//**
- * @brief Get state of VBUS switch overcurrent flag
- *****************************************************************************/
-int DVK_BRD3600A_usbVBUSGetOCFlagState(void)
-{
-  return ~GPIO_PinInGet(gpioPortE, 2);
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package BRD3600A API implementation
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "em_gpio.h"
+#include "em_ebi.h"
+#include "em_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+/**************************************************************************//**
+ * @brief Configure BRD3600A on-board peripherals.
+ *****************************************************************************/
+void DVK_BRD3600A_init(void)
+{
+  /* Enable CMU GPIO clocks */
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  /* USB status LED - configure PE1 as push pull */
+  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, 0);
+
+  /* USB overcurrent status - configure PE2 as push pull */
+  GPIO_PinModeSet(gpioPortE, 2, gpioModeInput, 0);
+
+  /* USB VBUS switch - configure PF5 as push pull - Default OFF */
+  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, 0);
+
+  return;
+}
+
+
+/**************************************************************************//**
+ * @brief Disable EFM32GG_DK3750 EBI board support package functionality
+ *****************************************************************************/
+void DVK_BRD3600A_deInit(void)
+{
+  /* Disable PE1 */
+  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, 0);
+
+  /* Disable CMU GPIO clocks */
+  CMU_ClockEnable(cmuClock_GPIO, false);
+
+
+  return;
+}
+
+/**************************************************************************//**
+ * @brief Set state of USB status LED
+ * @param[in] enable Set to true to light LED, false to dim it
+ *****************************************************************************/
+void DVK_BRD3600A_usbStatusLEDEnable(int enable)
+{
+  GPIO_PinModeSet(gpioPortE, 1, gpioModePushPull, enable);
+
+  return;
+}
+
+/**************************************************************************//**
+ * @brief Enable VBUS switch
+ * @param[in] enable Set to true to enable switch
+ *****************************************************************************/
+void DVK_BRD3600A_usbVBUSSwitchEnable(int enable)
+{
+  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, enable);
+
+  return;
+}
+
+/**************************************************************************//**
+ * @brief Get state of VBUS switch overcurrent flag
+ *****************************************************************************/
+int DVK_BRD3600A_usbVBUSGetOCFlagState(void)
+{
+  return ~GPIO_PinInGet(gpioPortE, 2);
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/dvk_ebi.c

@@ -1,337 +1,337 @@
-/**************************************************************************//**
- * @file
- * @brief EFM32GG_DK3750 board support package EBI API implementation
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include "efm32.h"
-#include "em_gpio.h"
-#include "em_ebi.h"
-#include "em_cmu.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-#if defined(EBI_PRESENT)
-/**************************************************************************//**
- * @brief Configure EFM32GG_DK3750 EBI (external bus interface) access for
- *    - 0x80000000: Board Control registers (Xilinx Spartan FPGA)
- *    - 0x84000000: TFT memory mapped drive (URT/SSD2119 controller)
- *    - 0x88000000: PSRAM external memory (Micron MT45W2MW16PGA-70 IT)
- *    - 0x8c000000: NOR flash (Spansion flash S29GLxxx_FBGA)
- * @return true if successful, false if board controller access failed
- *****************************************************************************/
-bool DVK_EBI_init(void)
-{
-  EBI_Init_TypeDef ebiConfig = EBI_INIT_DEFAULT;
-
-  /* Enable clocks */
-  CMU_ClockEnable(cmuClock_EBI, true);
-  CMU_ClockEnable(cmuClock_GPIO, true);
-
-  /* Configure GPIO pins as push pull */
-  /* EBI AD9..15 */
-  GPIO_PinModeSet(gpioPortA, 0, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 1, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 2, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 3, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 4, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 5, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 6, gpioModePushPull, 0);
-
-  /* EBI AD8 */
-  GPIO_PinModeSet(gpioPortA, 15, gpioModePushPull, 0);
-
-  /* EBI A16-A22 */
-  GPIO_PinModeSet(gpioPortB, 0, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortB, 1, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortB, 2, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortB, 3, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortB, 4, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortB, 5, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortB, 6, gpioModePushPull, 0);
-
-  /* EBI CS0-CS3 */
-  GPIO_PinModeSet(gpioPortD, 9, gpioModePushPull, 1);
-  GPIO_PinModeSet(gpioPortD, 10, gpioModePushPull, 1);
-  GPIO_PinModeSet(gpioPortD, 11, gpioModePushPull, 1);
-  GPIO_PinModeSet(gpioPortD, 12, gpioModePushPull, 1);
-
-  /* EBI AD0..7 */
-  GPIO_PinModeSet(gpioPortE, 8, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 9, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 10, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 11, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 12, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 13, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 14, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 15, gpioModePushPull, 0);
-
-  /* EBI ARDY/WEN/REN/ALE */
-  /* ARDY on Port F Pin 2 is not used                 */
-  /* GPIO_PinModeSet(gpioPortF, 2, gpioModeInput, 0); */
-  GPIO_PinModeSet(gpioPortF, 8, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortF, 9, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortC, 11, gpioModePushPull, 0);
-
-  /* EBI Byte Lane 0 support BL0/BL1 */
-  GPIO_PinModeSet(gpioPortF, 6, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortF, 7, gpioModePushPull, 0);
-
-  /* ---------------------------------------------------- */
-  /* External 4MB PSRAM, Bank 2, Base Address 0x88000000  */
-  /* Micron MT45W2MW16PGA-70 IT, 32Mb Cellular RAM        */
-  /* ---------------------------------------------------- */
-  ebiConfig.banks        = EBI_BANK2;
-  ebiConfig.csLines      = EBI_CS2;
-  ebiConfig.mode         = ebiModeD16A16ALE;
-  ebiConfig.alePolarity  = ebiActiveHigh;
-  ebiConfig.blEnable     = true;
-  ebiConfig.noIdle       = true;
-  ebiConfig.ardyEnable   = false;
-  ebiConfig.addrHalfALE  = true;
-  ebiConfig.readPrefetch = true;
-  ebiConfig.aLow         = ebiALowA16;
-  ebiConfig.aHigh        = ebiAHighA23;
-  ebiConfig.location     = ebiLocation1;
-
-  /* Address Setup and hold time */
-  ebiConfig.addrHoldCycles  = 0;
-  ebiConfig.addrSetupCycles = 0;
-
-  /* Read cycle times */
-  ebiConfig.readStrobeCycles = 4;
-  ebiConfig.readHoldCycles   = 0;
-  ebiConfig.readSetupCycles  = 0;
-
-  /* Write cycle times */
-  ebiConfig.writeStrobeCycles = 2;
-  ebiConfig.writeHoldCycles   = 0;
-  ebiConfig.writeSetupCycles  = 0;
-
-  /* Configure EBI bank 2 - external PSRAM */
-  EBI_Init(&ebiConfig);
-
-  /* --------------------------------------------------------- */
-  /* Board Control Registers, Bank 0, Base Address 0x80000000  */
-  /* FPGA Xilinx Spartan XC6SLX9 CSG324                        */
-  /* --------------------------------------------------------- */
-  ebiConfig.banks       = EBI_BANK0;
-  ebiConfig.csLines     = EBI_CS0;
-  ebiConfig.mode        = ebiModeD16A16ALE;;
-  ebiConfig.alePolarity = ebiActiveHigh;
-  /* keep blEnable */
-  ebiConfig.blEnable     = false;
-  ebiConfig.addrHalfALE  = true;
-  ebiConfig.readPrefetch = false;
-  ebiConfig.noIdle       = true;
-
-  /* keep alow/ahigh configuration */
-  /* ebiConfig.aLow = ebiALowA0; - needs to be set for PSRAM */
-  /* ebiConfig.aHigh = ebiAHighA0; - needs to be set for PSRAM */
-
-  /* Address Setup and hold time */
-  ebiConfig.addrHoldCycles  = 3;
-  ebiConfig.addrSetupCycles = 3;
-
-  /* Read cycle times */
-  ebiConfig.readStrobeCycles = 7;
-  ebiConfig.readHoldCycles   = 3;
-  ebiConfig.readSetupCycles  = 3;
-
-  /* Write cycle times */
-  ebiConfig.writeStrobeCycles = 7;
-  ebiConfig.writeHoldCycles   = 3;
-  ebiConfig.writeSetupCycles  = 3;
-
-  /* Configure EBI bank 0 */
-  EBI_Init(&ebiConfig);
-
-  /* ----------------------------------------------------- */
-  /* TFT-LCD Registers, Bank1, Base Address 0x84000000     */
-  /* URT USMH_8252MD_320X240_RGB                           */
-  /* Solomon Systech SSD 2119                              */
-  /* ----------------------------------------------------- */
-  ebiConfig.banks   = EBI_BANK1;
-  ebiConfig.csLines = EBI_CS1;
-
-  /* Address Setup and hold time */
-  ebiConfig.addrHoldCycles  = 1;
-  ebiConfig.addrSetupCycles = 1;
-
-  /* Read cycle times */
-  ebiConfig.readStrobeCycles = 7;
-  ebiConfig.readHoldCycles   = 3;
-  ebiConfig.readSetupCycles  = 3;
-
-  /* Write cycle times */
-  ebiConfig.writeStrobeCycles = 2;
-  ebiConfig.writeHoldCycles   = 1;
-  ebiConfig.writeSetupCycles  = 1;
-
-  /* Configure EBI bank 1 */
-  EBI_Init(&ebiConfig);
-
-  /* ----------------------------------------- */
-  /* NOR Flash, Bank3, Base Address 0x8c000000 */
-  /* Spansion flash S29GLxxx_FBGA              */
-  /* ----------------------------------------- */
-  ebiConfig.banks       = EBI_BANK3;
-  ebiConfig.csLines     = EBI_CS3;
-  ebiConfig.mode        = ebiModeD16A16ALE;;
-  ebiConfig.alePolarity = ebiActiveHigh;
-
-  /* keep blEnable */
-  ebiConfig.blEnable     = true;
-  ebiConfig.addrHalfALE  = true;
-  ebiConfig.readPrefetch = false;
-  ebiConfig.noIdle       = true;
-
-  /* Address Setup and hold time */
-  ebiConfig.addrHoldCycles  = 0;
-  ebiConfig.addrSetupCycles = 0;
-
-  /* Read cycle times */
-  ebiConfig.readStrobeCycles = 5;
-  ebiConfig.readHoldCycles   = 0;
-  ebiConfig.readSetupCycles  = 0;
-
-  /* Write cycle times */
-  ebiConfig.writeStrobeCycles = 5;
-  ebiConfig.writeHoldCycles   = 0;
-  ebiConfig.writeSetupCycles  = 0;
-
-  /* Configure EBI bank 3 */
-  EBI_Init(&ebiConfig);
-
-  /* Enable extended address range */
-  DVK_EBI_extendedAddressRange(true);
-
-  /* Verify connectivity to Board Control registers */
-  if (BC_REGISTER->MAGIC != 0xef32)
-  {
-    return false;
-  }
-  else
-  {
-    return true;
-  }
-}
-
-
-/**************************************************************************//**
- * @brief Disable EFM32GG_DK3750 EBI board support package functionality
- *****************************************************************************/
-void DVK_EBI_disable(void)
-{
-  /* Configure GPIO pins as push pull */
-  /* EBI AD9..15 */
-  GPIO_PinModeSet(gpioPortA, 0, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 1, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 2, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 3, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 4, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 5, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 6, gpioModeDisabled, 0);
-
-  /* EBI AD8 */
-  GPIO_PinModeSet(gpioPortA, 15, gpioModeDisabled, 0);
-
-  /* EBI A16-A22 */
-  GPIO_PinModeSet(gpioPortB, 0, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortB, 1, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortB, 2, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortB, 3, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortB, 4, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortB, 5, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortB, 6, gpioModeDisabled, 0);
-
-  /* EBI CS0-CS3 */
-  GPIO_PinModeSet(gpioPortD, 9, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortD, 10, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortD, 11, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortD, 12, gpioModeDisabled, 0);
-
-  /* EBI AD0..7 */
-  GPIO_PinModeSet(gpioPortE, 8, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 9, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 10, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 11, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 12, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 13, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 14, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 15, gpioModeDisabled, 0);
-
-  /* EBI ARDY/WEN/REN/ALE */
-  /* ARDY on Port F Pin 2 is not used                 */
-  /* GPIO_PinModeSet(gpioPortF, 2, gpioModeDisabled, 0); */
-  GPIO_PinModeSet(gpioPortF, 8, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortF, 9, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortC, 11, gpioModeDisabled, 0);
-
-  /* EBI Byte Lane 0 support BL0/BL1 */
-  GPIO_PinModeSet(gpioPortF, 6, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortF, 7, gpioModeDisabled, 0);
-
-  /* Reset EBI configuration */
-  EBI_Disable();
-  /* Turn off EBI clock */
-  CMU_ClockEnable(cmuClock_EBI, false);
-}
-
-
-/**************************************************************************//**
- * @brief Configure EBI extended Address Range
- *
- * @param[in] enable
- *   Controls extended address range mode
- *****************************************************************************/
-void DVK_EBI_extendedAddressRange(bool enable)
-{
-  if (enable)
-  {
-    BC_REGISTER->EBI_CTRL = 0x0001;
-  }
-  else
-  {
-    BC_REGISTER->EBI_CTRL = 0x0000;
-  }
-}
-
-#endif
-
-/** @} (end group BSP) */
-
+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package EBI API implementation
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "em_gpio.h"
+#include "em_ebi.h"
+#include "em_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+#if defined(EBI_PRESENT)
+/**************************************************************************//**
+ * @brief Configure EFM32GG_DK3750 EBI (external bus interface) access for
+ *    - 0x80000000: Board Control registers (Xilinx Spartan FPGA)
+ *    - 0x84000000: TFT memory mapped drive (URT/SSD2119 controller)
+ *    - 0x88000000: PSRAM external memory (Micron MT45W2MW16PGA-70 IT)
+ *    - 0x8c000000: NOR flash (Spansion flash S29GLxxx_FBGA)
+ * @return true if successful, false if board controller access failed
+ *****************************************************************************/
+bool DVK_EBI_init(void)
+{
+  EBI_Init_TypeDef ebiConfig = EBI_INIT_DEFAULT;
+
+  /* Enable clocks */
+  CMU_ClockEnable(cmuClock_EBI, true);
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  /* Configure GPIO pins as push pull */
+  /* EBI AD9..15 */
+  GPIO_PinModeSet(gpioPortA, 0, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 1, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 2, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 3, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 4, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 5, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 6, gpioModePushPull, 0);
+
+  /* EBI AD8 */
+  GPIO_PinModeSet(gpioPortA, 15, gpioModePushPull, 0);
+
+  /* EBI A16-A22 */
+  GPIO_PinModeSet(gpioPortB, 0, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 1, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 2, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 3, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 4, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 5, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortB, 6, gpioModePushPull, 0);
+
+  /* EBI CS0-CS3 */
+  GPIO_PinModeSet(gpioPortD, 9, gpioModePushPull, 1);
+  GPIO_PinModeSet(gpioPortD, 10, gpioModePushPull, 1);
+  GPIO_PinModeSet(gpioPortD, 11, gpioModePushPull, 1);
+  GPIO_PinModeSet(gpioPortD, 12, gpioModePushPull, 1);
+
+  /* EBI AD0..7 */
+  GPIO_PinModeSet(gpioPortE, 8, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 9, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 10, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 11, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 12, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 13, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 14, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 15, gpioModePushPull, 0);
+
+  /* EBI ARDY/WEN/REN/ALE */
+  /* ARDY on Port F Pin 2 is not used                 */
+  /* GPIO_PinModeSet(gpioPortF, 2, gpioModeInput, 0); */
+  GPIO_PinModeSet(gpioPortF, 8, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortF, 9, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortC, 11, gpioModePushPull, 0);
+
+  /* EBI Byte Lane 0 support BL0/BL1 */
+  GPIO_PinModeSet(gpioPortF, 6, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortF, 7, gpioModePushPull, 0);
+
+  /* ---------------------------------------------------- */
+  /* External 4MB PSRAM, Bank 2, Base Address 0x88000000  */
+  /* Micron MT45W2MW16PGA-70 IT, 32Mb Cellular RAM        */
+  /* ---------------------------------------------------- */
+  ebiConfig.banks        = EBI_BANK2;
+  ebiConfig.csLines      = EBI_CS2;
+  ebiConfig.mode         = ebiModeD16A16ALE;
+  ebiConfig.alePolarity  = ebiActiveHigh;
+  ebiConfig.blEnable     = true;
+  ebiConfig.noIdle       = true;
+  ebiConfig.ardyEnable   = false;
+  ebiConfig.addrHalfALE  = true;
+  ebiConfig.readPrefetch = true;
+  ebiConfig.aLow         = ebiALowA16;
+  ebiConfig.aHigh        = ebiAHighA23;
+  ebiConfig.location     = ebiLocation1;
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 0;
+  ebiConfig.addrSetupCycles = 0;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 4;
+  ebiConfig.readHoldCycles   = 0;
+  ebiConfig.readSetupCycles  = 0;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 2;
+  ebiConfig.writeHoldCycles   = 0;
+  ebiConfig.writeSetupCycles  = 0;
+
+  /* Configure EBI bank 2 - external PSRAM */
+  EBI_Init(&ebiConfig);
+
+  /* --------------------------------------------------------- */
+  /* Board Control Registers, Bank 0, Base Address 0x80000000  */
+  /* FPGA Xilinx Spartan XC6SLX9 CSG324                        */
+  /* --------------------------------------------------------- */
+  ebiConfig.banks       = EBI_BANK0;
+  ebiConfig.csLines     = EBI_CS0;
+  ebiConfig.mode        = ebiModeD16A16ALE;;
+  ebiConfig.alePolarity = ebiActiveHigh;
+  /* keep blEnable */
+  ebiConfig.blEnable     = false;
+  ebiConfig.addrHalfALE  = true;
+  ebiConfig.readPrefetch = false;
+  ebiConfig.noIdle       = true;
+
+  /* keep alow/ahigh configuration */
+  /* ebiConfig.aLow = ebiALowA0; - needs to be set for PSRAM */
+  /* ebiConfig.aHigh = ebiAHighA0; - needs to be set for PSRAM */
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 3;
+  ebiConfig.addrSetupCycles = 3;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 7;
+  ebiConfig.readHoldCycles   = 3;
+  ebiConfig.readSetupCycles  = 3;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 7;
+  ebiConfig.writeHoldCycles   = 3;
+  ebiConfig.writeSetupCycles  = 3;
+
+  /* Configure EBI bank 0 */
+  EBI_Init(&ebiConfig);
+
+  /* ----------------------------------------------------- */
+  /* TFT-LCD Registers, Bank1, Base Address 0x84000000     */
+  /* URT USMH_8252MD_320X240_RGB                           */
+  /* Solomon Systech SSD 2119                              */
+  /* ----------------------------------------------------- */
+  ebiConfig.banks   = EBI_BANK1;
+  ebiConfig.csLines = EBI_CS1;
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 1;
+  ebiConfig.addrSetupCycles = 1;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 7;
+  ebiConfig.readHoldCycles   = 3;
+  ebiConfig.readSetupCycles  = 3;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 2;
+  ebiConfig.writeHoldCycles   = 1;
+  ebiConfig.writeSetupCycles  = 1;
+
+  /* Configure EBI bank 1 */
+  EBI_Init(&ebiConfig);
+
+  /* ----------------------------------------- */
+  /* NOR Flash, Bank3, Base Address 0x8c000000 */
+  /* Spansion flash S29GLxxx_FBGA              */
+  /* ----------------------------------------- */
+  ebiConfig.banks       = EBI_BANK3;
+  ebiConfig.csLines     = EBI_CS3;
+  ebiConfig.mode        = ebiModeD16A16ALE;;
+  ebiConfig.alePolarity = ebiActiveHigh;
+
+  /* keep blEnable */
+  ebiConfig.blEnable     = true;
+  ebiConfig.addrHalfALE  = true;
+  ebiConfig.readPrefetch = false;
+  ebiConfig.noIdle       = true;
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles  = 0;
+  ebiConfig.addrSetupCycles = 0;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 5;
+  ebiConfig.readHoldCycles   = 0;
+  ebiConfig.readSetupCycles  = 0;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 5;
+  ebiConfig.writeHoldCycles   = 0;
+  ebiConfig.writeSetupCycles  = 0;
+
+  /* Configure EBI bank 3 */
+  EBI_Init(&ebiConfig);
+
+  /* Enable extended address range */
+  DVK_EBI_extendedAddressRange(true);
+
+  /* Verify connectivity to Board Control registers */
+  if (BC_REGISTER->MAGIC != 0xef32)
+  {
+    return false;
+  }
+  else
+  {
+    return true;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief Disable EFM32GG_DK3750 EBI board support package functionality
+ *****************************************************************************/
+void DVK_EBI_disable(void)
+{
+  /* Configure GPIO pins as push pull */
+  /* EBI AD9..15 */
+  GPIO_PinModeSet(gpioPortA, 0, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 1, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 2, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 3, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 4, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 5, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 6, gpioModeDisabled, 0);
+
+  /* EBI AD8 */
+  GPIO_PinModeSet(gpioPortA, 15, gpioModeDisabled, 0);
+
+  /* EBI A16-A22 */
+  GPIO_PinModeSet(gpioPortB, 0, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 1, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 2, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 3, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 4, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 5, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortB, 6, gpioModeDisabled, 0);
+
+  /* EBI CS0-CS3 */
+  GPIO_PinModeSet(gpioPortD, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 10, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 11, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 12, gpioModeDisabled, 0);
+
+  /* EBI AD0..7 */
+  GPIO_PinModeSet(gpioPortE, 8, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 10, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 11, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 12, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 13, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 14, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 15, gpioModeDisabled, 0);
+
+  /* EBI ARDY/WEN/REN/ALE */
+  /* ARDY on Port F Pin 2 is not used                 */
+  /* GPIO_PinModeSet(gpioPortF, 2, gpioModeDisabled, 0); */
+  GPIO_PinModeSet(gpioPortF, 8, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortF, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortC, 11, gpioModeDisabled, 0);
+
+  /* EBI Byte Lane 0 support BL0/BL1 */
+  GPIO_PinModeSet(gpioPortF, 6, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortF, 7, gpioModeDisabled, 0);
+
+  /* Reset EBI configuration */
+  EBI_Disable();
+  /* Turn off EBI clock */
+  CMU_ClockEnable(cmuClock_EBI, false);
+}
+
+
+/**************************************************************************//**
+ * @brief Configure EBI extended Address Range
+ *
+ * @param[in] enable
+ *   Controls extended address range mode
+ *****************************************************************************/
+void DVK_EBI_extendedAddressRange(bool enable)
+{
+  if (enable)
+  {
+    BC_REGISTER->EBI_CTRL = 0x0001;
+  }
+  else
+  {
+    BC_REGISTER->EBI_CTRL = 0x0000;
+  }
+}
+
+#endif
+
+/** @} (end group BSP) */
+

bsp/efm32/EFM32GG_DK3750/dvk_spi.c

@@ -1,253 +1,253 @@
-/**************************************************************************//**
- * @file
- * @brief EFM32GG_DK3750 board support package SPI API implementation
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include "efm32.h"
-#include "em_gpio.h"
-#include "em_usart.h"
-#include "em_cmu.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-/* USART used for SPI access */
-#define USART_USED      USART2 /**< USART used for BC register interface */
-#define USART_CLK       cmuClock_USART2 /**< Clock for BC register USART */
-
-/* GPIO pins used, please refer to DVK user guide. */
-#define PORT_SPI_TX     gpioPortC /**< SPI transmit GPIO port */
-#define PIN_SPI_TX      2         /**< SPI transmit GPIO pin */
-#define PORT_SPI_RX     gpioPortC /**< SPI receive GPIO port */
-#define PIN_SPI_RX      3         /**< SPI receive GPIO pin */
-#define PORT_SPI_CLK    gpioPortC /**< SPI clock port */
-#define PIN_SPI_CLK     4         /**< SPI clock pin */
-#define PORT_SPI_CS     gpioPortC /**< SPI Chip Select port */
-#define PIN_SPI_CS      5         /**< SPI Chip Select pin */
-
-static volatile const uint16_t *lastAddr = 0; /**< Last register accessed */
-
-/**************************************************************************//**
- * @brief  Initializes SPI interface for access to board controller
- *         FPGA registers
- *****************************************************************************/
-static void SPI_BC_Init(void)
-{
-  USART_InitSync_TypeDef bcinit = USART_INITSYNC_DEFAULT;
-
-  /* Enable module clocks */
-  CMU_ClockEnable(USART_CLK, true);
-
-  /* Configure SPI pins */
-  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
-  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeInput, 0);
-  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModePushPull, 0);
-
-  /* Keep CS high to not activate slave */
-  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModePushPull, 1);
-
-  /* Configure to use SPI master with manual CS */
-  /* For now, configure SPI for worst case 48MHz clock in order to work for all */
-  /* configurations. */
-  bcinit.refFreq  = 48000000;
-  bcinit.baudrate = 7000000;
-
-  /* Initialize USART */
-  USART_InitSync(USART_USED, &bcinit);
-
-  /* Enable pins at default location */
-  USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
-}
-
-
-/**************************************************************************//**
- * @brief  Disables GPIO pins and USART from FPGA register access
- *****************************************************************************/
-static void SPI_BC_Disable(void)
-{
-  /* Restore and disable USART */
-  USART_Reset(USART_USED);
-
-  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModeDisabled, 0);
-
-  /* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
-   * might be using it */
-  CMU_ClockEnable(USART_CLK, false);
-}
-
-
-/**************************************************************************//**
- * @brief  Perform SPI Transfer
- * @param addr Register offset, starting at 0
- * @param rw 0 on write, 1 on read accesses
- * @param data 16-bit data to write into register/dummy data for reads
- * @return 16-bit data received from SPI access
- *****************************************************************************/
-static uint16_t SPI_BC_Access(uint8_t addr, uint8_t rw, uint16_t data)
-{
-  uint16_t tmp;
-
-  /* Enable CS */
-  GPIO_PinOutClear(PORT_SPI_CS, PIN_SPI_CS);
-
-  /* Write SPI address MSB */
-  USART_Tx(USART_USED, (addr & 0x3) | rw << 3);
-  /* Just ignore data read back */
-  USART_Rx(USART_USED);
-
-  /* Write SPI address  LSB */
-  USART_Tx(USART_USED, data & 0xFF);
-
-  tmp = (uint16_t) USART_Rx(USART_USED);
-
-  /* SPI data MSB */
-  USART_Tx(USART_USED, data >> 8);
-  tmp |= (uint16_t) USART_Rx(USART_USED) << 8;
-
-  /* Disable CS */
-  GPIO_PinOutSet(PORT_SPI_CS, PIN_SPI_CS);
-
-  return tmp;
-}
-
-
-/**************************************************************************//**
- * @brief  Performs SPI write to FPGA register
- * @param  addr Address of register
- * @param  data Data to write
- *****************************************************************************/
-static void SPI_BC_Write(uint8_t addr, uint16_t data)
-{
-  SPI_BC_Access(addr, 0, data);
-}
-
-
-/**************************************************************************//**
- * @brief  Performs SPI read from FPGA register
- * @param  addr Address of register
- * @return 16-bit value of board controller register
- *****************************************************************************/
-static uint16_t SPI_BC_Read(uint8_t addr)
-{
-  return SPI_BC_Access(addr, 1, 0);
-}
-
-
-/**************************************************************************//**
- * @brief  Initializes DVK register access
- * @return true on success, false on failure
- *****************************************************************************/
-bool DVK_SPI_init(void)
-{
-  uint16_t bcMagic;
-
-  /* Enable HF and GPIO clocks */
-  CMU_ClockEnable(cmuClock_HFPER, true);
-  CMU_ClockEnable(cmuClock_GPIO, true);
-
-  /* Configure SPI mode of operation */
-  DVK_busControlMode(DVK_BusControl_SPI);
-
-  SPI_BC_Init();
-  /* Read "board control Magic" register to verify SPI is up and running */
-  /*  if not FPGA is configured to be in EBI mode  */
-  bcMagic = DVK_SPI_readRegister(&BC_REGISTER->MAGIC);
-  if (bcMagic != BC_MAGIC_VALUE)
-  {
-    return false;
-  }
-  else
-  {
-    return true;
-  }
-}
-
-
-/**************************************************************************//**
- * @brief  Disable and free up resources used by SPI board control access
- *****************************************************************************/
-void DVK_SPI_disable(void)
-{
-  SPI_BC_Disable();
-}
-
-
-/**************************************************************************//**
- * @brief     Perform read from DVK board control register
- * @param[in] addr Address of register to read from
- * @return    Value of board controller register
- *****************************************************************************/
-uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
-{
-  uint16_t data;
-
-  if (addr != lastAddr)
-  {
-    SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
-    SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
-    SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
-  }
-  /* Read twice; when register address has changed we need two SPI transfer
-   * to clock out valid data through board controller FIFOs */
-  data     = SPI_BC_Read(0x03);
-  data     = SPI_BC_Read(0x03);
-  lastAddr = addr;
-  return data;
-}
-
-
-/**************************************************************************//**
- * @brief Perform write to DVK board control register
- * @param addr Address of register to write to
- * @param data 16-bit to  write into register
- *****************************************************************************/
-void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
-{
-  if (addr != lastAddr)
-  {
-    SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
-    SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
-    SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
-  }
-  SPI_BC_Write(0x03, data);                                     /*Data*/
-  lastAddr = addr;
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief EFM32GG_DK3750 board support package SPI API implementation
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "em_gpio.h"
+#include "em_usart.h"
+#include "em_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+/* USART used for SPI access */
+#define USART_USED      USART2 /**< USART used for BC register interface */
+#define USART_CLK       cmuClock_USART2 /**< Clock for BC register USART */
+
+/* GPIO pins used, please refer to DVK user guide. */
+#define PORT_SPI_TX     gpioPortC /**< SPI transmit GPIO port */
+#define PIN_SPI_TX      2         /**< SPI transmit GPIO pin */
+#define PORT_SPI_RX     gpioPortC /**< SPI receive GPIO port */
+#define PIN_SPI_RX      3         /**< SPI receive GPIO pin */
+#define PORT_SPI_CLK    gpioPortC /**< SPI clock port */
+#define PIN_SPI_CLK     4         /**< SPI clock pin */
+#define PORT_SPI_CS     gpioPortC /**< SPI Chip Select port */
+#define PIN_SPI_CS      5         /**< SPI Chip Select pin */
+
+static volatile const uint16_t *lastAddr = 0; /**< Last register accessed */
+
+/**************************************************************************//**
+ * @brief  Initializes SPI interface for access to board controller
+ *         FPGA registers
+ *****************************************************************************/
+static void SPI_BC_Init(void)
+{
+  USART_InitSync_TypeDef bcinit = USART_INITSYNC_DEFAULT;
+
+  /* Enable module clocks */
+  CMU_ClockEnable(USART_CLK, true);
+
+  /* Configure SPI pins */
+  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
+  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeInput, 0);
+  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModePushPull, 0);
+
+  /* Keep CS high to not activate slave */
+  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModePushPull, 1);
+
+  /* Configure to use SPI master with manual CS */
+  /* For now, configure SPI for worst case 48MHz clock in order to work for all */
+  /* configurations. */
+  bcinit.refFreq  = 48000000;
+  bcinit.baudrate = 7000000;
+
+  /* Initialize USART */
+  USART_InitSync(USART_USED, &bcinit);
+
+  /* Enable pins at default location */
+  USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
+}
+
+
+/**************************************************************************//**
+ * @brief  Disables GPIO pins and USART from FPGA register access
+ *****************************************************************************/
+static void SPI_BC_Disable(void)
+{
+  /* Restore and disable USART */
+  USART_Reset(USART_USED);
+
+  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModeDisabled, 0);
+
+  /* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
+   * might be using it */
+  CMU_ClockEnable(USART_CLK, false);
+}
+
+
+/**************************************************************************//**
+ * @brief  Perform SPI Transfer
+ * @param addr Register offset, starting at 0
+ * @param rw 0 on write, 1 on read accesses
+ * @param data 16-bit data to write into register/dummy data for reads
+ * @return 16-bit data received from SPI access
+ *****************************************************************************/
+static uint16_t SPI_BC_Access(uint8_t addr, uint8_t rw, uint16_t data)
+{
+  uint16_t tmp;
+
+  /* Enable CS */
+  GPIO_PinOutClear(PORT_SPI_CS, PIN_SPI_CS);
+
+  /* Write SPI address MSB */
+  USART_Tx(USART_USED, (addr & 0x3) | rw << 3);
+  /* Just ignore data read back */
+  USART_Rx(USART_USED);
+
+  /* Write SPI address  LSB */
+  USART_Tx(USART_USED, data & 0xFF);
+
+  tmp = (uint16_t) USART_Rx(USART_USED);
+
+  /* SPI data MSB */
+  USART_Tx(USART_USED, data >> 8);
+  tmp |= (uint16_t) USART_Rx(USART_USED) << 8;
+
+  /* Disable CS */
+  GPIO_PinOutSet(PORT_SPI_CS, PIN_SPI_CS);
+
+  return tmp;
+}
+
+
+/**************************************************************************//**
+ * @brief  Performs SPI write to FPGA register
+ * @param  addr Address of register
+ * @param  data Data to write
+ *****************************************************************************/
+static void SPI_BC_Write(uint8_t addr, uint16_t data)
+{
+  SPI_BC_Access(addr, 0, data);
+}
+
+
+/**************************************************************************//**
+ * @brief  Performs SPI read from FPGA register
+ * @param  addr Address of register
+ * @return 16-bit value of board controller register
+ *****************************************************************************/
+static uint16_t SPI_BC_Read(uint8_t addr)
+{
+  return SPI_BC_Access(addr, 1, 0);
+}
+
+
+/**************************************************************************//**
+ * @brief  Initializes DVK register access
+ * @return true on success, false on failure
+ *****************************************************************************/
+bool DVK_SPI_init(void)
+{
+  uint16_t bcMagic;
+
+  /* Enable HF and GPIO clocks */
+  CMU_ClockEnable(cmuClock_HFPER, true);
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  /* Configure SPI mode of operation */
+  DVK_busControlMode(DVK_BusControl_SPI);
+
+  SPI_BC_Init();
+  /* Read "board control Magic" register to verify SPI is up and running */
+  /*  if not FPGA is configured to be in EBI mode  */
+  bcMagic = DVK_SPI_readRegister(&BC_REGISTER->MAGIC);
+  if (bcMagic != BC_MAGIC_VALUE)
+  {
+    return false;
+  }
+  else
+  {
+    return true;
+  }
+}
+
+
+/**************************************************************************//**
+ * @brief  Disable and free up resources used by SPI board control access
+ *****************************************************************************/
+void DVK_SPI_disable(void)
+{
+  SPI_BC_Disable();
+}
+
+
+/**************************************************************************//**
+ * @brief     Perform read from DVK board control register
+ * @param[in] addr Address of register to read from
+ * @return    Value of board controller register
+ *****************************************************************************/
+uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
+{
+  uint16_t data;
+
+  if (addr != lastAddr)
+  {
+    SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
+    SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
+    SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
+  }
+  /* Read twice; when register address has changed we need two SPI transfer
+   * to clock out valid data through board controller FIFOs */
+  data     = SPI_BC_Read(0x03);
+  data     = SPI_BC_Read(0x03);
+  lastAddr = addr;
+  return data;
+}
+
+
+/**************************************************************************//**
+ * @brief Perform write to DVK board control register
+ * @param addr Address of register to write to
+ * @param data 16-bit to  write into register
+ *****************************************************************************/
+void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  if (addr != lastAddr)
+  {
+    SPI_BC_Write(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
+    SPI_BC_Write(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
+    SPI_BC_Write(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
+  }
+  SPI_BC_Write(0x03, data);                                     /*Data*/
+  lastAddr = addr;
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/trace.c

@@ -1,147 +1,147 @@
-/**************************************************************************//**
- * @file
- * @brief API for enabling SWO or ETM trace on DK3750 board
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-#include <stdbool.h>
-#include "efm32.h"
-#include "em_gpio.h"
-#include "em_cmu.h"
-#include "trace.h"
-
-/**************************************************************************//**
- * @brief Configure EFM32GG990F1024 for DK3750 ETM trace output
- * @note You need to configure ETM trace on on kit config menu as well!
- *****************************************************************************/
-void TRACE_ETMSetup(void)
-{
-  /* Enable peripheral clocks */
-  CMU->HFCORECLKEN0 |= CMU_HFCORECLKEN0_LE;
-  CMU->HFPERCLKEN0  |= CMU_HFPERCLKEN0_GPIO;
-  CMU->OSCENCMD      = CMU_OSCENCMD_AUXHFRCOEN;
-
-  /* Wait until AUXHFRCO clock is ready */
-  while (!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY)) ;
-
-  /* Enable Port D, pins 3,4,5,6 for ETM Trace Data output */
-  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE3_MASK) | GPIO_P_MODEL_MODE3_PUSHPULL;
-  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE4_MASK) | GPIO_P_MODEL_MODE4_PUSHPULL;
-  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE5_MASK) | GPIO_P_MODEL_MODE5_PUSHPULL;
-  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE6_MASK) | GPIO_P_MODEL_MODE6_PUSHPULL;
-
-  /* Enable Port D, pin 7 for DBG_TCLK */
-  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE7_MASK) | GPIO_P_MODEL_MODE7_PUSHPULL;
-
-  /* Configure trace output for alternate location */
-  GPIO->ROUTE = GPIO->ROUTE | GPIO_ROUTE_TCLKPEN | GPIO_ROUTE_TD0PEN | GPIO_ROUTE_TD1PEN
-                | GPIO_ROUTE_TD2PEN | GPIO_ROUTE_TD3PEN
-                | GPIO_ROUTE_ETMLOCATION_LOC0;
-}
-
-
-/**************************************************************************//**
- * @brief Configure trace output for energyAware Profiler
- * @note Kit needs to be initialized with SPI-mode;
- *       @verbatim DVK_init(DVK_Init_SPI); @endverbatim
- *****************************************************************************/
-void TRACE_SWOSetup(void)
-{
-  /* Debug logic registers */
-  volatile uint32_t *dwt_ctrl = (uint32_t *) 0xE0001000;
-  volatile uint32_t *tpiu_prescaler = (uint32_t *) 0xE0040010;
-  volatile uint32_t *tpiu_protocol = (uint32_t *) 0xE00400F0;
-
-  /* Enable GPIO clock */
-  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
-
-  /* Enable Serial wire output pin */
-  GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
-
-  /* Set location 0 */
-  GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC0;
-
-  /* Enable output on pin - GPIO Port F, Pin 2 */
-  GPIO->P[5].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK);
-  GPIO->P[5].MODEL |= GPIO_P_MODEL_MODE2_PUSHPULL;
-
-  /* Enable debug clock AUXHFRCO */
-  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
-
-  /* Wait until clock is ready */
-  while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
-
-  /* Enable trace in core debug */
-  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-
-  /* Enable PC and IRQ sampling output */
-  *dwt_ctrl = 0x400113FF;
-
-  /* Set TPIU prescaler to 16. */
-  *tpiu_prescaler = 0xf;
-
-  /* Set protocol to NRZ */
-  *tpiu_protocol = 2;
-
-  /* Unlock ITM and output data */
-  ITM->LAR = 0xC5ACCE55;
-  ITM->TCR = 0x10009;
-}
-
-
-/**************************************************************************//**
- * @brief Profiler configuration for EFM32GG990F11024/EFM32GG-DK3750
- * @return true if energyAware Profiler/SWO is enabled, false if not
- * @note If first word of the user page is zero, this will not 
- *       enable SWO profiler output
- *****************************************************************************/
-bool TRACE_ProfilerSetup(void)
-{
-  volatile uint32_t *userData = (uint32_t *) USER_PAGE;
-
-  /* Check magic "trace" word in user page */
-  if(*userData == 0x00000000UL)
-  {
-    return false;
-  }
-  else
-  {
-    TRACE_SWOSetup();
-    return true;
-  }  
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief API for enabling SWO or ETM trace on DK3750 board
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+#include <stdbool.h>
+#include "efm32.h"
+#include "em_gpio.h"
+#include "em_cmu.h"
+#include "trace.h"
+
+/**************************************************************************//**
+ * @brief Configure EFM32GG990F1024 for DK3750 ETM trace output
+ * @note You need to configure ETM trace on on kit config menu as well!
+ *****************************************************************************/
+void TRACE_ETMSetup(void)
+{
+  /* Enable peripheral clocks */
+  CMU->HFCORECLKEN0 |= CMU_HFCORECLKEN0_LE;
+  CMU->HFPERCLKEN0  |= CMU_HFPERCLKEN0_GPIO;
+  CMU->OSCENCMD      = CMU_OSCENCMD_AUXHFRCOEN;
+
+  /* Wait until AUXHFRCO clock is ready */
+  while (!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY)) ;
+
+  /* Enable Port D, pins 3,4,5,6 for ETM Trace Data output */
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE3_MASK) | GPIO_P_MODEL_MODE3_PUSHPULL;
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE4_MASK) | GPIO_P_MODEL_MODE4_PUSHPULL;
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE5_MASK) | GPIO_P_MODEL_MODE5_PUSHPULL;
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE6_MASK) | GPIO_P_MODEL_MODE6_PUSHPULL;
+
+  /* Enable Port D, pin 7 for DBG_TCLK */
+  GPIO->P[3].MODEL = (GPIO->P[3].MODEL & ~_GPIO_P_MODEL_MODE7_MASK) | GPIO_P_MODEL_MODE7_PUSHPULL;
+
+  /* Configure trace output for alternate location */
+  GPIO->ROUTE = GPIO->ROUTE | GPIO_ROUTE_TCLKPEN | GPIO_ROUTE_TD0PEN | GPIO_ROUTE_TD1PEN
+                | GPIO_ROUTE_TD2PEN | GPIO_ROUTE_TD3PEN
+                | GPIO_ROUTE_ETMLOCATION_LOC0;
+}
+
+
+/**************************************************************************//**
+ * @brief Configure trace output for energyAware Profiler
+ * @note Kit needs to be initialized with SPI-mode;
+ *       @verbatim DVK_init(DVK_Init_SPI); @endverbatim
+ *****************************************************************************/
+void TRACE_SWOSetup(void)
+{
+  /* Debug logic registers */
+  volatile uint32_t *dwt_ctrl = (uint32_t *) 0xE0001000;
+  volatile uint32_t *tpiu_prescaler = (uint32_t *) 0xE0040010;
+  volatile uint32_t *tpiu_protocol = (uint32_t *) 0xE00400F0;
+
+  /* Enable GPIO clock */
+  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
+
+  /* Enable Serial wire output pin */
+  GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
+
+  /* Set location 0 */
+  GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC0;
+
+  /* Enable output on pin - GPIO Port F, Pin 2 */
+  GPIO->P[5].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK);
+  GPIO->P[5].MODEL |= GPIO_P_MODEL_MODE2_PUSHPULL;
+
+  /* Enable debug clock AUXHFRCO */
+  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
+
+  /* Wait until clock is ready */
+  while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
+
+  /* Enable trace in core debug */
+  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+
+  /* Enable PC and IRQ sampling output */
+  *dwt_ctrl = 0x400113FF;
+
+  /* Set TPIU prescaler to 16. */
+  *tpiu_prescaler = 0xf;
+
+  /* Set protocol to NRZ */
+  *tpiu_protocol = 2;
+
+  /* Unlock ITM and output data */
+  ITM->LAR = 0xC5ACCE55;
+  ITM->TCR = 0x10009;
+}
+
+
+/**************************************************************************//**
+ * @brief Profiler configuration for EFM32GG990F11024/EFM32GG-DK3750
+ * @return true if energyAware Profiler/SWO is enabled, false if not
+ * @note If first word of the user page is zero, this will not 
+ *       enable SWO profiler output
+ *****************************************************************************/
+bool TRACE_ProfilerSetup(void)
+{
+  volatile uint32_t *userData = (uint32_t *) USER_PAGE;
+
+  /* Check magic "trace" word in user page */
+  if(*userData == 0x00000000UL)
+  {
+    return false;
+  }
+  else
+  {
+    TRACE_SWOSetup();
+    return true;
+  }  
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32GG_DK3750/trace.h

@@ -1,110 +1,110 @@
-/**************************************************************************//**
- * @file
- * @brief SWO Trace API (for eAProfiler)
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-#ifndef __TRACE_H
-#define __TRACE_H
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-#include <stdbool.h>
-#include <stdint.h>
-#include "em_msc.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void TRACE_ETMSetup(void);
-void TRACE_SWOSetup(void);
-bool TRACE_ProfilerSetup(void);
-
-#define USER_PAGE 0x0FE00000UL
-
-/**************************************************************************//**
- * @brief Set or clear word in user page which enables or disables SWO
- *        for TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
- *        no example project will enable SWO trace.
- * @param[in] enable
- * @note Add "em_msc.c" to build to use this function. 
- *****************************************************************************/
-__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
-{
-  uint32_t data;
-  volatile uint32_t *userpage = (uint32_t *) USER_PAGE;
-
-  /* Check that configuration needs to change */
-  data = *userpage;
-  if(enable)
-  {
-    if(data == 0xFFFFFFFF) 
-    {
-      return;
-    }
-  }
-  else
-  {
-    if(data == 0x00000000)
-    {
-      return;
-    }
-  }
-
-  /* Initialize MSC */
-  MSC_Init();
-
-  /* Write enble or disable trigger word into flash */
-  if(enable)
-  {
-    data = 0xFFFFFFFF;
-    MSC_ErasePage((uint32_t *)USER_PAGE);
-    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
-  }
-  else
-  {
-    data = 0x00000000;
-    MSC_ErasePage((uint32_t *)USER_PAGE);
-    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
-  }
-}
-
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} (end group BSP) */
-
-#endif
+/**************************************************************************//**
+ * @file
+ * @brief SWO Trace API (for eAProfiler)
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#ifndef __TRACE_H
+#define __TRACE_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+#include <stdbool.h>
+#include <stdint.h>
+#include "em_msc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void TRACE_ETMSetup(void);
+void TRACE_SWOSetup(void);
+bool TRACE_ProfilerSetup(void);
+
+#define USER_PAGE 0x0FE00000UL
+
+/**************************************************************************//**
+ * @brief Set or clear word in user page which enables or disables SWO
+ *        for TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
+ *        no example project will enable SWO trace.
+ * @param[in] enable
+ * @note Add "em_msc.c" to build to use this function. 
+ *****************************************************************************/
+__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
+{
+  uint32_t data;
+  volatile uint32_t *userpage = (uint32_t *) USER_PAGE;
+
+  /* Check that configuration needs to change */
+  data = *userpage;
+  if(enable)
+  {
+    if(data == 0xFFFFFFFF) 
+    {
+      return;
+    }
+  }
+  else
+  {
+    if(data == 0x00000000)
+    {
+      return;
+    }
+  }
+
+  /* Initialize MSC */
+  MSC_Init();
+
+  /* Write enble or disable trigger word into flash */
+  if(enable)
+  {
+    data = 0xFFFFFFFF;
+    MSC_ErasePage((uint32_t *)USER_PAGE);
+    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
+  }
+  else
+  {
+    data = 0x00000000;
+    MSC_ErasePage((uint32_t *)USER_PAGE);
+    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
+  }
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif

bsp/efm32/EFM32_Gxxx_DK/dvk.c

@@ -1,83 +1,83 @@
-/**************************************************************************//**
- * @file
- * @brief DVK board support package, initialization
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#include "efm32.h"
-#include "dvk.h"
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-/**************************************************************************//**
- * @brief  Initializes DVK, configures board control access
- *****************************************************************************/
-bool DVK_init(void)
-{
-  bool ret;
-#ifdef DVK_EBI_CONTROL
-  ret = DVK_EBI_init();
-#endif
-#ifdef DVK_SPI_CONTROL
-  ret = DVK_SPI_init();
-#endif  
-  if ( ret == false )
-  {
-    /* Board is configured in wrong mode, please restart KIT! */
-    while(1);
-  }
-  /* Inform AEM application that we are in Energy Mode 0 by default */
-  DVK_setEnergyMode(0);
-  return ret;
-}
-
-/**************************************************************************//**
- * @brief  Disables DVK, free up resources
- *****************************************************************************/
-void DVK_disable(void)
-{
-#ifdef DVK_EBI_CONTROL
-  /* Handover bus control */
-  DVK_disableBus();
-  /* Disable EBI interface */
-  DVK_EBI_disable();
-#endif
-
-#ifdef DVK_SPI_CONTROL
-  DVK_SPI_disable();
-#endif
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief DVK board support package, initialization
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+#include "efm32.h"
+#include "dvk.h"
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+/**************************************************************************//**
+ * @brief  Initializes DVK, configures board control access
+ *****************************************************************************/
+bool DVK_init(void)
+{
+  bool ret;
+#ifdef DVK_EBI_CONTROL
+  ret = DVK_EBI_init();
+#endif
+#ifdef DVK_SPI_CONTROL
+  ret = DVK_SPI_init();
+#endif  
+  if ( ret == false )
+  {
+    /* Board is configured in wrong mode, please restart KIT! */
+    while(1);
+  }
+  /* Inform AEM application that we are in Energy Mode 0 by default */
+  DVK_setEnergyMode(0);
+  return ret;
+}
+
+/**************************************************************************//**
+ * @brief  Disables DVK, free up resources
+ *****************************************************************************/
+void DVK_disable(void)
+{
+#ifdef DVK_EBI_CONTROL
+  /* Handover bus control */
+  DVK_disableBus();
+  /* Disable EBI interface */
+  DVK_EBI_disable();
+#endif
+
+#ifdef DVK_SPI_CONTROL
+  DVK_SPI_disable();
+#endif
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32_Gxxx_DK/dvk.h

@@ -1,148 +1,148 @@
-/**************************************************************************//**
- * @file
- * @brief DVK Board Support, master header file
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __DVK_H
-#define __DVK_H
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "dvk_boardcontrol.h"
-#include "dvk_bcregisters.h"
-
-/* onelife: Add missing define */
-#define NULL ((void *)0)
-
-/* IF not user overrides default, try to decide DVK access interface based on
- * part number */
-#ifndef DVK_SPI_CONTROL
-#ifndef DVK_EBI_CONTROL
-
-#if defined(EFM32G200F16)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G200F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G200F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G210F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G230F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G230F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G230F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G280F128)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G280F32)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G280F64)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G290F128)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G290F32)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G290F64)
-#define DVK_EBI_CONTROL
-#elif defined(EFM32G840F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G840F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G840F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G880F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G880F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G880F64)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G890F128)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G890F32)
-#define DVK_SPI_CONTROL
-#elif defined(EFM32G890F64)
-#define DVK_SPI_CONTROL
-#else
-#define DVK_SPI_CONTROL
-#endif
-
-#endif
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* EBI access */
-bool DVK_EBI_init(void);
-void DVK_EBI_disable(void);
-void DVK_EBI_configure(void);
-void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
-uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
-
-/* SPI access */
-bool DVK_SPI_init(void);
-void DVK_SPI_disable(void);
-
-void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data);
-uint16_t DVK_SPI_readRegister(volatile uint16_t *addr);
-
-
-/* Accodring to configuration, use either SPI or EBI */
-#ifdef DVK_EBI_CONTROL
-#define DVK_writeRegister(A, B)    DVK_EBI_writeRegister(A, B)
-#define DVK_readRegister(A)        DVK_EBI_readRegister(A)
-#endif
-
-#ifdef DVK_SPI_CONTROL
-#define DVK_writeRegister(A, B)    DVK_SPI_writeRegister(A, B)
-#define DVK_readRegister(A)        DVK_SPI_readRegister(A)
-#endif
-
-/* General initialization routines */
-bool DVK_init(void);
-void DVK_disable(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} (end group BSP) */
-
-#endif
+/**************************************************************************//**
+ * @file
+ * @brief DVK Board Support, master header file
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+#ifndef __DVK_H
+#define __DVK_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "dvk_boardcontrol.h"
+#include "dvk_bcregisters.h"
+
+/* onelife: Add missing define */
+#define NULL ((void *)0)
+
+/* IF not user overrides default, try to decide DVK access interface based on
+ * part number */
+#ifndef DVK_SPI_CONTROL
+#ifndef DVK_EBI_CONTROL
+
+#if defined(EFM32G200F16)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G200F32)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G200F64)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G210F128)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G230F128)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G230F32)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G230F64)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G280F128)
+#define DVK_EBI_CONTROL
+#elif defined(EFM32G280F32)
+#define DVK_EBI_CONTROL
+#elif defined(EFM32G280F64)
+#define DVK_EBI_CONTROL
+#elif defined(EFM32G290F128)
+#define DVK_EBI_CONTROL
+#elif defined(EFM32G290F32)
+#define DVK_EBI_CONTROL
+#elif defined(EFM32G290F64)
+#define DVK_EBI_CONTROL
+#elif defined(EFM32G840F128)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G840F32)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G840F64)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G880F128)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G880F32)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G880F64)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G890F128)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G890F32)
+#define DVK_SPI_CONTROL
+#elif defined(EFM32G890F64)
+#define DVK_SPI_CONTROL
+#else
+#define DVK_SPI_CONTROL
+#endif
+
+#endif
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* EBI access */
+bool DVK_EBI_init(void);
+void DVK_EBI_disable(void);
+void DVK_EBI_configure(void);
+void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data);
+uint16_t DVK_EBI_readRegister(volatile uint16_t *addr);
+
+/* SPI access */
+bool DVK_SPI_init(void);
+void DVK_SPI_disable(void);
+
+void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data);
+uint16_t DVK_SPI_readRegister(volatile uint16_t *addr);
+
+
+/* Accodring to configuration, use either SPI or EBI */
+#ifdef DVK_EBI_CONTROL
+#define DVK_writeRegister(A, B)    DVK_EBI_writeRegister(A, B)
+#define DVK_readRegister(A)        DVK_EBI_readRegister(A)
+#endif
+
+#ifdef DVK_SPI_CONTROL
+#define DVK_writeRegister(A, B)    DVK_SPI_writeRegister(A, B)
+#define DVK_readRegister(A)        DVK_SPI_readRegister(A)
+#endif
+
+/* General initialization routines */
+bool DVK_init(void);
+void DVK_disable(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif

bsp/efm32/EFM32_Gxxx_DK/dvk_bcregisters.h

@@ -1,188 +1,188 @@
-/**************************************************************************//**
- * @file
- * @brief Board Control register definitions
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __DVK_BCREGISTERS_H
-#define __DVK_BCREGISTERS_H
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include <stdint.h>
-
-/**************************************************************************//**
- * Defines FPGA register bank for Energy Micro Development Kit (DVK) board,
- * i.e. board control registers
- *****************************************************************************/
-#define BC_FLASH_BASE        0x80000000 /**< FLASH memory base address */
-#define BC_SRAM_BASE         0x84000000 /**< SRAM base address */
-#define BC_SSD2119_BASE      0x88000000 /**< TFT Controller base address */
-#define BC_REGISTER_BASE     0x8c000000 /**< Board Controller registers base address */
-
-#define BC_CFG               ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x00)) /**< CFG */
-#define BC_EM                ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x01)) /**< EM */
-#define BC_MAGIC             ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x02)) /**< MAGIC */
-#define BC_LED               ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x03)) /**< LEDs */
-#define BC_PUSHBUTTON        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x04)) /**< Push Buttons */
-#define BC_DIPSWITCH         ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x05)) /**< Dip switches */
-#define BC_JOYSTICK          ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x06)) /**< Joystick */
-#define BC_AEM               ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x07)) /**< AEM push button status */
-#define BC_DISPLAY_CTRL      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x08)) /**< Display Control */
-#define BC_EBI_CFG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x09)) /**< EBI config */
-#define BC_BUS_CFG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0a)) /**< BUS config */
-#define BC_PERCTRL           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0c)) /**< Peripheral Control */
-#define BC_AEMSTATE          ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0d)) /**< AEM state of push button switch */
-#define BC_SPI_CFG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0e)) /**< SPI config */
-#define BC_RESET             ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0f)) /**< Reset */
-#define BC_ADC_START         ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x10)) /**< ADC start */
-#define BC_ADC_STATUS        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x11)) /**< ADC status */
-#define BC_ADC_DATA          ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x12)) /**< ADC data */
-#define BC_HW_VERSION        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x14)) /**< HW version */
-#define BC_FW_BUILDNO        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x15)) /**< FW build number */
-#define BC_FW_VERSION        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x16)) /**< FW version */
-#define BC_SCRATCH_COMMON    ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */ 
-#define BC_SCRATCH_EFM0      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x18)) /**< Scratch EFM0 */
-#define BC_SCRATCH_EFM1      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x19)) /**< Scratch EFM1 */
-#define BC_SCRATCH_EFM2      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1A)) /**< Scratch EFM2 */
-#define BC_SCRATCH_EFM3      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1B)) /**< Scratch EFM3 */
-#define BC_SCRATCH_BC0       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1C)) /**< Scratch BC0 */
-#define BC_SCRATCH_BC1       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1D)) /**< Scratch BC1 */
-#define BC_SCRATCH_BC2       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1E)) /**< Scratch BC2 */
-#define BC_SCRATCH_BC3       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1f)) /**< Scratch BC3 */
-#define BC_INTFLAG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x20)) /**< Interrupt flag */
-#define BC_INTEN             ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x21)) /**< Interrupt enable */
-
-/**************************************************************************//**
- * Defines bit fields for board control registers
- *****************************************************************************/
-
-#define BC_CFG_SPI                           (0) /**< SPI mode */
-#define BC_CFG_EBI                           (1) /**< EBI mode */
-
-#define BC_EM_EM0                            (0) /**< Indicate EM0 */
-#define BC_EM_EM1                            (1) /**< Indicate EM1 */
-#define BC_EM_EM2                            (2) /**< Indicate EM2 */
-#define BC_EM_EM3                            (3) /**< Indicate EM3 */
-#define BC_EM_EM4                            (4) /**< Indicate EM4 */
-
-#define BC_MAGIC_VALUE                       (0xef32) /**< Magic */
-
-#define BC_PUSHBUTTON_MASK                   (0x000f) /**< Push button mask */
-#define BC_PUSHBUTTON_SW1                    (1 << 0) /**< Push button SW1 */
-#define BC_PUSHBUTTON_SW2                    (1 << 1) /**< Push button SW2 */
-#define BC_PUSHBUTTON_SW3                    (1 << 2) /**< Push button SW3 */
-#define BC_PUSHBUTTON_SW4                    (1 << 3) /**< Push button SW4 */
-
-#define BC_DIPSWITCH_MASK                    (0x00ff) /**< Dip switch mask */
-
-#define BC_JOYSTICK_MASK                     (0x001f) /**< Joystick mask */
-#define BC_JOYSTICK_DOWN                     (1 << 0) /**< Joystick down */
-#define BC_JOYSTICK_RIGHT                    (1 << 1) /**< Joystick right */
-#define BC_JOYSTICK_UP                       (1 << 2) /**< Joystick up */
-#define BC_JOYSTICK_LEFT                     (1 << 3) /**< Joystick left */
-#define BC_JOYSTICK_CENTER                   (1 << 4) /**< Joystick center button */
-
-#define BC_DISPCTRL_RESET                    (1 << 0) /**< Reset */
-#define BC_DISPCTRL_POWER_ENABLE             (1 << 1) /**< Display Control Power Enable */
-
-#define BC_EBI_CFG_MASK                      (0x0003) /**< EBI Config */
-#define BC_EBI_CFG_16X16                     (0) /**< 16x16 address/data mode */
-#define BC_EBI_CFG_8X8                       (1) /**< 8x8 address/data mode */
-#define BC_EBI_CFG_24X8                      (2) /**< 24x8 address/data mode */
-
-#define BC_BUS_CFG_MASK                      (0x0003) /**< Bus config */
-#define BC_BUS_CFG_FSMC                      (0) /**< Kit Board Controller owns bus */
-#define BC_BUS_CFG_EBI                       (1) /**< EBI drives bus */
-#define BC_BUS_CFG_SPI                       (2) /**< SPI drives bus */
-
-#define BC_PERCTRL_ACCEL                     (1 << 0) /**< Accelerometer enable */
-#define BC_PERCTRL_AMBIENT                   (1 << 1) /**< Ambient light sensor enable */
-#define BC_PERCTRL_POTMETER                  (1 << 2) /**< Potentiometer enable */
-#define BC_PERCTRL_RS232A                    (1 << 3) /**< RS232A enable */
-#define BC_PERCTRL_RS232B                    (1 << 4) /**< RS232B enable */
-#define BC_PERCTRL_SPI                       (1 << 5) /**< SPI enable */
-#define BC_PERCTRL_I2C                       (1 << 6) /**< I2C enable */
-#define BC_PERCTRL_IRDA                      (1 << 7) /**< IRDA enable */
-#define BC_PERCTRL_ANALOG_SE                 (1 << 8) /**< Analog SE enable */
-#define BC_PERCTRL_ANALOG_DIFF               (1 << 9) /**< Analog Diff enable */
-#define BC_PERCTRL_AUDIO_OUT                 (1 << 10) /**< Audio Out enable */
-#define BC_PERCTRL_AUDIO_IN                  (1 << 11) /**< Audio In enable */
-#define BC_PERCTRL_ACCEL_GSEL                (1 << 12) /**< Accel Gsel enable */
-#define BC_PERCTRL_ACCEL_SELFTEST            (1 << 13) /**< Accel Self test enable */
-#define BC_PERCTRL_RS232_SHUTDOWN            (1 << 14) /**< RS232 shutdown */
-#define BC_PERCTRL_IRDA_SHUTDOWN             (1 << 15) /**< IRDA shutdown */
-
-#define BC_AEMSTATE_BC                       (0) /**< AEM button state, BC controls buttons */
-#define BC_AEMSTATE_EFM                      (1) /**< AEM button state, EFM32 controls buttons */
-
-#define BC_SPI_CFG_FLASH                     (0) /**< SPI Flash config */
-#define BC_SPI_CFG_MICROSD                   (1) /**< SPI MicroSD config */
-
-#define BC_RESET_FLASH                       (1 << 0) /**< Reset Flash */
-#define BC_RESET_EFM                         (1 << 1) /**< Reset EFM */
-
-#define BC_ADC_START_MASK                    (0x00ff) /**< ADC Start mask */
-
-#define BC_ADC_STATUS_DONE                   (0) /**< ADC Status Done */
-#define BC_ADC_STATUS_BUSY                   (1) /**< ADC Status Busy */
-
-#define BC_HW_VERSION_PCB_MASK               (0x07f0) /**< PCB Version mask */
-#define BC_HW_VERSION_PCB_SHIFT              (4) /**< PCB Version shift */
-#define BC_HW_VERSION_BOARD_MASK             (0x000f) /**< Board version mask */
-#define BC_HW_VERSION_BOARD_SHIFT            (0) /**< Board version shift  */
-
-#define BC_HW_FW_VERSION_MAJOR_MASK          (0xf000) /**< FW Version major mask */
-#define BC_HW_FW_VERSION_MAJOR_SHIFT         (12) /**< FW version major shift */
-#define BC_HW_FW_VERSION_MINOR_MASK          (0x0f00) /**< FW version minor mask */
-#define BC_HW_FW_VERSION_MINOR_SHIFT         (8) /**< FW version minor shift */
-#define BC_HW_FW_VERSION_PATCHLEVEL_MASK     (0x00ff) /**< FW Patchlevel mask */
-#define BC_HW_FW_VERSION_PATCHLEVEL_SHIFT    (0) /**< FW Patchlevel shift */
-
-#define BC_INTEN_MASK                        (0x000f) /**< Interrupt enable mask */
-#define BC_INTEN_PB                          (1 << 0) /**< Push Button Interrupt enable */
-#define BC_INTEN_DIP                         (1 << 1) /**< DIP Switch Interrupt enable */
-#define BC_INTEN_JOYSTICK                    (1 << 2) /**< Joystick Interrupt enable */
-#define BC_INTEN_AEM                         (1 << 3) /**< AEM Interrupt enable */
-
-#define BC_INTFLAG_MASK                      (0x000f) /**< Interrupt flag mask */
-#define BC_INTFLAG_PB                        (1 << 0) /**< Push Button interrupt triggered */
-#define BC_INTFLAG_DIP                       (1 << 1) /**< DIP interrupt triggered */
-#define BC_INTFLAG_JOYSTICK                  (1 << 2) /**< Joystick interrupt triggered */
-#define BC_INTFLAG_AEM                       (1 << 3) /**< AEM interrupt triggered */
-
-#endif
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief Board Control register definitions
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+#ifndef __DVK_BCREGISTERS_H
+#define __DVK_BCREGISTERS_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdint.h>
+
+/**************************************************************************//**
+ * Defines FPGA register bank for Energy Micro Development Kit (DVK) board,
+ * i.e. board control registers
+ *****************************************************************************/
+#define BC_FLASH_BASE        0x80000000 /**< FLASH memory base address */
+#define BC_SRAM_BASE         0x84000000 /**< SRAM base address */
+#define BC_SSD2119_BASE      0x88000000 /**< TFT Controller base address */
+#define BC_REGISTER_BASE     0x8c000000 /**< Board Controller registers base address */
+
+#define BC_CFG               ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x00)) /**< CFG */
+#define BC_EM                ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x01)) /**< EM */
+#define BC_MAGIC             ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x02)) /**< MAGIC */
+#define BC_LED               ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x03)) /**< LEDs */
+#define BC_PUSHBUTTON        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x04)) /**< Push Buttons */
+#define BC_DIPSWITCH         ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x05)) /**< Dip switches */
+#define BC_JOYSTICK          ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x06)) /**< Joystick */
+#define BC_AEM               ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x07)) /**< AEM push button status */
+#define BC_DISPLAY_CTRL      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x08)) /**< Display Control */
+#define BC_EBI_CFG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x09)) /**< EBI config */
+#define BC_BUS_CFG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0a)) /**< BUS config */
+#define BC_PERCTRL           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0c)) /**< Peripheral Control */
+#define BC_AEMSTATE          ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0d)) /**< AEM state of push button switch */
+#define BC_SPI_CFG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0e)) /**< SPI config */
+#define BC_RESET             ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x0f)) /**< Reset */
+#define BC_ADC_START         ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x10)) /**< ADC start */
+#define BC_ADC_STATUS        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x11)) /**< ADC status */
+#define BC_ADC_DATA          ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x12)) /**< ADC data */
+#define BC_HW_VERSION        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x14)) /**< HW version */
+#define BC_FW_BUILDNO        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x15)) /**< FW build number */
+#define BC_FW_VERSION        ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x16)) /**< FW version */
+#define BC_SCRATCH_COMMON    ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x17)) /**< Scratch common */ 
+#define BC_SCRATCH_EFM0      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x18)) /**< Scratch EFM0 */
+#define BC_SCRATCH_EFM1      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x19)) /**< Scratch EFM1 */
+#define BC_SCRATCH_EFM2      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1A)) /**< Scratch EFM2 */
+#define BC_SCRATCH_EFM3      ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1B)) /**< Scratch EFM3 */
+#define BC_SCRATCH_BC0       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1C)) /**< Scratch BC0 */
+#define BC_SCRATCH_BC1       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1D)) /**< Scratch BC1 */
+#define BC_SCRATCH_BC2       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1E)) /**< Scratch BC2 */
+#define BC_SCRATCH_BC3       ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x1f)) /**< Scratch BC3 */
+#define BC_INTFLAG           ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x20)) /**< Interrupt flag */
+#define BC_INTEN             ((volatile uint16_t *)(BC_REGISTER_BASE + sizeof(uint16_t) * 0x21)) /**< Interrupt enable */
+
+/**************************************************************************//**
+ * Defines bit fields for board control registers
+ *****************************************************************************/
+
+#define BC_CFG_SPI                           (0) /**< SPI mode */
+#define BC_CFG_EBI                           (1) /**< EBI mode */
+
+#define BC_EM_EM0                            (0) /**< Indicate EM0 */
+#define BC_EM_EM1                            (1) /**< Indicate EM1 */
+#define BC_EM_EM2                            (2) /**< Indicate EM2 */
+#define BC_EM_EM3                            (3) /**< Indicate EM3 */
+#define BC_EM_EM4                            (4) /**< Indicate EM4 */
+
+#define BC_MAGIC_VALUE                       (0xef32) /**< Magic */
+
+#define BC_PUSHBUTTON_MASK                   (0x000f) /**< Push button mask */
+#define BC_PUSHBUTTON_SW1                    (1 << 0) /**< Push button SW1 */
+#define BC_PUSHBUTTON_SW2                    (1 << 1) /**< Push button SW2 */
+#define BC_PUSHBUTTON_SW3                    (1 << 2) /**< Push button SW3 */
+#define BC_PUSHBUTTON_SW4                    (1 << 3) /**< Push button SW4 */
+
+#define BC_DIPSWITCH_MASK                    (0x00ff) /**< Dip switch mask */
+
+#define BC_JOYSTICK_MASK                     (0x001f) /**< Joystick mask */
+#define BC_JOYSTICK_DOWN                     (1 << 0) /**< Joystick down */
+#define BC_JOYSTICK_RIGHT                    (1 << 1) /**< Joystick right */
+#define BC_JOYSTICK_UP                       (1 << 2) /**< Joystick up */
+#define BC_JOYSTICK_LEFT                     (1 << 3) /**< Joystick left */
+#define BC_JOYSTICK_CENTER                   (1 << 4) /**< Joystick center button */
+
+#define BC_DISPCTRL_RESET                    (1 << 0) /**< Reset */
+#define BC_DISPCTRL_POWER_ENABLE             (1 << 1) /**< Display Control Power Enable */
+
+#define BC_EBI_CFG_MASK                      (0x0003) /**< EBI Config */
+#define BC_EBI_CFG_16X16                     (0) /**< 16x16 address/data mode */
+#define BC_EBI_CFG_8X8                       (1) /**< 8x8 address/data mode */
+#define BC_EBI_CFG_24X8                      (2) /**< 24x8 address/data mode */
+
+#define BC_BUS_CFG_MASK                      (0x0003) /**< Bus config */
+#define BC_BUS_CFG_FSMC                      (0) /**< Kit Board Controller owns bus */
+#define BC_BUS_CFG_EBI                       (1) /**< EBI drives bus */
+#define BC_BUS_CFG_SPI                       (2) /**< SPI drives bus */
+
+#define BC_PERCTRL_ACCEL                     (1 << 0) /**< Accelerometer enable */
+#define BC_PERCTRL_AMBIENT                   (1 << 1) /**< Ambient light sensor enable */
+#define BC_PERCTRL_POTMETER                  (1 << 2) /**< Potentiometer enable */
+#define BC_PERCTRL_RS232A                    (1 << 3) /**< RS232A enable */
+#define BC_PERCTRL_RS232B                    (1 << 4) /**< RS232B enable */
+#define BC_PERCTRL_SPI                       (1 << 5) /**< SPI enable */
+#define BC_PERCTRL_I2C                       (1 << 6) /**< I2C enable */
+#define BC_PERCTRL_IRDA                      (1 << 7) /**< IRDA enable */
+#define BC_PERCTRL_ANALOG_SE                 (1 << 8) /**< Analog SE enable */
+#define BC_PERCTRL_ANALOG_DIFF               (1 << 9) /**< Analog Diff enable */
+#define BC_PERCTRL_AUDIO_OUT                 (1 << 10) /**< Audio Out enable */
+#define BC_PERCTRL_AUDIO_IN                  (1 << 11) /**< Audio In enable */
+#define BC_PERCTRL_ACCEL_GSEL                (1 << 12) /**< Accel Gsel enable */
+#define BC_PERCTRL_ACCEL_SELFTEST            (1 << 13) /**< Accel Self test enable */
+#define BC_PERCTRL_RS232_SHUTDOWN            (1 << 14) /**< RS232 shutdown */
+#define BC_PERCTRL_IRDA_SHUTDOWN             (1 << 15) /**< IRDA shutdown */
+
+#define BC_AEMSTATE_BC                       (0) /**< AEM button state, BC controls buttons */
+#define BC_AEMSTATE_EFM                      (1) /**< AEM button state, EFM32 controls buttons */
+
+#define BC_SPI_CFG_FLASH                     (0) /**< SPI Flash config */
+#define BC_SPI_CFG_MICROSD                   (1) /**< SPI MicroSD config */
+
+#define BC_RESET_FLASH                       (1 << 0) /**< Reset Flash */
+#define BC_RESET_EFM                         (1 << 1) /**< Reset EFM */
+
+#define BC_ADC_START_MASK                    (0x00ff) /**< ADC Start mask */
+
+#define BC_ADC_STATUS_DONE                   (0) /**< ADC Status Done */
+#define BC_ADC_STATUS_BUSY                   (1) /**< ADC Status Busy */
+
+#define BC_HW_VERSION_PCB_MASK               (0x07f0) /**< PCB Version mask */
+#define BC_HW_VERSION_PCB_SHIFT              (4) /**< PCB Version shift */
+#define BC_HW_VERSION_BOARD_MASK             (0x000f) /**< Board version mask */
+#define BC_HW_VERSION_BOARD_SHIFT            (0) /**< Board version shift  */
+
+#define BC_HW_FW_VERSION_MAJOR_MASK          (0xf000) /**< FW Version major mask */
+#define BC_HW_FW_VERSION_MAJOR_SHIFT         (12) /**< FW version major shift */
+#define BC_HW_FW_VERSION_MINOR_MASK          (0x0f00) /**< FW version minor mask */
+#define BC_HW_FW_VERSION_MINOR_SHIFT         (8) /**< FW version minor shift */
+#define BC_HW_FW_VERSION_PATCHLEVEL_MASK     (0x00ff) /**< FW Patchlevel mask */
+#define BC_HW_FW_VERSION_PATCHLEVEL_SHIFT    (0) /**< FW Patchlevel shift */
+
+#define BC_INTEN_MASK                        (0x000f) /**< Interrupt enable mask */
+#define BC_INTEN_PB                          (1 << 0) /**< Push Button Interrupt enable */
+#define BC_INTEN_DIP                         (1 << 1) /**< DIP Switch Interrupt enable */
+#define BC_INTEN_JOYSTICK                    (1 << 2) /**< Joystick Interrupt enable */
+#define BC_INTEN_AEM                         (1 << 3) /**< AEM Interrupt enable */
+
+#define BC_INTFLAG_MASK                      (0x000f) /**< Interrupt flag mask */
+#define BC_INTFLAG_PB                        (1 << 0) /**< Push Button interrupt triggered */
+#define BC_INTFLAG_DIP                       (1 << 1) /**< DIP interrupt triggered */
+#define BC_INTFLAG_JOYSTICK                  (1 << 2) /**< Joystick interrupt triggered */
+#define BC_INTFLAG_AEM                       (1 << 3) /**< AEM interrupt triggered */
+
+#endif
+
+/** @} (end group BSP) */

bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.c

@@ -1,262 +1,262 @@
-/**************************************************************************//**
- * @file
- * @brief DVK Peripheral Board Control API implementation
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include "efm32.h"
-#include "dvk.h"
-#include "dvk_boardcontrol.h"
-#include "dvk_bcregisters.h"
-
-/**************************************************************************//**
- * @brief Enable EFM32 access to periheral on DVK board
- * @param peri Peripheral to enable
- *****************************************************************************/
-void DVK_enablePeripheral(DVKPeripheral peri)
-{
-  uint16_t bit;
-  uint16_t tmp;
-
-  /* Calculate which bit to set */
-  bit = (uint16_t) peri;
-
-  /* Read peripheral control register */
-  tmp = DVK_readRegister(BC_PERCTRL);
-
-  /* Enable peripheral */
-  tmp |= bit;
-
-  /* Special case for RS232, if enabled disable shutdown */
-  if ((peri == DVK_RS232A) || (peri == DVK_RS232B))
-  {
-    /* clear shutdown bit */
-    tmp &= ~(BC_PERCTRL_RS232_SHUTDOWN);
-  }
-
-  /* Special case for IRDA if enabled disable shutdown */
-  if (peri == DVK_IRDA)
-  {
-    /* clear shutdown bit */
-    tmp &= ~(BC_PERCTRL_IRDA_SHUTDOWN);
-  }
-
-  DVK_writeRegister(BC_PERCTRL, tmp);
-}
-
-/**************************************************************************//**
- * @brief Disable EFM32 access to peripheral on DVK board
- * @param peri Peripheral to disable
- *****************************************************************************/
-void DVK_disablePeripheral(DVKPeripheral peri)
-{
-  uint16_t bit;
-  uint16_t tmp;
-
-  /* Calculate which bit to set */
-  bit = (uint16_t) peri;
-
-  /* Read peripheral control register */
-  tmp = DVK_readRegister(BC_PERCTRL);
-
-  /* Disable peripheral */
-  tmp &= ~(bit);
-
-  /* Special case for RS232, if enabled disable shutdown */
-  if ((peri == DVK_RS232A) || (peri == DVK_RS232B))
-  {
-    /* Set shutdown bit */
-    tmp |= (BC_PERCTRL_RS232_SHUTDOWN);
-  }
-
-  /* Special case for IRDA */
-  if (peri == DVK_IRDA)
-  {
-    /* Set shutdown bit */
-    tmp |= (BC_PERCTRL_IRDA_SHUTDOWN);
-  }
-
-  DVK_writeRegister(BC_PERCTRL, tmp);
-}
-
-
-/**************************************************************************//**
- * @brief Enable BUS access
- *****************************************************************************/
-void DVK_enableBus(void)
-{
-  /* Enable bus access */
-  DVK_writeRegister(BC_BUS_CFG, 1);
-}
-
-
-/**************************************************************************//**
- * @brief Disable BUS access
- *****************************************************************************/
-void DVK_disableBus(void)
-{
-  DVK_writeRegister(BC_BUS_CFG, 0);
-}
-
-
-/**************************************************************************//**
- * @brief Inform AEM about current energy mode
- * @param energyMode What energy mode we are going to use next
- *****************************************************************************/
-void DVK_setEnergyMode(uint16_t energyMode)
-{
-  DVK_writeRegister(BC_EM, energyMode);
-}
-
-
-/**************************************************************************//**
- * @brief Get status of bush buttons
- * @return Status of push buttons
- *****************************************************************************/
-uint16_t DVK_getPushButtons(void)
-{
-  uint16_t pb = 0;
-  uint16_t aemState;
-
-  /* Check state */
-  aemState = DVK_readRegister(BC_AEMSTATE);
-  /* Read pushbutton status */
-  if ( aemState == BC_AEMSTATE_EFM ) 
-  {
-    pb = (~(DVK_readRegister(BC_PUSHBUTTON))) & 0x000f;
-  }
-  return pb;
-}
-
-/**************************************************************************//**
- * @brief Get joystick button status
- * @return Joystick controller status
- *****************************************************************************/
-uint16_t DVK_getJoystick(void)
-{
-  uint16_t joyStick = 0;
-  uint16_t aemState;
-
-  /* Check state */
-  aemState = DVK_readRegister(BC_AEMSTATE);
-  /* Read pushbutton status */
-  if ( aemState == BC_AEMSTATE_EFM ) 
-  {
-    joyStick = (~(DVK_readRegister(BC_JOYSTICK))) & 0x001f;
-  }
-  return joyStick;
-}
-
-/**************************************************************************//**
- * @brief Get dipswitch status
- *        The DIP switches are free for user programmable purposes
- * @return Joystick controller status
- *****************************************************************************/
-uint16_t DVK_getDipSwitch(void)
-{
-  uint16_t tmp;
-
-  tmp = (~(DVK_readRegister(BC_DIPSWITCH))) & 0x00ff;
-  return tmp;
-}
-
-/**************************************************************************//**
- * @brief Sets user leds
- * @param leds 16-bits which enables or disables the board "User leds"
- *****************************************************************************/
-void DVK_setLEDs(uint16_t leds)
-{
-  DVK_writeRegister(BC_LED, leds);
-}
-
-/**************************************************************************//**
- * @brief Get status of user LEDs
- * @return Status of 16 user leds, bit 1 = on, bit 0 = off
- *****************************************************************************/
-uint16_t DVK_getLEDs(void)
-{
-  return DVK_readRegister(BC_LED);
-}
-
-/**************************************************************************//**
- * @brief Enable "Control" buttons/joystick/dip switch interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_enableInterrupt(uint16_t flags)
-{
-  uint16_t tmp;
-
-  /* Add flags to interrupt enable register */
-  tmp  = DVK_readRegister(BC_INTEN);
-  tmp |= flags;
-  DVK_writeRegister(BC_INTEN, tmp);
-}
-
-/**************************************************************************//**
- * @brief Disable "Control" buttons/joystick/dip switch interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_disableInterrupt(uint16_t flags)
-{
-  uint16_t tmp;
-
-  /* Clear flags from interrupt enable register */
-  tmp   = DVK_readRegister(BC_INTEN);
-  flags = ~(flags);
-  tmp  &= flags;
-  DVK_writeRegister(BC_INTEN, tmp);
-}
-
-/**************************************************************************//**
- * @brief Clear interrupts
- * @param flags Board control interrupt flags, BC_INTEN_<something>
- *****************************************************************************/
-void DVK_clearInterruptFlags(uint16_t flags)
-{
-  DVK_writeRegister(BC_INTFLAG, flags);
-}
-
-/**************************************************************************//**
- * @brief Read interrupt flags
- * @return Returns currently triggered interrupts
- *****************************************************************************/
-uint16_t DVK_getInterruptFlags(void)
-{
-  return DVK_readRegister(BC_INTFLAG);
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief DVK Peripheral Board Control API implementation
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include "efm32.h"
+#include "dvk.h"
+#include "dvk_boardcontrol.h"
+#include "dvk_bcregisters.h"
+
+/**************************************************************************//**
+ * @brief Enable EFM32 access to periheral on DVK board
+ * @param peri Peripheral to enable
+ *****************************************************************************/
+void DVK_enablePeripheral(DVKPeripheral peri)
+{
+  uint16_t bit;
+  uint16_t tmp;
+
+  /* Calculate which bit to set */
+  bit = (uint16_t) peri;
+
+  /* Read peripheral control register */
+  tmp = DVK_readRegister(BC_PERCTRL);
+
+  /* Enable peripheral */
+  tmp |= bit;
+
+  /* Special case for RS232, if enabled disable shutdown */
+  if ((peri == DVK_RS232A) || (peri == DVK_RS232B))
+  {
+    /* clear shutdown bit */
+    tmp &= ~(BC_PERCTRL_RS232_SHUTDOWN);
+  }
+
+  /* Special case for IRDA if enabled disable shutdown */
+  if (peri == DVK_IRDA)
+  {
+    /* clear shutdown bit */
+    tmp &= ~(BC_PERCTRL_IRDA_SHUTDOWN);
+  }
+
+  DVK_writeRegister(BC_PERCTRL, tmp);
+}
+
+/**************************************************************************//**
+ * @brief Disable EFM32 access to peripheral on DVK board
+ * @param peri Peripheral to disable
+ *****************************************************************************/
+void DVK_disablePeripheral(DVKPeripheral peri)
+{
+  uint16_t bit;
+  uint16_t tmp;
+
+  /* Calculate which bit to set */
+  bit = (uint16_t) peri;
+
+  /* Read peripheral control register */
+  tmp = DVK_readRegister(BC_PERCTRL);
+
+  /* Disable peripheral */
+  tmp &= ~(bit);
+
+  /* Special case for RS232, if enabled disable shutdown */
+  if ((peri == DVK_RS232A) || (peri == DVK_RS232B))
+  {
+    /* Set shutdown bit */
+    tmp |= (BC_PERCTRL_RS232_SHUTDOWN);
+  }
+
+  /* Special case for IRDA */
+  if (peri == DVK_IRDA)
+  {
+    /* Set shutdown bit */
+    tmp |= (BC_PERCTRL_IRDA_SHUTDOWN);
+  }
+
+  DVK_writeRegister(BC_PERCTRL, tmp);
+}
+
+
+/**************************************************************************//**
+ * @brief Enable BUS access
+ *****************************************************************************/
+void DVK_enableBus(void)
+{
+  /* Enable bus access */
+  DVK_writeRegister(BC_BUS_CFG, 1);
+}
+
+
+/**************************************************************************//**
+ * @brief Disable BUS access
+ *****************************************************************************/
+void DVK_disableBus(void)
+{
+  DVK_writeRegister(BC_BUS_CFG, 0);
+}
+
+
+/**************************************************************************//**
+ * @brief Inform AEM about current energy mode
+ * @param energyMode What energy mode we are going to use next
+ *****************************************************************************/
+void DVK_setEnergyMode(uint16_t energyMode)
+{
+  DVK_writeRegister(BC_EM, energyMode);
+}
+
+
+/**************************************************************************//**
+ * @brief Get status of bush buttons
+ * @return Status of push buttons
+ *****************************************************************************/
+uint16_t DVK_getPushButtons(void)
+{
+  uint16_t pb = 0;
+  uint16_t aemState;
+
+  /* Check state */
+  aemState = DVK_readRegister(BC_AEMSTATE);
+  /* Read pushbutton status */
+  if ( aemState == BC_AEMSTATE_EFM ) 
+  {
+    pb = (~(DVK_readRegister(BC_PUSHBUTTON))) & 0x000f;
+  }
+  return pb;
+}
+
+/**************************************************************************//**
+ * @brief Get joystick button status
+ * @return Joystick controller status
+ *****************************************************************************/
+uint16_t DVK_getJoystick(void)
+{
+  uint16_t joyStick = 0;
+  uint16_t aemState;
+
+  /* Check state */
+  aemState = DVK_readRegister(BC_AEMSTATE);
+  /* Read pushbutton status */
+  if ( aemState == BC_AEMSTATE_EFM ) 
+  {
+    joyStick = (~(DVK_readRegister(BC_JOYSTICK))) & 0x001f;
+  }
+  return joyStick;
+}
+
+/**************************************************************************//**
+ * @brief Get dipswitch status
+ *        The DIP switches are free for user programmable purposes
+ * @return Joystick controller status
+ *****************************************************************************/
+uint16_t DVK_getDipSwitch(void)
+{
+  uint16_t tmp;
+
+  tmp = (~(DVK_readRegister(BC_DIPSWITCH))) & 0x00ff;
+  return tmp;
+}
+
+/**************************************************************************//**
+ * @brief Sets user leds
+ * @param leds 16-bits which enables or disables the board "User leds"
+ *****************************************************************************/
+void DVK_setLEDs(uint16_t leds)
+{
+  DVK_writeRegister(BC_LED, leds);
+}
+
+/**************************************************************************//**
+ * @brief Get status of user LEDs
+ * @return Status of 16 user leds, bit 1 = on, bit 0 = off
+ *****************************************************************************/
+uint16_t DVK_getLEDs(void)
+{
+  return DVK_readRegister(BC_LED);
+}
+
+/**************************************************************************//**
+ * @brief Enable "Control" buttons/joystick/dip switch interrupts
+ * @param flags Board control interrupt flags, BC_INTEN_<something>
+ *****************************************************************************/
+void DVK_enableInterrupt(uint16_t flags)
+{
+  uint16_t tmp;
+
+  /* Add flags to interrupt enable register */
+  tmp  = DVK_readRegister(BC_INTEN);
+  tmp |= flags;
+  DVK_writeRegister(BC_INTEN, tmp);
+}
+
+/**************************************************************************//**
+ * @brief Disable "Control" buttons/joystick/dip switch interrupts
+ * @param flags Board control interrupt flags, BC_INTEN_<something>
+ *****************************************************************************/
+void DVK_disableInterrupt(uint16_t flags)
+{
+  uint16_t tmp;
+
+  /* Clear flags from interrupt enable register */
+  tmp   = DVK_readRegister(BC_INTEN);
+  flags = ~(flags);
+  tmp  &= flags;
+  DVK_writeRegister(BC_INTEN, tmp);
+}
+
+/**************************************************************************//**
+ * @brief Clear interrupts
+ * @param flags Board control interrupt flags, BC_INTEN_<something>
+ *****************************************************************************/
+void DVK_clearInterruptFlags(uint16_t flags)
+{
+  DVK_writeRegister(BC_INTFLAG, flags);
+}
+
+/**************************************************************************//**
+ * @brief Read interrupt flags
+ * @return Returns currently triggered interrupts
+ *****************************************************************************/
+uint16_t DVK_getInterruptFlags(void)
+{
+  return DVK_readRegister(BC_INTFLAG);
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32_Gxxx_DK/dvk_boardcontrol.h

@@ -1,96 +1,96 @@
-/**************************************************************************//**
- * @file
- * @brief DVK Peripheral Board Control, prototypes and definitions
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-#ifndef __DVK_BOARDCONTROL_H
-#define __DVK_BOARDCONTROL_H
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include <stdint.h>
-#include "dvk_bcregisters.h"
-
-/** Periperhal access switches */
-typedef enum
-{
-  DVK_ACCEL          = BC_PERCTRL_ACCEL,
-  DVK_AMBIENT        = BC_PERCTRL_AMBIENT,
-  DVK_POTMETER       = BC_PERCTRL_POTMETER,
-  DVK_RS232A         = BC_PERCTRL_RS232A,
-  DVK_RS232B         = BC_PERCTRL_RS232B,
-  DVK_SPI            = BC_PERCTRL_SPI,
-  DVK_I2C            = BC_PERCTRL_I2C,
-  DVK_IRDA           = BC_PERCTRL_IRDA,
-  DVK_ANALOG_SE      = BC_PERCTRL_ANALOG_SE,
-  DVK_ANALOG_DIFF    = BC_PERCTRL_ANALOG_DIFF,
-  DVK_AUDIO_OUT      = BC_PERCTRL_AUDIO_OUT,
-  DVK_AUDIO_IN       = BC_PERCTRL_AUDIO_IN,
-  DVK_ACCEL_GSEL     = BC_PERCTRL_ACCEL_GSEL,
-  DVK_ACCEL_SELFTEST = BC_PERCTRL_ACCEL_SELFTEST,
-  DVK_RS232_SHUTDOWN = BC_PERCTRL_RS232_SHUTDOWN,
-  DVK_IRDA_SHUTDOWN  = BC_PERCTRL_IRDA_SHUTDOWN
-} DVKPeripheral;
-
-/* Peripheral Control */
-void DVK_enablePeripheral(DVKPeripheral peri);
-void DVK_disablePeripheral(DVKPeripheral peri);
-void DVK_enableBus(void);
-void DVK_disableBus(void);
-
-/* Read board controllers */
-uint16_t DVK_getPushButtons(void);
-uint16_t DVK_getJoystick(void);
-uint16_t DVK_getDipSwitch(void);
-
-/* Report AEM status */
-void DVK_setEnergyMode(uint16_t energyMode);
-
-/* User LEDs */
-void DVK_setLEDs(uint16_t leds);
-uint16_t DVK_getLEDs(void);
-
-/* Interrupt callback */
-void DVK_enableInterrupt(uint16_t flags);
-void DVK_disableInterrupt(uint16_t flags);
-
-uint16_t DVK_getInterruptFlags(void);
-void DVK_clearInterruptFlags(uint16_t flags);
-
-/** @} (end group BSP) */
-
-#endif
-
+/**************************************************************************//**
+ * @file
+ * @brief DVK Peripheral Board Control, prototypes and definitions
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+#ifndef __DVK_BOARDCONTROL_H
+#define __DVK_BOARDCONTROL_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdint.h>
+#include "dvk_bcregisters.h"
+
+/** Periperhal access switches */
+typedef enum
+{
+  DVK_ACCEL          = BC_PERCTRL_ACCEL,
+  DVK_AMBIENT        = BC_PERCTRL_AMBIENT,
+  DVK_POTMETER       = BC_PERCTRL_POTMETER,
+  DVK_RS232A         = BC_PERCTRL_RS232A,
+  DVK_RS232B         = BC_PERCTRL_RS232B,
+  DVK_SPI            = BC_PERCTRL_SPI,
+  DVK_I2C            = BC_PERCTRL_I2C,
+  DVK_IRDA           = BC_PERCTRL_IRDA,
+  DVK_ANALOG_SE      = BC_PERCTRL_ANALOG_SE,
+  DVK_ANALOG_DIFF    = BC_PERCTRL_ANALOG_DIFF,
+  DVK_AUDIO_OUT      = BC_PERCTRL_AUDIO_OUT,
+  DVK_AUDIO_IN       = BC_PERCTRL_AUDIO_IN,
+  DVK_ACCEL_GSEL     = BC_PERCTRL_ACCEL_GSEL,
+  DVK_ACCEL_SELFTEST = BC_PERCTRL_ACCEL_SELFTEST,
+  DVK_RS232_SHUTDOWN = BC_PERCTRL_RS232_SHUTDOWN,
+  DVK_IRDA_SHUTDOWN  = BC_PERCTRL_IRDA_SHUTDOWN
+} DVKPeripheral;
+
+/* Peripheral Control */
+void DVK_enablePeripheral(DVKPeripheral peri);
+void DVK_disablePeripheral(DVKPeripheral peri);
+void DVK_enableBus(void);
+void DVK_disableBus(void);
+
+/* Read board controllers */
+uint16_t DVK_getPushButtons(void);
+uint16_t DVK_getJoystick(void);
+uint16_t DVK_getDipSwitch(void);
+
+/* Report AEM status */
+void DVK_setEnergyMode(uint16_t energyMode);
+
+/* User LEDs */
+void DVK_setLEDs(uint16_t leds);
+uint16_t DVK_getLEDs(void);
+
+/* Interrupt callback */
+void DVK_enableInterrupt(uint16_t flags);
+void DVK_disableInterrupt(uint16_t flags);
+
+uint16_t DVK_getInterruptFlags(void);
+void DVK_clearInterruptFlags(uint16_t flags);
+
+/** @} (end group BSP) */
+
+#endif
+

bsp/efm32/EFM32_Gxxx_DK/dvk_ebi.c

@@ -1,258 +1,258 @@
-/**************************************************************************//**
- * @file
- * @brief EBI implementation of Board Control interface
- *        This implementation works for devices w/o LCD display on the
- *        MCU module, specifically the EFM32_G2xx_DK development board
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-#include "efm32.h"
-#include "em_ebi.h"
-#include "em_cmu.h"
-#include "em_gpio.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#if defined(EBI_PRESENT)
-/**************************************************************************//**
- * @brief Configure EBI (external bus interface) for Board Control register
- * access
- *****************************************************************************/
-void DVK_EBI_configure(void)
-{
-  EBI_Init_TypeDef ebiConfig = EBI_INIT_DEFAULT;
-
-  /* Run time check if we have EBI on-chip capability on this device */
-  switch ((DEVINFO->PART & _DEVINFO_PART_DEVICE_NUMBER_MASK) >>
-          _DEVINFO_PART_DEVICE_NUMBER_SHIFT)
-  {
-  /* Only device types EFM32G 280/290/880 and 890 have EBI capability */
-  case 280:
-  case 290:
-  case 880:
-  case 890:
-    break;
-  default:
-    /* This device do not have EBI capability - use SPI to interface DVK */
-    /* With high probability your project has been configured for an */
-    /* incorrect part number. */
-    while (1) ;
-  }
-
-  /* Enable clocks */
-  CMU_ClockEnable(cmuClock_EBI, true);
-  CMU_ClockEnable(cmuClock_GPIO, true);
-
-  /* Configure mode - disable SPI, enable EBI */
-  GPIO_PinModeSet(gpioPortC, 13, gpioModePushPull, 1);
-  GPIO_PinModeSet(gpioPortC, 12, gpioModePushPull, 0);
-
-  /* Configure GPIO pins as push pull */
-  /* EBI AD9..15 */
-  GPIO_PinModeSet(gpioPortA, 0, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 1, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 2, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 3, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 4, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 5, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortA, 6, gpioModePushPull, 0);
-
-  /* EBI AD8 */
-  GPIO_PinModeSet(gpioPortA, 15, gpioModePushPull, 0);
-
-  /* EBI CS0-CS3 */
-  GPIO_PinModeSet(gpioPortD, 9, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortD, 10, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortD, 11, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortD, 12, gpioModePushPull, 0);
-
-  /* EBI AD0..7 */
-  GPIO_PinModeSet(gpioPortE, 8, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 9, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 10, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 11, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 12, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 13, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 14, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortE, 15, gpioModePushPull, 0);
-
-  /* EBI ARDY/ALEN/Wen/Ren */
-  GPIO_PinModeSet(gpioPortF, 2, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortF, 3, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortF, 4, gpioModePushPull, 0);
-  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, 0);
-
-  /* Configure EBI controller, changing default values */
-  ebiConfig.mode = ebiModeD16A16ALE;
-  /* Enable bank 0 address map 0x80000000, FPGA Flash */
-  /* Enable bank 1 address map 0x84000000, FPGA SRAM */
-  /* Enable bank 2 address map 0x88000000, FPGA TFT Display (SSD2119) */
-  /* Enable bank 3 address map 0x8c000000, FPGA Board Control Registers */
-  ebiConfig.banks = EBI_BANK0|EBI_BANK1|EBI_BANK2|EBI_BANK3;
-  ebiConfig.csLines = EBI_CS0|EBI_CS1|EBI_CS2|EBI_CS3;
-
-  /* Address Setup and hold time */
-  ebiConfig.addrHoldCycles = 3;
-  ebiConfig.addrSetupCycles = 3;
-
-  /* Read cycle times */
-  ebiConfig.readStrobeCycles = 7;
-  ebiConfig.readHoldCycles = 3;
-  ebiConfig.readSetupCycles = 3;
-
-  /* Write cycle times */
-  ebiConfig.writeStrobeCycles = 7;
-  ebiConfig.writeHoldCycles = 3;
-  ebiConfig.writeSetupCycles = 3;
-
-  /* Polarity values are default */
-
-  /* Configure EBI */
-  EBI_Init(&ebiConfig);
-}
-
-
-/**************************************************************************//**
- * @brief Initialize EBI
- * access
-*  @return true on success, false on failure
- *****************************************************************************/
-bool DVK_EBI_init(void)
-{
-  uint16_t     ebiMagic;
-  int          retry = 10;
-
-  /* Disable all GPIO pins and register  */
-  DVK_EBI_disable();
-  /* Configure EBI */
-  DVK_EBI_configure();
-  /* Verify that EBI access is working, if not kit is in SPI mode and needs to
-   * be configured for EBI access */
-  ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
-  while ((ebiMagic != BC_MAGIC_VALUE) && retry)
-  {    
-    DVK_EBI_disable();
-    /* Enable SPI interface */
-    DVK_SPI_init();
-    /* Set EBI mode - after this SPI access will no longer be available */
-    ebiMagic = DVK_SPI_readRegister(BC_MAGIC);
-    DVK_SPI_writeRegister(BC_CFG, BC_CFG_EBI);
-    /* Disable SPI */
-    DVK_SPI_disable();
- 
-    /* Now setup EBI again */
-    DVK_EBI_configure();
-    /* Wait until ready */
-    ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
-    if (ebiMagic == BC_MAGIC_VALUE) break;
-    
-    retry--;
-  }
-  if ( ! retry ) return false;
-
-  DVK_EBI_writeRegister(BC_LED, retry);
-  return true;
-}
-
-/**************************************************************************//**
- * @brief Disable EBI interface, free all GPIO pins
- *****************************************************************************/
-void DVK_EBI_disable(void)
-{
-  /* Disable EBI and SPI _BC_BUS_CONNECT */
-  GPIO_PinModeSet(gpioPortC, 12, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortC, 13, gpioModeDisabled, 0);
-
-  /* Configure GPIO pins as disabled */
-  GPIO_PinModeSet(gpioPortA, 0, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 1, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 2, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 3, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 4, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 5, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortA, 6, gpioModeDisabled, 0);
-
-  GPIO_PinModeSet(gpioPortA, 15, gpioModeDisabled, 0);
-
-  GPIO_PinModeSet(gpioPortD, 9, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortD, 10, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortD, 11, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortD, 12, gpioModeDisabled, 0);
-
-  GPIO_PinModeSet(gpioPortE, 8, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 9, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 10, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 11, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 12, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 13, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 14, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortE, 15, gpioModeDisabled, 0);
-
-  GPIO_PinModeSet(gpioPortF, 2, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortF, 3, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortF, 4, gpioModeDisabled, 0);
-  GPIO_PinModeSet(gpioPortF, 5, gpioModeDisabled, 0);
-
-  /* Disable EBI controller */
-#if 0
-  EBI_Disable();
-#endif
-  /* Disable EBI clock in CMU */
-  CMU_ClockEnable(cmuClock_EBI, false);
-
-}
-
-/**************************************************************************//**
- * @brief Write data into 16-bit board control register
- * @param addr Address to board control register
- * @param data Data to write into register
- *****************************************************************************/
-void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
-{
-  *addr = data;
-}
-
-/**************************************************************************//**
- * @brief Write data into 16-bit board control register
- * @param addr Register to read from
- *****************************************************************************/
-uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
-{
-  return *addr;
-}
-#endif
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief EBI implementation of Board Control interface
+ *        This implementation works for devices w/o LCD display on the
+ *        MCU module, specifically the EFM32_G2xx_DK development board
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#include "efm32.h"
+#include "em_ebi.h"
+#include "em_cmu.h"
+#include "em_gpio.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#if defined(EBI_PRESENT)
+/**************************************************************************//**
+ * @brief Configure EBI (external bus interface) for Board Control register
+ * access
+ *****************************************************************************/
+void DVK_EBI_configure(void)
+{
+  EBI_Init_TypeDef ebiConfig = EBI_INIT_DEFAULT;
+
+  /* Run time check if we have EBI on-chip capability on this device */
+  switch ((DEVINFO->PART & _DEVINFO_PART_DEVICE_NUMBER_MASK) >>
+          _DEVINFO_PART_DEVICE_NUMBER_SHIFT)
+  {
+  /* Only device types EFM32G 280/290/880 and 890 have EBI capability */
+  case 280:
+  case 290:
+  case 880:
+  case 890:
+    break;
+  default:
+    /* This device do not have EBI capability - use SPI to interface DVK */
+    /* With high probability your project has been configured for an */
+    /* incorrect part number. */
+    while (1) ;
+  }
+
+  /* Enable clocks */
+  CMU_ClockEnable(cmuClock_EBI, true);
+  CMU_ClockEnable(cmuClock_GPIO, true);
+
+  /* Configure mode - disable SPI, enable EBI */
+  GPIO_PinModeSet(gpioPortC, 13, gpioModePushPull, 1);
+  GPIO_PinModeSet(gpioPortC, 12, gpioModePushPull, 0);
+
+  /* Configure GPIO pins as push pull */
+  /* EBI AD9..15 */
+  GPIO_PinModeSet(gpioPortA, 0, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 1, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 2, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 3, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 4, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 5, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortA, 6, gpioModePushPull, 0);
+
+  /* EBI AD8 */
+  GPIO_PinModeSet(gpioPortA, 15, gpioModePushPull, 0);
+
+  /* EBI CS0-CS3 */
+  GPIO_PinModeSet(gpioPortD, 9, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortD, 10, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortD, 11, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortD, 12, gpioModePushPull, 0);
+
+  /* EBI AD0..7 */
+  GPIO_PinModeSet(gpioPortE, 8, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 9, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 10, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 11, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 12, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 13, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 14, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortE, 15, gpioModePushPull, 0);
+
+  /* EBI ARDY/ALEN/Wen/Ren */
+  GPIO_PinModeSet(gpioPortF, 2, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortF, 3, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortF, 4, gpioModePushPull, 0);
+  GPIO_PinModeSet(gpioPortF, 5, gpioModePushPull, 0);
+
+  /* Configure EBI controller, changing default values */
+  ebiConfig.mode = ebiModeD16A16ALE;
+  /* Enable bank 0 address map 0x80000000, FPGA Flash */
+  /* Enable bank 1 address map 0x84000000, FPGA SRAM */
+  /* Enable bank 2 address map 0x88000000, FPGA TFT Display (SSD2119) */
+  /* Enable bank 3 address map 0x8c000000, FPGA Board Control Registers */
+  ebiConfig.banks = EBI_BANK0|EBI_BANK1|EBI_BANK2|EBI_BANK3;
+  ebiConfig.csLines = EBI_CS0|EBI_CS1|EBI_CS2|EBI_CS3;
+
+  /* Address Setup and hold time */
+  ebiConfig.addrHoldCycles = 3;
+  ebiConfig.addrSetupCycles = 3;
+
+  /* Read cycle times */
+  ebiConfig.readStrobeCycles = 7;
+  ebiConfig.readHoldCycles = 3;
+  ebiConfig.readSetupCycles = 3;
+
+  /* Write cycle times */
+  ebiConfig.writeStrobeCycles = 7;
+  ebiConfig.writeHoldCycles = 3;
+  ebiConfig.writeSetupCycles = 3;
+
+  /* Polarity values are default */
+
+  /* Configure EBI */
+  EBI_Init(&ebiConfig);
+}
+
+
+/**************************************************************************//**
+ * @brief Initialize EBI
+ * access
+*  @return true on success, false on failure
+ *****************************************************************************/
+bool DVK_EBI_init(void)
+{
+  uint16_t     ebiMagic;
+  int          retry = 10;
+
+  /* Disable all GPIO pins and register  */
+  DVK_EBI_disable();
+  /* Configure EBI */
+  DVK_EBI_configure();
+  /* Verify that EBI access is working, if not kit is in SPI mode and needs to
+   * be configured for EBI access */
+  ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
+  while ((ebiMagic != BC_MAGIC_VALUE) && retry)
+  {    
+    DVK_EBI_disable();
+    /* Enable SPI interface */
+    DVK_SPI_init();
+    /* Set EBI mode - after this SPI access will no longer be available */
+    ebiMagic = DVK_SPI_readRegister(BC_MAGIC);
+    DVK_SPI_writeRegister(BC_CFG, BC_CFG_EBI);
+    /* Disable SPI */
+    DVK_SPI_disable();
+ 
+    /* Now setup EBI again */
+    DVK_EBI_configure();
+    /* Wait until ready */
+    ebiMagic = DVK_EBI_readRegister(BC_MAGIC);
+    if (ebiMagic == BC_MAGIC_VALUE) break;
+    
+    retry--;
+  }
+  if ( ! retry ) return false;
+
+  DVK_EBI_writeRegister(BC_LED, retry);
+  return true;
+}
+
+/**************************************************************************//**
+ * @brief Disable EBI interface, free all GPIO pins
+ *****************************************************************************/
+void DVK_EBI_disable(void)
+{
+  /* Disable EBI and SPI _BC_BUS_CONNECT */
+  GPIO_PinModeSet(gpioPortC, 12, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortC, 13, gpioModeDisabled, 0);
+
+  /* Configure GPIO pins as disabled */
+  GPIO_PinModeSet(gpioPortA, 0, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 1, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 2, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 3, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 4, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 5, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortA, 6, gpioModeDisabled, 0);
+
+  GPIO_PinModeSet(gpioPortA, 15, gpioModeDisabled, 0);
+
+  GPIO_PinModeSet(gpioPortD, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 10, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 11, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortD, 12, gpioModeDisabled, 0);
+
+  GPIO_PinModeSet(gpioPortE, 8, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 9, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 10, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 11, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 12, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 13, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 14, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortE, 15, gpioModeDisabled, 0);
+
+  GPIO_PinModeSet(gpioPortF, 2, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortF, 3, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortF, 4, gpioModeDisabled, 0);
+  GPIO_PinModeSet(gpioPortF, 5, gpioModeDisabled, 0);
+
+  /* Disable EBI controller */
+#if 0
+  EBI_Disable();
+#endif
+  /* Disable EBI clock in CMU */
+  CMU_ClockEnable(cmuClock_EBI, false);
+
+}
+
+/**************************************************************************//**
+ * @brief Write data into 16-bit board control register
+ * @param addr Address to board control register
+ * @param data Data to write into register
+ *****************************************************************************/
+void DVK_EBI_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  *addr = data;
+}
+
+/**************************************************************************//**
+ * @brief Write data into 16-bit board control register
+ * @param addr Register to read from
+ *****************************************************************************/
+uint16_t DVK_EBI_readRegister(volatile uint16_t *addr)
+{
+  return *addr;
+}
+#endif
+
+/** @} (end group BSP) */

bsp/efm32/EFM32_Gxxx_DK/dvk_spi.c

@@ -1,269 +1,269 @@
-/**************************************************************************//**
- * @file
- * @brief SPI implementation of Board Control interface
- *        This implementation use the USART2 SPI interface to control board
- *        control registers. It works
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include <stdio.h>
-#include "efm32.h"
-#include "em_usart.h"
-#include "em_gpio.h"
-#include "em_cmu.h"
-#include "dvk.h"
-#include "dvk_bcregisters.h"
-
-#ifdef _EFM32_TINY_FAMILY
-
-/* USART used for SPI access */
-#define USART_USED                USART0
-#define USART_CLK                 cmuClock_USART0
-
-/* GPIO pins used, please refer to DVK user guide. */
-#define PIN_SPIBUS_CONNECT        13
-#define PORT_SPIBUS_CONNECT       gpioPortC
-#define PIN_SPI_TX                10
-#define PORT_SPI_TX               gpioPortE
-#define PIN_SPI_RX                11
-#define PORT_SPI_RX               gpioPortE
-#define PIN_SPI_CLK               12
-#define PORT_SPI_CLK              gpioPortE
-#define PIN_SPI_CS                13
-#define PORT_SPI_CS               gpioPortE
-
-#else
-
-/* USART used for SPI access */
-#define USART_USED                USART2
-#define USART_CLK                 cmuClock_USART2
-
-/* GPIO pins used, please refer to DVK user guide. */
-#define PIN_SPIBUS_CONNECT        13
-#define PORT_SPIBUS_CONNECT       gpioPortC
-#define PIN_EBIBUS_CONNECT        12
-#define PORT_EBIBUS_CONNECT       gpioPortC
-#define PIN_SPI_TX                2
-#define PORT_SPI_TX               gpioPortC
-#define PIN_SPI_RX                3
-#define PORT_SPI_RX               gpioPortC
-#define PIN_SPI_CLK               4
-#define PORT_SPI_CLK              gpioPortC
-#define PIN_SPI_CS                5
-#define PORT_SPI_CS               gpioPortC
-
-#endif
-
-static volatile uint16_t *lastAddr = NULL;
-
-/**************************************************************************//**
- * @brief  Initializes SPI interface for access to FPGA registers
- *         for board control
- *****************************************************************************/
-static void spiInit(void)
-{
-  USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
-
-  /* Enable module clocks */
-  CMU_ClockEnable(cmuClock_GPIO, true);
-  CMU_ClockEnable(cmuClock_HFPER, true);
-  CMU_ClockEnable(USART_CLK, true);
-
-  /* Configure SPI bus connect pins, DOUT set to 0, disable EBI */
-  GPIO_PinModeSet(PORT_SPIBUS_CONNECT, PIN_SPIBUS_CONNECT, gpioModePushPull, 0);
-  GPIO_PinModeSet(PORT_EBIBUS_CONNECT, PIN_EBIBUS_CONNECT, gpioModePushPull, 1);
-  
-  /* Configure SPI pins */
-  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
-  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModePushPull, 0);
-  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModePushPull, 0);
-  /* Keep CS high to not activate slave */
-  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModePushPull, 1);
-
-  /* Configure to use SPI master with manual CS */
-  /* For now, configure SPI for worst case 32MHz clock in order to work for all */
-  /* configurations. */
-  init.refFreq = 32000000;
-  init.baudrate = 7000000;
-  USART_InitSync(USART_USED, &init);
-
-  /* Enable pins at default location */
-  USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
-}
-
-/**************************************************************************//**
- * @brief  Disables GPIO pins and USART from FPGA register access
- *****************************************************************************/
-static void spiDisable(void)
-{
-  USART_Reset(USART_USED);
-
-  /* Disable LCD_SELECT */
-  GPIO_PinModeSet(gpioPortD, 13, gpioModeDisabled, 0);
-
-  /* Disable SPI pins */
-  GPIO_PinModeSet(PORT_SPIBUS_CONNECT, 13, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPIBUS_CONNECT, 12, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModeDisabled, 0);
-  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModeDisabled, 0);
-
-  /* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
-   * might be using it */
-  CMU_ClockEnable(USART_CLK, false);
-}
-
-/**************************************************************************//**
- * @brief  Perform SPI Transfer
- *****************************************************************************/
-static uint16_t spiAccess(uint8_t spiaddr, uint8_t rw, uint16_t spidata)
-{
-  uint16_t      tmp;
-
-  GPIO_PinOutClear(PORT_SPI_CS, PIN_SPI_CS);
-
-  /* For every byte sent, one is received */
-
-  /* Write SPI address */
-  USART_Tx(USART_USED, (spiaddr & 0x3) | rw << 3);
-  /* Just ignore data read back */
-  USART_Rx(USART_USED);
-
-  /* SPI data LSB */ 
-  USART_Tx(USART_USED, spidata & 0xFF);
-  tmp = (uint16_t)USART_Rx(USART_USED);
-
-  /* SPI data MSB */ 
-  USART_Tx(USART_USED, spidata >> 8);
-  tmp |= (uint16_t)USART_Rx(USART_USED) << 8;
-
-  GPIO_PinOutSet(PORT_SPI_CS, PIN_SPI_CS);
-
-  return tmp;
-}
-
-/**************************************************************************//**
- * @brief  Performs SPI write to FPGA register
- * @param spiadr Address of register
- * @param spidata Data to write
- *****************************************************************************/
-static void spiWrite(uint8_t spiadr, uint16_t spidata)
-{
-  spiAccess(spiadr, 0, spidata);
-}
-
-/**************************************************************************//**
- * @brief  Performs SPI read from FPGA register
- * @param spiadr Address of register
- * @param spidata Dummy data
- *****************************************************************************/
-static uint16_t spiRead(uint8_t spiadr, uint16_t spidata)
-{
-  return spiAccess(spiadr, 1, spidata);
-}
-
-/**************************************************************************//**
- * @brief  Initializes DVK register access
-*  @return true on success, false on failure
- *****************************************************************************/
-bool DVK_SPI_init(void)
-{
-  uint16_t spiMagic;
-
-  spiInit();
-  /* Read "board control Magic" register to verify SPI is up and running */
-  /*  if not FPGA is configured to be in EBI mode  */
-
-  spiMagic = DVK_SPI_readRegister(BC_MAGIC);
-  if(spiMagic != BC_MAGIC_VALUE)
-  {
-    return false;
-  } 
-  else
-  {
-    return true;
-  }
-}
-
-/**************************************************************************//**
- * @brief  Disable and free up resources used by SPI board control access
- *****************************************************************************/
-void DVK_SPI_disable(void)
-{
-  spiDisable();
-}
-
-/**************************************************************************//**
- * @brief  Perform read from DVK board control register
- * @param  addr Address of register to read from
- *****************************************************************************/
-uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
-{
-  uint16_t data;
-
-  if (addr != lastAddr)
-  {
-    spiWrite(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
-    spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
-    spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
-  }
-  /* Read twice */
-  data     = spiRead(0x03, 0);
-  data     = spiRead(0x03, 0);
-  lastAddr = addr;
-  return data;
-}
-
-/**************************************************************************//**
- * @brief  Perform write to DVK board control register
- * @param addr Address of register to write to
- * @param data 16-bit to  write into register
- *****************************************************************************/
-void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
-{
-  if (addr != lastAddr)
-  {
-    spiWrite(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
-    spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
-    spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
-  }
-  spiWrite(0x03, data);                                     /*Data*/
-  lastAddr = addr;
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief SPI implementation of Board Control interface
+ *        This implementation use the USART2 SPI interface to control board
+ *        control registers. It works
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdio.h>
+#include "efm32.h"
+#include "em_usart.h"
+#include "em_gpio.h"
+#include "em_cmu.h"
+#include "dvk.h"
+#include "dvk_bcregisters.h"
+
+#ifdef _EFM32_TINY_FAMILY
+
+/* USART used for SPI access */
+#define USART_USED                USART0
+#define USART_CLK                 cmuClock_USART0
+
+/* GPIO pins used, please refer to DVK user guide. */
+#define PIN_SPIBUS_CONNECT        13
+#define PORT_SPIBUS_CONNECT       gpioPortC
+#define PIN_SPI_TX                10
+#define PORT_SPI_TX               gpioPortE
+#define PIN_SPI_RX                11
+#define PORT_SPI_RX               gpioPortE
+#define PIN_SPI_CLK               12
+#define PORT_SPI_CLK              gpioPortE
+#define PIN_SPI_CS                13
+#define PORT_SPI_CS               gpioPortE
+
+#else
+
+/* USART used for SPI access */
+#define USART_USED                USART2
+#define USART_CLK                 cmuClock_USART2
+
+/* GPIO pins used, please refer to DVK user guide. */
+#define PIN_SPIBUS_CONNECT        13
+#define PORT_SPIBUS_CONNECT       gpioPortC
+#define PIN_EBIBUS_CONNECT        12
+#define PORT_EBIBUS_CONNECT       gpioPortC
+#define PIN_SPI_TX                2
+#define PORT_SPI_TX               gpioPortC
+#define PIN_SPI_RX                3
+#define PORT_SPI_RX               gpioPortC
+#define PIN_SPI_CLK               4
+#define PORT_SPI_CLK              gpioPortC
+#define PIN_SPI_CS                5
+#define PORT_SPI_CS               gpioPortC
+
+#endif
+
+static volatile uint16_t *lastAddr = NULL;
+
+/**************************************************************************//**
+ * @brief  Initializes SPI interface for access to FPGA registers
+ *         for board control
+ *****************************************************************************/
+static void spiInit(void)
+{
+  USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
+
+  /* Enable module clocks */
+  CMU_ClockEnable(cmuClock_GPIO, true);
+  CMU_ClockEnable(cmuClock_HFPER, true);
+  CMU_ClockEnable(USART_CLK, true);
+
+  /* Configure SPI bus connect pins, DOUT set to 0, disable EBI */
+  GPIO_PinModeSet(PORT_SPIBUS_CONNECT, PIN_SPIBUS_CONNECT, gpioModePushPull, 0);
+  GPIO_PinModeSet(PORT_EBIBUS_CONNECT, PIN_EBIBUS_CONNECT, gpioModePushPull, 1);
+  
+  /* Configure SPI pins */
+  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModePushPull, 0);
+  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModePushPull, 0);
+  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModePushPull, 0);
+  /* Keep CS high to not activate slave */
+  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModePushPull, 1);
+
+  /* Configure to use SPI master with manual CS */
+  /* For now, configure SPI for worst case 32MHz clock in order to work for all */
+  /* configurations. */
+  init.refFreq = 32000000;
+  init.baudrate = 7000000;
+  USART_InitSync(USART_USED, &init);
+
+  /* Enable pins at default location */
+  USART_USED->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
+}
+
+/**************************************************************************//**
+ * @brief  Disables GPIO pins and USART from FPGA register access
+ *****************************************************************************/
+static void spiDisable(void)
+{
+  USART_Reset(USART_USED);
+
+  /* Disable LCD_SELECT */
+  GPIO_PinModeSet(gpioPortD, 13, gpioModeDisabled, 0);
+
+  /* Disable SPI pins */
+  GPIO_PinModeSet(PORT_SPIBUS_CONNECT, 13, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPIBUS_CONNECT, 12, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_TX, PIN_SPI_TX, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_RX, PIN_SPI_RX, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_CLK, PIN_SPI_CLK, gpioModeDisabled, 0);
+  GPIO_PinModeSet(PORT_SPI_CS, PIN_SPI_CS, gpioModeDisabled, 0);
+
+  /* Disable USART clock - we can't disable GPIO or HFPER as we don't know who else
+   * might be using it */
+  CMU_ClockEnable(USART_CLK, false);
+}
+
+/**************************************************************************//**
+ * @brief  Perform SPI Transfer
+ *****************************************************************************/
+static uint16_t spiAccess(uint8_t spiaddr, uint8_t rw, uint16_t spidata)
+{
+  uint16_t      tmp;
+
+  GPIO_PinOutClear(PORT_SPI_CS, PIN_SPI_CS);
+
+  /* For every byte sent, one is received */
+
+  /* Write SPI address */
+  USART_Tx(USART_USED, (spiaddr & 0x3) | rw << 3);
+  /* Just ignore data read back */
+  USART_Rx(USART_USED);
+
+  /* SPI data LSB */ 
+  USART_Tx(USART_USED, spidata & 0xFF);
+  tmp = (uint16_t)USART_Rx(USART_USED);
+
+  /* SPI data MSB */ 
+  USART_Tx(USART_USED, spidata >> 8);
+  tmp |= (uint16_t)USART_Rx(USART_USED) << 8;
+
+  GPIO_PinOutSet(PORT_SPI_CS, PIN_SPI_CS);
+
+  return tmp;
+}
+
+/**************************************************************************//**
+ * @brief  Performs SPI write to FPGA register
+ * @param spiadr Address of register
+ * @param spidata Data to write
+ *****************************************************************************/
+static void spiWrite(uint8_t spiadr, uint16_t spidata)
+{
+  spiAccess(spiadr, 0, spidata);
+}
+
+/**************************************************************************//**
+ * @brief  Performs SPI read from FPGA register
+ * @param spiadr Address of register
+ * @param spidata Dummy data
+ *****************************************************************************/
+static uint16_t spiRead(uint8_t spiadr, uint16_t spidata)
+{
+  return spiAccess(spiadr, 1, spidata);
+}
+
+/**************************************************************************//**
+ * @brief  Initializes DVK register access
+*  @return true on success, false on failure
+ *****************************************************************************/
+bool DVK_SPI_init(void)
+{
+  uint16_t spiMagic;
+
+  spiInit();
+  /* Read "board control Magic" register to verify SPI is up and running */
+  /*  if not FPGA is configured to be in EBI mode  */
+
+  spiMagic = DVK_SPI_readRegister(BC_MAGIC);
+  if(spiMagic != BC_MAGIC_VALUE)
+  {
+    return false;
+  } 
+  else
+  {
+    return true;
+  }
+}
+
+/**************************************************************************//**
+ * @brief  Disable and free up resources used by SPI board control access
+ *****************************************************************************/
+void DVK_SPI_disable(void)
+{
+  spiDisable();
+}
+
+/**************************************************************************//**
+ * @brief  Perform read from DVK board control register
+ * @param  addr Address of register to read from
+ *****************************************************************************/
+uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
+{
+  uint16_t data;
+
+  if (addr != lastAddr)
+  {
+    spiWrite(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
+    spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
+    spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
+  }
+  /* Read twice */
+  data     = spiRead(0x03, 0);
+  data     = spiRead(0x03, 0);
+  lastAddr = addr;
+  return data;
+}
+
+/**************************************************************************//**
+ * @brief  Perform write to DVK board control register
+ * @param addr Address of register to write to
+ * @param data 16-bit to  write into register
+ *****************************************************************************/
+void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
+{
+  if (addr != lastAddr)
+  {
+    spiWrite(0x00, 0xFFFF & ((uint32_t) addr));             /*LSBs of address*/
+    spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16));         /*MSBs of address*/
+    spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26);   /*Chip select*/
+  }
+  spiWrite(0x03, data);                                     /*Data*/
+  lastAddr = addr;
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32_Gxxx_DK/trace.c

@@ -1,111 +1,111 @@
-/**************************************************************************//**
- * @file
- * @brief SWO Trace API (for eAProfiler)
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-#include <stdbool.h>
-#include "efm32.h"
-#include "trace.h"
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-/**************************************************************************//**
- * @brief Configure trace output for energyAware Profiler
- *****************************************************************************/
-void TRACE_SWOSetup(void)
-{
-  uint32_t *dwt_ctrl = (uint32_t *) 0xE0001000;
-  uint32_t *tpiu_prescaler = (uint32_t *) 0xE0040010;
-  uint32_t *tpiu_protocol = (uint32_t *) 0xE00400F0;
-
-  /* Enable GPIO clock */
-  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
-
-  /* Enable Serial wire output pin */
-  GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
-
-  /* Set location 1 */
-  GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC1;
-
-  /* Enable output on pin */
-  GPIO->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE15_MASK);
-  GPIO->P[2].MODEH |= GPIO_P_MODEH_MODE15_PUSHPULL;
-
-  /* Enable debug clock AUXHFRCO */
-  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
-
-  /* Wait until clock is ready */
-  while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
-
-  /* Enable trace in core debug */
-  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
-
-  /* Enable PC and IRQ sampling output */
-  *dwt_ctrl = 0x400113FF;
-
-  /* Set TPIU prescaler to 16. */
-  *tpiu_prescaler = 0xf;
-
-  /* Set protocol to NRZ */
-  *tpiu_protocol = 2;
-
-  /* Unlock ITM and output data */
-  ITM->LAR = 0xC5ACCE55;
-  ITM->TCR = 0x10009;
-}
-
-/**************************************************************************//**
- * @brief Profiler configuration
- * @return true if energyAware Profiler/SWO is enabled, false if not
- * @note If first word of the user page is zero, this will not 
- *       enable SWO profiler output, see trace.h
- *****************************************************************************/
-bool TRACE_ProfilerSetup(void)
-{
-  volatile uint32_t *userData = (uint32_t *) USER_PAGE;
-
-  /* Check magic "trace" word in user page */
-  if(*userData == 0x00000000UL)
-  {
-    return false;
-  }
-  else
-  {
-    TRACE_SWOSetup();
-    return true;
-  }  
-}
-
-/** @} (end group BSP) */
+/**************************************************************************//**
+ * @file
+ * @brief SWO Trace API (for eAProfiler)
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#include <stdbool.h>
+#include "efm32.h"
+#include "trace.h"
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+/**************************************************************************//**
+ * @brief Configure trace output for energyAware Profiler
+ *****************************************************************************/
+void TRACE_SWOSetup(void)
+{
+  uint32_t *dwt_ctrl = (uint32_t *) 0xE0001000;
+  uint32_t *tpiu_prescaler = (uint32_t *) 0xE0040010;
+  uint32_t *tpiu_protocol = (uint32_t *) 0xE00400F0;
+
+  /* Enable GPIO clock */
+  CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
+
+  /* Enable Serial wire output pin */
+  GPIO->ROUTE |= GPIO_ROUTE_SWOPEN;
+
+  /* Set location 1 */
+  GPIO->ROUTE = (GPIO->ROUTE & ~(_GPIO_ROUTE_SWLOCATION_MASK)) | GPIO_ROUTE_SWLOCATION_LOC1;
+
+  /* Enable output on pin */
+  GPIO->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE15_MASK);
+  GPIO->P[2].MODEH |= GPIO_P_MODEH_MODE15_PUSHPULL;
+
+  /* Enable debug clock AUXHFRCO */
+  CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
+
+  /* Wait until clock is ready */
+  while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
+
+  /* Enable trace in core debug */
+  CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+
+  /* Enable PC and IRQ sampling output */
+  *dwt_ctrl = 0x400113FF;
+
+  /* Set TPIU prescaler to 16. */
+  *tpiu_prescaler = 0xf;
+
+  /* Set protocol to NRZ */
+  *tpiu_protocol = 2;
+
+  /* Unlock ITM and output data */
+  ITM->LAR = 0xC5ACCE55;
+  ITM->TCR = 0x10009;
+}
+
+/**************************************************************************//**
+ * @brief Profiler configuration
+ * @return true if energyAware Profiler/SWO is enabled, false if not
+ * @note If first word of the user page is zero, this will not 
+ *       enable SWO profiler output, see trace.h
+ *****************************************************************************/
+bool TRACE_ProfilerSetup(void)
+{
+  volatile uint32_t *userData = (uint32_t *) USER_PAGE;
+
+  /* Check magic "trace" word in user page */
+  if(*userData == 0x00000000UL)
+  {
+    return false;
+  }
+  else
+  {
+    TRACE_SWOSetup();
+    return true;
+  }  
+}
+
+/** @} (end group BSP) */

bsp/efm32/EFM32_Gxxx_DK/trace.h

@@ -1,109 +1,109 @@
-/**************************************************************************//**
- * @file
- * @brief SWO Trace API (for eAProfiler)
- * @author Energy Micro AS
- * @version 2.0.1
- ******************************************************************************
- * @section License
- * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
- *******************************************************************************
- *
- * Permission is granted to anyone to use this software for any purpose,
- * including commercial applications, and to alter it and redistribute it
- * freely, subject to the following restrictions:
- *
- * 1. The origin of this software must not be misrepresented; you must not
- *    claim that you wrote the original software.
- * 2. Altered source versions must be plainly marked as such, and must not be
- *    misrepresented as being the original software.
- * 3. This notice may not be removed or altered from any source distribution.
- * 4. The source and compiled code may only be used on Energy Micro "EFM32"
- *    microcontrollers and "EFR4" radios.
- *
- * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
- * obligation to support this Software. Energy Micro AS is providing the
- * Software "AS IS", with no express or implied warranties of any kind,
- * including, but not limited to, any implied warranties of merchantability
- * or fitness for any particular purpose or warranties against infringement
- * of any proprietary rights of a third party.
- *
- * Energy Micro AS will not be liable for any consequential, incidental, or
- * special damages, or any other relief, or for any claim by any third party,
- * arising from your use of this Software.
- *
- *****************************************************************************/
-#ifndef __TRACE_H
-#define __TRACE_H
-
-/***************************************************************************//**
- * @addtogroup BSP
- * @{
- ******************************************************************************/
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "em_msc.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void TRACE_SWOSetup(void);
-bool TRACE_ProfilerSetup(void);
-
-#define USER_PAGE 0x0FE00000UL
-
-/**************************************************************************//**
- * @brief Set or clear word in user page which enables or disables SWO
- *        in TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
- *        no example project will enable SWO trace.
- * @param[in] enable
- * @note Add "em_msc.c" to build to use this function. 
- *****************************************************************************/
-__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
-{
-  uint32_t data;
-  volatile uint32_t *userpage = (uint32_t *) USER_PAGE;
-
-  /* Check that configuration needs to change */
-  data = *userpage;
-  if(enable)
-  {
-    if(data == 0xFFFFFFFF) 
-    {
-      return;
-    }
-  }
-  else
-  {
-    if(data == 0x00000000)
-    {
-      return;
-    }
-  }
- 
-  /* Initialize MSC */
-  MSC_Init();
-
-  /* Write enble or disable trigger word into flash */
-  if(enable)
-  {
-    data = 0xFFFFFFFF;
-    MSC_ErasePage((uint32_t *)USER_PAGE);
-    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
-  }
-  else
-  {
-    data = 0x00000000;
-    MSC_ErasePage((uint32_t *)USER_PAGE);
-    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
-  }
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} (end group BSP) */
-
-#endif
+/**************************************************************************//**
+ * @file
+ * @brief SWO Trace API (for eAProfiler)
+ * @author Energy Micro AS
+ * @version 2.0.1
+ ******************************************************************************
+ * @section License
+ * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
+ *******************************************************************************
+ *
+ * Permission is granted to anyone to use this software for any purpose,
+ * including commercial applications, and to alter it and redistribute it
+ * freely, subject to the following restrictions:
+ *
+ * 1. The origin of this software must not be misrepresented; you must not
+ *    claim that you wrote the original software.
+ * 2. Altered source versions must be plainly marked as such, and must not be
+ *    misrepresented as being the original software.
+ * 3. This notice may not be removed or altered from any source distribution.
+ * 4. The source and compiled code may only be used on Energy Micro "EFM32"
+ *    microcontrollers and "EFR4" radios.
+ *
+ * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
+ * obligation to support this Software. Energy Micro AS is providing the
+ * Software "AS IS", with no express or implied warranties of any kind,
+ * including, but not limited to, any implied warranties of merchantability
+ * or fitness for any particular purpose or warranties against infringement
+ * of any proprietary rights of a third party.
+ *
+ * Energy Micro AS will not be liable for any consequential, incidental, or
+ * special damages, or any other relief, or for any claim by any third party,
+ * arising from your use of this Software.
+ *
+ *****************************************************************************/
+#ifndef __TRACE_H
+#define __TRACE_H
+
+/***************************************************************************//**
+ * @addtogroup BSP
+ * @{
+ ******************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "em_msc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void TRACE_SWOSetup(void);
+bool TRACE_ProfilerSetup(void);
+
+#define USER_PAGE 0x0FE00000UL
+
+/**************************************************************************//**
+ * @brief Set or clear word in user page which enables or disables SWO
+ *        in TRACE_ProfilerSetup. If TRACE_ProfilerEnable(false) has been run,
+ *        no example project will enable SWO trace.
+ * @param[in] enable
+ * @note Add "em_msc.c" to build to use this function. 
+ *****************************************************************************/
+__STATIC_INLINE void TRACE_ProfilerEnable(bool enable)
+{
+  uint32_t data;
+  volatile uint32_t *userpage = (uint32_t *) USER_PAGE;
+
+  /* Check that configuration needs to change */
+  data = *userpage;
+  if(enable)
+  {
+    if(data == 0xFFFFFFFF) 
+    {
+      return;
+    }
+  }
+  else
+  {
+    if(data == 0x00000000)
+    {
+      return;
+    }
+  }
+ 
+  /* Initialize MSC */
+  MSC_Init();
+
+  /* Write enble or disable trigger word into flash */
+  if(enable)
+  {
+    data = 0xFFFFFFFF;
+    MSC_ErasePage((uint32_t *)USER_PAGE);
+    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
+  }
+  else
+  {
+    data = 0x00000000;
+    MSC_ErasePage((uint32_t *)USER_PAGE);
+    MSC_WriteWord((uint32_t *)USER_PAGE, (void *) &data, 4);
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} (end group BSP) */
+
+#endif

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c

@@ -1,159 +1,159 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_f32.c    
-*    
-* Description:	Vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include <math.h>
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup BasicAbs Vector Absolute Value        
- *        
- * Computes the absolute value of a vector on an element-by-element basis.        
- *        
- * <pre>        
- *     pDst[n] = abs(pSrcA[n]),   0 <= n < blockSize.        
- * </pre>        
- *        
- * The operation can be done in-place by setting the input and output pointers to the same buffer.        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup BasicAbs        
- * @{        
- */
-
-/**        
- * @brief Floating-point vector absolute value.        
- * @param[in]       *pSrc points to the input buffer        
- * @param[out]      *pDst points to the output buffer        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- */
-
-void arm_abs_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute and then store the results in the destination buffer. */
-    /* read sample from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-    in3 = *(pSrc + 2);
-
-    /* find absolute value */
-    in1 = fabsf(in1);
-
-    /* read sample from source */
-    in4 = *(pSrc + 3);
-
-    /* find absolute value */
-    in2 = fabsf(in2);
-
-    /* read sample from source */
-    *pDst = in1;
-
-    /* find absolute value */
-    in3 = fabsf(in3);
-
-    /* find absolute value */
-    in4 = fabsf(in4);
-
-    /* store result to destination */
-    *(pDst + 1) = in2;
-
-    /* store result to destination */
-    *(pDst + 2) = in3;
-
-    /* store result to destination */
-    *(pDst + 3) = in4;
-
-
-    /* Update source pointer to process next sampels */
-    pSrc += 4u;
-
-    /* Update destination pointer to process next sampels */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /*   #ifndef ARM_MATH_CM0   */
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute and then store the results in the destination buffer. */
-    *pDst++ = fabsf(*pSrc++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicAbs group        
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_f32.c    
+*    
+* Description:	Vector absolute value.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* ---------------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include <math.h>
+
+/**        
+ * @ingroup groupMath        
+ */
+
+/**        
+ * @defgroup BasicAbs Vector Absolute Value        
+ *        
+ * Computes the absolute value of a vector on an element-by-element basis.        
+ *        
+ * <pre>        
+ *     pDst[n] = abs(pSrcA[n]),   0 <= n < blockSize.        
+ * </pre>        
+ *        
+ * The operation can be done in-place by setting the input and output pointers to the same buffer.        
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
+ */
+
+/**        
+ * @addtogroup BasicAbs        
+ * @{        
+ */
+
+/**        
+ * @brief Floating-point vector absolute value.        
+ * @param[in]       *pSrc points to the input buffer        
+ * @param[out]      *pDst points to the output buffer        
+ * @param[in]       blockSize number of samples in each vector        
+ * @return none.        
+ */
+
+void arm_abs_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32_t in1, in2, in3, in4;                  /* temporary variables */
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Calculate absolute and then store the results in the destination buffer. */
+    /* read sample from source */
+    in1 = *pSrc;
+    in2 = *(pSrc + 1);
+    in3 = *(pSrc + 2);
+
+    /* find absolute value */
+    in1 = fabsf(in1);
+
+    /* read sample from source */
+    in4 = *(pSrc + 3);
+
+    /* find absolute value */
+    in2 = fabsf(in2);
+
+    /* read sample from source */
+    *pDst = in1;
+
+    /* find absolute value */
+    in3 = fabsf(in3);
+
+    /* find absolute value */
+    in4 = fabsf(in4);
+
+    /* store result to destination */
+    *(pDst + 1) = in2;
+
+    /* store result to destination */
+    *(pDst + 2) = in3;
+
+    /* store result to destination */
+    *(pDst + 3) = in4;
+
+
+    /* Update source pointer to process next sampels */
+    pSrc += 4u;
+
+    /* Update destination pointer to process next sampels */
+    pDst += 4u;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /*   #ifndef ARM_MATH_CM0   */
+
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Calculate absolute and then store the results in the destination buffer. */
+    *pDst++ = fabsf(*pSrc++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**        
+ * @} end of BasicAbs group        
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c

@@ -1,173 +1,173 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_q15.c    
-*    
-* Description:	Q15 vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAbs    
- * @{    
- */
-
-/**    
- * @brief Q15 vector absolute value.    
- * @param[in]       *pSrc points to the input buffer    
- * @param[out]      *pDst points to the output buffer    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.    
- */
-
-void arm_abs_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t in1;                                     /* Input value1 */
-  q15_t in2;                                     /* Input value2 */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read two inputs */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-
-
-    /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)),
-              ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16);
-
-#else
-
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)),
-              ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)),
-              ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16);
-
-#else
-
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)),
-              ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read the input */
-    in1 = *pSrc++;
-
-    /* Calculate absolute value of input and then store the result in the destination buffer. */
-    *pDst++ = (in1 > 0) ? in1 : __QSUB16(0, in1);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary input variable */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read the input */
-    in = *pSrc++;
-
-    /* Calculate absolute value of input and then store the result in the destination buffer. */
-    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of BasicAbs group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_q15.c    
+*    
+* Description:	Q15 vector absolute value.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicAbs    
+ * @{    
+ */
+
+/**    
+ * @brief Q15 vector absolute value.    
+ * @param[in]       *pSrc points to the input buffer    
+ * @param[out]      *pDst points to the output buffer    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.    
+ */
+
+void arm_abs_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+  q15_t in1;                                     /* Input value1 */
+  q15_t in2;                                     /* Input value2 */
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Read two inputs */
+    in1 = *pSrc++;
+    in2 = *pSrc++;
+
+
+    /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+
+    *__SIMD32(pDst)++ =
+      __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)),
+              ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16);
+
+#else
+
+
+    *__SIMD32(pDst)++ =
+      __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)),
+              ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16);
+
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
+
+    in1 = *pSrc++;
+    in2 = *pSrc++;
+
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+
+    *__SIMD32(pDst)++ =
+      __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)),
+              ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16);
+
+#else
+
+
+    *__SIMD32(pDst)++ =
+      __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)),
+              ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16);
+
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Read the input */
+    in1 = *pSrc++;
+
+    /* Calculate absolute value of input and then store the result in the destination buffer. */
+    *pDst++ = (in1 > 0) ? in1 : __QSUB16(0, in1);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  q15_t in;                                      /* Temporary input variable */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Read the input */
+    in = *pSrc++;
+
+    /* Calculate absolute value of input and then store the result in the destination buffer. */
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+}
+
+/**    
+ * @} end of BasicAbs group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c

@@ -1,125 +1,125 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_q31.c    
-*    
-* Description:	Q31 vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAbs    
- * @{    
- */
-
-
-/**    
- * @brief Q31 vector absolute value.    
- * @param[in]       *pSrc points to the input buffer    
- * @param[out]      *pDst points to the output buffer    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.    
- */
-
-void arm_abs_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = (in1 > 0) ? in1 : __QSUB(0, in1);
-    *pDst++ = (in2 > 0) ? in2 : __QSUB(0, in2);
-    *pDst++ = (in3 > 0) ? in3 : __QSUB(0, in3);
-    *pDst++ = (in4 > 0) ? in4 : __QSUB(0, in4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /*   #ifndef ARM_MATH_CM0   */
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of BasicAbs group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_q31.c    
+*    
+* Description:	Q31 vector absolute value.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicAbs    
+ * @{    
+ */
+
+
+/**    
+ * @brief Q31 vector absolute value.    
+ * @param[in]       *pSrc points to the input buffer    
+ * @param[out]      *pDst points to the output buffer    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.    
+ */
+
+void arm_abs_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  q31_t in;                                      /* Input value */
+
+#ifndef ARM_MATH_CM0
+
+  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t in1, in2, in3, in4;
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
+    in1 = *pSrc++;
+    in2 = *pSrc++;
+    in3 = *pSrc++;
+    in4 = *pSrc++;
+
+    *pDst++ = (in1 > 0) ? in1 : __QSUB(0, in1);
+    *pDst++ = (in2 > 0) ? in2 : __QSUB(0, in2);
+    *pDst++ = (in3 > 0) ? in3 : __QSUB(0, in3);
+    *pDst++ = (in4 > 0) ? in4 : __QSUB(0, in4);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /*   #ifndef ARM_MATH_CM0   */
+
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
+    in = *pSrc++;
+    *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**    
+ * @} end of BasicAbs group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c

@@ -1,152 +1,152 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_q7.c    
-*    
-* Description:	Q7 vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @addtogroup BasicAbs        
- * @{        
- */
-
-/**        
- * @brief Q7 vector absolute value.        
- * @param[in]       *pSrc points to the input buffer        
- * @param[out]      *pDst points to the output buffer        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- *    
- * \par Conditions for optimum performance    
- *  Input and output buffers should be aligned by 32-bit    
- *    
- *        
- * <b>Scaling and Overflow Behavior:</b>        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.        
- */
-
-void arm_abs_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q7_t in;                                       /* Input value1 */
-
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;                      /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read inputs */
-    in1 = (q31_t) * pSrc;
-    in2 = (q31_t) * (pSrc + 1);
-    in3 = (q31_t) * (pSrc + 2);
-
-    /* find absolute value */
-    out1 = (in1 > 0) ? in1 : __QSUB8(0, in1);
-
-    /* read input */
-    in4 = (q31_t) * (pSrc + 3);
-
-    /* find absolute value */
-    out2 = (in2 > 0) ? in2 : __QSUB8(0, in2);
-
-    /* store result to destination */
-    *pDst = (q7_t) out1;
-
-    /* find absolute value */
-    out3 = (in3 > 0) ? in3 : __QSUB8(0, in3);
-
-    /* find absolute value */
-    out4 = (in4 > 0) ? in4 : __QSUB8(0, in4);
-
-    /* store result to destination */
-    *(pDst + 1) = (q7_t) out2;
-
-    /* store result to destination */
-    *(pDst + 2) = (q7_t) out3;
-
-    /* store result to destination */
-    *(pDst + 3) = (q7_t) out4;
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-#endif //      #define ARM_MATH_CM0
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read the input */
-    in = *pSrc++;
-
-    /* Store the Absolute result in the destination buffer */
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicAbs group        
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_abs_q7.c    
+*    
+* Description:	Q7 vector absolute value.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**        
+ * @ingroup groupMath        
+ */
+
+/**        
+ * @addtogroup BasicAbs        
+ * @{        
+ */
+
+/**        
+ * @brief Q7 vector absolute value.        
+ * @param[in]       *pSrc points to the input buffer        
+ * @param[out]      *pDst points to the output buffer        
+ * @param[in]       blockSize number of samples in each vector        
+ * @return none.        
+ *    
+ * \par Conditions for optimum performance    
+ *  Input and output buffers should be aligned by 32-bit    
+ *    
+ *        
+ * <b>Scaling and Overflow Behavior:</b>        
+ * \par        
+ * The function uses saturating arithmetic.        
+ * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.        
+ */
+
+void arm_abs_q7(
+  q7_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  q7_t in;                                       /* Input value1 */
+
+#ifndef ARM_MATH_CM0
+
+  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t in1, in2, in3, in4;                      /* temporary input variables */
+  q31_t out1, out2, out3, out4;                  /* temporary output variables */
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Read inputs */
+    in1 = (q31_t) * pSrc;
+    in2 = (q31_t) * (pSrc + 1);
+    in3 = (q31_t) * (pSrc + 2);
+
+    /* find absolute value */
+    out1 = (in1 > 0) ? in1 : __QSUB8(0, in1);
+
+    /* read input */
+    in4 = (q31_t) * (pSrc + 3);
+
+    /* find absolute value */
+    out2 = (in2 > 0) ? in2 : __QSUB8(0, in2);
+
+    /* store result to destination */
+    *pDst = (q7_t) out1;
+
+    /* find absolute value */
+    out3 = (in3 > 0) ? in3 : __QSUB8(0, in3);
+
+    /* find absolute value */
+    out4 = (in4 > 0) ? in4 : __QSUB8(0, in4);
+
+    /* store result to destination */
+    *(pDst + 1) = (q7_t) out2;
+
+    /* store result to destination */
+    *(pDst + 2) = (q7_t) out3;
+
+    /* store result to destination */
+    *(pDst + 3) = (q7_t) out4;
+
+    /* update pointers to process next samples */
+    pSrc += 4u;
+    pDst += 4u;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+#else
+
+  /* Run the below code for Cortex-M0 */
+  blkCnt = blockSize;
+
+#endif //      #define ARM_MATH_CM0
+
+  while(blkCnt > 0u)
+  {
+    /* C = |A| */
+    /* Read the input */
+    in = *pSrc++;
+
+    /* Store the Absolute result in the destination buffer */
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**        
+ * @} end of BasicAbs group        
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c

@@ -1,145 +1,145 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_f32.c    
-*    
-* Description:	Floating-point vector addition.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup BasicAdd Vector Addition        
- *        
- * Element-by-element addition of two vectors.        
- *        
- * <pre>        
- *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.        
- * </pre>        
- *        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup BasicAdd        
- * @{        
- */
-
-/**        
- * @brief Floating-point vector addition.        
- * @param[in]       *pSrcA points to the first input vector        
- * @param[in]       *pSrcB points to the second input vector        
- * @param[out]      *pDst points to the output vector        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- */
-
-void arm_add_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary input variabels */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-
-    /* read four inputs from sourceA and four inputs from sourceB */
-    inA1 = *pSrcA;
-    inB1 = *pSrcB;
-    inA2 = *(pSrcA + 1);
-    inB2 = *(pSrcB + 1);
-    inA3 = *(pSrcA + 2);
-    inB3 = *(pSrcB + 2);
-    inA4 = *(pSrcA + 3);
-    inB4 = *(pSrcB + 3);
-
-    /* C = A + B */
-    /* add and store result to destination */
-    *pDst = inA1 + inB1;
-    *(pDst + 1) = inA2 + inB2;
-    *(pDst + 2) = inA3 + inB3;
-    *(pDst + 3) = inA4 + inB4;
-
-    /* update pointers to process next samples */
-    pSrcA += 4u;
-    pSrcB += 4u;
-    pDst += 4u;
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (*pSrcA++) + (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicAdd group        
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_f32.c    
+*    
+* Description:	Floating-point vector addition.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* ---------------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**        
+ * @ingroup groupMath        
+ */
+
+/**        
+ * @defgroup BasicAdd Vector Addition        
+ *        
+ * Element-by-element addition of two vectors.        
+ *        
+ * <pre>        
+ *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.        
+ * </pre>        
+ *        
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
+ */
+
+/**        
+ * @addtogroup BasicAdd        
+ * @{        
+ */
+
+/**        
+ * @brief Floating-point vector addition.        
+ * @param[in]       *pSrcA points to the first input vector        
+ * @param[in]       *pSrcB points to the second input vector        
+ * @param[out]      *pDst points to the output vector        
+ * @param[in]       blockSize number of samples in each vector        
+ * @return none.        
+ */
+
+void arm_add_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32_t inA1, inA2, inA3, inA4;              /* temporary input variabels */
+  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+
+    /* read four inputs from sourceA and four inputs from sourceB */
+    inA1 = *pSrcA;
+    inB1 = *pSrcB;
+    inA2 = *(pSrcA + 1);
+    inB2 = *(pSrcB + 1);
+    inA3 = *(pSrcA + 2);
+    inB3 = *(pSrcB + 2);
+    inA4 = *(pSrcA + 3);
+    inB4 = *(pSrcB + 3);
+
+    /* C = A + B */
+    /* add and store result to destination */
+    *pDst = inA1 + inB1;
+    *(pDst + 1) = inA2 + inB2;
+    *(pDst + 2) = inA3 + inB3;
+    *(pDst + 3) = inA4 + inB4;
+
+    /* update pointers to process next samples */
+    pSrcA += 4u;
+    pSrcB += 4u;
+    pDst += 4u;
+
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**        
+ * @} end of BasicAdd group        
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c

@@ -1,135 +1,135 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_q15.c    
-*    
-* Description:	Q15 vector addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAdd    
- * @{    
- */
-
-/**    
- * @brief Q15 vector addition.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_add_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inB1, inB2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    inA1 = *__SIMD32(pSrcA)++;
-    inA2 = *__SIMD32(pSrcA)++;
-    inB1 = *__SIMD32(pSrcB)++;
-    inB2 = *__SIMD32(pSrcB)++;
-
-    *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
-    *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-}
-
-/**    
- * @} end of BasicAdd group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_q15.c    
+*    
+* Description:	Q15 vector addition    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicAdd    
+ * @{    
+ */
+
+/**    
+ * @brief Q15 vector addition.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[out]      *pDst points to the output vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
+ */
+
+void arm_add_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t inA1, inA2, inB1, inB2;
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    inA1 = *__SIMD32(pSrcA)++;
+    inA2 = *__SIMD32(pSrcA)++;
+    inB1 = *__SIMD32(pSrcB)++;
+    inB2 = *__SIMD32(pSrcB)++;
+
+    *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
+    *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+}
+
+/**    
+ * @} end of BasicAdd group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c

@@ -1,143 +1,143 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_q31.c    
-*    
-* Description:	Q31 vector addition.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAdd    
- * @{    
- */
-
-
-/**    
- * @brief Q31 vector addition.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_add_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    *pDst++ = __QADD(inA1, inB1);
-    *pDst++ = __QADD(inA2, inB2);
-    *pDst++ = __QADD(inA3, inB3);
-    *pDst++ = __QADD(inA4, inB4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of BasicAdd group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_q31.c    
+*    
+* Description:	Q31 vector addition.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicAdd    
+ * @{    
+ */
+
+
+/**    
+ * @brief Q31 vector addition.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[out]      *pDst points to the output vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
+ */
+
+void arm_add_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t inA1, inA2, inA3, inA4;
+  q31_t inB1, inB2, inB3, inB4;
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    inA1 = *pSrcA++;
+    inA2 = *pSrcA++;
+    inB1 = *pSrcB++;
+    inB2 = *pSrcB++;
+
+    inA3 = *pSrcA++;
+    inA4 = *pSrcA++;
+    inB3 = *pSrcB++;
+    inB4 = *pSrcB++;
+
+    *pDst++ = __QADD(inA1, inB1);
+    *pDst++ = __QADD(inA2, inB2);
+    *pDst++ = __QADD(inA3, inB3);
+    *pDst++ = __QADD(inA4, inB4);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+}
+
+/**    
+ * @} end of BasicAdd group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c

@@ -1,129 +1,129 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_q7.c    
-*    
-* Description:	Q7 vector addition.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAdd    
- * @{    
- */
-
-/**    
- * @brief Q7 vector addition.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- */
-
-void arm_add_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-}
-
-/**    
- * @} end of BasicAdd group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_add_q7.c    
+*    
+* Description:	Q7 vector addition.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicAdd    
+ * @{    
+ */
+
+/**    
+ * @brief Q7 vector addition.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[out]      *pDst points to the output vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
+ */
+
+void arm_add_q7(
+  q7_t * pSrcA,
+  q7_t * pSrcB,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + B */
+    /* Add and then store the results in the destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+}
+
+/**    
+ * @} end of BasicAdd group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c

@@ -1,125 +1,125 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_f32.c    
-*    
-* Description:	Floating-point dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @defgroup dot_prod Vector Dot Product    
- *    
- * Computes the dot product of two vectors.    
- * The vectors are multiplied element-by-element and then summed.    
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of floating-point vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- */
-
-
-void arm_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t blockSize,
-  float32_t * result)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer */
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-  /* Store the result back in the destination buffer */
-  *result = sum;
-}
-
-/**    
- * @} end of dot_prod group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_f32.c    
+*    
+* Description:	Floating-point dot product.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* ---------------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @defgroup dot_prod Vector Dot Product    
+ *    
+ * Computes the dot product of two vectors.    
+ * The vectors are multiplied element-by-element and then summed.    
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.    
+ */
+
+/**    
+ * @addtogroup dot_prod    
+ * @{    
+ */
+
+/**    
+ * @brief Dot product of floating-point vectors.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @param[out]      *result output result returned here    
+ * @return none.    
+ */
+
+
+void arm_dot_prod_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  uint32_t blockSize,
+  float32_t * result)
+{
+  float32_t sum = 0.0f;                          /* Temporary result storage */
+  uint32_t blkCnt;                               /* loop counter */
+
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Calculate dot product and then store the result in a temporary buffer */
+    sum += (*pSrcA++) * (*pSrcB++);
+    sum += (*pSrcA++) * (*pSrcB++);
+    sum += (*pSrcA++) * (*pSrcB++);
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Calculate dot product and then store the result in a temporary buffer. */
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+  /* Store the result back in the destination buffer */
+  *result = sum;
+}
+
+/**    
+ * @} end of dot_prod group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c

@@ -1,135 +1,135 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_q15.c    
-*    
-* Description:	Q15 dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of Q15 vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these    
- * results are added to a 64-bit accumulator in 34.30 format.    
- * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator    
- * there is no risk of overflow.    
- * The return result is in 34.30 format.    
- */
-
-void arm_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
-    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the results in a temporary buffer. */
-    sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the results in a temporary buffer. */
-    sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  /* Store the result in the destination buffer in 34.30 format */
-  *result = sum;
-
-}
-
-/**    
- * @} end of dot_prod group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_q15.c    
+*    
+* Description:	Q15 dot product.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup dot_prod    
+ * @{    
+ */
+
+/**    
+ * @brief Dot product of Q15 vectors.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @param[out]      *result output result returned here    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these    
+ * results are added to a 64-bit accumulator in 34.30 format.    
+ * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator    
+ * there is no risk of overflow.    
+ * The return result is in 34.30 format.    
+ */
+
+void arm_dot_prod_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  uint32_t blockSize,
+  q63_t * result)
+{
+  q63_t sum = 0;                                 /* Temporary result storage */
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Calculate dot product and then store the result in a temporary buffer. */
+    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
+    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Calculate dot product and then store the results in a temporary buffer. */
+    sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Calculate dot product and then store the results in a temporary buffer. */
+    sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  /* Store the result in the destination buffer in 34.30 format */
+  *result = sum;
+
+}
+
+/**    
+ * @} end of dot_prod group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c

@@ -1,138 +1,138 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_q31.c    
-*    
-* Description:	Q31 dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of Q31 vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these    
- * are truncated to 2.48 format by discarding the lower 14 bits.    
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.    
- * There are 15 guard bits in the accumulator and there is no risk of overflow as long as    
- * the length of the vectors is less than 2^16 elements.    
- * The return result is in 16.48 format.    
- */
-
-void arm_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    sum += ((q63_t) inA1 * inB1) >> 14u;
-    sum += ((q63_t) inA2 * inB2) >> 14u;
-    sum += ((q63_t) inA3 * inB3) >> 14u;
-    sum += ((q63_t) inA4 * inB4) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result in the destination buffer in 16.48 format */
-  *result = sum;
-}
-
-/**    
- * @} end of dot_prod group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_q31.c    
+*    
+* Description:	Q31 dot product.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup dot_prod    
+ * @{    
+ */
+
+/**    
+ * @brief Dot product of Q31 vectors.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @param[out]      *result output result returned here    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these    
+ * are truncated to 2.48 format by discarding the lower 14 bits.    
+ * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.    
+ * There are 15 guard bits in the accumulator and there is no risk of overflow as long as    
+ * the length of the vectors is less than 2^16 elements.    
+ * The return result is in 16.48 format.    
+ */
+
+void arm_dot_prod_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  uint32_t blockSize,
+  q63_t * result)
+{
+  q63_t sum = 0;                                 /* Temporary result storage */
+  uint32_t blkCnt;                               /* loop counter */
+
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t inA1, inA2, inA3, inA4;
+  q31_t inB1, inB2, inB3, inB4;
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Calculate dot product and then store the result in a temporary buffer. */
+    inA1 = *pSrcA++;
+    inA2 = *pSrcA++;
+    inA3 = *pSrcA++;
+    inA4 = *pSrcA++;
+    inB1 = *pSrcB++;
+    inB2 = *pSrcB++;
+    inB3 = *pSrcB++;
+    inB4 = *pSrcB++;
+
+    sum += ((q63_t) inA1 * inB1) >> 14u;
+    sum += ((q63_t) inA2 * inB2) >> 14u;
+    sum += ((q63_t) inA3 * inB3) >> 14u;
+    sum += ((q63_t) inA4 * inB4) >> 14u;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Calculate dot product and then store the result in a temporary buffer. */
+    sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Store the result in the destination buffer in 16.48 format */
+  *result = sum;
+}
+
+/**    
+ * @} end of dot_prod group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c

@@ -1,154 +1,154 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_q7.c    
-*    
-* Description:	Q7 dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of Q7 vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these    
- * results are added to an accumulator in 18.14 format.    
- * Nonsaturating additions are used and there is no danger of wrap around as long as    
- * the vectors are less than 2^18 elements long.    
- * The return result is in 18.14 format.    
- */
-
-void arm_dot_prod_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  uint32_t blockSize,
-  q31_t * result)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-  q31_t sum = 0;                                 /* Temporary variables to store output */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t input1, input2;                          /* Temporary variables to store input */
-  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables to store input */
-
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read 4 samples at a time from sourceA */
-    input1 = *__SIMD32(pSrcA)++;
-    /* read 4 samples at a time from sourceB */
-    input2 = *__SIMD32(pSrcB)++;
-
-    /* extract two q7_t samples to q15_t samples */
-    inA1 = __SXTB16(__ROR(input1, 8));
-    /* extract reminaing two samples */
-    inA2 = __SXTB16(input1);
-    /* extract two q7_t samples to q15_t samples */
-    inB1 = __SXTB16(__ROR(input2, 8));
-    /* extract reminaing two samples */
-    inB2 = __SXTB16(input2);
-
-    /* multiply and accumulate two samples at a time */
-    sum = __SMLAD(inA1, inB1, sum);
-    sum = __SMLAD(inA2, inB2, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Dot product and then store the results in a temporary buffer. */
-    sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Dot product and then store the results in a temporary buffer. */
-    sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  /* Store the result in the destination buffer in 18.14 format */
-  *result = sum;
-}
-
-/**    
- * @} end of dot_prod group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_dot_prod_q7.c    
+*    
+* Description:	Q7 dot product.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup dot_prod    
+ * @{    
+ */
+
+/**    
+ * @brief Dot product of Q7 vectors.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @param[out]      *result output result returned here    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these    
+ * results are added to an accumulator in 18.14 format.    
+ * Nonsaturating additions are used and there is no danger of wrap around as long as    
+ * the vectors are less than 2^18 elements long.    
+ * The return result is in 18.14 format.    
+ */
+
+void arm_dot_prod_q7(
+  q7_t * pSrcA,
+  q7_t * pSrcB,
+  uint32_t blockSize,
+  q31_t * result)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+  q31_t sum = 0;                                 /* Temporary variables to store output */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+  q31_t input1, input2;                          /* Temporary variables to store input */
+  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables to store input */
+
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* read 4 samples at a time from sourceA */
+    input1 = *__SIMD32(pSrcA)++;
+    /* read 4 samples at a time from sourceB */
+    input2 = *__SIMD32(pSrcB)++;
+
+    /* extract two q7_t samples to q15_t samples */
+    inA1 = __SXTB16(__ROR(input1, 8));
+    /* extract reminaing two samples */
+    inA2 = __SXTB16(input1);
+    /* extract two q7_t samples to q15_t samples */
+    inB1 = __SXTB16(__ROR(input2, 8));
+    /* extract reminaing two samples */
+    inB2 = __SXTB16(input2);
+
+    /* multiply and accumulate two samples at a time */
+    sum = __SMLAD(inA1, inB1, sum);
+    sum = __SMLAD(inA2, inB2, sum);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Dot product and then store the results in a temporary buffer. */
+    sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+    /* Dot product and then store the results in a temporary buffer. */
+    sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+  /* Store the result in the destination buffer in 18.14 format */
+  *result = sum;
+}
+
+/**    
+ * @} end of dot_prod group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c

@@ -1,172 +1,172 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_f32.c    
-*    
-* Description:	Floating-point vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup BasicMult Vector Multiplication        
- *        
- * Element-by-element multiplication of two vectors.        
- *        
- * <pre>        
- *     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.        
- * </pre>        
- *        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup BasicMult        
- * @{        
- */
-
-/**        
- * @brief Floating-point vector multiplication.        
- * @param[in]       *pSrcA points to the first input vector        
- * @param[in]       *pSrcB points to the second input vector        
- * @param[out]      *pDst points to the output vector        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- */
-
-void arm_mult_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-#ifndef ARM_MATH_CM0
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary input variables */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
-  float32_t out1, out2, out3, out4;              /* temporary output variables */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the results in output buffer */
-    /* read sample from sourceA */
-    inA1 = *pSrcA;
-    /* read sample from sourceB */
-    inB1 = *pSrcB;
-    /* read sample from sourceA */
-    inA2 = *(pSrcA + 1);
-    /* read sample from sourceB */
-    inB2 = *(pSrcB + 1);
-
-    /* out = sourceA * sourceB */
-    out1 = inA1 * inB1;
-
-    /* read sample from sourceA */
-    inA3 = *(pSrcA + 2);
-    /* read sample from sourceB */
-    inB3 = *(pSrcB + 2);
-
-    /* out = sourceA * sourceB */
-    out2 = inA2 * inB2;
-
-    /* read sample from sourceA */
-    inA4 = *(pSrcA + 3);
-
-    /* store result to destination buffer */
-    *pDst = out1;
-
-    /* read sample from sourceB */
-    inB4 = *(pSrcB + 3);
-
-    /* out = sourceA * sourceB */
-    out3 = inA3 * inB3;
-
-    /* store result to destination buffer */
-    *(pDst + 1) = out2;
-
-    /* out = sourceA * sourceB */
-    out4 = inA4 * inB4;
-    /* store result to destination buffer */
-    *(pDst + 2) = out3;
-    /* store result to destination buffer */
-    *(pDst + 3) = out4;
-
-
-    /* update pointers to process next samples */
-    pSrcA += 4u;
-    pSrcB += 4u;
-    pDst += 4u;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the results in output buffer */
-    *pDst++ = (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicMult group        
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_f32.c    
+*    
+* Description:	Floating-point vector multiplication.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.5  2010/04/26     
+*    incorporated review comments and updated with latest CMSIS layer    
+*    
+* Version 0.0.3  2010/03/10     
+*    Initial version    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**        
+ * @ingroup groupMath        
+ */
+
+/**        
+ * @defgroup BasicMult Vector Multiplication        
+ *        
+ * Element-by-element multiplication of two vectors.        
+ *        
+ * <pre>        
+ *     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.        
+ * </pre>        
+ *        
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
+ */
+
+/**        
+ * @addtogroup BasicMult        
+ * @{        
+ */
+
+/**        
+ * @brief Floating-point vector multiplication.        
+ * @param[in]       *pSrcA points to the first input vector        
+ * @param[in]       *pSrcB points to the second input vector        
+ * @param[out]      *pDst points to the output vector        
+ * @param[in]       blockSize number of samples in each vector        
+ * @return none.        
+ */
+
+void arm_mult_f32(
+  float32_t * pSrcA,
+  float32_t * pSrcB,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counters */
+#ifndef ARM_MATH_CM0
+
+  /* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32_t inA1, inA2, inA3, inA4;              /* temporary input variables */
+  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
+  float32_t out1, out2, out3, out4;              /* temporary output variables */
+
+  /* loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A * B */
+    /* Multiply the inputs and store the results in output buffer */
+    /* read sample from sourceA */
+    inA1 = *pSrcA;
+    /* read sample from sourceB */
+    inB1 = *pSrcB;
+    /* read sample from sourceA */
+    inA2 = *(pSrcA + 1);
+    /* read sample from sourceB */
+    inB2 = *(pSrcB + 1);
+
+    /* out = sourceA * sourceB */
+    out1 = inA1 * inB1;
+
+    /* read sample from sourceA */
+    inA3 = *(pSrcA + 2);
+    /* read sample from sourceB */
+    inB3 = *(pSrcB + 2);
+
+    /* out = sourceA * sourceB */
+    out2 = inA2 * inB2;
+
+    /* read sample from sourceA */
+    inA4 = *(pSrcA + 3);
+
+    /* store result to destination buffer */
+    *pDst = out1;
+
+    /* read sample from sourceB */
+    inB4 = *(pSrcB + 3);
+
+    /* out = sourceA * sourceB */
+    out3 = inA3 * inB3;
+
+    /* store result to destination buffer */
+    *(pDst + 1) = out2;
+
+    /* out = sourceA * sourceB */
+    out4 = inA4 * inB4;
+    /* store result to destination buffer */
+    *(pDst + 2) = out3;
+    /* store result to destination buffer */
+    *(pDst + 3) = out4;
+
+
+    /* update pointers to process next samples */
+    pSrcA += 4u;
+    pSrcB += 4u;
+    pDst += 4u;
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  while(blkCnt > 0u)
+  {
+    /* C = A * B */
+    /* Multiply the inputs and store the results in output buffer */
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+}
+
+/**        
+ * @} end of BasicMult group        
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c

@@ -1,152 +1,152 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_q15.c    
-*    
-* Description:	Q15 vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicMult    
- * @{    
- */
-
-
-/**    
- * @brief           Q15 vector multiplication    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_mult_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inB1, inB2;                  /* temporary input variables */
-  q15_t out1, out2, out3, out4;                  /* temporary output variables */
-  q31_t mul1, mul2, mul3, mul4;                  /* temporary variables */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read two samples at a time from sourceA */
-    inA1 = *__SIMD32(pSrcA)++;
-    /* read two samples at a time from sourceB */
-    inB1 = *__SIMD32(pSrcB)++;
-    /* read two samples at a time from sourceA */
-    inA2 = *__SIMD32(pSrcA)++;
-    /* read two samples at a time from sourceB */
-    inB2 = *__SIMD32(pSrcB)++;
-
-    /* multiply mul = sourceA * sourceB */
-    mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
-    mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
-
-    /* saturate result to 16 bit */
-    out1 = (q15_t) __SSAT(mul1 >> 15, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15, 16);
-
-    /* store the result */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#else
-
-    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the result in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicMult group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_q15.c    
+*    
+* Description:	Q15 vector multiplication.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.5  2010/04/26     
+*    incorporated review comments and updated with latest CMSIS layer    
+*    
+* Version 0.0.3  2010/03/10     
+*    Initial version    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicMult    
+ * @{    
+ */
+
+
+/**    
+ * @brief           Q15 vector multiplication    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[out]      *pDst points to the output vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
+ */
+
+void arm_mult_q15(
+  q15_t * pSrcA,
+  q15_t * pSrcB,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counters */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t inA1, inA2, inB1, inB2;                  /* temporary input variables */
+  q15_t out1, out2, out3, out4;                  /* temporary output variables */
+  q31_t mul1, mul2, mul3, mul4;                  /* temporary variables */
+
+  /* loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* read two samples at a time from sourceA */
+    inA1 = *__SIMD32(pSrcA)++;
+    /* read two samples at a time from sourceB */
+    inB1 = *__SIMD32(pSrcB)++;
+    /* read two samples at a time from sourceA */
+    inA2 = *__SIMD32(pSrcA)++;
+    /* read two samples at a time from sourceB */
+    inB2 = *__SIMD32(pSrcB)++;
+
+    /* multiply mul = sourceA * sourceB */
+    mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+    mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
+    mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
+    mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
+
+    /* saturate result to 16 bit */
+    out1 = (q15_t) __SSAT(mul1 >> 15, 16);
+    out2 = (q15_t) __SSAT(mul2 >> 15, 16);
+    out3 = (q15_t) __SSAT(mul3 >> 15, 16);
+    out4 = (q15_t) __SSAT(mul4 >> 15, 16);
+
+    /* store the result */
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
+    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
+
+#else
+
+    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
+    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
+
+#endif //      #ifndef ARM_MATH_BIG_ENDIAN
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+  while(blkCnt > 0u)
+  {
+    /* C = A * B */
+    /* Multiply the inputs and store the result in the destination buffer */
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+}
+
+/**    
+ * @} end of BasicMult group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c

@@ -1,143 +1,143 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_q31.c    
-*    
-* Description:	Q31 vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicMult    
- * @{    
- */
-
-/**    
- * @brief Q31 vector multiplication.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_mult_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;                  /* temporary input variables */
-  q31_t inB1, inB2, inB3, inB4;                  /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variables */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB2) >> 32;
-    out3 = ((q63_t) inA3 * inB3) >> 32;
-    out4 = ((q63_t) inA4 * inB4) >> 32;
-
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    *pDst++ = out1 << 1u;
-    *pDst++ = out2 << 1u;
-    *pDst++ = out3 << 1u;
-    *pDst++ = out4 << 1u;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    *pDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicMult group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_q31.c    
+*    
+* Description:	Q31 vector multiplication.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.5  2010/04/26     
+*    incorporated review comments and updated with latest CMSIS layer    
+*    
+* Version 0.0.3  2010/03/10     
+*    Initial version    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicMult    
+ * @{    
+ */
+
+/**    
+ * @brief Q31 vector multiplication.    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[out]      *pDst points to the output vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
+ */
+
+void arm_mult_q31(
+  q31_t * pSrcA,
+  q31_t * pSrcB,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counters */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t inA1, inA2, inA3, inA4;                  /* temporary input variables */
+  q31_t inB1, inB2, inB3, inB4;                  /* temporary input variables */
+  q31_t out1, out2, out3, out4;                  /* temporary output variables */
+
+  /* loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A * B */
+    /* Multiply the inputs and then store the results in the destination buffer. */
+    inA1 = *pSrcA++;
+    inA2 = *pSrcA++;
+    inA3 = *pSrcA++;
+    inA4 = *pSrcA++;
+    inB1 = *pSrcB++;
+    inB2 = *pSrcB++;
+    inB3 = *pSrcB++;
+    inB4 = *pSrcB++;
+
+    out1 = ((q63_t) inA1 * inB1) >> 32;
+    out2 = ((q63_t) inA2 * inB2) >> 32;
+    out3 = ((q63_t) inA3 * inB3) >> 32;
+    out4 = ((q63_t) inA4 * inB4) >> 32;
+
+    out1 = __SSAT(out1, 31);
+    out2 = __SSAT(out2, 31);
+    out3 = __SSAT(out3, 31);
+    out4 = __SSAT(out4, 31);
+
+    *pDst++ = out1 << 1u;
+    *pDst++ = out2 << 1u;
+    *pDst++ = out3 << 1u;
+    *pDst++ = out4 << 1u;
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  while(blkCnt > 0u)
+  {
+    /* C = A * B */
+    /* Multiply the inputs and then store the results in the destination buffer. */
+    *pDst++ =
+      (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+}
+
+/**    
+ * @} end of BasicMult group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c

@@ -1,128 +1,128 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_q7.c    
-*    
-* Description:	Q7 vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10 DP    
-*    Initial version    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicMult    
- * @{    
- */
-
-/**    
- * @brief           Q7 vector multiplication    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- */
-
-void arm_mult_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q7_t out1, out2, out3, out4;                   /* Temporary variables to store the product */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the results in temporary variables */
-    out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
-    /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the result in the destination buffer */
-    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicMult group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_mult_q7.c    
+*    
+* Description:	Q7 vector multiplication.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+*    
+* Version 0.0.5  2010/04/26     
+*    incorporated review comments and updated with latest CMSIS layer    
+*    
+* Version 0.0.3  2010/03/10 DP    
+*    Initial version    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup BasicMult    
+ * @{    
+ */
+
+/**    
+ * @brief           Q7 vector multiplication    
+ * @param[in]       *pSrcA points to the first input vector    
+ * @param[in]       *pSrcB points to the second input vector    
+ * @param[out]      *pDst points to the output vector    
+ * @param[in]       blockSize number of samples in each vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
+ */
+
+void arm_mult_q7(
+  q7_t * pSrcA,
+  q7_t * pSrcB,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counters */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q7_t out1, out2, out3, out4;                   /* Temporary variables to store the product */
+
+  /* loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A * B */
+    /* Multiply the inputs and store the results in temporary variables */
+    out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+    /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
+    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+  while(blkCnt > 0u)
+  {
+    /* C = A * B */
+    /* Multiply the inputs and store the result in the destination buffer */
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+    /* Decrement the blockSize loop counter */
+    blkCnt--;
+  }
+}
+
+/**    
+ * @} end of BasicMult group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c

@@ -1,137 +1,137 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_f32.c    
-*    
-* Description:	Negates floating-point vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup negate Vector Negate        
- *        
- * Negates the elements of a vector.        
- *        
- * <pre>        
- *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
- * </pre>        
- */
-
-/**        
- * @addtogroup negate        
- * @{        
- */
-
-/**        
- * @brief  Negates the elements of a floating-point vector.        
- * @param[in]  *pSrc points to the input vector        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- */
-
-void arm_negate_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read inputs from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-    in3 = *(pSrc + 2);
-    in4 = *(pSrc + 3);
-
-    /* negate the input */
-    in1 = -in1;
-    in2 = -in2;
-    in3 = -in3;
-    in4 = -in4;
-
-    /* store the result to destination */
-    *pDst = in1;
-    *(pDst + 1) = in2;
-    *(pDst + 2) = in3;
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the results in the destination buffer. */
-    *pDst++ = -*pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of negate group        
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_f32.c    
+*    
+* Description:	Negates floating-point vectors.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* ---------------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**        
+ * @ingroup groupMath        
+ */
+
+/**        
+ * @defgroup negate Vector Negate        
+ *        
+ * Negates the elements of a vector.        
+ *        
+ * <pre>        
+ *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
+ * </pre>        
+ */
+
+/**        
+ * @addtogroup negate        
+ * @{        
+ */
+
+/**        
+ * @brief  Negates the elements of a floating-point vector.        
+ * @param[in]  *pSrc points to the input vector        
+ * @param[out]  *pDst points to the output vector        
+ * @param[in]  blockSize number of samples in the vector        
+ * @return none.        
+ */
+
+void arm_negate_f32(
+  float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32_t in1, in2, in3, in4;                  /* temporary variables */
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* read inputs from source */
+    in1 = *pSrc;
+    in2 = *(pSrc + 1);
+    in3 = *(pSrc + 2);
+    in4 = *(pSrc + 3);
+
+    /* negate the input */
+    in1 = -in1;
+    in2 = -in2;
+    in3 = -in3;
+    in4 = -in4;
+
+    /* store the result to destination */
+    *pDst = in1;
+    *(pDst + 1) = in2;
+    *(pDst + 2) = in3;
+    *(pDst + 3) = in4;
+
+    /* update pointers to process next samples */
+    pSrc += 4u;
+    pDst += 4u;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  while(blkCnt > 0u)
+  {
+    /* C = -A */
+    /* Negate and then store the results in the destination buffer. */
+    *pDst++ = -*pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**        
+ * @} end of negate group        
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c

@@ -1,137 +1,137 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_q15.c    
-*    
-* Description:	Negates Q15 vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @addtogroup negate        
- * @{        
- */
-
-/**        
- * @brief  Negates the elements of a Q15 vector.        
- * @param[in]  *pSrc points to the input vector        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- *    
- * \par Conditions for optimum performance    
- *  Input and output buffers should be aligned by 32-bit    
- *    
- *        
- * <b>Scaling and Overflow Behavior:</b>        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.        
- */
-
-void arm_negate_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q15_t in;
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2;                                /* Temporary variables */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Read two inputs at a time */
-    in1 = _SIMD32_OFFSET(pSrc);
-    in2 = _SIMD32_OFFSET(pSrc + 2);
-
-    /* negate two samples at a time */
-    in1 = __QSUB16(0, in1);
-
-    /* negate two samples at a time */
-    in2 = __QSUB16(0, in2);
-
-    /* store the result to destination 2 samples at a time */
-    _SIMD32_OFFSET(pDst) = in1;
-    /* store the result to destination 2 samples at a time */
-    _SIMD32_OFFSET(pDst + 2) = in2;
-
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the result in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of negate group        
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_q15.c    
+*    
+* Description:	Negates Q15 vectors.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+#include "arm_math.h"
+
+/**        
+ * @ingroup groupMath        
+ */
+
+/**        
+ * @addtogroup negate        
+ * @{        
+ */
+
+/**        
+ * @brief  Negates the elements of a Q15 vector.        
+ * @param[in]  *pSrc points to the input vector        
+ * @param[out]  *pDst points to the output vector        
+ * @param[in]  blockSize number of samples in the vector        
+ * @return none.        
+ *    
+ * \par Conditions for optimum performance    
+ *  Input and output buffers should be aligned by 32-bit    
+ *    
+ *        
+ * <b>Scaling and Overflow Behavior:</b>        
+ * \par        
+ * The function uses saturating arithmetic.        
+ * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.        
+ */
+
+void arm_negate_q15(
+  q15_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  q15_t in;
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+  q31_t in1, in2;                                /* Temporary variables */
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = -A */
+    /* Read two inputs at a time */
+    in1 = _SIMD32_OFFSET(pSrc);
+    in2 = _SIMD32_OFFSET(pSrc + 2);
+
+    /* negate two samples at a time */
+    in1 = __QSUB16(0, in1);
+
+    /* negate two samples at a time */
+    in2 = __QSUB16(0, in2);
+
+    /* store the result to destination 2 samples at a time */
+    _SIMD32_OFFSET(pDst) = in1;
+    /* store the result to destination 2 samples at a time */
+    _SIMD32_OFFSET(pDst + 2) = in2;
+
+
+    /* update pointers to process next samples */
+    pSrc += 4u;
+    pDst += 4u;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  while(blkCnt > 0u)
+  {
+    /* C = -A */
+    /* Negate and then store the result in the destination buffer. */
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**        
+ * @} end of negate group        
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c

@@ -1,124 +1,124 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_q31.c    
-*    
-* Description:	Negates Q31 vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup negate    
- * @{    
- */
-
-/**    
- * @brief  Negates the elements of a Q31 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.    
- */
-
-void arm_negate_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t in;                                      /* Temporary variable */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = __QSUB(0, in1);
-    *pDst++ = __QSUB(0, in2);
-    *pDst++ = __QSUB(0, in3);
-    *pDst++ = __QSUB(0, in4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the result in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of negate group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_q31.c    
+*    
+* Description:	Negates Q31 vectors.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup negate    
+ * @{    
+ */
+
+/**    
+ * @brief  Negates the elements of a Q31 vector.    
+ * @param[in]  *pSrc points to the input vector    
+ * @param[out]  *pDst points to the output vector    
+ * @param[in]  blockSize number of samples in the vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.    
+ */
+
+void arm_negate_q31(
+  q31_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  q31_t in;                                      /* Temporary variable */
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t in1, in2, in3, in4;
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = -A */
+    /* Negate and then store the results in the destination buffer. */
+    in1 = *pSrc++;
+    in2 = *pSrc++;
+    in3 = *pSrc++;
+    in4 = *pSrc++;
+
+    *pDst++ = __QSUB(0, in1);
+    *pDst++ = __QSUB(0, in2);
+    *pDst++ = __QSUB(0, in3);
+    *pDst++ = __QSUB(0, in4);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+
+  while(blkCnt > 0u)
+  {
+    /* C = -A */
+    /* Negate and then store the result in the destination buffer. */
+    in = *pSrc++;
+    *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**    
+ * @} end of negate group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c

@@ -1,120 +1,120 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_q7.c    
-*    
-* Description:	Negates Q7 vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup negate    
- * @{    
- */
-
-/**    
- * @brief  Negates the elements of a Q7 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.    
- */
-
-void arm_negate_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q7_t in;
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t input;                                   /* Input values1-4 */
-  q31_t zero = 0x00000000;
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Read four inputs */
-    input = *__SIMD32(pSrc)++;
-
-    /* Store the Negated results in the destination buffer in a single cycle by packing the results */
-    *__SIMD32(pDst)++ = __QSUB8(zero, input);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the results in the destination buffer. */ \
-      in = *pSrc++;
-    *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of negate group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_negate_q7.c    
+*    
+* Description:	Negates Q7 vectors.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup negate    
+ * @{    
+ */
+
+/**    
+ * @brief  Negates the elements of a Q7 vector.    
+ * @param[in]  *pSrc points to the input vector    
+ * @param[out]  *pDst points to the output vector    
+ * @param[in]  blockSize number of samples in the vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.    
+ */
+
+void arm_negate_q7(
+  q7_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  q7_t in;
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t input;                                   /* Input values1-4 */
+  q31_t zero = 0x00000000;
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = -A */
+    /* Read four inputs */
+    input = *__SIMD32(pSrc)++;
+
+    /* Store the Negated results in the destination buffer in a single cycle by packing the results */
+    *__SIMD32(pDst)++ = __QSUB8(zero, input);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  while(blkCnt > 0u)
+  {
+    /* C = -A */
+    /* Negate and then store the results in the destination buffer. */ \
+      in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**    
+ * @} end of negate group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c

@@ -1,158 +1,158 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_f32.c    
-*    
-* Description:	Floating-point vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup offset Vector Offset        
- *        
- * Adds a constant offset to each element of a vector.        
- *        
- * <pre>        
- *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
- * </pre>        
- *        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup offset        
- * @{        
- */
-
-/**        
- * @brief  Adds a constant offset to a floating-point vector.        
- * @param[in]  *pSrc points to the input vector        
- * @param[in]  offset is the offset to be added        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- */
-
-
-void arm_offset_f32(
-  float32_t * pSrc,
-  float32_t offset,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    /* read samples from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-
-    /* add offset to input */
-    in1 = in1 + offset;
-
-    /* read samples from source */
-    in3 = *(pSrc + 2);
-
-    /* add offset to input */
-    in2 = in2 + offset;
-
-    /* read samples from source */
-    in4 = *(pSrc + 3);
-
-    /* add offset to input */
-    in3 = in3 + offset;
-
-    /* store result to destination */
-    *pDst = in1;
-
-    /* add offset to input */
-    in4 = in4 + offset;
-
-    /* store result to destination */
-    *(pDst + 1) = in2;
-
-    /* store result to destination */
-    *(pDst + 2) = in3;
-
-    /* store result to destination */
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (*pSrc++) + offset;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of offset group        
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_f32.c    
+*    
+* Description:	Floating-point vector offset.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* ---------------------------------------------------------------------------- */
+#include "arm_math.h"
+
+/**        
+ * @ingroup groupMath        
+ */
+
+/**        
+ * @defgroup offset Vector Offset        
+ *        
+ * Adds a constant offset to each element of a vector.        
+ *        
+ * <pre>        
+ *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
+ * </pre>        
+ *        
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
+ */
+
+/**        
+ * @addtogroup offset        
+ * @{        
+ */
+
+/**        
+ * @brief  Adds a constant offset to a floating-point vector.        
+ * @param[in]  *pSrc points to the input vector        
+ * @param[in]  offset is the offset to be added        
+ * @param[out]  *pDst points to the output vector        
+ * @param[in]  blockSize number of samples in the vector        
+ * @return none.        
+ */
+
+
+void arm_offset_f32(
+  float32_t * pSrc,
+  float32_t offset,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  float32_t in1, in2, in3, in4;
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the results in the destination buffer. */
+    /* read samples from source */
+    in1 = *pSrc;
+    in2 = *(pSrc + 1);
+
+    /* add offset to input */
+    in1 = in1 + offset;
+
+    /* read samples from source */
+    in3 = *(pSrc + 2);
+
+    /* add offset to input */
+    in2 = in2 + offset;
+
+    /* read samples from source */
+    in4 = *(pSrc + 3);
+
+    /* add offset to input */
+    in3 = in3 + offset;
+
+    /* store result to destination */
+    *pDst = in1;
+
+    /* add offset to input */
+    in4 = in4 + offset;
+
+    /* store result to destination */
+    *(pDst + 1) = in2;
+
+    /* store result to destination */
+    *(pDst + 2) = in3;
+
+    /* store result to destination */
+    *(pDst + 3) = in4;
+
+    /* update pointers to process next samples */
+    pSrc += 4u;
+    pDst += 4u;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the result in the destination buffer. */
+    *pDst++ = (*pSrc++) + offset;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+
+/**        
+ * @} end of offset group        
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c

@@ -1,131 +1,131 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_q15.c    
-*    
-* Description:	Q15 vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup offset    
- * @{    
- */
-
-/**    
- * @brief  Adds a constant offset to a Q15 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[in]  offset is the offset to be added    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.    
- */
-
-void arm_offset_q15(
-  q15_t * pSrc,
-  q15_t offset,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t offset_packed;                           /* Offset packed to 32 bit */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
-  offset_packed = __PKHBT(offset, offset, 16);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
-    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
-    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of offset group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_q15.c    
+*    
+* Description:	Q15 vector offset.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup offset    
+ * @{    
+ */
+
+/**    
+ * @brief  Adds a constant offset to a Q15 vector.    
+ * @param[in]  *pSrc points to the input vector    
+ * @param[in]  offset is the offset to be added    
+ * @param[out]  *pDst points to the output vector    
+ * @param[in]  blockSize number of samples in the vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.    
+ */
+
+void arm_offset_q15(
+  q15_t * pSrc,
+  q15_t offset,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t offset_packed;                           /* Offset packed to 32 bit */
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+  offset_packed = __PKHBT(offset, offset, 16);
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
+    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
+    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the results in the destination buffer. */
+    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the results in the destination buffer. */
+    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+}
+
+/**    
+ * @} end of offset group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c

@@ -1,135 +1,135 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_q31.c    
-*    
-* Description:	Q31 vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup offset    
- * @{    
- */
-
-/**    
- * @brief  Adds a constant offset to a Q31 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[in]  offset is the offset to be added    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.    
- */
-
-void arm_offset_q31(
-  q31_t * pSrc,
-  q31_t offset,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = __QADD(in1, offset);
-    *pDst++ = __QADD(in2, offset);
-    *pDst++ = __QADD(in3, offset);
-    *pDst++ = __QADD(in4, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = __QADD(*pSrc++, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of offset group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_q31.c    
+*    
+* Description:	Q31 vector offset.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup offset    
+ * @{    
+ */
+
+/**    
+ * @brief  Adds a constant offset to a Q31 vector.    
+ * @param[in]  *pSrc points to the input vector    
+ * @param[in]  offset is the offset to be added    
+ * @param[out]  *pDst points to the output vector    
+ * @param[in]  blockSize number of samples in the vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.    
+ */
+
+void arm_offset_q31(
+  q31_t * pSrc,
+  q31_t offset,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t in1, in2, in3, in4;
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the results in the destination buffer. */
+    in1 = *pSrc++;
+    in2 = *pSrc++;
+    in3 = *pSrc++;
+    in4 = *pSrc++;
+
+    *pDst++ = __QADD(in1, offset);
+    *pDst++ = __QADD(in2, offset);
+    *pDst++ = __QADD(in3, offset);
+    *pDst++ = __QADD(in4, offset);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the result in the destination buffer. */
+    *pDst++ = __QADD(*pSrc++, offset);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the result in the destination buffer. */
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+}
+
+/**    
+ * @} end of offset group    
+ */

bsp/efm32/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c

@@ -1,130 +1,130 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
-*    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_q7.c    
-*    
-* Description:	Q7 vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup offset    
- * @{    
- */
-
-/**    
- * @brief  Adds a constant offset to a Q7 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[in]  offset is the offset to be added    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * <b>Scaling and Overflow Behavior:</b>    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.    
- */
-
-void arm_offset_q7(
-  q7_t * pSrc,
-  q7_t offset,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t offset_packed;                           /* Offset packed to 32 bit */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
-  offset_packed = __PACKq7(offset, offset, offset, offset);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
-    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0 */
-
-}
-
-/**    
- * @} end of offset group    
- */
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010 ARM Limited. All rights reserved.    
+*    
+* $Date:        15. February 2012  
+* $Revision: 	V1.1.0  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:		arm_offset_q7.c    
+*    
+* Description:	Q7 vector offset.    
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Version 1.1.0 2012/02/15 
+*    Updated with more optimizations, bug fixes and minor API changes.  
+*   
+* Version 1.0.10 2011/7/15  
+*    Big Endian support added and Merged M0 and M3/M4 Source code.   
+*    
+* Version 1.0.3 2010/11/29   
+*    Re-organized the CMSIS folders and updated documentation.    
+*     
+* Version 1.0.2 2010/11/11    
+*    Documentation updated.     
+*    
+* Version 1.0.1 2010/10/05     
+*    Production release and review comments incorporated.    
+*    
+* Version 1.0.0 2010/09/20     
+*    Production release and review comments incorporated.    
+*    
+* Version 0.0.7  2010/06/10     
+*    Misra-C changes done    
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+ * @ingroup groupMath    
+ */
+
+/**    
+ * @addtogroup offset    
+ * @{    
+ */
+
+/**    
+ * @brief  Adds a constant offset to a Q7 vector.    
+ * @param[in]  *pSrc points to the input vector    
+ * @param[in]  offset is the offset to be added    
+ * @param[out]  *pDst points to the output vector    
+ * @param[in]  blockSize number of samples in the vector    
+ * @return none.    
+ *    
+ * <b>Scaling and Overflow Behavior:</b>    
+ * \par    
+ * The function uses saturating arithmetic.    
+ * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.    
+ */
+
+void arm_offset_q7(
+  q7_t * pSrc,
+  q7_t offset,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+#ifndef ARM_MATH_CM0
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+  q31_t offset_packed;                           /* Offset packed to 32 bit */
+
+
+  /*loop Unrolling */
+  blkCnt = blockSize >> 2u;
+
+  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+  offset_packed = __PACKq7(offset, offset, offset, offset);
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
+    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4u;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the result in the destination buffer. */
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#else
+
+  /* Run the below code for Cortex-M0 */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while(blkCnt > 0u)
+  {
+    /* C = A + offset */
+    /* Add offset and then store the result in the destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+#endif /* #ifndef ARM_MATH_CM0 */
+
+}
+
+/**    
+ * @} end of offset group    
+ */