context_gcc.S 6.4 KB

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  1. /*
  2. * Date Author Notes
  3. * 2018-10-06 ZhaoXiaowei the first version
  4. */
  5. .macro SAVE_CONTEXT
  6. /* Switch to use the EL0 stack pointer. */
  7. MSR SPSEL, #0
  8. /* Save the entire context. */
  9. STP X0, X1, [SP, #-0x10]!
  10. STP X2, X3, [SP, #-0x10]!
  11. STP X4, X5, [SP, #-0x10]!
  12. STP X6, X7, [SP, #-0x10]!
  13. STP X8, X9, [SP, #-0x10]!
  14. STP X10, X11, [SP, #-0x10]!
  15. STP X12, X13, [SP, #-0x10]!
  16. STP X14, X15, [SP, #-0x10]!
  17. STP X16, X17, [SP, #-0x10]!
  18. STP X18, X19, [SP, #-0x10]!
  19. STP X20, X21, [SP, #-0x10]!
  20. STP X22, X23, [SP, #-0x10]!
  21. STP X24, X25, [SP, #-0x10]!
  22. STP X26, X27, [SP, #-0x10]!
  23. STP X28, X29, [SP, #-0x10]!
  24. STP X30, XZR, [SP, #-0x10]!
  25. MRS X0, CurrentEL
  26. CMP X0, 0xc
  27. B.EQ 3f
  28. CMP X0, 0x8
  29. B.EQ 2f
  30. CMP X0, 0x4
  31. B.EQ 1f
  32. B .
  33. 3:
  34. MRS X3, SPSR_EL3
  35. /* Save the ELR. */
  36. MRS X2, ELR_EL3
  37. B 0f
  38. 2:
  39. MRS X3, SPSR_EL2
  40. /* Save the ELR. */
  41. MRS X2, ELR_EL2
  42. B 0f
  43. 1:
  44. MRS X3, SPSR_EL1
  45. MRS X2, ELR_EL1
  46. B 0f
  47. 0:
  48. STP X2, X3, [SP, #-0x10]!
  49. MOV X0, SP /* Move SP into X0 for saving. */
  50. /* Switch to use the ELx stack pointer. */
  51. MSR SPSEL, #1
  52. .endm
  53. .macro SAVE_CONTEXT_T
  54. /* Switch to use the EL0 stack pointer. */
  55. MSR SPSEL, #0
  56. /* Save the entire context. */
  57. STP X0, X1, [SP, #-0x10]!
  58. STP X2, X3, [SP, #-0x10]!
  59. STP X4, X5, [SP, #-0x10]!
  60. STP X6, X7, [SP, #-0x10]!
  61. STP X8, X9, [SP, #-0x10]!
  62. STP X10, X11, [SP, #-0x10]!
  63. STP X12, X13, [SP, #-0x10]!
  64. STP X14, X15, [SP, #-0x10]!
  65. STP X16, X17, [SP, #-0x10]!
  66. STP X18, X19, [SP, #-0x10]!
  67. STP X20, X21, [SP, #-0x10]!
  68. STP X22, X23, [SP, #-0x10]!
  69. STP X24, X25, [SP, #-0x10]!
  70. STP X26, X27, [SP, #-0x10]!
  71. STP X28, X29, [SP, #-0x10]!
  72. STP X30, XZR, [SP, #-0x10]!
  73. MRS X0, CurrentEL
  74. CMP X0, 0xc
  75. B.EQ 3f
  76. CMP X0, 0x8
  77. B.EQ 2f
  78. CMP X0, 0x4
  79. B.EQ 1f
  80. B .
  81. 3:
  82. MRS X3, SPSR_EL3
  83. MOV X2, X30
  84. B 0f
  85. 2:
  86. MRS X3, SPSR_EL2
  87. MOV X2, X30
  88. B 0f
  89. 1:
  90. MRS X3, SPSR_EL1
  91. MOV X2, X30
  92. B 0f
  93. 0:
  94. STP X2, X3, [SP, #-0x10]!
  95. MOV X0, SP /* Move SP into X0 for saving. */
  96. /* Switch to use the ELx stack pointer. */
  97. MSR SPSEL, #1
  98. .endm
  99. .macro RESTORE_CONTEXT
  100. /* Switch to use the EL0 stack pointer. */
  101. MSR SPSEL, #0
  102. /* Set the SP to point to the stack of the task being restored. */
  103. MOV SP, X0
  104. LDP X2, X3, [SP], #0x10 /* SPSR and ELR. */
  105. MRS X0, CurrentEL
  106. CMP X0, 0xc
  107. B.EQ 3f
  108. CMP X0, 0x8
  109. B.EQ 2f
  110. CMP X0, 0x4
  111. B.EQ 1f
  112. B .
  113. 3:
  114. MSR SPSR_EL3, X3
  115. MSR ELR_EL3, X2
  116. B 0f
  117. 2:
  118. MSR SPSR_EL2, X3
  119. MSR ELR_EL2, X2
  120. B 0f
  121. 1:
  122. MSR SPSR_EL1, X3
  123. MSR ELR_EL1, X2
  124. B 0f
  125. 0:
  126. LDP X30, XZR, [SP], #0x10
  127. LDP X28, X29, [SP], #0x10
  128. LDP X26, X27, [SP], #0x10
  129. LDP X24, X25, [SP], #0x10
  130. LDP X22, X23, [SP], #0x10
  131. LDP X20, X21, [SP], #0x10
  132. LDP X18, X19, [SP], #0x10
  133. LDP X16, X17, [SP], #0x10
  134. LDP X14, X15, [SP], #0x10
  135. LDP X12, X13, [SP], #0x10
  136. LDP X10, X11, [SP], #0x10
  137. LDP X8, X9, [SP], #0x10
  138. LDP X6, X7, [SP], #0x10
  139. LDP X4, X5, [SP], #0x10
  140. LDP X2, X3, [SP], #0x10
  141. LDP X0, X1, [SP], #0x10
  142. /* Switch to use the ELx stack pointer. _RB_ Might not be required. */
  143. MSR SPSEL, #1
  144. ERET
  145. .endm
  146. .text
  147. /*
  148. * rt_base_t rt_hw_interrupt_disable();
  149. */
  150. .globl rt_hw_interrupt_disable
  151. rt_hw_interrupt_disable:
  152. MRS X0, DAIF
  153. MSR DAIFSet, #3
  154. DSB SY
  155. RET
  156. /*
  157. * void rt_hw_interrupt_enable(rt_base_t level);
  158. */
  159. .globl rt_hw_interrupt_enable
  160. rt_hw_interrupt_enable:
  161. DSB SY
  162. MOV X1, #0xC0
  163. ANDS X0, X0, X1
  164. B.NE rt_hw_interrupt_enable_exit
  165. MSR DAIFClr, #3
  166. rt_hw_interrupt_enable_exit:
  167. RET
  168. /*
  169. * void rt_hw_context_switch_to(rt_ubase_t to);
  170. * r0 --> to
  171. */
  172. .globl rt_hw_context_switch_to
  173. rt_hw_context_switch_to:
  174. LDR X0, [X0]
  175. RESTORE_CONTEXT
  176. .text
  177. /*
  178. * void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
  179. * r0 --> from
  180. * r1 --> to
  181. */
  182. .globl rt_hw_context_switch
  183. rt_hw_context_switch:
  184. MOV X8,X0
  185. MOV X9,X1
  186. SAVE_CONTEXT_T
  187. STR X0, [X8] // store sp in preempted tasks TCB
  188. LDR X0, [X9] // get new task stack pointer
  189. RESTORE_CONTEXT
  190. /*
  191. * void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
  192. */
  193. .globl rt_thread_switch_interrupt_flag
  194. .globl rt_interrupt_from_thread
  195. .globl rt_interrupt_to_thread
  196. .globl rt_hw_context_switch_interrupt
  197. rt_hw_context_switch_interrupt:
  198. ADR X2, rt_thread_switch_interrupt_flag
  199. LDR X3, [X2]
  200. CMP X3, #1
  201. B.EQ _reswitch
  202. ADR X4, rt_interrupt_from_thread // set rt_interrupt_from_thread
  203. MOV X3, #1 // set rt_thread_switch_interrupt_flag to 1
  204. STR X0, [X4]
  205. STR X3, [X2]
  206. _reswitch:
  207. ADR X2, rt_interrupt_to_thread // set rt_interrupt_to_thread
  208. STR X1, [X2]
  209. RET
  210. .text
  211. // -- Exception handlers ----------------------------------
  212. .align 8
  213. .globl vector_fiq
  214. vector_fiq:
  215. SAVE_CONTEXT
  216. STP X0, X1, [SP, #-0x10]!
  217. BL rt_hw_trap_fiq
  218. LDP X0, X1, [SP], #0x10
  219. RESTORE_CONTEXT
  220. .globl rt_interrupt_enter
  221. .globl rt_interrupt_leave
  222. .globl rt_thread_switch_interrupt_flag
  223. .globl rt_interrupt_from_thread
  224. .globl rt_interrupt_to_thread
  225. // -------------------------------------------------------------------
  226. .align 8
  227. .globl vector_irq
  228. vector_irq:
  229. SAVE_CONTEXT
  230. STP X0, X1, [SP, #-0x10]!
  231. BL rt_interrupt_enter
  232. BL rt_hw_trap_irq
  233. BL rt_interrupt_leave
  234. LDP X0, X1, [SP], #0x10
  235. // if rt_thread_switch_interrupt_flag set, jump to
  236. // rt_hw_context_switch_interrupt_do and don't return
  237. ADR X1, rt_thread_switch_interrupt_flag
  238. LDR X2, [X1]
  239. CMP X2, #1
  240. B.NE vector_irq_exit
  241. MOV X2, #0 // clear flag
  242. STR X2, [X1]
  243. ADR X3, rt_interrupt_from_thread
  244. LDR X4, [X3]
  245. STR x0, [X4] // store sp in preempted tasks's TCB
  246. ADR x3, rt_interrupt_to_thread
  247. LDR X4, [X3]
  248. LDR x0, [X4] // get new task's stack pointer
  249. vector_irq_exit:
  250. RESTORE_CONTEXT
  251. // -------------------------------------------------
  252. .align 8
  253. .globl vector_error
  254. vector_error:
  255. SAVE_CONTEXT
  256. BL rt_hw_trap_error
  257. B .