general.c 8.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350
  1. /*
  2. * Copyright (c) 2006-2024 RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2024-10-08 zhujiale the first version
  9. */
  10. #include <rtthread.h>
  11. #include <drivers/phy.h>
  12. #include "general_phy.h"
  13. #define DBG_TAG "rtdm.phy"
  14. #define DBG_LVL DBG_INFO
  15. #include <rtdbg.h>
  16. static int __genphy_set_adv(int adv,int advertise)
  17. {
  18. adv &= ~(RT_ADVERTISE_ALL | RT_ADVERTISE_100BASE4 | RT_ADVERTISE_PAUSE_CAP |
  19. RT_ADVERTISE_PAUSE_ASYM);
  20. if (advertise & RT_ADVERTISED__10baseT_Half)
  21. adv |= RT_ADVERTISE_10HALF;
  22. if (advertise & RT_ADVERTISED__10baseT_Full)
  23. adv |= RT_ADVERTISE_10FULL;
  24. if (advertise & RT_ADVERTISED__100baseT_Half)
  25. adv |= RT_ADVERTISE_100HALF;
  26. if (advertise & RT_ADVERTISED__100baseT_Full)
  27. adv |= RT_ADVERTISE_100FULL;
  28. if (advertise & RT_ADVERTISED__Pause)
  29. adv |= RT_ADVERTISE_PAUSE_CAP;
  30. if (advertise & RT_ADVERTISED__Asym_Pause)
  31. adv |= RT_ADVERTISE_PAUSE_ASYM;
  32. if (advertise & RT_ADVERTISED__1000baseX_Half)
  33. adv |= RT_ADVERTISE_1000XHALF;
  34. if (advertise & RT_ADVERTISED__1000baseX_Full)
  35. adv |= RT_ADVERTISE_1000XFULL;
  36. return adv;
  37. }
  38. static int __genphy_config_advert(struct rt_phy_device *phydev)
  39. {
  40. rt_uint32_t advertise;
  41. int oldadv, adv, bmsr;
  42. int err, changed = 0;
  43. phydev->advertising &= phydev->supported;
  44. advertise = phydev->advertising;
  45. adv = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_ADVERTISE);
  46. oldadv = adv;
  47. if (adv < 0)
  48. return adv;
  49. adv = __genphy_set_adv(adv, advertise);
  50. if (adv != oldadv)
  51. {
  52. err = rt_phy_write(phydev, RT_MDIO_DEVAD_NONE, RT_MII_ADVERTISE, adv);
  53. if (err < 0)
  54. return err;
  55. changed = 1;
  56. }
  57. bmsr = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMSR);
  58. if (bmsr < 0)
  59. return bmsr;
  60. if (!(bmsr & RT_BMSR_ESTATEN))
  61. return changed;
  62. adv = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_CTRL1000);
  63. oldadv = adv;
  64. if (adv < 0)
  65. return adv;
  66. adv &= ~(RT_ADVERTISE_1000FULL | RT_ADVERTISE_1000HALF);
  67. if (phydev->supported & (RT_SUPPORTED_1000baseT_Half |
  68. RT_SUPPORTED_1000baseT_Full))
  69. {
  70. if (advertise & RT_SUPPORTED_1000baseT_Half)
  71. adv |= RT_ADVERTISE_1000HALF;
  72. if (advertise & RT_SUPPORTED_1000baseT_Full)
  73. adv |= RT_ADVERTISE_1000FULL;
  74. }
  75. if (adv != oldadv)
  76. changed = 1;
  77. err = rt_phy_write(phydev, RT_MDIO_DEVAD_NONE, RT_MII_CTRL1000, adv);
  78. if (err < 0)
  79. return err;
  80. return changed;
  81. }
  82. int __genphy_restart_aneg(struct rt_phy_device *phydev)
  83. {
  84. int ctl;
  85. ctl = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMCR);
  86. if (ctl < 0)
  87. return ctl;
  88. ctl |= (RT_BMCR_ANENABLE | RT_BMCR_ANRESTART);
  89. ctl &= ~(RT_BMCR_ISOLATE);
  90. ctl = rt_phy_write(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMCR, ctl);
  91. return ctl;
  92. }
  93. int rt_genphy_config_aneg(struct rt_phy_device *phydev)
  94. {
  95. int result;
  96. int err;
  97. int ctl = RT_BMCR_ANRESTART;
  98. if (phydev->autoneg != AUTONEG_ENABLE)
  99. {
  100. phydev->pause = 0;
  101. if (phydev->speed == SPEED_1000)
  102. ctl |= RT_BMCR_SPEED1000;
  103. else if (phydev->speed == SPEED_100)
  104. ctl |= RT_BMCR_SPEED100;
  105. if (phydev->duplex == DUPLEX_FULL)
  106. ctl |= RT_BMCR_FULLDPLX;
  107. err = rt_phy_write(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMCR, ctl);
  108. return err;
  109. }
  110. result = __genphy_config_advert(phydev);
  111. if (result < 0)
  112. return result;
  113. if (result == 0)
  114. {
  115. int ctl = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMCR);
  116. if (ctl < 0)
  117. return ctl;
  118. if (!(ctl & RT_BMCR_ANENABLE) || (ctl & RT_BMCR_ISOLATE))
  119. result = 1;
  120. }
  121. if (result > 0)
  122. result = __genphy_restart_aneg(phydev);
  123. return result;
  124. }
  125. int rt_genphy_update_link(struct rt_phy_device *phydev)
  126. {
  127. unsigned int mii_reg;
  128. mii_reg = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMSR);
  129. if (phydev->link && mii_reg & RT_BMSR_LSTATUS)
  130. return 0;
  131. if ((phydev->autoneg == AUTONEG_ENABLE) &&
  132. !(mii_reg & RT_BMSR_ANEGCOMPLETE))
  133. {
  134. int i = 0;
  135. LOG_I("Waiting for PHY auto negotiation to complete");
  136. while (!(mii_reg & RT_BMSR_ANEGCOMPLETE))
  137. {
  138. if (i > (RT_PHY_ANEG_TIMEOUT))
  139. {
  140. LOG_E(" TIMEOUT!");
  141. phydev->link = 0;
  142. return -ETIMEDOUT;
  143. }
  144. mii_reg = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMSR);
  145. rt_thread_delay(100);
  146. i += 100;
  147. }
  148. LOG_D(" Done");
  149. phydev->link = 1;
  150. } else {
  151. mii_reg = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMSR);
  152. if (mii_reg & RT_BMSR_LSTATUS)
  153. phydev->link = 1;
  154. else
  155. phydev->link = 0;
  156. }
  157. return 0;
  158. }
  159. static void __genphy_auto_neg(struct rt_phy_device *phydev,int mii_reg)
  160. {
  161. rt_uint32_t lpa = 0;
  162. int gblpa = 0;
  163. rt_uint32_t estatus = 0;
  164. if (phydev->supported & (RT_SUPPORTED_1000baseT_Full |
  165. RT_SUPPORTED_1000baseT_Half))
  166. {
  167. gblpa = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_STAT1000);
  168. if (gblpa < 0)
  169. {
  170. LOG_D("Could not read RT_MII_STAT1000. Ignoring gigabit capability\n");
  171. gblpa = 0;
  172. }
  173. gblpa &= rt_phy_read(phydev,
  174. RT_MDIO_DEVAD_NONE, RT_MII_CTRL1000) << 2;
  175. }
  176. phydev->speed = SPEED_10;
  177. phydev->duplex = DUPLEX_HALF;
  178. if (gblpa & (RT_PHY_1000BTSR_1000FD | RT_PHY_1000BTSR_1000HD))
  179. {
  180. phydev->speed = SPEED_1000;
  181. if (gblpa & RT_PHY_1000BTSR_1000FD)
  182. phydev->duplex = DUPLEX_FULL;
  183. return ;
  184. }
  185. lpa = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_ADVERTISE);
  186. lpa &= rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_LPA);
  187. if (lpa & (RT_LINK_PARTNER__100FULL | RT_LINK_PARTNER__100HALF))
  188. {
  189. phydev->speed = SPEED_100;
  190. if (lpa & RT_LINK_PARTNER__100FULL)
  191. phydev->duplex = DUPLEX_FULL;
  192. } else if (lpa & RT_LINK_PARTNER__10FULL)
  193. {
  194. phydev->duplex = DUPLEX_FULL;
  195. }
  196. if ((mii_reg & RT_BMSR_ESTATEN) && !(mii_reg & RT_BMSR_ERCAP))
  197. estatus = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE,
  198. RT_MII_ESTATUS);
  199. if (estatus & (RT_SUPORT_1000B_XFULL | RT_SUPORT_1000B_XHALF |
  200. RT_SUPORT_1000B_TFULL | RT_SUPORT_1000B_THALF))
  201. {
  202. phydev->speed = SPEED_1000;
  203. if (estatus & (RT_SUPORT_1000B_XFULL | RT_SUPORT_1000B_TFULL))
  204. phydev->duplex = DUPLEX_FULL;
  205. }
  206. }
  207. int rt_genphy_parse_link(struct rt_phy_device *phydev)
  208. {
  209. int mii_reg = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMSR);
  210. if (phydev->autoneg == AUTONEG_ENABLE)
  211. {
  212. __genphy_auto_neg(phydev, mii_reg);
  213. } else {
  214. rt_uint32_t bmcr = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMCR);
  215. phydev->speed = SPEED_10;
  216. phydev->duplex = DUPLEX_HALF;
  217. if (bmcr & RT_BMCR_FULLDPLX)
  218. phydev->duplex = DUPLEX_FULL;
  219. if (bmcr & RT_BMCR_SPEED1000)
  220. phydev->speed = SPEED_1000;
  221. else if (bmcr & RT_BMCR_SPEED100)
  222. phydev->speed = SPEED_100;
  223. }
  224. return 0;
  225. }
  226. int rt_genphy_config(struct rt_phy_device *phydev)
  227. {
  228. int val;
  229. rt_uint32_t features;
  230. features = (RT_SUPPORTED_TP | RT_SUPPORTED_MII
  231. | RT_SUPPORTED_AUI | RT_SUPPORTED_FIBRE |
  232. RT_SUPPORTED_BNC);
  233. val = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_BMSR);
  234. if (val < 0)
  235. return val;
  236. if (val & RT_BMSR_ANEGCAPABLE)
  237. features |= RT_SUPPORTED_Autoneg;
  238. if (val & RT_BMSR_100FULL)
  239. features |= RT_SUPPORTED_100baseT_Full;
  240. if (val & RT_BMSR_100HALF)
  241. features |= RT_SUPPORTED_100baseT_Half;
  242. if (val & RT_BMSR_10FULL)
  243. features |= RT_SUPPORTED_10baseT_Full;
  244. if (val & RT_BMSR_10HALF)
  245. features |= RT_SUPPORTED_10baseT_Half;
  246. if (val & RT_BMSR_ESTATEN)
  247. {
  248. val = rt_phy_read(phydev, RT_MDIO_DEVAD_NONE, RT_MII_ESTATUS);
  249. if (val < 0)
  250. return val;
  251. if (val & RT_SUPORT_1000B_TFULL)
  252. features |= RT_SUPPORTED_1000baseT_Full;
  253. if (val & RT_SUPORT_1000B_THALF)
  254. features |= RT_SUPPORTED_1000baseT_Half;
  255. if (val & RT_SUPORT_1000B_XFULL)
  256. features |= RT_SUPPORTED_1000baseX_Full;
  257. if (val & RT_SUPORT_1000B_XHALF)
  258. features |= RT_SUPPORTED_1000baseX_Half;
  259. }
  260. phydev->supported &= features;
  261. phydev->advertising &= features;
  262. rt_genphy_config_aneg(phydev);
  263. return 0;
  264. }
  265. int rt_genphy_startup(struct rt_phy_device *phydev)
  266. {
  267. int ret;
  268. ret = rt_genphy_update_link(phydev);
  269. if (ret)
  270. return ret;
  271. return rt_genphy_parse_link(phydev);
  272. }