Merge pull request #3 from Rbb666/update

更新stlink-2.11.0驱动

tools/Data_Base/STM32_Prog_DB_0x413.xml

@@ -71,13 +71,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -213,7 +213,7 @@
 					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
-					<Parameters address="0x1FFFC000" name="Bank 1" size="0x8"/>
+					<Parameters address="0x1FFFC000" name="Bank 1" size="0x10"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>

tools/Data_Base/STM32_Prog_DB_0x415.xml

@@ -55,7 +55,21 @@
 				</Configuration>								
 			</Interface>
 			<!-- Bootloader Interface -->
-			<Interface name="Bootloader"/>
+			<Interface name="Bootloader">
+			<!-- 1MB Dual Bank-->
+				<!-- 512KB Dual Bank-->
+				<Configuration number="0x5"> <!-- DBANK=0x1-->
+					<DualBank>
+						<ReadRegister address="0x1FFF7800" mask="0x200000" value="0x200000"/>
+					</DualBank>
+				</Configuration>
+				<!-- 512KB Single Bank-->
+				<Configuration number="0x6"> <!-- DBANK=0x0-->
+					<DualBank>
+						<ReadRegister address="0x1FFF7800" mask="0x200000" value="0x0"/>
+					</DualBank>
+				</Configuration>
+			</Interface>
 		</Configurations>
 		<!-- Peripherals -->
 		<Peripherals>
@@ -86,8 +100,10 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x100000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<!-- 1MB dual Bank -->
-				<Configuration config="0">
+				<Configuration config="0,5,6">
 					<Parameters address="0x08000000" name=" 1 Mbyte Embedded Flash" size="0x100000"/>
 					<Description/>
 					<Organization>Dual</Organization>
@@ -104,7 +120,7 @@
 					</Bank>
 				</Configuration>
 				<!-- 512KB dual Bank -->
-				<Configuration config="1">
+				<Configuration config="1,5">
 					<Parameters address="0x08000000" name=" 512 KBbyte Embedded Flash" size="0x80000"/>
 					<Description/>
 					<Organization>Dual</Organization>
@@ -121,7 +137,7 @@
 					</Bank>
 				</Configuration>
 				<!-- 512KB Single Bank -->
-				<Configuration config="2">
+				<Configuration config="2,6">
 					<Parameters address="0x08000000" name=" 512 KBbyte Embedded Flash" size="0x80000"/>
 					<Description/>
 					<Organization>Single</Organization>
@@ -133,7 +149,7 @@
 					</Bank>
 				</Configuration>
 				<!-- 256KB dual Bank -->
-				<Configuration config="3">
+				<Configuration config="3,5">
 					<Parameters address="0x08000000" name=" 256 KBbyte Embedded Flash" size="0x40000"/>
 					<Description/>
 					<Organization>Dual</Organization>
@@ -150,7 +166,7 @@
 					</Bank>
 				</Configuration>
 				<!-- 256KB Single Bank -->
-				<Configuration config="4">
+				<Configuration config="4,6">
 					<Parameters address="0x08000000" name=" 256 KBbyte Embedded Flash" size="0x40000"/>
 					<Description/>
 					<Organization>Single</Organization>
@@ -197,12 +213,12 @@
 					<Allignement>0x4</Allignement>
 					<Bank name="Bank 1">
 						<Field>
-							<Parameters address="0x1FFF7800" name="Bank1" occurence="0x1" size="0x24"/>
+							<Parameters address="0x1FFF7800" name="Bank1" occurence="0x1" size="0x28"/>
 						</Field>
 					</Bank>
 					<Bank name="Bank 2">
 						<Field>
-							<Parameters address="0x1FFFF808" name="Bank2" occurence="0x1" size="0x1C"/>
+							<Parameters address="0x1FFFF800" name="Bank2" occurence="0x1" size="0x28"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -561,7 +577,7 @@
 					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
-					<Parameters address="0x1FFF7800" name="Bank 1" size="0x24"/>
+					<Parameters address="0x1FFF7800" name="Bank 1" size="0x28"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -702,6 +718,17 @@
 										<Val value="0x1">Dual-bank boot enable</Val>
 									</Values>
 								</Bit>
+								<Bit config="5">
+									<Name>DualBank</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">256 KB/512 KB Single-bank Flash: Contiguous addresses in Bank 1</Val>
+										<Val value="0x1">256 KB/512 KB Dual-bank Flash</Val>
+									</Values>
+								</Bit>
 								<Bit>
 									<Name>nBOOT1</Name>
 									<Description/>
@@ -825,7 +852,7 @@
 					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
-					<Parameters address="0x1FFFF808" name="Bank 2" size="0x1C"/>
+					<Parameters address="0x1FFFF800" name="Bank 2" size="0x28"/>
 					<Category>
 						<Name>PCROP Protection (Bank 2)</Name>
 						<Field>

tools/Data_Base/STM32_Prog_DB_0x419.xml

@@ -101,6 +101,7 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF7A22" default="0x200000"/>
+				<BootloaderVersion address="0x1FFF76DE"/>
 				<!-- 1024KB Single Bank -->
 				<Configuration config="0,1,6">
 					<Parameters address="0x08000000" name=" 2048 Kbytes Embedded Flash" size="0x200000"/>
@@ -179,13 +180,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x421.xml

@@ -85,13 +85,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x423.xml

@@ -85,13 +85,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x425.xml

@@ -65,6 +65,7 @@
 				<ErasedValue>0x00</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FF8007C" default="0x8000"/>
+				<BootloaderVersion address="0x1FF00FFE"/>
 				<!-- 128KB single Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name="32 Kbytes Embedded Flash" size="0x8000"/>

tools/Data_Base/STM32_Prog_DB_0x427.xml

@@ -141,7 +141,7 @@
 									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0xAA">Level 0, no protection</Val>
 										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
@@ -161,7 +161,7 @@
 									<Description>Sector protection mode selection option byte.</Description>
 									<BitOffset>0x8</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">WRPx bit defines sector write protection</Val>
 										<Val value="0x1">WRPx bit defines sector read/write (PCROP) protection</Val>
@@ -180,7 +180,7 @@
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x4</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
 										<Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
@@ -210,7 +210,7 @@
 									<Description/>
 									<BitOffset>0x14</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Hardware independant watchdog</Val>
 										<Val value="0x1">Software independant watchdog</Val>
@@ -221,7 +221,7 @@
 									<Description/>
 									<BitOffset>0x15</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Reset generated when entering Stop mode</Val>
 										<Val value="0x1">No reset generated</Val>
@@ -232,7 +232,7 @@
 									<Description/>
 									<BitOffset>0x16</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Reset generated when entering Standby mode</Val>
 										<Val value="0x1">No reset generated</Val>
@@ -251,7 +251,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">Write protection not active</Val>
 										<Val value="0x1">Write protection active</Val>
@@ -262,7 +262,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">read/Write protection active</Val>
 										<Val value="0x1">read/Write protection not active</Val>
@@ -278,7 +278,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">Write protection not active</Val>
 										<Val value="0x1">Write protection active</Val>
@@ -289,231 +289,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
-									<Values ByBit="true">
-										<Val value="0x0">read/Write protection active</Val>
-										<Val value="0x1">read/Write protection not active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-				</Bank>
-				<Bank interface="JTAG_SWD">
-					<Parameters address="0x1FF80000" name="Bank 2" size="0x88"/>
-					<Category>
-						<Name>Read Out Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80000" name="RDP" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>RDP</Name>
-									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0xAA">Level 0, no protection</Val>
-										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
-										<Val value="0xCC">Level 2, chip protection</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>PCROP Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80000" name="SPRMOD" size="0x4"/>
-							<AssignedBits>
-								<Bit reference="SPRMode">
-									<Name>SPRMOD</Name>
-									<Description>Sector protection mode selection option byte.</Description>
-									<BitOffset>0x8</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">WRPx bit defines sector write protection</Val>
-										<Val value="0x1">WRPx bit defines sector write/read (PCROP) protection</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>BOR Level</Name>
-						<Field>
-							<Parameters address="0x1FF80004" name="USER" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>BOR_LEV</Name>
-									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x4</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
-										<Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
-										<Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
-										<Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
-										<Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
-										<Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
-										<Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>User Configuration</Name>
-						<Field>
-							<Parameters address="0x1FF80004" name="USER" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>IWDG_SW</Name>
-									<Description/>
-									<BitOffset>0x4</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Hardware independant watchdog</Val>
-										<Val value="0x1">Software independant watchdog</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>nRST_STOP</Name>
-									<Description/>
-									<BitOffset>0x5</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Reset generated when entering Stop mode</Val>
-										<Val value="0x1">No reset generated</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>nRST_STDBY</Name>
-									<Description/>
-									<BitOffset>0x6</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Reset generated when entering Standby mode</Val>
-										<Val value="0x1">No reset generated</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>Write Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>WRP0</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-								<Bit config="1">
-									<Name>WRP0</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">read/Write protection active</Val>
-										<Val value="0x1">read/Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>WRP16</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-								<Bit config="1">
-									<Name>WRP16</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">read/Write protection active</Val>
-										<Val value="0x1">read/Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x1FF80010" name="WRP2" size="0x8"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>WRP32</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-								<Bit config="1">
-									<Name>WRP32</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">read/Write protection active</Val>
-										<Val value="0x1">read/Write protection not active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x1FF80014" name="WRP2" size="0x8"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>WRP48</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-								<Bit config="1">
-									<Name>WRP48</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">read/Write protection active</Val>
 										<Val value="0x1">read/Write protection not active</Val>

tools/Data_Base/STM32_Prog_DB_0x429.xml

@@ -141,7 +141,7 @@
 									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0xAA">Level 0, no protection</Val>
 										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
@@ -161,7 +161,7 @@
 									<Description>Sector protection mode selection option byte.</Description>
 									<BitOffset>0x8</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">WRPx bit defines sector write protection</Val>
 										<Val value="0x1">WRPx bit defines sector read/write (PCROP) protection</Val>
@@ -180,7 +180,7 @@
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x4</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
 										<Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
@@ -210,7 +210,7 @@
 									<Description/>
 									<BitOffset>0x14</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Hardware independant watchdog</Val>
 										<Val value="0x1">Software independant watchdog</Val>
@@ -221,7 +221,7 @@
 									<Description/>
 									<BitOffset>0x15</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Reset generated when entering Stop mode</Val>
 										<Val value="0x1">No reset generated</Val>
@@ -232,7 +232,7 @@
 									<Description/>
 									<BitOffset>0x16</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Reset generated when entering Standby mode</Val>
 										<Val value="0x1">No reset generated</Val>
@@ -251,7 +251,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">Write protection not active</Val>
 										<Val value="0x1">Write protection active</Val>
@@ -262,7 +262,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">read/Write protection active</Val>
 										<Val value="0x1">read/Write protection not active</Val>
@@ -272,176 +272,6 @@
 						</Field>
 					</Category>
 				</Bank>
-				<Bank interface="JTAG_SWD">
-					<Parameters address="0x1FF80000" name="Bank 2" size="0x88"/>
-					<Category>
-						<Name>Read Out Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80000" name="RDP" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>RDP</Name>
-									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0xAA">Level 0, no protection</Val>
-										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
-										<Val value="0xCC">Level 2, chip protection</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>PCROP Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80000" name="SPRMOD" size="0x4"/>
-							<AssignedBits>
-								<Bit reference="SPRMode">
-									<Name>SPRMOD</Name>
-									<Description>Sector protection mode selection option byte.</Description>
-									<BitOffset>0x8</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">WRPx bit defines sector write protection</Val>
-										<Val value="0x1">WRPx bit defines sector write/read (PCROP) protection</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>BOR Level</Name>
-						<Field>
-							<Parameters address="0x1FF80004" name="USER" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>BOR_LEV</Name>
-									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x4</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
-										<Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
-										<Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
-										<Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
-										<Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
-										<Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
-										<Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>User Configuration</Name>
-						<Field>
-							<Parameters address="0x1FF80004" name="USER" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>IWDG_SW</Name>
-									<Description/>
-									<BitOffset>0x4</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Hardware independant watchdog</Val>
-										<Val value="0x1">Software independant watchdog</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>nRST_STOP</Name>
-									<Description/>
-									<BitOffset>0x5</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Reset generated when entering Stop mode</Val>
-										<Val value="0x1">No reset generated</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>nRST_STDBY</Name>
-									<Description/>
-									<BitOffset>0x6</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Reset generated when entering Standby mode</Val>
-										<Val value="0x1">No reset generated</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>Write Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>WRP0</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-								<Bit config="1">
-									<Name>WRP0</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">read/Write protection active</Val>
-										<Val value="0x1">read/Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>WRP16</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-								<Bit config="1">
-									<Name>WRP16</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">read/Write protection active</Val>
-										<Val value="0x1">read/Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-				</Bank>
 				<Bank interface="Bootloader">
 					<Parameters address="0x1FF80000" name="Bank 1" size="0x18"/>
 					<Category>

tools/Data_Base/STM32_Prog_DB_0x431.xml

@@ -85,13 +85,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x433.xml

@@ -85,13 +85,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x434.xml

@@ -179,13 +179,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x436.xml

@@ -42,10 +42,10 @@
 				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
 				<ErasedValue>0x00</ErasedValue>
 				<Access>RWE</Access>
-				<FlashSize address="0x1FF800CC" default="0x20000"/>
+				<FlashSize address="0x1FF800CC" default="0x60000"/>
 				<!-- 384KB dual Bank -->
 				<Configuration>
-					<Parameters address="0x08000000" name=" 384 Kbytes Embedded Flash" size="0x20000"/>
+					<Parameters address="0x08000000" name=" 384 Kbytes Embedded Flash" size="0x60000"/>
 					<Description/>
 					<Organization>Dual</Organization>
 					<Allignement>0x4</Allignement>

tools/Data_Base/STM32_Prog_DB_0x437.xml

@@ -43,6 +43,8 @@
 				<ErasedValue>0x00</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FF800CC" default="0x80000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<!-- 512KB dual Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 512 Kbytes Embedded Flash" size="0x80000"/>
@@ -134,7 +136,7 @@
 									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0xAA">Level 0, no protection</Val>
 										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
@@ -154,7 +156,7 @@
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x4</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
 										<Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
@@ -184,7 +186,7 @@
 									<Description/>
 									<BitOffset>0x14</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Hardware independant watchdog</Val>
 										<Val value="0x1">Software independant watchdog</Val>
@@ -195,7 +197,7 @@
 									<Description/>
 									<BitOffset>0x15</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Reset generated when entering Stop mode</Val>
 										<Val value="0x1">No reset generated</Val>
@@ -206,7 +208,7 @@
 									<Description/>
 									<BitOffset>0x16</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">Reset generated when entering Standby mode</Val>
 										<Val value="0x1">No reset generated</Val>
@@ -217,7 +219,7 @@
 									<Description/>
 									<BitOffset>0x17</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
 										<Val value="0x0">If boot from Flash then boot from bank 2</Val>
 										<Val value="0x1">If boot from Flash then boot from bank 1</Val>
@@ -236,7 +238,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">Write protection not active</Val>
 										<Val value="0x1">Write protection active</Val>
@@ -252,7 +254,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true"> 
 										<Val value="0x0">Write protection not active</Val>
 										<Val value="0x1">Write protection active</Val>
@@ -268,7 +270,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">Write protection not active</Val>
 										<Val value="0x1">Write protection active</Val>
@@ -284,7 +286,7 @@
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values ByBit="true">
 										<Val value="0x0">Write protection not active</Val>
 										<Val value="0x1">Write protection active</Val>
@@ -294,111 +296,6 @@
 						</Field> 
 					</Category>
 				</Bank>
-				<Bank interface="JTAG_SWD">
-					<Parameters address="0x1FF80000" name="Bank 2" size="0x88"/>
-					<Category>
-						<Name>Read Out Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80000" name="RDP" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>RDP</Name>
-									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0xAA">Level 0, no protection</Val>
-										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
-										<Val value="0xCC">Level 2, chip protection</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>BOR Level</Name>
-						<Field>
-							<Parameters address="0x1FF80004" name="USER" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>BOR_LEV</Name>
-									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x4</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
-										<Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
-										<Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
-										<Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
-										<Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
-										<Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
-										<Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
-										<Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>User Configuration</Name>
-						<Field>
-							<Parameters address="0x1FF80004" name="USER" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>IWDG_SW</Name>
-									<Description/>
-									<BitOffset>0x4</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Hardware independant watchdog</Val>
-										<Val value="0x1">Software independant watchdog</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>nRST_STOP</Name>
-									<Description/>
-									<BitOffset>0x5</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Reset generated when entering Stop mode</Val>
-										<Val value="0x1">No reset generated</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>nRST_STDBY</Name>
-									<Description/>
-									<BitOffset>0x6</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">Reset generated when entering Standby mode</Val>
-										<Val value="0x1">No reset generated</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>nBFB2</Name>
-									<Description/>
-									<BitOffset>0x7</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">If boot from Flash then boot from bank 2</Val>
-										<Val value="0x1">If boot from Flash then boot from bank 1</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-				</Bank>
 				<Bank interface="Bootloader">
 					<Parameters address="0x1FF80000" name="Bank 1" size="0x20"/>
 					<Category>

tools/Data_Base/STM32_Prog_DB_0x441.xml

@@ -85,13 +85,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x443.xml

@@ -0,0 +1,882 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x443</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<!-- cortex written in word file +mpu should it be written?? -->
+		<CPU>Cortex-M0+</CPU>
+		<Name>STM32C01x</Name>
+		<Series>STM32C0</Series>
+		<Description>ARM 32-bit Cortex-M0+ based device</Description>
+		<Configurations>
+			<!-- JTAG_SWD Interface -->
+			<Interface name="JTAG_SWD"/>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader"/>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<!-- Embedded SRAM -->
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0x00</ErasedValue>
+				<Access>RWE</Access>
+				<!-- 6KB  -->
+				<Configuration>
+					<Parameters address="0x20000000" name="SRAM" size="0x1800"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x1800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Embedded Flash -->
+			<Peripheral>
+				<Name>Embedded Flash</Name>
+				<Type>Storage</Type>
+				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<FlashSize address="0x1FFF777C" default="0x8000"/>
+				<BootloaderVersion address="0x1FFF17FE"/>
+				<!-- 32KB  -->
+				<Configuration>
+					<Parameters address="0x08000000" name=" 32 KB Embedded Flash" size="0x8000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x10" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+				<!-- OTP -->
+			<Peripheral>
+				<Name>OTP</Name>
+				<Type>Storage</Type>
+				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 1 KBytes single bank -->
+				<Configuration>
+					<Parameters address="0x1FFF7000" name=" 1 KBytes Data OTP" size="0x400"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="OTP">
+						<Field>
+							<Parameters address="0x1FFF7000" name="OTP" occurence="0x1" size="0x400"/> 
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Option Bytes -->
+			<Peripheral>
+				<Name>Option Bytes</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Bank interface="JTAG_SWD">
+					<Parameters address="0x40022020" name="Bank 1" size="0x64"/>
+					<Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+							<Parameters address="0x40022020" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters name="FLASH_OPTR" size="0x4" address="0x40022020"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_EN</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Configurable brown out reset disabled, power-on reset defined by POR/PDR levels</Val>
+										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BORR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.9 V</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BORF_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+							<Parameters address="0x40022020" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_SHDW</Name>
+									<Description/>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HSE_NOT_REMAPPED</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">HSE_NOT_REMAPPED enable</Val>
+										<Val value="0x1">HSE_NOT_REMAPPED disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RAM_PARITY_CHECK</Name>
+									<Description/>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">RAM_PARITY_CHECK enable</Val>
+										<Val value="0x1">RAM_PARITY_CHECK disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SECURE_MUXING_EN</Name>
+									<Description/>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SECURE_MUXING_EN disable </Val>
+										<Val value="0x1">SECURE_MUXING_EN enable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT_SEL</Name>
+									<Description/>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 pin (legacy mode)</Val>
+										<Val value="0x1">nBOOT0 option bit </Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT1</Name>
+									<Description/>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
+									</Values>
+								</Bit>	
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description/>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0=0</Val>
+										<Val value="0x1">nBOOT0=1</Val>
+									</Values>
+								</Bit>				
+								<Bit>
+									<Name>NRST_MODE</Name>
+									<Description/>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reserved</Val>
+										<Val value="0x1">Reset Input only: a low level on the NRST pin generates system reset, internal RESET not propagated to the NSRT pin</Val>
+										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
+										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
+										
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>PCROP Protection</Name>
+						<Field>
+							<Parameters address="0x40022024" name="FLASH_PCROP1SR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_STRT</Name>
+									<Description>Start offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022028" name="FLASH_PCROP1ER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_END</Name>
+									<Description>End offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+								<Bit>
+									<Name>PCROP_RDP</Name>
+									<Description/>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">PCROP zone is kept when RDP is decreased; Partial Mass Erase done</Val>
+										<Val value="0x1">PCROP zone is erased when RDP is decreased Full Mass Erase done</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022034" name="FLASH_PCROP1BSR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_STRT</Name>
+									<Description>Start offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022038" name="FLASH_PCROP1BER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_END</Name>
+									<Description>End offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>											
+					</Category>
+					<Category>
+						<Name>Write Protection</Name>
+						<Field>
+							<Parameters address="0x4002202C" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1A_STRT</Name>
+									<Description>TStart offset of WRP zone A of bank 1. WRP1A_STRT contains the first page of the first WRP zone to protect</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1A_END</Name>
+									<Description>End offset of WRP zone A of bank 1. WRP1A_END contains the last page of the first WRP zone to protect.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022030" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1B_STRT</Name>
+									<Description>Start offset of WRP zone B of bank 1. WRP1B_START contains the first page of the second WRP zone to protect</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1B_END</Name>
+									<Description>End offset of WRP zone B of bank 1. WRP1B_END contains the last page of the second WRP zone to protect</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+												
+					</Category>
+				<!--</Bank>
+				<Bank interface="JTAG_SWD">
+					<Parameters address="0x40022080" name="Bank 2" size="0x10"/>-->
+					<Category>
+						<Name>FLASH security</Name>
+						<Field>
+							<Parameters address="0x40022080" name="FLASH_SECR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SEC_SIZE</Name>
+									<Description>Securable memory area size</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x5</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description>Used to force boot from user area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from Main Flash memory</Val>
+									</Values>
+								</Bit>
+								
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+				<Bank interface="Bootloader">
+					<Parameters address="0x1FFF7800" name="Bank 1" size="0x74"/>
+					<Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_EN</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Configurable brown out reset disabled, power-on reset defined by POR/PDR levels</Val>
+										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
+									</Values>
+								</Bit>
+								<Bit>
+
+									<Name>BORR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.9 V</Val>
+									</Values>
+								</Bit>
+								<Bit>
+
+									<Name>BORF_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_SHDW</Name>
+									<Description/>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HSE_NOT_REMAPPED</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">HSE_NOT_REMAPPED enable</Val>
+										<Val value="0x1">HSE_NOT_REMAPPED disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RAM_PARITY_CHECK</Name>
+									<Description/>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">RAM_PARITY_CHECK enable</Val>
+
+										<Val value="0x1">RAM_PARITY_CHECK disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SECURE_MUXING_EN</Name>
+									<Description/>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SECURE_MUXING_EN disable </Val>
+										<Val value="0x1">SECURE_MUXING_EN enable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT_SEL</Name>
+									<Description/>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 pin (legacy mode)</Val>
+										<Val value="0x1">nBOOT0 option bit </Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT1</Name>
+									<Description/>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+
+
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
+									</Values>
+
+								</Bit>	
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description/>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0=0</Val>
+										<Val value="0x1">nBOOT0=1</Val>
+									</Values>
+								</Bit>				
+								<Bit>
+									<Name>NRST_MODE</Name>
+									<Description/>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reserved</Val>
+										<Val value="0x1">Reset Input only: a low level on the NRST pin generates system reset, internal RESET not propagated to the NSRT pin</Val>
+										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
+										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
+										
+									</Values>
+								</Bit>
+
+
+
+
+
+
+
+
+
+
+								<Bit>
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>PCROP Protection</Name>
+						<Field>
+							<Parameters address="0x1FFF7808" name="FLASH_PCROP1SR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_STRT</Name>
+									<Description>Start offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7810" name="FLASH_PCROP1ER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_END</Name>
+									<Description>End offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+								<Bit>
+									<Name>PCROP_RDP</Name>
+									<Description/>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">PCROP zone is kept when RDP is decreased Partial Mass Erase done</Val>
+										<Val value="0x1">PCROP zone is erased when RDP is decreased Full Mass Erase done</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+							<Field>
+							<Parameters name="PCROP1BSR" size="0x4" address="0x1FFF7828"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_STRT</Name>
+									<Description>Start offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x200"	offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters name="PCROP1BER" size="0x4" address="0x1FFF7830"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_END</Name>
+									<Description>End offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x200"	offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Write Protection</Name>
+						<Field>
+							<Parameters address="0x1FFF7818" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1A_STRT</Name>
+									<Description>Start offset of WRP zone A of bank 1. WRP1A_STRT contains the first page of the first WRP zone to protect</Description>
+
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1A_END</Name>
+									<Description>End offset of WRP zone A of bank 1. WRP1A_END contains the last page of the first WRP zone to protect.</Description>
+
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7820" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1B_STRT</Name>
+									<Description>Start offset of WRP zone B of bank 1. WRP1B_START contains the first page of the second WRP zone to protect</Description>
+
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1B_END</Name>
+									<Description>End offset of WRP zone B of bank 1. WRP1B_END contains the last page of the second WRP zone to protect</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>		
+					</Category>
+				<!--</Bank>
+				<Bank interface="Bootloader">
+					<Parameters address="0x1FFF7870" name="Bank 2" size="0x4"/>-->
+					<Category>
+						<Name>FLASH security</Name>
+						<Field>
+							<Parameters address="0x1FFF7870" name="FLASH_SECR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description>Used to force boot from user area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from Main Flash memory</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SEC_SIZE</Name>
+									<Description>Securable memory area size</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x5</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x449.xml

@@ -65,6 +65,8 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FF0F442" default="0x100000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<!-- 1MB single Bank -->
 				<Configuration config="0">
 					<Parameters address="0x08000000" name=" 1 Mbytes Embedded Flash" size="0x100000"/>

tools/Data_Base/STM32_Prog_DB_0x450.xml

@@ -148,6 +148,7 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FF1E880" default="0x200000"/>
+				<BootloaderVersion address="0x1FF1E7FE"/>
 				<!-- 2MB Dual Bank -->
 				<Configuration config="0,1,2,3">
 					<Parameters address="0x08000000" name="2 MBytes Dual Bank Embedded Flash" size="0x200000"/>
@@ -265,7 +266,7 @@
 						<Field>
 							<Parameters address="0x5200201C" name="FOPTSR_CUR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<!--Bit>
 									<Name>RSS1</Name>
 									<Description/>
 									<BitOffset>0x1A</BitOffset>
@@ -275,13 +276,13 @@
 										<Val value="0x0">No SFI process on going</Val>
 										<Val value="0x1">SFI process started</Val>
 									</Values>
-								</Bit>
+								</Bit-->
 							</AssignedBits>
 						</Field>
 						<Field>
 							<Parameters address="0x52002020" name="FOPTSR_PRG" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<!--Bit>
 									<Name>RSS1</Name>
 									<Description/>
 									<BitOffset>0x1A</BitOffset>
@@ -291,7 +292,7 @@
 										<Val value="0x0">No SFI process on going</Val>
 										<Val value="0x1">SFI process started</Val>
 									</Values>
-								</Bit>
+								</Bit-->
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -405,7 +406,7 @@
 										<Val value="0x1">Independent watchdog is running in STANDBY mode</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit config="0,2,4,6">
 									<Name>SECURITY</Name>
 									<Description/>
 									<BitOffset>0x15</BitOffset>

tools/Data_Base/STM32_Prog_DB_0x453.xml

@@ -0,0 +1,882 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x453</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<!-- cortex written in word file +mpu should it be written?? -->
+		<CPU>Cortex-M0+</CPU>
+		<Name>STM32C03x</Name>
+		<Series>STM32C0</Series>
+		<Description>ARM 32-bit Cortex-M0+ based device</Description>
+		<Configurations>
+			<!-- JTAG_SWD Interface -->
+			<Interface name="JTAG_SWD"/>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader"/>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<!-- Embedded SRAM -->
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0x00</ErasedValue>
+				<Access>RWE</Access>
+				<!-- 12KB  -->
+				<Configuration>
+					<Parameters address="0x20000000" name="SRAM" size="0x3000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x3000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Embedded Flash -->
+			<Peripheral>
+				<Name>Embedded Flash</Name>
+				<Type>Storage</Type>
+				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<FlashSize address="0x1FFF777C" default="0x8000"/>
+				<BootloaderVersion address="0x1FFF17FE"/>
+				<!-- 32KB  -->
+				<Configuration>
+					<Parameters address="0x08000000" name=" 32 KB Embedded Flash" size="0x8000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x10" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+				<!-- OTP -->
+			<Peripheral>
+				<Name>OTP</Name>
+				<Type>Storage</Type>
+				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 1 KBytes single bank -->
+				<Configuration>
+					<Parameters address="0x1FFF7000" name=" 1 KBytes Data OTP" size="0x400"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="OTP">
+						<Field>
+							<Parameters address="0x1FFF7000" name="OTP" occurence="0x1" size="0x400"/> 
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Option Bytes -->
+			<Peripheral>
+				<Name>Option Bytes</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Bank interface="JTAG_SWD">
+					<Parameters address="0x40022020" name="Bank 1" size="0x64"/>
+					<Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+							<Parameters address="0x40022020" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters name="FLASH_OPTR" size="0x4" address="0x40022020"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_EN</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Configurable brown out reset disabled, power-on reset defined by POR/PDR levels</Val>
+										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BORR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.9 V</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BORF_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+							<Parameters address="0x40022020" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_SHDW</Name>
+									<Description/>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HSE_NOT_REMAPPED</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">HSE_NOT_REMAPPED enable</Val>
+										<Val value="0x1">HSE_NOT_REMAPPED disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RAM_PARITY_CHECK</Name>
+									<Description/>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">RAM_PARITY_CHECK enable</Val>
+										<Val value="0x1">RAM_PARITY_CHECK disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SECURE_MUXING_EN</Name>
+									<Description/>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SECURE_MUXING_EN disable </Val>
+										<Val value="0x1">SECURE_MUXING_EN enable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT_SEL</Name>
+									<Description/>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 pin (legacy mode)</Val>
+										<Val value="0x1">nBOOT0 option bit </Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT1</Name>
+									<Description/>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
+									</Values>
+								</Bit>	
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description/>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0=0</Val>
+										<Val value="0x1">nBOOT0=1</Val>
+									</Values>
+								</Bit>				
+								<Bit>
+									<Name>NRST_MODE</Name>
+									<Description/>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reserved</Val>
+										<Val value="0x1">Reset Input only: a low level on the NRST pin generates system reset, internal RESET not propagated to the NSRT pin</Val>
+										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
+										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
+										
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>PCROP Protection</Name>
+						<Field>
+							<Parameters address="0x40022024" name="FLASH_PCROP1SR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_STRT</Name>
+									<Description>Start offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022028" name="FLASH_PCROP1ER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_END</Name>
+									<Description>End offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+								<Bit>
+									<Name>PCROP_RDP</Name>
+									<Description/>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">PCROP zone is kept when RDP is decreased; Partial Mass Erase done</Val>
+										<Val value="0x1">PCROP zone is erased when RDP is decreased Full Mass Erase done</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022034" name="FLASH_PCROP1BSR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_STRT</Name>
+									<Description>Start offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022038" name="FLASH_PCROP1BER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_END</Name>
+									<Description>End offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>											
+					</Category>
+					<Category>
+						<Name>Write Protection</Name>
+						<Field>
+							<Parameters address="0x4002202C" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1A_STRT</Name>
+									<Description>TStart offset of WRP zone A of bank 1. WRP1A_STRT contains the first page of the first WRP zone to protect</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1A_END</Name>
+									<Description>End offset of WRP zone A of bank 1. WRP1A_END contains the last page of the first WRP zone to protect.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022030" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1B_STRT</Name>
+									<Description>Start offset of WRP zone B of bank 1. WRP1B_START contains the first page of the second WRP zone to protect</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1B_END</Name>
+									<Description>End offset of WRP zone B of bank 1. WRP1B_END contains the last page of the second WRP zone to protect</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+												
+					</Category>
+				<!--</Bank>
+				<Bank interface="JTAG_SWD">
+					<Parameters address="0x40022080" name="Bank 2" size="0x10"/>-->
+					<Category>
+						<Name>FLASH security</Name>
+						<Field>
+							<Parameters address="0x40022080" name="FLASH_SECR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SEC_SIZE</Name>
+									<Description>Securable memory area size</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x5</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description>Used to force boot from user area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from Main Flash memory</Val>
+									</Values>
+								</Bit>
+								
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+				<Bank interface="Bootloader">
+					<Parameters address="0x1FFF7800" name="Bank 1" size="0x74"/>
+					<Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_EN</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Configurable brown out reset disabled, power-on reset defined by POR/PDR levels</Val>
+										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
+									</Values>
+								</Bit>
+								<Bit>
+
+									<Name>BORR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.9 V</Val>
+									</Values>
+								</Bit>
+								<Bit>
+
+									<Name>BORF_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_SHDW</Name>
+									<Description/>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HSE_NOT_REMAPPED</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">HSE_NOT_REMAPPED enable</Val>
+										<Val value="0x1">HSE_NOT_REMAPPED disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RAM_PARITY_CHECK</Name>
+									<Description/>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">RAM_PARITY_CHECK enable</Val>
+
+										<Val value="0x1">RAM_PARITY_CHECK disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SECURE_MUXING_EN</Name>
+									<Description/>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SECURE_MUXING_EN disable </Val>
+										<Val value="0x1">SECURE_MUXING_EN enable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT_SEL</Name>
+									<Description/>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 pin (legacy mode)</Val>
+										<Val value="0x1">nBOOT0 option bit </Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT1</Name>
+									<Description/>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+
+
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
+									</Values>
+
+								</Bit>	
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description/>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0=0</Val>
+										<Val value="0x1">nBOOT0=1</Val>
+									</Values>
+								</Bit>				
+								<Bit>
+									<Name>NRST_MODE</Name>
+									<Description/>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reserved</Val>
+										<Val value="0x1">Reset Input only: a low level on the NRST pin generates system reset, internal RESET not propagated to the NSRT pin</Val>
+										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
+										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
+										
+									</Values>
+								</Bit>
+
+
+
+
+
+
+
+
+
+
+								<Bit>
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>PCROP Protection</Name>
+						<Field>
+							<Parameters address="0x1FFF7808" name="FLASH_PCROP1SR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_STRT</Name>
+									<Description>Start offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7810" name="FLASH_PCROP1ER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1A_END</Name>
+									<Description>End offset of first PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+								<Bit>
+									<Name>PCROP_RDP</Name>
+									<Description/>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">PCROP zone is kept when RDP is decreased Partial Mass Erase done</Val>
+										<Val value="0x1">PCROP zone is erased when RDP is decreased Full Mass Erase done</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+							<Field>
+							<Parameters name="PCROP1BSR" size="0x4" address="0x1FFF7828"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_STRT</Name>
+									<Description>Start offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x200"	offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters name="PCROP1BER" size="0x4" address="0x1FFF7830"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_END</Name>
+									<Description>End offset of second PCROP zone in bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x6</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x200"	offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Write Protection</Name>
+						<Field>
+							<Parameters address="0x1FFF7818" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1A_STRT</Name>
+									<Description>Start offset of WRP zone A of bank 1. WRP1A_STRT contains the first page of the first WRP zone to protect</Description>
+
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1A_END</Name>
+									<Description>End offset of WRP zone A of bank 1. WRP1A_END contains the last page of the first WRP zone to protect.</Description>
+
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7820" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP1B_STRT</Name>
+									<Description>Start offset of WRP zone B of bank 1. WRP1B_START contains the first page of the second WRP zone to protect</Description>
+
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP1B_END</Name>
+									<Description>End offset of WRP zone B of bank 1. WRP1B_END contains the last page of the second WRP zone to protect</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>		
+					</Category>
+				<!--</Bank>
+				<Bank interface="Bootloader">
+					<Parameters address="0x1FFF7870" name="Bank 2" size="0x4"/>-->
+					<Category>
+						<Name>FLASH security</Name>
+						<Field>
+							<Parameters address="0x1FFF7870" name="FLASH_SECR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description>Used to force boot from user area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from Main Flash memory</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SEC_SIZE</Name>
+									<Description>Securable memory area size</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x5</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x456.xml

@@ -264,8 +264,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -626,8 +626,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>

tools/Data_Base/STM32_Prog_DB_0x458.xml

@@ -82,13 +82,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x460.xml

@@ -23,6 +23,7 @@
 			</Interface>
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader">
+			<Configurations>
 				<Configuration	number="0x0">
 					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
 				</Configuration>
@@ -32,6 +33,7 @@
 				<Configuration	number="0x2">
 					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
 				</Configuration>
+				</Configurations>
 			</Interface>
 		</Configurations>
 		<!-- Peripherals -->
@@ -63,6 +65,11 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x20000"/>
+				<BootloaderVersion address="0x1FFF6FFE"/>
+				<DBGMCU_CR address="0x40015804" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0x40015808" mask="0x1800"/>
+				<RCC_APB2ENR address="0x4002103C" mask="0x08000000"/>
+				<!--<CR address="0x40002C04" mask="0x000001FF"/>-->
 				<!-- Single Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 128 KB Embedded Flash" size="0x20000"/>
@@ -128,7 +135,7 @@
 				<Description/>
 				<Access>RW</Access>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022020" name="Bank 1" size="0x20"/>
+					<Parameters address="0x40022020" name="Bank 1" size="0x70"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -154,7 +161,7 @@
 						<Field>
 							<Parameters name="FLASH_OPTR" size="0x4" address="0x40022020"/>
 							<AssignedBits>
-								<Bit config="0,2">
+								<Bit number="0x0,0x2">
 									<Name>BOR_EN</Name>
 									<Description/>
 									<BitOffset>0x8</BitOffset>
@@ -165,30 +172,30 @@
 										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
-									<Name>BORF_LEV</Name>
+								<Bit number="0x0,0x2">
+									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x9</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
-										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
-										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
-										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
-									<Name>BORR_LEV</Name>
+								<Bit number="0x0,0x2">
+									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0xB</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
-										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
-										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
-										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
 							</AssignedBits>
@@ -283,8 +290,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -305,8 +312,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
-										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
+										<Val value="0x0">Boot from Flash if BOOT0 = 0, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 0, otherwise system memory</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -320,7 +327,7 @@
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit number="0x0,0x2">
 									<Name>NRST_MODE</Name>
 									<Description/>
 									<BitOffset>0x1B</BitOffset>
@@ -332,8 +339,8 @@
 										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
-								</Bit>
-								<Bit config="0,2">
+								</Bit>	
+								<Bit number="0x0,0x2">
 									<Name>IRHEN</Name>
 									<Description>Internal reset holder enable bit</Description>
 									<BitOffset>0x1D</BitOffset>
@@ -458,9 +465,6 @@
 							</AssignedBits>
 						</Field>
 					</Category>
-				</Bank>
-				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022080" name="Bank 2" size="0x4"/>
 					<Category>
 						<Name>FLASH security</Name>
 						<Field>
@@ -516,7 +520,7 @@
 						<Field>
 							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
 							<AssignedBits>
-								<Bit config="0,2">
+								<Bit number="0x0,0x2">
 									<Name>BOR_EN</Name>
 									<Description/>
 									<BitOffset>0x8</BitOffset>
@@ -527,30 +531,30 @@
 										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
-									<Name>BORF_LEV</Name>
+								<Bit number="0x0,0x2">
+									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x9</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
-										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
-										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
-										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
-									<Name>BORR_LEV</Name>
+								<Bit number="0x0,0x2">
+									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0xB</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
-										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
-										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
-										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
 							</AssignedBits>
@@ -645,8 +649,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -682,7 +686,7 @@
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
 								</Bit>	
-								<Bit config="0,2">
+                                <Bit number="0x0,0x2">
 									<Name>NRST_MODE</Name>
 									<Description/>
 									<BitOffset>0x1B</BitOffset>
@@ -694,8 +698,8 @@
 										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
-								</Bit>								
-								<Bit config="0,2">
+								</Bit>									
+								<Bit number="0x0,0x2">
 									<Name>IRHEN</Name>
 									<Description>Internal reset holder enable bit</Description>
 									<BitOffset>0x1D</BitOffset>

tools/Data_Base/STM32_Prog_DB_0x461.xml

@@ -43,6 +43,8 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x100000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<!-- 1MB dual Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 1 Mbytes Embedded Flash" size="0x100000"/>

tools/Data_Base/STM32_Prog_DB_0x462.xml

@@ -43,6 +43,8 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x80000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<!-- 512KB single Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 512 Kbytes Embedded Flash" size="0x80000"/>

tools/Data_Base/STM32_Prog_DB_0x463.xml

@@ -85,13 +85,13 @@
 				<Access>RW</Access>
 				<!-- 512 Bytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Parameters address="0x1FFF7800" name=" 512 Bytes Data OTP" size="0x210"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x200"/>
+							<Parameters address="0x1FFF7800" name="OTP" occurence="0x1" size="0x210"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x464.xml

@@ -43,6 +43,8 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x80000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<!-- 512KB single Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 128 Kbytes Embedded Flash" size="0x20000"/>

tools/Data_Base/STM32_Prog_DB_0x466.xml

@@ -13,24 +13,54 @@
 			<Interface name="JTAG_SWD">
 				<Configuration	number="0x0">
 					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x20"/> </ValueLine>
 				</Configuration>
 				<Configuration	number="0x1">
 					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x20"/> </ValueLine>
 				</Configuration>
 				<Configuration	number="0x2">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine> <!-- 32 kb-->
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x20"/> </ValueLine>
+				</Configuration>
+				<Configuration number="0x3">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x40"/> </ValueLine>
+				</Configuration>
+				<Configuration number="0x4">
+					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x40"/> </ValueLine>
+				</Configuration>
+				<Configuration number="0x5">
 					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x40"/> </ValueLine>
 				</Configuration>
 			</Interface>
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader">
 				<Configuration	number="0x0">
 					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x20"/> </ValueLine>
 				</Configuration>
 				<Configuration	number="0x1">
 					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x20"/> </ValueLine>
 				</Configuration>
 				<Configuration	number="0x2">
 					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x20"/> </ValueLine>
+				</Configuration>
+				<Configuration number="0x3">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x40"/> </ValueLine>
+				</Configuration>
+				<Configuration number="0x4">
+					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x40"/> </ValueLine>
+				</Configuration>
+				<Configuration number="0x5">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
+					<ValueLine> <ReadRegister address="0x1FFF75E0" mask="0xFF" value="0x40"/> </ValueLine>
 				</Configuration>
 			</Interface>
 		</Configurations>
@@ -56,26 +86,37 @@
 				</Configuration>
 			</Peripheral>
 			<!-- Embedded Flash -->
-			<Peripheral>
-				<Name>Embedded Flash</Name>
-				<Type>Storage</Type>
-				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
-				<ErasedValue>0xFF</ErasedValue>
-				<Access>RWE</Access>
-				<FlashSize address="0x1FFF75E0" default="0x10000"/>
-				<!-- Single Bank -->
-				<Configuration>
-					<Parameters address="0x08000000" name=" 64 KB Embedded Flash" size="0x10000"/>
-					<Description/>
-					<Organization>Single</Organization>
-					<Allignement>0x8</Allignement>
-					<Bank name="Bank 1">
-						<Field>
-							<Parameters address="0x08000000" name="sector0" occurence="0x20" size="0x800"/>
-						</Field>
-					</Bank>
-				</Configuration>
-			</Peripheral>
+				<Peripheral>
+					<Name>Embedded Flash</Name>
+					<Type>Storage</Type>
+					<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+					<ErasedValue>0xFF</ErasedValue>
+					<Access>RWE</Access>
+					<FlashSize address="0x1FFF75E0" default="0x10000"/>
+					<!-- Single Bank -->
+					<configuration config="0,1,2">
+							<Parameters address="0x08000000" name=" 64 KB Embedded Flash" size="0x10000"/>
+							<Description/>
+							<Organization>Single</Organization>
+							<Allignement>0x8</Allignement>
+							<Bank name="Bank 1">
+								<Field>
+									<Parameters address="0x08000000" name="sector0" occurence="0x10" size="0x800"/>
+								</Field>
+							</Bank>
+					</configuration>
+					<configuration config="3,4,5">
+							<Parameters address="0x08000000" name=" 64 KB Embedded Flash" size="0x10000"/>
+							<Description/>
+							<Organization>Single</Organization>
+							<Allignement>0x8</Allignement>
+							<Bank name="Bank 1">
+								<Field>
+									<Parameters address="0x08000000" name="sector0" occurence="0x20" size="0x800"/>
+								</Field>
+							</Bank>
+					</configuration>
+				</Peripheral>
 			<!-- OTP -->
 			<Peripheral>
 				<Name>OTP</Name>
@@ -128,7 +169,7 @@
 				<Description/>
 				<Access>RW</Access>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022020" name="Bank 1" size="0x20"/>
+					<Parameters address="0x40022020" name="Bank 1" size="0x6C"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -154,7 +195,7 @@
 						<Field>
 							<Parameters name="FLASH_OPTR" size="0x4" address="0x40022020"/>
 							<AssignedBits>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>BOR_EN</Name>
 									<Description/>
 									<BitOffset>0x8</BitOffset>
@@ -165,10 +206,10 @@
 										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
-									<BitOffset>0x9</BitOffset>
+									<BitOffset>0xB</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
@@ -178,10 +219,10 @@
 										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
-									<BitOffset>0xB</BitOffset>
+									<BitOffset>0x9</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
@@ -221,9 +262,8 @@
 										<Val value="0x1">No reset generated when entering Standby mode</Val>
 									</Values>
 								</Bit>
-								<Bit>
-									<Name>nRST_HDW</Name>
-									<Description/>
+								<Bit config="0,2,3,5">
+									<Name>nRST_SHDW</Name>
 									<BitOffset>0xF</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
@@ -283,8 +323,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -320,9 +360,8 @@
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
 								</Bit>				
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>NRST_MODE</Name>
-									<Description/>
 									<BitOffset>0x1B</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
@@ -333,7 +372,7 @@
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>IRHEN</Name>
 									<Description>Internal reset holder enable bit</Description>
 									<BitOffset>0x1D</BitOffset>
@@ -343,7 +382,29 @@
 										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
 										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
 									</Values>
-								</Bit>	
+								</Bit>
+								<Bit>
+									<Name>nSWAP_BANK</Name>
+									<Description>This bit selects the bank that is the subject of empty check upon boot</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Bank 1</Val>
+										<Val value="0x1">Bank 2</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DUAL_BANK</Name>
+									<Description>Dual-bank on 512Kbytes Flash memory devices</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">512Kbytes single-bank Flash memory, contiguous addresses in Bank 1</Val>
+										<Val value="0x1">512Kbytes dual-bank Flash memory</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -352,9 +413,9 @@
 						<Field>
 							<Parameters address="0x40022024" name="FLASH_PCROP1SR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP1A_STRT</Name>
-									<Description>Flash Area A PCROP start address</Description>
+									<Description>Flash Area A in Bank1 PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
@@ -365,15 +426,15 @@
 						<Field>
 							<Parameters address="0x40022028" name="FLASH_PCROP1ER" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP1A_END</Name>
-									<Description>Flash Area A PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<Description>Flash Area A in Bank1 PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000200"/>
 								</Bit>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP_RDP</Name>
 									<Description/>
 									<BitOffset>0x1F</BitOffset>
@@ -386,12 +447,38 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
+						<Field>
+							<Parameters address="0x40022044" name="FLASH_PCROP2ASR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2A_STRT</Name>
+									<Description>Flash Area A in Bank 2 PCROP start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022048" name="FLASH_PCROP2AER" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2A_END</Name>
+									<Description>Flash Area A in Bank 2 PCROP end address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
 						<Field>
 							<Parameters address="0x40022034" name="FLASH_PCROP1BSR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP1B_STRT</Name>
-									<Description>Flash Area B PCROP start address</Description>
+									<Description>Flash Area B in Bank1 PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
@@ -402,9 +489,35 @@
 						<Field>
 							<Parameters address="0x40022038" name="FLASH_PCROP1BER" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP1B_END</Name>
-									<Description>Flash Area B PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<Description>Flash Area B in Bank1 PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022054" name="FLASH_PCROP2BSR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2B_STRT</Name>
+									<Description>Flash Area B in Bank 2 PCROP start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022058" name="FLASH_PCROP2BER" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2B_END</Name>
+									<Description>Flash Area B in Bank 2 PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
@@ -457,16 +570,59 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
+						<Field>
+							<Parameters address="0x4002204C" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP2A_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2A_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022050" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP2B_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2B_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
 					</Category>
 				</Bank>
-				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022080" name="Bank 2" size="0x10"/>
+
+					<Bank interface="JTAG_SWD">
+					<Parameters address="0x40022080" name="Bank 2" size="0x4"/>
 					<Category>
-						<Name>FLASH security</Name>
+						<Name >FLASH security</Name>
 						<Field>
 							<Parameters address="0x40022080" name="FLASH_SECR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>BOOT_LOCK</Name>
 									<Description>used to force boot from user area</Description>
 									<BitOffset>0x10</BitOffset>
@@ -477,18 +633,27 @@
 										<Val value="0x1">Boot forced from Main Flash memory</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>SEC_SIZE</Name>
-									<Description>Securable memory area size</Description>
+									<Description>Securable memory area size, Bank 1</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="0,2,3,5">
+									<Name>SEC_SIZE2</Name>
+									<Description>Securable memory area size, Bank 2</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
-				</Bank>
+					</Bank>
+
 				<Bank interface="Bootloader">
 					<Parameters address="0x1FFF7800" name="Bank 1" size="0x34"/>
 					<Category>
@@ -516,7 +681,7 @@
 						<Field>
 							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
 							<AssignedBits>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>BOR_EN</Name>
 									<Description/>
 									<BitOffset>0x8</BitOffset>
@@ -527,10 +692,10 @@
 										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
-									<BitOffset>0x9</BitOffset>
+									<BitOffset>0xB</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
@@ -540,10 +705,10 @@
 										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
-									<BitOffset>0xB</BitOffset>
+									<BitOffset>0x9</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
@@ -583,7 +748,7 @@
 										<Val value="0x1">No reset generated when entering Standby mode</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>nRST_SHDW</Name>
 									<Description/>
 									<BitOffset>0xF</BitOffset>
@@ -645,8 +810,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -682,7 +847,7 @@
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
 								</Bit>				
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>NRST_MODE</Name>
 									<Description/>
 									<BitOffset>0x1B</BitOffset>
@@ -695,7 +860,7 @@
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
 								</Bit>
-								<Bit config="0,2">
+								<Bit config="0,2,3,5">
 									<Name>IRHEN</Name>
 									<Description>Internal reset holder enable bit</Description>
 									<BitOffset>0x1D</BitOffset>
@@ -705,7 +870,29 @@
 										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
 										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
 									</Values>
-								</Bit>	
+								</Bit>
+								<Bit>
+									<Name>nSWAP_BANK</Name>
+									<Description>This bit selects the bank that is the subject of empty check upon boot</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Bank 1</Val>
+										<Val value="0x1">Bank 2</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DUAL_BANK</Name>
+									<Description>Dual-bank on 512Kbytes Flash memory devices</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">512Kbytes single-bank Flash memory, contiguous addresses in Bank 1</Val>
+										<Val value="0x1">512Kbytes dual-bank Flash memory</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -714,7 +901,7 @@
 						<Field>
 							<Parameters address="0x1FFF7808" name="FLASH_PCROP1SR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP1A_STRT</Name>
 									<Description>Flash Area A PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
@@ -727,7 +914,7 @@
 						<Field>
 							<Parameters address="0x1FFF7810" name="FLASH_PCROP1ER" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP1A_END</Name>
 									<Description>Flash Area A PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
@@ -735,7 +922,7 @@
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000200"/>
 								</Bit>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>PCROP_RDP</Name>
 									<Description/>
 									<BitOffset>0x1F</BitOffset>
@@ -748,6 +935,84 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
+						<Field>
+							<Parameters address="0x1FFF7838" name="FLASH_PCROP2ASR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2A_STRT</Name>
+									<Description>Flash Area A in Bank 2 PCROP start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7840" name="FLASH_PCROP2AER" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2A_END</Name>
+									<Description>Flash Area A in Bank 2 PCROP end address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7828" name="FLASH_PCROP1BSR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP1B_STRT</Name>
+									<Description>Flash Area B in Bank1 PCROP start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7830" name="FLASH_PCROP1BER" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP1B_END</Name>
+									<Description>Flash Area B in Bank1 PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7858" name="FLASH_PCROP2BSR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2B_STRT</Name>
+									<Description>Flash Area B in Bank 2 PCROP start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7860" name="FLASH_PCROP2BER" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,2,3,5">
+									<Name>PCROP2B_END</Name>
+									<Description>Flash Area B in Bank 2 PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
 					</Category>
 					<Category>
 						<Name>Write Protection</Name>
@@ -793,6 +1058,48 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
+						<Field>
+							<Parameters address="0x1FFF7848" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP2A_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2A_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7850" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP2B_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2B_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
 					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
@@ -802,7 +1109,7 @@
 						<Field>
 							<Parameters address="0x1FFF7870" name="FLASH_SECR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>BOOT_LOCK</Name>
 									<Description>used to force boot from user area</Description>
 									<BitOffset>0x10</BitOffset>
@@ -813,9 +1120,17 @@
 										<Val value="0x1">Boot forced from Main Flash memory</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2,3,5">
 									<Name>SEC_SIZE</Name>
-									<Description>Securable memory area size</Description>
+									<Description>Securable memory area size, Bank 1</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="0,2,3,5">
+									<Name>SEC_SIZE2</Name>
+									<Description>Securable memory area size, Bank 2</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>

tools/Data_Base/STM32_Prog_DB_0x467.xml

@@ -72,7 +72,7 @@
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x80000"/>
 					<!-- 512K dual Bank -->
-				<Configuration config="0">
+				<Configuration number="0x0">
 					<Parameters address="0x08000000" name=" 512 KB Embedded Flash" size="0x080000"/>
 					<Description/>
 					<Organization>Dual</Organization>
@@ -313,6 +313,28 @@
 										<Val value="0x1">Software window watchdog</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>nSWAP_BANK</Name>
+									<Description/>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Bank 1</Val>
+										<Val value="0x1">Bank 2</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DUAL_BANK</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">256 Kbytes/512 Kbytes single-bank Flash memory(contiguous addresses in Bank 1)</Val>
+										<Val value="0x1">256 Kbytes/512 Kbytes dual-bank Flash memory</Val>
+									</Values>
+								</Bit>
 								<Bit>
 									<Name>RAM_PARITY_CHECK</Name>
 									<Description/>
@@ -320,8 +342,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -776,6 +798,28 @@
 										<Val value="0x1">Software window watchdog</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>nSWAP_BANK</Name>
+									<Description/>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Bank 1</Val>
+										<Val value="0x1">Bank 2</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DUAL_BANK</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">256 Kbytes/512 Kbytes single-bank Flash memory(contiguous addresses in Bank 1)</Val>
+										<Val value="0x1">256 Kbytes/512 Kbytes dual-bank Flash memory</Val>
+									</Values>
+								</Bit>
 								<Bit>
 									<Name>RAM_PARITY_CHECK</Name>
 									<Description/>
@@ -783,8 +827,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">SRAM2 parity check enable</Val>
-										<Val value="0x1">SRAM2 parity check disable</Val>
+										<Val value="0x0">SRAM parity check enable</Val>
+										<Val value="0x1">SRAM parity check disable</Val>
 									</Values>
 								</Bit>
 								<Bit>

tools/Data_Base/STM32_Prog_DB_0x468.xml

@@ -103,7 +103,7 @@
 				<Description/>
 				<Access>RW</Access>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022020" name="Bank 1" size="0x14"/>
+					<Parameters address="0x40022020" name="Bank 1" size="0x54"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -395,9 +395,6 @@
 							</AssignedBits>
 						</Field>
 					</Category>
-				</Bank>
-				<Bank interface="JTAG_SWD">
-				<Parameters address="0x40022070" name="Bank 2" size="0x4"/>
 					<Category>
 						<Name>Secure Protection</Name>
 						<Field>
@@ -426,7 +423,7 @@
 					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
-					<Parameters address="0x1FFF7800" name="Bank 1" size="0x24"/>
+					<Parameters address="0x1FFF7800" name="Bank 1" size="0x2C"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -723,9 +720,6 @@
 							</AssignedBits>
 						</Field>
 					</Category>
-				</Bank>
-				<Bank interface="Bootloader">
-					<Parameters address="0x1FFF7828" name="Bank 2" size="0x4"/>
 					<Category>
 						<Name>Secure Protection</Name>
 						<Field>

tools/Data_Base/STM32_Prog_DB_0x469.xml

@@ -24,10 +24,10 @@
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader">
 				<Configuration number="0x0">	
-					<DBANK reference="0x0"> <ReadRegister address="0x1FFF7800" mask="0x10000" value="0x0"/> </DBANK>
+					<DBANK reference="0x0"> <ReadRegister address="0x1FFF7800" mask="0x400000" value="0x0"/> </DBANK>
 				</Configuration>
 				<Configuration number="0x1">	
-					<DBANK reference="0x1"> <ReadRegister address="0x1FFF7800" mask="0x10000" value="0x10000"/> </DBANK>
+					<DBANK reference="0x1"> <ReadRegister address="0x1FFF7800" mask="0x400000" value="0x400000"/> </DBANK>
 				</Configuration>
 				<Configuration number="0x2">	
 					<dummy> <ReadRegister address="0x20000000" mask="0" value="0"/> </dummy>
@@ -127,12 +127,12 @@
 					<Allignement>0x4</Allignement>
 					<Bank name="Bank 1">
 						<Field>
-							<Parameters address="0x1FFF7800" name="Bank1" occurence="0x1" size="0x24"/>
+							<Parameters address="0x1FFF7800" name="Bank1" occurence="0x1" size="0x30"/>
 						</Field>
 					</Bank>
 					<Bank name="Bank 2">
 						<Field>
-							<Parameters address="0x1FFFF808" name="Bank2" occurence="0x1" size="0x1C"/>
+							<Parameters address="0x1FFFF800" name="Bank2" occurence="0x1" size="0x30"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x470.xml

@@ -105,6 +105,8 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x200000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<Configuration config="0,2,3,6,9"> <!-- 2MB Single Bank -->
 					<Parameters address="0x08000000" name=" 2 Mbyte Embedded Flash" size="0x200000"/>
 					<Description/>

tools/Data_Base/STM32_Prog_DB_0x471.xml

@@ -105,6 +105,8 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x100000"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<Configuration config="0,2,3,6,9"> <!-- 2MB Single Bank -->
 					<Parameters address="0x08000000" name=" 1 Mbyte Embedded Flash" size="0x100000"/>
 					<Description/>
@@ -426,7 +428,7 @@
 									<Name>PCROP1_STRT</Name>
 									<Description>Flash Bank 1 PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x10" offset="0x08000000"/>
 								</Bit>
@@ -434,7 +436,7 @@
 									<Name>PCROP1_STRT</Name>
 									<Description>Flash Bank 1 PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x8" offset="0x08000000"/>
 								</Bit>
@@ -447,7 +449,7 @@
 									<Name>PCROP1_END</Name>
 									<Description>Flash Bank 1 PCROP End address. Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x10" offset="0x08000000"/>
 								</Bit>
@@ -455,7 +457,7 @@
 									<Name>PCROP1_END</Name>
 									<Description>Flash Bank 1 PCROP End address. Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x8" offset="0x08000000"/>
 								</Bit>
@@ -482,7 +484,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -490,7 +492,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -498,7 +500,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -506,7 +508,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -519,7 +521,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -527,7 +529,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -535,7 +537,7 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -543,7 +545,7 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -671,7 +673,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08100000"/>
 								</Bit>
@@ -679,7 +681,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -687,7 +689,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08040000"/>
 								</Bit>
@@ -695,7 +697,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08100000"/>
 								</Bit>
@@ -703,7 +705,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08080000"/>
 								</Bit>
@@ -711,7 +713,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08040000"/>
 								</Bit>
@@ -719,7 +721,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08100000"/>
 								</Bit>
@@ -727,7 +729,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -735,7 +737,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08040000"/>
 								</Bit>
@@ -743,7 +745,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08100000"/>
 								</Bit>
@@ -751,7 +753,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08080000"/>
 								</Bit>
@@ -759,7 +761,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08040000"/>
 								</Bit>
@@ -1095,7 +1097,7 @@
 									<Name>PCROP1_STRT</Name>
 									<Description>Flash Bank 1 PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x10" offset="0x08000000"/>
 								</Bit>
@@ -1103,7 +1105,7 @@
 									<Name>PCROP1_STRT</Name>
 									<Description>Flash Bank 1 PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x8" offset="0x08000000"/>
 								</Bit>
@@ -1116,7 +1118,7 @@
 									<Name>PCROP1_END</Name>
 									<Description>Flash Bank 1 PCROP End address. Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x10" offset="0x08000000"/>
 								</Bit>
@@ -1124,7 +1126,7 @@
 									<Name>PCROP1_END</Name>
 									<Description>Flash Bank 1 PCROP End address. Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
+									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x8" offset="0x08000000"/>
 								</Bit>
@@ -1151,7 +1153,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1159,7 +1161,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -1167,7 +1169,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1175,7 +1177,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -1188,7 +1190,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1196,7 +1198,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -1204,7 +1206,7 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1212,7 +1214,7 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -1276,7 +1278,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1284,7 +1286,7 @@
 									<Name>WRP2A_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08080000"/>
 								</Bit>
@@ -1292,7 +1294,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1300,7 +1302,7 @@
 									<Name>WRP2A_END</Name>
 									<Description>The address of last page of the Bank 2 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08080000"/>
 								</Bit>
@@ -1313,7 +1315,7 @@
 									<Name>WRP2B_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1321,7 +1323,7 @@
 									<Name>WRP2B_STRT</Name>
 									<Description>The address of first page of the Bank 2 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08080000"/>
 								</Bit>
@@ -1329,7 +1331,7 @@
 									<Name>WRP2B_END</Name>
 									<Description>The address of last page of the Bank 2 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
@@ -1337,7 +1339,7 @@
 									<Name>WRP2B_END</Name>
 									<Description>The address of last page of the Bank 2 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08080000"/>
 								</Bit>

tools/Data_Base/STM32_Prog_DB_0x474.xml

@@ -0,0 +1,2381 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x474</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<CPU>Cortex-M33</CPU>
+		<Name>STM32H50x</Name>
+		<Series>STM32H5</Series>
+		<Description>ARM 32-bit Cortex-M33 based device</Description>
+		<Configurations>
+			<!-- JTAG_SWD Interface -->
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0">	<!-- dual Bank non secure -->
+					
+					<TZEN reference="0x0"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xC3000000"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x1">	<!-- Dual Bank  secure -->
+					
+					<TZEN reference="0x1"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xB4000000"/> </TZEN>
+				</Configuration>
+			
+			</Interface>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader">
+				
+				<Configuration number="0x2">	<!-- Dual Bank Secure-->
+				
+				<TZEN reference="0x1"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xB4000000"/> </TZEN>
+				</Configuration>
+				
+				<Configuration number="0x3">	<!-- Dual Bank non Secure-->
+					
+					<TZEN reference="0x0"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xC3000000"/> </TZEN>
+				</Configuration>
+			</Interface>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<!-- Embedded SRAM -->
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- 96 KB -->
+				<Configuration config="0,3">
+					<Parameters address="0x20000000" name="SRAM" size="0x8000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x8000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="1,2">
+					<Parameters address="0x30000000" name="SRAM" size="0x8000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x30000000" name="SRAM" occurence="0x1" size="0x8000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Embedded Flash -->
+			<Peripheral>
+				<Name>Embedded Flash</Name>
+				<Type>Storage</Type>
+				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<FlashSize address="0x08FFF80C" default="0x20000"/>
+				<BootloaderVersion address="0x0BF8FFFE"/>
+				<Configuration config="0,3"> <!-- dual Bank nn secure -->
+					<Parameters address="0x08000000" name=" 128Kbyte Embedded Flash" size="0x20000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x8" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08010000" name="sector8" occurence="0x8" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="1,2"> <!-- dual Bank secure -->
+					<Parameters address="0x0c000000" name=" 2 Mbyte Embedded Flash" size="0x20000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0c000000" name="sector0" occurence="0x10" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x0c010000" name="sector8" occurence="0x10" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Data EEPROM -->
+			<Peripheral>
+				<Name>Data EEPROM</Name>
+				<Type>Storage</Type>
+				<Description>The Data EEPROM memory block. It contains user data.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- Dummy Config Just to avoid crash when TZEN=0 -->
+				<Configuration config="0,1,3">
+					<Parameters address="0x0C000000" name=" 2 Mbyte Data EEPROM" size="0x200000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0C000000" name="sector0" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x0C100000" name="sector128" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- OTP -->
+			<Peripheral>
+				<Name>OTP</Name>
+				<Type>Storage</Type>
+				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 2 KBytes single bank -->
+				<Configuration>
+					<Parameters address="0x08FFF000" name=" 2 KBytes Data OTP" size="0x800"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x2</Allignement>
+					<Bank name="OTP">
+						<Field>
+							<Parameters address="0x08FFF000" name="OTP" occurence="0x1" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Option Bytes -->
+			<Peripheral>
+				<Name>Option Bytes</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Configuration config="0">
+					<Bank interface="JTAG_SWD">
+						<Parameters address="0x40022050" name="Bank 1" size="0x70"/>
+						<Category>
+							<Name>Product state</Name>
+							<Field>
+								<Parameters address="0x40022050" name="CUR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>PRODUCT_STATE</Name>
+										<Description>Life state code.</Description>
+										<BitOffset>0x8</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>R</Access>
+										<Values>
+										<Val value="0xED">Open</Val>
+										<Val value="0x17">Provisioning</Val>
+										<Val value="0x2E">Provisioned</Val>
+										<Val value="0x72">Closed</Val>
+										<Val value="0x5C">Locked</Val>
+										<Val value="0x9A">Regression</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="PRG" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>PRODUCT_STATE</Name>
+										<Description>Life state code.</Description>
+										<BitOffset>0x8</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>W</Access>
+										<Values>
+										<Val value="0xED">Open</Val>
+										<Val value="0x17">Provisioning</Val>
+										<Val value="0x2E">Provisioned</Val>
+										<Val value="0x72">Closed</Val>
+										<Val value="0x5C">Locked</Val>
+										<Val value="0x9A">Regression</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>BOR Level</Name>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BORH_EN</Name>
+										<Description>Brownout high enable configuration bit</Description>
+										<BitOffset>0x2</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">disabled</Val>
+										<Val value="0x1">enabled</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BORH_EN</Name>
+										<Description>Brownout high enable configuration bit</Description>
+										<BitOffset>0x2</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">disabled</Val>
+										<Val value="0x1">enabled</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BOR_LEV</Name>
+										<Description>Brownout level option status bit.</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x2</BitWidth>
+										<Access>R</Access>
+										<Values>
+											<Val value="0x0">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+											<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+											<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+											<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BOR_LEV</Name>
+										<Description>Brownout level option status bit.</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x2</BitWidth>
+										<Access>W</Access>
+										<Values>
+											<Val value="0x0">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+											<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+											<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+											<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>User Configuration</Name>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IO_VDDIO2_HSLV</Name>
+										<Description>High-speed IO at low VDDIO2 voltage status bit.</Description>
+										<BitOffset>0x11</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.7 V)</Val>
+										<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.7 V)</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IO_VDDIO2_HSLV</Name>
+										<Description>High-speed IO at low VDDIO2 voltage status bit.</Description>
+										<BitOffset>0x11</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.7 V)</Val>
+										<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.7 V)</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IO_VDD_HSLV</Name>
+										<Description>High-speed IO at low VDD voltage status bit.</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.7 V)</Val>
+										<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.7 V)</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IO_VDD_HSLV</Name>
+										<Description>High-speed IO at low VDD voltage status bit.</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.7 V)</Val>
+										<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.7 V)</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IWDG_STDBY</Name>
+										<Description>Standby mode freeze option status bit.</Description>
+										<BitOffset>0x15</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">Independent watchdog frozen in system standby mode</Val>
+										<Val value="0x1">Independent watchdog keep running in system standby mode.</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IWDG_STDBY</Name>
+										<Description>Standby mode freeze option status bit.</Description>
+										<BitOffset>0x15</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">Independent watchdog frozen in system standby mode</Val>
+										<Val value="0x1">Independent watchdog keep running in system standby mode.</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IWDG_STOP</Name>
+										<Description>Stop mode freeze option status bit.</Description>
+										<BitOffset>0x14</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+										<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IWDG_STOP</Name>
+										<Description>Stop mode freeze option status bit.</Description>
+										<BitOffset>0x14</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+										<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>							
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>SWAP_BANK</Name>
+										<Description>Bank swapping option status bit.</Description>
+										<BitOffset>0x1F</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+										<Val value="0x1">bank 1 and bank 2 swapped</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>SWAP_BANK</Name>
+										<Description>Bank swapping option status bit.</Description>
+										<BitOffset>0x1F</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+										<Val value="0x1">bank 1 and bank 2 swapped</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IWDG_SW</Name>
+										<Description>IWDG control mode option status bit.</Description>
+										<BitOffset>0x3</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+										<Val value="0x1">IWDG watchdog is controlled by software</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>IWDG_SW</Name>
+										<Description>IWDG control mode option status bit.</Description>
+										<BitOffset>0x3</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+										<Val value="0x1">IWDG watchdog is controlled by software</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>WWDG_SW</Name>
+										<Description>WWDG control mode option status bit.</Description>
+										<BitOffset>0x4</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">WWDG watchdog is controlled by hardware</Val>
+										<Val value="0x1">WWDG watchdog is controlled by software</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>WWDG_SW</Name>
+										<Description>WWDG control mode option status bit.</Description>
+										<BitOffset>0x4</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">WWDG watchdog is controlled by hardware</Val>
+										<Val value="0x1">WWDG watchdog is controlled by software</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>NRST_STOP</Name>
+										<Description>Core domain Stop entry reset option status bit.</Description>
+										<BitOffset>0x6</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">a reset is generated when entering Stop mode on core domain</Val>
+										<Val value="0x1">no reset generated when entering Stop mode on core domain</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>NRST_STOP</Name>
+										<Description>Core domain Stop entry reset option status bit.</Description>
+										<BitOffset>0x6</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">a reset is generated when entering Stop mode on core domain</Val>
+										<Val value="0x1">no reset generated when entering Stop mode on core domain</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>NRST_STDBY</Name>
+										<Description>Core domain Standby entry reset option status bit.</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+										<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+										<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>NRST_STDBY</Name>
+										<Description>Core domain Standby entry reset option status bit.</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+										<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+										<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+					<Parameters address="0x40022070" name="Bank 2" size="0x8"/>
+					<Category>
+							<Name>User Configuration 2</Name>
+						<Field>
+								<Parameters address="0x40022070" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+							<Bit>
+									<Name>SRAM1_ECC</Name>
+									<Description>ECC in SRAM1 region configuration bit</Description>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM1 ECC check enabled </Val>
+										<Val value="0x1">SRAM1 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_RST</Name>
+									<Description>SRAM1 erase upon system reset</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM1 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled </Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BKPRAM ECC check enabled </Val>
+										<Val value="0x1">BKPRAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 erase when system reset</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erase when system reset occurs</Val>
+										<Val value="0x1">SRAM2 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+						</Field>
+							<Field>
+								<Parameters address="0x40022074" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit>
+									<Name>SRAM1_ECC</Name>
+									<Description>ECC in SRAM1 region configuration bit</Description>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM1 ECC check enabled </Val>
+										<Val value="0x1">SRAM1 ECC check disabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+									<Name>SRAM1_RST</Name>
+									<Description>SRAM1 erase upon system reset</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM1 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled </Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">BKPRAM ECC check enabled </Val>
+										<Val value="0x1">BKPRAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 erase when system reset</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erase when system reset occurs</Val>
+										<Val value="0x1">SRAM2 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x40022080" name="Bank 3" size="0x8"/>
+							<Category>
+								<Name>Boot Configuration</Name>
+								<Field>
+									<Parameters address="0x40022080" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>NSBOOTADD</Name>
+									<Description>Unique Boot Entry Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x18</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x100" offset="0x00000000"/>
+									</Bit>
+									<Bit>
+									<Name>NSBOOT_LOCK</Name>
+									<Description>A field locking the values of SWAP_BANK, and NSBOOTADD settings.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0xC3">The SWAP_BANK and NSBOOTADD can still be modified following their individual rules.</Val>
+										<Val value="0xB4">The NSBOOTADD and SWAP_BANK are frozen.</Val>
+									</Values>
+									</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x40022084" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>NSBOOTADD</Name>
+									<Description>Unique Boot Entry Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x18</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x100" offset="0x00000000"/>
+									</Bit>
+									<Bit>
+									<Name>NSBOOT_LOCK</Name>
+									<Description>A field locking the values of SWAP_BANK, and NSBOOTADD settings.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0xC3">The SWAP_BANK and NSBOOTADD can still be modified following their individual rules.</Val>
+										<Val value="0xB4">The NSBOOTADD and SWAP_BANK are frozen.</Val>
+									</Values>
+									</Bit>
+									</AssignedBits>
+								</Field>
+								
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400220E8" name="Bank 4" size="0x8"/>
+							<Category>
+							<Name>Write sector group protection 1</Name>
+								<Field>
+									<Parameters address="0x400220E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400220EC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400221E8" name="Bank 5" size="0x8"/>
+
+							<Category>
+							<Name>Write sector group protection 2</Name>
+								<Field>
+									<Parameters address="0x400221E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08010000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400221EC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08010000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x40022090" name="Bank 6" size="0x8"/>
+							<Category>
+							<Name>OTP write protection</Name>
+								<Field>
+									<Parameters address="0x40022090" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x40022094" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400220F8" name="Bank 10" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 1</Name>
+								<Field>
+									<Parameters address="0x400220F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>Bank 1 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>Bank 1 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400220FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>Bank 1 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>Bank 1 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400221F8" name="Bank 11" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 2</Name>
+								<Field>
+									<Parameters address="0x400221F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>Bank 2 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>Bank 2 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400221FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>Bank 2 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>Bank 2 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+				</Configuration>
+				<Configuration config="1">
+					<Bank interface="JTAG_SWD">
+						<Parameters address="0x50022050" name="Bank 1" size="0x70"/>
+						<Category>
+						<Name>Product state</Name>
+						<Field>
+							<Parameters address="0x50022050" name="CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+									<Val value="0xED">Open</Val>
+									<Val value="0x17">Provisioning</Val>
+									<Val value="0x2E">Provisioned</Val>
+									<Val value="0x72">Closed</Val>
+									<Val value="0x5C">Locked</Val>
+									<Val value="0x9A">Regression</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50022054" name="PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+									<Val value="0xED">Open</Val>
+									<Val value="0x17">Provisioning</Val>
+									<Val value="0x2E">Provisioned</Val>
+									<Val value="0x72">Closed</Val>
+									<Val value="0x5C">Locked</Val>
+									<Val value="0x9A">Regression</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+						<Category>
+						<Name>BOR Level</Name>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BORH_EN</Name>
+									<Description>Brownout high enable configuration bit</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">disabled</Val>
+									<Val value="0x1">enabled</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BORH_EN</Name>
+									<Description>Brownout high enable configuration bit</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">disabled</Val>
+									<Val value="0x1">enabled</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+					<Category>
+						<Name>User Configuration</Name>
+							<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage status bit.</Description>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage status bit.</Description>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description>Standby mode freeze option status bit.</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Independent watchdog frozen in system standby mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system standby mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description>Standby mode freeze option status bit.</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Independent watchdog frozen in system standby mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system standby mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>WWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">WWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">WWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>WWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">WWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">WWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain Stop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering Stop mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Stop mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain Stop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering Stop mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Stop mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDBY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDBY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+			
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+					<Parameters address="0x50022070" name="Bank 2" size="0x10"/>
+					<Category>
+							<Name>User Configuration 2</Name>
+						<Field>
+								<Parameters address="0x50022070" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SRAM1_ECC</Name>
+									<Description>ECC in SRAM1 region configuration bit</Description>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM1 ECC check enabled </Val>
+										<Val value="0x1">SRAM1 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_RST</Name>
+									<Description>SRAM1 erase upon system reset</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM1 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>	
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled </Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BKPRAM ECC check enabled </Val>
+										<Val value="0x1">BKPRAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 erase when system reset</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erase when system reset occurs</Val>
+										<Val value="0x1">SRAM2 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x50022074" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SRAM1_ECC</Name>
+									<Description>ECC in SRAM1 region configuration bit</Description>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM1 ECC check enabled </Val>
+										<Val value="0x1">SRAM1 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_RST</Name>
+									<Description>SRAM1 erase upon system reset</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM1 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled </Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">BKPRAM ECC check enabled </Val>
+										<Val value="0x1">BKPRAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 erase when system reset</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erase when system reset occurs</Val>
+										<Val value="0x1">SRAM2 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x50022080" name="Bank 3" size="0x8"/>
+							<Category>
+								<Name>Boot Configuration</Name>
+								<Field>
+									<Parameters address="0x50022080" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>NSBOOTADD</Name>
+									<Description>Unique Boot Entry Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x18</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x100" offset="0x0"/>
+									</Bit>
+									<Bit>
+									<Name>NSBOOT_LOCK</Name>
+									<Description>A field locking the values of SWAP_BANK, and NSBOOTADD settings.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0xC3">The SWAP_BANK and NSBOOTADD can still be modified following their individual rules.</Val>
+										<Val value="0xB4">The NSBOOTADD and SWAP_BANK are frozen.</Val>
+									</Values>
+									</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x50022084" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>NSBOOTADD</Name>
+									<Description>Unique Boot Entry Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x18</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x100" offset="0x00000000"/>
+									</Bit>
+									<Bit>
+									<Name>NSBOOT_LOCK</Name>
+									<Description>A field locking the values of SWAP_BANK, and NSBOOTADD settings.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0xC3">The SWAP_BANK and NSBOOTADD can still be modified following their individual rules.</Val>
+										<Val value="0xB4">The NSBOOTADD and SWAP_BANK are frozen.</Val>
+									</Values>
+									</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500220E8" name="Bank 4" size="0x8"/>
+							<Category>
+							<Name>Write sector group protection 1</Name>
+								<Field>
+									<Parameters address="0x500220E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500220EC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500221E8" name="Bank 5" size="0x8"/>
+							
+							<Category>
+							<Name>Write sector group protection 2</Name>
+								<Field>
+									<Parameters address="0x500221E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500221EC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x50022090" name="Bank 6" size="0x8"/>
+							<Category>
+							<Name>OTP write protection</Name>
+								<Field>
+									<Parameters address="0x50022090" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x50022094" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500220F8" name="Bank 10" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 1</Name>
+								<Field>
+									<Parameters address="0x500220F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>Bank 1 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>Bank 1 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500220FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>Bank 1 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>Bank 1 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500221F8" name="Bank 11" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 2</Name>
+								<Field>
+									<Parameters address="0x500221F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>Bank 2 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>Bank 2 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500221FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>Bank 2 HDP barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>Bank 2 HDP barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+				</Configuration>
+				<Bank interface="Bootloader">
+					<Parameters address="0x40022050" name="Bank 1" size="0xB0"/>
+					<Category>
+						<Name>Product state</Name>
+						<Field>
+							<Parameters address="0x40022050" name="CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+									<Val value="0xED">Open</Val>
+									<Val value="0x17">Provisioning</Val>
+									<Val value="0x2E">Provisioned</Val>
+									<Val value="0x72">Closed</Val>
+									<Val value="0x5C">Locked</Val>
+									<Val value="0x9A">Regression</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022054" name="PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+									<Val value="0xED">Open</Val>
+									<Val value="0x17">Provisioning</Val>
+									<Val value="0x2E">Provisioned</Val>
+									<Val value="0x72">Closed</Val>
+									<Val value="0x5C">Locked</Val>
+									<Val value="0x9A">Regression</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BORH_EN</Name>
+									<Description>Brownout high enable configuration bit</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">disabled</Val>
+									<Val value="0x1">enabled</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BORH_EN</Name>
+									<Description>Brownout high enable configuration bit</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">disabled</Val>
+									<Val value="0x1">enabled</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage status bit.</Description>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage status bit.</Description>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.7 V)</Val>
+									<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.7 V)</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description>Standby mode freeze option status bit.</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Independent watchdog frozen in system standby mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system standby mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description>Standby mode freeze option status bit.</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Independent watchdog frozen in system standby mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system standby mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>WWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">WWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">WWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>WWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">WWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">WWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain Stop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering Stop mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Stop mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain Stop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering Stop mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Stop mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDBY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDBY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration 2</Name>
+						<Field>
+							<Parameters address="0x40022070" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SRAM1_ECC</Name>
+									<Description>ECC in SRAM1 region configuration bit</Description>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM1 ECC check enabled </Val>
+										<Val value="0x1">SRAM1 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_RST</Name>
+									<Description>SRAM1 erase upon system reset</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM1 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled </Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BKPRAM ECC check enabled </Val>
+										<Val value="0x1">BKPRAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 erase when system reset</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erase when system reset occurs</Val>
+										<Val value="0x1">SRAM2 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022074" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SRAM1_ECC</Name>
+									<Description>ECC in SRAM1 region configuration bit</Description>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM1 ECC check enabled </Val>
+										<Val value="0x1">SRAM1 ECC check disabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+									<Name>SRAM1_RST</Name>
+									<Description>SRAM1 erase upon system reset</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM1 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled </Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">BKPRAM ECC check enabled </Val>
+										<Val value="0x1">BKPRAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 erase when system reset</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erase when system reset occurs</Val>
+										<Val value="0x1">SRAM2 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Boot Configuration</Name>
+						<Field>
+							<Parameters address="0x40022080" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NSBOOTADD</Name>
+									<Description>Unique Boot Entry Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x18</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x100" offset="0x00000000"/>
+								</Bit>
+								<Bit>
+									<Name>NSBOOT_LOCK</Name>
+									<Description>A field locking the values of SWAP_BANK, and NSBOOTADD settings.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0xC3">The SWAP_BANK and NSBOOTADD can still be modified following their individual rules.</Val>
+										<Val value="0xB4">The NSBOOTADD and SWAP_BANK are frozen.</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022084" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NSBOOTADD</Name>
+									<Description>Unique Boot Entry Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x18</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x100" offset="0x00000000"/>
+								</Bit>
+								<Bit>
+									<Name>NSBOOT_LOCK</Name>
+									<Description>A field locking the values of SWAP_BANK, and NSBOOTADD settings.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0xC3">The SWAP_BANK and NSBOOTADD can still be modified following their individual rules.</Val>
+										<Val value="0xB4">The NSBOOTADD and SWAP_BANK are frozen.</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+					<Name>OTP write protection</Name>
+						<Field>
+							<Parameters address="0x40022090" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>LOCKBL</Name>
+									<Description>OTP Block Lock</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022094" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>LOCKBL</Name>
+									<Description>OTP Block Lock</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+					<Name>Write sector group protection 1</Name>
+						<Field>
+							<Parameters address="0x400220E8" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRPSGn1</Name>
+									<Description>Bank 1 sector group protection option status byte</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x400220EC" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRPSGn1</Name>
+									<Description>Bank 1 sector group protection option status byte</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+					<Name>Flash HDP bank 1</Name>
+						<Field>
+							<Parameters address="0x400220F8" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>HDP1_STRT</Name>
+									<Description>Bank 1 HDP barrier start set in number of 8kb sectors</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+								<Bit>
+									<Name>HDP1_END</Name>
+									<Description>Bank 1 HDP barrier end set in number of 8kb sectors</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x400220FC" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>HDP1_STRT</Name>
+									<Description>Bank 1 HDP barrier start set in number of 8kb sectors</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+								<Bit>
+									<Name>HDP1_END</Name>
+									<Description>Bank 1 HDP barrier end set in number of 8kb sectors</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+				<Bank interface="Bootloader">
+					<Parameters address="0x400221E8" name="Bank 2" size="0x18"/>
+					<Category>
+						<Name>Write sector group protection 2</Name>
+						<Field>
+							<Parameters address="0x400221E8" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRPSGn2</Name>
+									<Description>Bank 2 sector group protection option status byte</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x08010000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x400221EC" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRPSGn2</Name>
+									<Description>Bank 2 sector group protection option status byte</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x08010000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Flash HDP bank 2</Name>
+						<Field>
+							<Parameters address="0x400221F8" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>HDP2_STRT</Name>
+									<Description>Bank 2 HDP barrier start set in number of 8kb sectors</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+								<Bit>
+									<Name>HDP2_END</Name>
+									<Description>Bank 2 HDP barrier end set in number of 8kb sectors</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x400221FC" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>HDP2_STRT</Name>
+									<Description>Bank 2 HDP barrier start set in number of 8kb sectors</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+								<Bit>
+									<Name>HDP2_END</Name>
+									<Description>Bank 2 HDP barrier end set in number of 8kb sectors</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x00000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x476.xml

@@ -0,0 +1,2781 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x476</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<CPU>Cortex-M33</CPU>
+		<Name>STM32U5Fx</Name>
+		<Series>STM32U5</Series>
+		<Description>ARM 32-bit Cortex-M33 based device</Description>
+		<Configurations>
+			<!-- JTAG_SWD Interface -->
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0">	<!-- Single Bank non secure -->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
+					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x1">	<!-- Dual Bank non secure -->
+					<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
+					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x2">	<!-- Single Bank secure + RDP=0xAA -->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+					<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>
+				</Configuration>
+				<Configuration number="0x3">	<!-- Dual Bank secure + RDP=0xAA -->
+					<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+					<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>
+				</Configuration>
+				<Configuration number="0xA">	<!-- Single Bank  + RDP=0x55 -->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
+					<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x00000055"/> </RDP>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+				</Configuration>
+				<Configuration number="0xB">	<!-- Dual Bank + RDP=0x55 -->
+					<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
+					<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x00000055"/> </RDP>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x4">	<!-- Single Bank secure -->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x5">	<!-- Dual Bank secure -->
+					<DBANK reference="0x1"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+				</Configuration>
+			</Interface>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader">
+				<Configuration number="0x6">	<!-- Single Bank-->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
+					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x7">	<!-- Dual Bank-->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
+					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x8">	<!-- Single Bank secure-->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x0"/> </DBANK>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+					<!--<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>-->
+				</Configuration>
+				<Configuration number="0x9">	<!-- Dual Bank seure-->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x00200000" value="0x00200000"/> </DBANK>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+					<!--<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>-->
+				</Configuration>
+			</Interface>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<!-- Embedded SRAM -->
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- 96 KB -->
+				<Configuration config="0,1,6,7,8,9,10,11">
+					<Parameters address="0x20000000" name="SRAM" size="0x8000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x8000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="2,3,4,5">
+					<Parameters address="0x30000000" name="SRAM" size="0x8000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x30000000" name="SRAM" occurence="0x1" size="0x8000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Embedded Flash -->
+			<Peripheral>
+				<Name>Embedded Flash</Name>
+				<Type>Storage</Type>
+				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<FlashSize address="0x0BFA0764" default="0x400000"/>
+				<BootloaderVersion address="0x0BF99EFE"/>
+				<DBGMCU_CR address="0xE0044004" mask="0x06"/>
+				<DBGMCU_APB1_FZ address="0xE0044008" mask="0x1800"/> 
+				<Configuration config="0,6,10"> <!-- Single Bank -->
+					<Parameters address="0x08000000" name=" 4096 Kbyte Embedded Flash" size="0x400000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x100" size="0x4000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="1,7,11"> <!-- dual Bank -->
+					<Parameters address="0x08000000" name=" 4 Mbyte Embedded Flash" size="0x400000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08200000" name="sector256" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="2,4,8"> <!-- Single Bank secure -->
+					<Parameters address="0x0C000000" name=" 4 Mbyte Embedded Flash" size="0x400000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0c000000" name="sector0" occurence="0x100" size="0x4000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="3,5,9"> <!-- dual Bank secure -->
+					<Parameters address="0x0c000000" name=" 4 Mbyte Embedded Flash" size="0x400000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0c000000" name="sector0" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x0c200000" name="sector256" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Data EEPROM -->
+			<Peripheral>
+				<Name>Data EEPROM</Name>
+				<Type>Storage</Type>
+				<Description>The Data EEPROM memory block. It contains user data.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<Configuration config="2,4,7,9,10">
+					<Parameters address="0x08000000" name=" 4 Mbyte Data EEPROM" size="0x400000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x100" size="0x4000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="3,5,6,8,11">
+					<Parameters address="0x08000000" name=" 2 Mbyte Data EEPROM" size="0x400000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08200000" name="sector256" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<!-- Dummy Config Just to avoid crash when TZEN=0 -->
+				<Configuration config="1">
+					<Parameters address="0x0C000000" name=" 4 Mbyte Data EEPROM" size="0x400000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0C000000" name="sector0" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x0C200000" name="sector256" occurence="0x100" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- OTP -->
+			<Peripheral>
+				<Name>OTP</Name>
+				<Type>Storage</Type>
+				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 512 Bytes single bank -->
+				<Configuration>
+					<Parameters address="0x0BFA0000" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="OTP">
+						<Field>
+							<Parameters address="0x0BFA0000" name="OTP" occurence="0x1" size="0x200"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Option Bytes -->
+			<Peripheral>
+				<Name>Option Bytes</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Configuration config="0,1,10,11">
+				<Bank interface="JTAG_SWD"> <!--   Bank 1: address="0x40022040" name="Bank 1" size="0x20" -->
+						<Parameters address="0x40022040" name="Bank 1" size="0x20"/>
+					<Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0xDC">Level 1, read protection of memories</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+										<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+										<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+										<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+										<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+							<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneously</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Global TrustZone security disabled</Val>
+										<Val value="0x1">Global TrustZone security enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_SHDW</Name>
+									<Description/>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1345_RST</Name>
+									<Description>SRAM1, SRAM3, SRAM4  and SRAM5 erase upon system reset</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description/>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
+										<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DBANK</Name>
+									<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Single bank Flash with contiguous address in bank 1</Val>
+										<Val value="0x1">Dual-bank Flash with contiguous addresses</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>SRAM2 parity check enable</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Backup RAM ECC check enabled</Val>
+										<Val value="0x1">Backup RAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>SRAM3 ECC detection and correction enable</Description>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM3 ECC check enabled</Val>
+										<Val value="0x1">SRAM3 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>SRAM2 ECC detection and correction enable</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled</Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 Erase when system reset</Description>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nSWBOOT0</Name>
+									<Description>Software BOOT0</Description>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+										<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description>nBOOT0 option bit</Description>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0 = 0</Val>
+										<Val value="0x1">nBOOT0 = 1</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>PA15_PUPEN</Name>
+									<Description>PA15 pull-up enable</Description>
+									<BitOffset>0x1C</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
+										<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage configuration bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
+									<BitOffset>0x1E</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+							<Name>Boot Configuration</Name>
+							<Field>
+								<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					<Category>
+							<Name>Write Protection 1</Name>
+						<Field>
+								<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit config="0,10">
+										<Name>WRP1A_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="1,11">
+										<Name>WRP1A_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="0,10">
+										<Name>WRP1A_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="1,11">
+										<Name>WRP1A_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit>
+									<Name>UNLOCK_1A</Name>
+									<Description>Bank 1 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1A start and end pages locked</Val>
+										<Val value="0x1">WRP1A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
+								<AssignedBits>
+									<Bit config="0,10">
+										<Name>WRP1B_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="1,11">
+										<Name>WRP1B_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="0,10">
+										<Name>WRP1B_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="1,11">
+										<Name>WRP1B_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1B</Name>
+									<Description>Bank 1 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1B start and end pages locked</Val>
+										<Val value="0x1">WRP1B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD"> <!--   Bank 2: address="0x40022068" name="Bank 2" size="0x8" -->
+							<Parameters address="0x40022068" name="Bank 2" size="0x8"/>
+							<Category>
+								<Name>Write Protection 2</Name>
+							<Field>
+									<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+										<Bit config="0,10">
+											<Name>WRP2A_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="1,11">
+									<Name>WRP2A_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+									<Bit config="0,10">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+										<Bit config="1,11">
+											<Name>WRP2A_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+								<Bit>
+									<Name>UNLOCK_2A</Name>
+									<Description>Bank 2 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2A start and end pages locked</Val>
+										<Val value="0x1">WRP2A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit config="0,10">
+											<Name>WRP2B_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+										</Bit>
+										<Bit config="1,11">
+											<Name>WRP2B_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+										<Bit config="0,10">
+											<Name>WRP2B_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+										</Bit>
+										<Bit config="1,11">
+											<Name>WRP2B_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+									<Bit>
+									<Name>UNLOCK_2B</Name>
+									<Description>Bank 2 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2B start and end pages locked</Val>
+										<Val value="0x1">WRP2B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+				</Configuration>
+				<Configuration config="2,3">
+					<Bank interface="JTAG_SWD"> <!--   Bank 1: address="0x50022040" name="Bank 1" size="0x28" -->
+						<Parameters address="0x50022040" name="Bank 1" size="0x20"/>
+						<Category>
+							<Name>Read Out Protection</Name>
+							<Field>
+								<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>RDP</Name>
+										<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0xAA">Level 0, no protection</Val>
+											<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
+											<Val value="0xDC">Level 1, read protection of memories</Val>
+											<Val value="0xCC">Level 2, chip protection</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>BOR Level</Name>
+							<Field>
+								<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BOR_LEV</Name>
+										<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
+										<BitOffset>0x8</BitOffset>
+										<BitWidth>0x3</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+											<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+											<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+											<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+											<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>User Configuration</Name>
+							<Field>
+								<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneously</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">Global TrustZone security disabled</Val>
+											<Val value="0x1">Global TrustZone security enabled</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_STOP</Name>
+										<Description/>
+										<BitOffset>0xC</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Stop mode</Val>
+											<Val value="0x1">No reset generated when entering Stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_STDBY</Name>
+										<Description/>
+										<BitOffset>0xD</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Standby mode</Val>
+											<Val value="0x1">No reset generated when entering Standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_SHDW</Name>
+										<Description/>
+										<BitOffset>0xE</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+											<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM1345_RST</Name>
+										<Description>SRAM1, SRAM3, SRAM4  and SRAM5 erase upon system reset</Description>
+										<BitOffset>0xF</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
+									</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware independant watchdog</Val>
+											<Val value="0x1">Software independant watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STOP</Name>
+										<Description/>
+										<BitOffset>0x11</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+											<Val value="0x1">IWDG counter active in stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STDBY</Name>
+										<Description/>
+										<BitOffset>0x12</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+											<Val value="0x1">IWDG counter active in standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>WWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x13</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware window watchdog</Val>
+											<Val value="0x1">Software window watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SWAP_BANK</Name>
+										<Description/>
+										<BitOffset>0x14</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
+											<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>DBANK</Name>
+										<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
+										<BitOffset>0x15</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Single bank mode with 128 bits data read width</Val>
+											<Val value="0x1">Dual bank mode with 64 bits data</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_PE</Name>
+										<Description>SRAM2 parity check enable</Description>
+										<BitOffset>0x18</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 parity check enable</Val>
+											<Val value="0x1">SRAM2 parity check disable</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_RST</Name>
+										<Description>SRAM2 Erase when system reset</Description>
+										<BitOffset>0x19</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+											<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nSWBOOT0</Name>
+										<Description>Software BOOT0</Description>
+										<BitOffset>0x1A</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+											<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nBOOT0</Name>
+										<Description>nBOOT0 option bit</Description>
+										<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">nBOOT0 = 0</Val>
+											<Val value="0x1">nBOOT0 = 1</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>PA15_PUPEN</Name>
+										<Description>PA15 pull-up enable</Description>
+										<BitOffset>0x1C</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
+											<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+									</Values>
+								</Bit>
+								<Bit>
+										<Name>BKPRAM_ECC</Name>
+										<Description>SRAM2 parity check enable</Description>
+										<BitOffset>0x16</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+										<Val value="0x0">Backup RAM ECC check enabled</Val>
+										<Val value="0x1">Backup RAM ECC check disabled</Val>
+										</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>SRAM3 ECC detection and correction enable</Description>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM3 ECC check enabled</Val>
+										<Val value="0x1">SRAM3 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>SRAM2 ECC detection and correction enable</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled</Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage configuration bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
+									<BitOffset>0x1E</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					<Category>
+							<Name>Boot Configuration</Name>
+							<Field>
+								<Parameters address="0x50022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x50022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x5002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>SECBOOTADD0</Name>
+										<Description>Secure boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+							<Parameters address="0x5002204C" name="BOOT_LOCK" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from base address memory</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+				</Category>
+					<Category>
+						<Name>Secure Area 1</Name>
+							<Field>
+								<Parameters address="0x50022050" name="FLASH_SECWM1R1" size="0x4"/>
+								<AssignedBits>
+									<Bit config="2">
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of first secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="3">
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of first secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="2">
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="3">
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+									<Parameters address="0x50022054" name="FLASH_SECWM1R2" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_PEND</Name>
+											<Description>End page of first hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1EN</Name>
+											<Description>Hide protection first area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 1</Val>
+												<Val value="0x1">HDP first area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>Write Protection 1</Name>
+						<Field>
+							<Parameters address="0x50022058" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="2">
+									<Name>WRP1A_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP1A_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="2">
+									<Name>WRP1A_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP1A_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1A</Name>
+									<Description>Bank 1 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1A start and end pages locked</Val>
+										<Val value="0x1">WRP1A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x5002205C" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="2">
+									<Name>WRP1B_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP1B_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="2">
+									<Name>WRP1B_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP1B_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1B</Name>
+									<Description>Bank 1 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1B start and end pages locked</Val>
+										<Val value="0x1">WRP1B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+				<Bank interface="JTAG_SWD"> <!--   Bank 2: address="0x50022060" name="Bank 2" size="0x10"-->
+					<Parameters address="0x50022060" name="Bank 2" size="0x10"/>
+					<Category>
+					<Name>Secure Area 2</Name>
+						<Field>
+							<Parameters address="0x50022060" name="FLASH_SECWM2R1" size="0x4"/>
+							<AssignedBits>
+								<Bit config="2">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="2">
+									<Name>SECWM2_PEND</Name>
+									<Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>SECWM2_PEND</Name>
+									<Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50022064" name="FLASH_SECWM2R2" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_PEND</Name>
+											<Description>End page of second hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC200000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2EN</Name>
+											<Description>Hide protection second area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 2</Val>
+												<Val value="0x1">HDP second area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+					</Category>
+					<Category>
+						<Name>Write Protection 2</Name>
+						<Field>
+							<Parameters address="0x50022068" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="2">
+									<Name>WRP2A_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP2A_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="2">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_2A</Name>
+									<Description>Bank 2 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2A start and end pages locked</Val>
+										<Val value="0x1">WRP2A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x5002206C" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="2">
+									<Name>WRP2B_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP2B_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="2">
+									<Name>WRP2B_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRP2B_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_2B</Name>
+									<Description>Bank 2 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2B start and end pages locked</Val>
+										<Val value="0x1">WRP2B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Configuration>
+			<Configuration config="4,5">
+					<Bank interface="JTAG_SWD"> <!--   Bank 1: address="0x40022040" name="Bank 1" size="0x28"-->
+						<Parameters address="0x40022040" name="Bank 1" size="0x28"/>
+						<Category>
+							<Name>Read Out Protection</Name>
+							<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>RDP</Name>
+										<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0xAA">Level 0, no protection</Val>
+											<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
+											<Val value="0xDC">Level 1, read protection of memories</Val>
+											<Val value="0xCC">Level 2, chip protection</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>BOR Level</Name>
+							<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BOR_LEV</Name>
+										<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
+										<BitOffset>0x8</BitOffset>
+										<BitWidth>0x3</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+											<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+											<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+											<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+											<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>User Configuration</Name>
+							<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneouslyDescription</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">Global TrustZone security disabled</Val>
+											<Val value="0x1">Global TrustZone security enabled</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_STOP</Name>
+										<Description/>
+										<BitOffset>0xC</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Stop mode</Val>
+											<Val value="0x1">No reset generated when entering Stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_STDBY</Name>
+										<Description/>
+										<BitOffset>0xD</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Standby mode</Val>
+											<Val value="0x1">No reset generated when entering Standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_SHDW</Name>
+										<Description/>
+										<BitOffset>0xE</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+											<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM1345_RST</Name>
+										<Description>SRAM1, SRAM3, SRAM4  and SRAM5 erase upon system reset</Description>
+										<BitOffset>0xF</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
+									</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware independant watchdog</Val>
+											<Val value="0x1">Software independant watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STOP</Name>
+										<Description/>
+										<BitOffset>0x11</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+											<Val value="0x1">IWDG counter active in stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STDBY</Name>
+										<Description/>
+										<BitOffset>0x12</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+											<Val value="0x1">IWDG counter active in standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>WWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x13</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware window watchdog</Val>
+											<Val value="0x1">Software window watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SWAP_BANK</Name>
+										<Description/>
+										<BitOffset>0x14</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
+											<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>DBANK</Name>
+										<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
+										<BitOffset>0x15</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Single bank mode with 128 bits data read width</Val>
+											<Val value="0x1">Dual bank mode with 64 bits data</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_PE</Name>
+										<Description>SRAM2 parity check enable</Description>
+										<BitOffset>0x18</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 parity check enable</Val>
+											<Val value="0x1">SRAM2 parity check disable</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_RST</Name>
+										<Description>SRAM2 Erase when system reset</Description>
+										<BitOffset>0x19</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+											<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nSWBOOT0</Name>
+										<Description>Software BOOT0</Description>
+										<BitOffset>0x1A</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+											<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nBOOT0</Name>
+										<Description>nBOOT0 option bit</Description>
+										<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">nBOOT0 = 0</Val>
+											<Val value="0x1">nBOOT0 = 1</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>PA15_PUPEN</Name>
+										<Description>PA15 pull-up enable</Description>
+										<BitOffset>0x1C</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
+											<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+									</Values>
+								</Bit>
+								<Bit>
+										<Name>BKPRAM_ECC</Name>
+										<Description>SRAM2 parity check enable</Description>
+										<BitOffset>0x16</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+										<Val value="0x0">Backup RAM ECC check enabled</Val>
+										<Val value="0x1">Backup RAM ECC check disabled</Val>
+										</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>SRAM3 ECC detection and correction enable</Description>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM3 ECC check enabled</Val>
+										<Val value="0x1">SRAM3 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>SRAM2 ECC detection and correction enable</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled</Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage configuration bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
+									<BitOffset>0x1E</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							</Category>
+							<Category>
+							<Name>Boot Configuration</Name>
+								<Field>
+								<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+								</Field>
+							<Field>
+								<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x4002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>SECBOOTADD0</Name>
+										<Description>Secure boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+							<Parameters address="0x4002204C" name="BOOT_LOCK" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from base address memory</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Secure Area 1</Name>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_SECWM1R1" size="0x4"/>
+								<AssignedBits>
+									<Bit config="4">
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of first secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="5">
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of first secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="4">
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="5">
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+									<Parameters address="0x40022054" name="FLASH_SECWM1R2" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_PEND</Name>
+											<Description>End page of first hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC000000"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1EN</Name>
+											<Description>Hide protection first area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 1</Val>
+												<Val value="0x1">HDP first area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>Write Protection 1</Name>
+						<Field>
+							<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="4">
+									<Name>WRP1A_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP1A_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="4">
+									<Name>WRP1A_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP1A_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1A</Name>
+									<Description>Bank 1 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1A start and end pages locked</Val>
+										<Val value="0x1">WRP1A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="4">
+									<Name>WRP1B_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP1B_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="4">
+									<Name>WRP1B_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP1B_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1B</Name>
+									<Description>Bank 1 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1B start and end pages locked</Val>
+										<Val value="0x1">WRP1B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+				<Bank interface="JTAG_SWD"> <!--   Bank 2: address="0x40022060" name="Bank 2" size="0x10"-->
+					<Parameters address="0x40022060" name="Bank 2" size="0x10"/>
+					<Category>
+					<Name>Secure Area 2</Name>
+						<Field>
+							<Parameters address="0x40022060" name="FLASH_SECWM2R1" size="0x4"/>
+							<AssignedBits>
+								<Bit config="4">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="4">
+									<Name>SECWM2_PEND</Name>
+									<Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>SECWM2_PEND</Name>
+									<Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022064" name="FLASH_SECWM2R2" size="0x4"/>
+									<AssignedBits>
+										<Bit config="4">
+											<Name>HDP2_PEND</Name>
+											<Description>End page of second hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC200000"/>
+										</Bit>
+										<Bit config="4">
+											<Name>HDP2EN</Name>
+											<Description>Hide protection second area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 2</Val>
+												<Val value="0x1">HDP second area is enabled</Val>
+											</Values>
+										</Bit>
+										<Bit config="5">
+											<Name>HDP2_PEND</Name>
+											<Description>End page of second hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC200000"/>
+										</Bit>
+										<Bit config="5">
+											<Name>HDP2EN</Name>
+											<Description>Hide protection second area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 2</Val>
+												<Val value="0x1">HDP second area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+					</Category>
+					<Category>
+						<Name>Write Protection 2</Name>
+						<Field>
+							<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="4">
+									<Name>WRP2A_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP2A_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="4">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_2A</Name>
+									<Description>Bank 2 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2A start and end pages locked</Val>
+										<Val value="0x1">WRP2A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="4">
+									<Name>WRP2B_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP2B_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="4">
+									<Name>WRP2B_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="5">
+									<Name>WRP2B_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_2B</Name>
+									<Description>Bank 2 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2B start and end pages locked</Val>
+										<Val value="0x1">WRP2B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Configuration>
+				<Bank interface="Bootloader">
+						<Parameters address="0x40022040" name="Bank 1" size="0x30"/>
+					<Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
+										<Val value="0xDC">Level 1, read protection of memories</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+										<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+										<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+										<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+										<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+							<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable. disable this OB by Unchecking TZEN + RDP regression from level 1 to 0 simultaneously</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Global TrustZone security disabled</Val>
+										<Val value="0x1">Global TrustZone security enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_SHDW</Name>
+									<Description/>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1345_RST</Name>
+									<Description>SRAM1, SRAM3, SRAM4  and SRAM5 erase upon system reset</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM1, SRAM3,SRAM4 and SRAM5 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1, SRAM3,SRAM4 and SRAM5 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description/>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
+										<Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DBANK</Name>
+									<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Single bank Flash with contiguous address in bank 1</Val>
+										<Val value="0x1">Dual-bank Flash with contiguous addresses</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>SRAM2 parity check enable</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Backup RAM ECC check enabled</Val>
+										<Val value="0x1">Backup RAM ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>SRAM3 ECC detection and correction enable</Description>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM3 ECC check enabled</Val>
+										<Val value="0x1">SRAM3 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>SRAM2 ECC detection and correction enable</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 ECC check enabled</Val>
+										<Val value="0x1">SRAM2 ECC check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 Erase when system reset</Description>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nSWBOOT0</Name>
+									<Description>Software BOOT0</Description>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+										<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description>nBOOT0 option bit</Description>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0 = 0</Val>
+										<Val value="0x1">nBOOT0 = 1</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>PA15_PUPEN</Name>
+									<Description>PA15 pull-up enable</Description>
+									<BitOffset>0x1C</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
+										<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDD_HSLV</Name>
+									<Description>High-speed IO at low VDD voltage configuration bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDD voltage feature disabled (VDD can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDD voltage feature enabled (VDD remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_VDDIO2_HSLV</Name>
+									<Description>High-speed IO at low VDDIO2 voltage configuration bit</Description>
+									<BitOffset>0x1E</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">High-speed IO at low VDDIO2 voltage feature disabled (VDDIO2 can exceed 2.5 V)</Val>
+										<Val value="0x1">High-speed IO at low VDDIO2 voltage feature enabled (VDDIO2 remains below 2.5 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+							<Name>Boot Configuration</Name>
+								<Field>
+								<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit config="6,7,8,9">
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+								</Field>
+							<Field>
+								<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit config="6,7,8,9">
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x4002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit config="8,9">
+										<Name>SECBOOTADD0</Name>
+										<Description>Secure boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+							<Parameters address="0x4002204C" name="BOOT_LOCK" size="0x4"/>
+							<AssignedBits>
+								<Bit config="8,9">
+									<Name>BOOT_LOCK</Name>
+									<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from base address memory</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Secure Area 1</Name>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_SECWM1R1" size="0x4"/>
+								<AssignedBits>
+									<Bit config="8">
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of first secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="9">
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of first secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="8">
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="9">
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+									<Parameters address="0x40022054" name="FLASH_SECWM1R2" size="0x4"/>
+									<AssignedBits>
+										<Bit config="8,9">
+											<Name>HDP1_PEND</Name>
+											<Description>End page of first hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC000000"/>
+										</Bit>
+										<Bit config="8,9">
+											<Name>HDP1EN</Name>
+											<Description>Hide protection first area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 1</Val>
+												<Val value="0x1">HDP first area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+						</Category>
+					<Category>
+							<Name>Write Protection 1</Name>
+						<Field>
+								<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit config="6,8">
+										<Name>WRP1A_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="7,9">
+										<Name>WRP1A_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="6,8">
+										<Name>WRP1A_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="7,9">
+										<Name>WRP1A_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit>
+									<Name>UNLOCK1A</Name>
+									<Description>Bank 1 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1A start and end pages locked</Val>
+										<Val value="0x1">WRP1A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
+								<AssignedBits>
+									<Bit config="6,8">
+										<Name>WRP1B_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="7,9">
+										<Name>WRP1B_PSTRT</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="6,8">
+										<Name>WRP1B_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="7,9">
+										<Name>WRP1B_PEND</Name>
+										<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1B</Name>
+									<Description>Bank 1 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1B start and end pages locked</Val>
+										<Val value="0x1">WRP1B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+					<Name>Secure Area 2</Name>
+						<Field>
+							<Parameters address="0x4002205C" name="FLASH_SECWM2R1" size="0x4"/>
+							<AssignedBits>
+								<Bit config="8">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="9">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+								<Bit config="8">
+									<Name>SECWM2_PEND</Name>
+									<Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="9">
+									<Name>SECWM2_PEND</Name>
+									<Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+									<Parameters address="0x40022064" name="FLASH_SECWM2R2" size="0x4"/>
+									<AssignedBits>
+										<Bit config="8,9">
+											<Name>HDP2_PEND</Name>
+											<Description>End page of second hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC200000"/>
+										</Bit>
+										<Bit config="8,9">
+											<Name>HDP2EN</Name>
+											<Description>Hide protection second area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 2</Val>
+												<Val value="0x1">HDP second area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+					</Category>
+							<Category>
+								<Name>Write Protection 2</Name>
+							<Field>
+									<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+										<Bit config="6,8">
+											<Name>WRP2A_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="7,9">
+									<Name>WRP2A_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
+								</Bit>
+									<Bit config="6,8">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+										<Bit config="7,9">
+											<Name>WRP2A_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+								<Bit>
+									<Name>UNLOCK_2A</Name>
+									<Description>Bank 2 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2A start and end pages locked</Val>
+										<Val value="0x1">WRP2A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit config="6,8">
+											<Name>WRP2B_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+										</Bit>
+										<Bit config="7,9">
+											<Name>WRP2B_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+										<Bit config="6,8">
+											<Name>WRP2B_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+										</Bit>
+										<Bit config="7,9">
+											<Name>WRP2B_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+									<Bit>
+									<Name>UNLOCK_2B</Name>
+									<Description>Bank 2 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2B start and end pages locked</Val>
+										<Val value="0x1">WRP2B start and end pages unlocked</Val>
+									</Values>
+									</Bit>
+									</AssignedBits>
+								</Field>
+						</Category>						
+				</Bank>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x479.xml

@@ -117,7 +117,7 @@
 				<Description/>
 				<Access>RW</Access>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022020" name="Bank 1" size="0x14"/>
+					<Parameters address="0x40022020" name="Bank 1" size="0x54"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -253,17 +253,6 @@
 										<Val value="0x1">Dual-bank boot enable</Val>
 									</Values>
 								</Bit>
-								<Bit reference="DualBank">
-									<Name>DBANK</Name>
-									<Description/>
-									<BitOffset>0x16</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">Single bank mode with 128 bits data read width</Val>
-										<Val value="0x1">Dual bank mode with 64 bits data</Val>
-									</Values>
-								</Bit>
 								<Bit>
 									<Name>nBOOT1</Name>
 									<Description/>
@@ -483,7 +472,7 @@
 									<Name>SEC_SIZE1</Name>
 									<Description>sets the number of pages used in the bank 1 securable area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
@@ -502,7 +491,7 @@
 					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
-					<Parameters address="0x1FFF7800" name="Bank 1" size="0x24"/>
+					<Parameters address="0x1FFF7800" name="Bank 1" size="0x30"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -638,17 +627,6 @@
 										<Val value="0x1">Dual-bank boot enable</Val>
 									</Values>
 								</Bit>
-								<Bit reference="DualBank">
-									<Name>DBANK</Name>
-									<Description/>
-									<BitOffset>0x16</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">Single bank mode with 128 bits data read width</Val>
-										<Val value="0x1">Dual bank mode with 64 bits data</Val>
-									</Values>
-								</Bit>
 								<Bit>
 									<Name>nBOOT1</Name>
 									<Description/>
@@ -868,8 +846,9 @@
 									<Name>SEC_SIZE1</Name>
 									<Description>sets the number of pages used in the bank 1 securable area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>BOOT_LOCK</Name>

tools/Data_Base/STM32_Prog_DB_0x480.xml

@@ -76,6 +76,7 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x08fff80c" default="0x200000"/>
+				<BootloaderVersion address="0x1FF13FFE"/>
 				<!-- 2MB Dual Bank -->
 				<Configuration config="0,1">
 					<Parameters address="0x08000000" name="2 MBytes Dual Bank Embedded Flash" size="0x200000"/>

tools/Data_Base/STM32_Prog_DB_0x483.xml

@@ -62,6 +62,7 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FF1E880" default="0x100000"/>
+				<BootloaderVersion address="0x1FF1E7FE"/>
 				<!-- 1MB Single Bank -->
 				<Configuration config="0,1">
 					<Parameters address="0x08000000" name="1 MBytes Single Bank Embedded Flash" size="0x100000"/>

tools/Data_Base/STM32_Prog_DB_0x485.xml

@@ -0,0 +1,760 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x485</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<CPU>Cortex-M7</CPU>
+		<Name>STM32H7Rxx</Name>
+		<Series>STM32H7</Series>
+		<Description>ARM 32-bit Cortex-M7 based device</Description>
+		<Configurations>
+			<!-- JTAG_SWD Interface -->
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0"> <!-- Security extension available -->
+					<SecurityEx>
+						<WriteRegister address="0x580244F4" value="0x2"/>
+						<ReadRegister address="0x58000528" mask="0x1" value="0x0"/>
+					</SecurityEx>
+				</Configuration>
+				<Configuration number="0x1"> <!-- Security extension not available -->
+					<SecurityEx>
+						<WriteRegister address="0x580244F4" value="0x2"/>
+						<ReadRegister address="0x58000528" mask="0x1" value="0x1"/>
+					</SecurityEx>
+				</Configuration>
+			</Interface>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader">
+				<Configuration number="0x0"> <!-- dummy always true, security extension is checked using dedicated cmd -->
+					<Dummy>
+						<ReadRegister address="0x08000000" mask="0x0" value="0x0"/>
+					</Dummy>
+				</Configuration>
+			</Interface>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<!-- Embedded SRAM -->
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0x00</ErasedValue>
+				<Access>RWE</Access>
+				<!-- 1024 KB -->
+				<Configuration>
+					<Parameters address="0x20000000" name="SRAM" size="0x10000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x10000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Embedded Flash -->
+			<Peripheral>
+				<Name>Embedded Flash</Name>
+				<Type>Storage</Type>
+				<Description>The Flash memory interface manages AXI accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<FlashSize address="0x08fff80c" default="0x10000"/>
+				<!-- 1MB Single Bank -->
+				<Configuration config="0,1">
+					<Parameters address="0x08000000" name="64 KBytes Single Bank Embedded Flash" size="0x10000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x80</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x8" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Option Bytes -->
+			<Peripheral>
+				<Name>Option Bytes</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Bank>
+					<Parameters address="0x52002200" name="Bank 1" size="0x70"/>
+					<Category>
+						<Name>Flash Non Volatile State</Name>
+						<Field>
+							<Parameters address="0x52002200" name="FLASH_NVSR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>FLASH_NVSR</Name>
+									<Description>FLASH security status register programming.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0xB4">OPEN device</Val>
+										<Val value="0x51">CLOSED device</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x52002204" name="FLASH_NVSR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>FLASH_NVSR</Name>
+									<Description>FLASH security status register programming.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0xB4">OPEN device</Val>
+										<Val value="0x51">CLOSED device</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters address="0x52002260" name="FOPTSR_CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BOR OFF</Val>
+										<Val value="0x1">BOR level1: 2.1V</Val>
+										<Val value="0x2">BOR level2: 2.4 V</Val>
+										<Val value="0x3">BOR level3: 2.7 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x52002264" name="FOPTSR_PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">reset level is set to 0.0 V</Val>
+										<Val value="0x1">reset level is set to 2.1 V</Val>
+										<Val value="0x2">reset level is set to 2.4 V</Val>
+										<Val value="0x3">reset level is set to 2.7 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration1</Name>
+						<Field>
+							<Parameters address="0x52002260" name="FOPTSR1_CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG1_SW</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Independent watchdog is controlled by hardware</Val>
+										<Val value="0x1">Independent watchdog is controlled by software</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description/>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">STOP mode on Domain 1 is entering with reset</Val>
+										<Val value="0x1">STOP mode on Domain 1 is entering without reset</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>NRST_STBY</Name>
+									<Description/>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">STANDBY mode on Domain 1 is entering with reset</Val>
+										<Val value="0x1">STANDBY mode on Domain 1 is entering without reset</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_HSLV</Name>
+									<Description/>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+										<Val value="0x1">Product operating below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FZ_IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Independent watchdog is freezed in STOP mode</Val>
+										<Val value="0x1">Independent watchdog is running in STOP mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FZ_IWDG_SDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Independent watchdog is freezed in STANDBY mode</Val>
+										<Val value="0x1">Independent watchdog is running in STANDBY mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OCTO1_HSLV</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">I/O Octo1 High-Speed option disabled</Val>
+										<Val value="0x1">I/O Octo1 High-Speed option enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OCTO2_HSLV</Name>
+									<Description/>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">I/O Octo2 High-Speed option disabled</Val>
+										<Val value="0x1">I/O Octo2 High-Speed option enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x52002264" name="FOPTSR1_PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG1_SW</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Independent watchdog is controlled by hardware</Val>
+										<Val value="0x1">Independent watchdog is controlled by software</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description/>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">STOP mode on Domain 1 is entering with reset</Val>
+										<Val value="0x1">STOP mode on Domain 1 is entering without reset</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>NRST_STBY</Name>
+									<Description/>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">STANDBY mode on Domain 1 is entering with reset</Val>
+										<Val value="0x1">STANDBY mode on Domain 1 is entering without reset</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IO_HSLV</Name>
+									<Description/>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+										<Val value="0x1">Product operating below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FZ_IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Independent watchdog is freezed in STOP mode</Val>
+										<Val value="0x1">Independent watchdog is running in STOP mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FZ_IWDG_SDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Independent watchdog is freezed in STANDBY mode</Val>
+										<Val value="0x1">Independent watchdog is running in STANDBY mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OCTO1_HSLV</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">I/O Octo1 High-Speed option disabled</Val>
+										<Val value="0x1">I/O Octo1 High-Speed option enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OCTO2_HSLV</Name>
+									<Description/>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">I/O Octo2 High-Speed option disabled</Val>
+										<Val value="0x1">I/O Octo2 High-Speed option enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration 2</Name>
+						<Field>
+							<Parameters address="0x52002268" name="FOPTSR2_CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>I2c_NI3C</Name>
+									<Description/>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">I3C is selected</Val>
+										<Val value="0x1">I2C is delected</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>ECC_ON_SRAM</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">ECC_ON_SRAM disabled</Val>
+										<Val value="0x1">ECC_ON_SRAM enabled</Val>
+									</Values>
+								</Bit>
+								
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x5200226C" name="FOPTSR2_PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>I2c_NI3C</Name>
+									<Description/>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">I3C is selected</Val>
+										<Val value="0x1">I2C is delected</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>ECC_ON_SRAM</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">ECC_ON_SRAM disabled</Val>
+										<Val value="0x1">ECC_ON_SRAM enabled</Val>
+									</Values>
+								</Bit>	
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>DTCM RAM Protection</Name>
+						<Field>
+							<Parameters address="0x52002268" name="FOPTSR2_CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0">
+									<Name>DTCM_AXI_SHARE</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">2  KB reserved to ST code</Val>
+										<Val value="0x1">4  KB reserved to ST code</Val>
+										<Val value="0x2">8  KB reserved to ST code</Val>
+										<Val value="0x3">16 KB reserved to ST code</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x5200226C" name="FOPTSR2_PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0">
+									<Name>DTCM_AXI_SHARE</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">2  KB reserved to ST code</Val>
+										<Val value="0x1">4  KB reserved to ST code</Val>
+										<Val value="0x2">8  KB reserved to ST code</Val>
+										<Val value="0x3">16 KB reserved to ST code</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>ITCM RAM Protection</Name>
+						<Field>
+							<Parameters address="0x52002268" name="FOPTSR2_CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0">
+									<Name>ITCM_AXI_SHARE</Name>
+									<Description/>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">2  KB reserved to ST code</Val>
+										<Val value="0x1">4  KB reserved to ST code</Val>
+										<Val value="0x2">8  KB reserved to ST code</Val>
+										<Val value="0x3">16 KB reserved to ST code</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x5200226C" name="FOPTSR2_PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0">
+									<Name>ITCM_AXI_SHARE</Name>
+									<Description/>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">2  KB reserved to ST code</Val>
+										<Val value="0x1">4  KB reserved to ST code</Val>
+										<Val value="0x2">8  KB reserved to ST code</Val>
+										<Val value="0x3">16 KB reserved to ST code</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Write Protection</Name>
+						<Field>
+							<Parameters address="0x52002218" name="FWPSN_CUR_A" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,1">
+									<Name>nWRP0</Name>
+									<Description/>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values ByBit="true">
+										<Val value="0x0">Write protection active</Val>
+										<Val value="0x1">Write protection not active</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x5200221C" name="FWPSN_PRG_A" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0,1">
+									<Name>nWRP0</Name>
+									<Description/>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values ByBit="true">
+										<Val value="0x0">Write protection active</Val>
+										<Val value="0x1">Write protection not active</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+							<Name>Flash HDP bank </Name>
+								<Field>
+									<Parameters address="0x52002230" name="FLASH_HDP" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x9</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x9</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x52002234" name="FLASH_HDP" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x9</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x9</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+					</Category>
+					
+					<Category>
+							<Name>Flash EPOCH</Name>
+								<Field>
+									<Parameters address="0x52002250" name="FLASH_EPOCH" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>EPOCH</Name>
+											<Description>Non Volatile Non Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>R</Access>
+											
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x52002254" name="FLASH_EPOCH" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>EPOCH</Name>
+											<Description>Non Volatile Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>W</Access>
+										
+										</Bit>
+									</AssignedBits>
+								</Field>
+					</Category>	
+					<Category>
+							<Name>OTP write protection</Name>
+								<Field>
+									<Parameters address="0x52002210" name="FLASH_OTP" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x10</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x52002214" name="FLASH_OTP" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x10</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+					</Category>
+					
+					<Category>
+							<Name>FLASH ROT programming</Name>
+								<Field>
+									<Parameters address="0x52002208" name="FLASH_IROT" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>OEM_PROV</Name>
+											<Description>OEM provisioned device</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>R</Access>
+										</Bit>
+											<Bit>
+											<Name>IROT_SELECT</Name>
+											<Description>OEM provisioned device</Description>
+											<BitOffset>0x18</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>R</Access>
+										</Bit>
+										<Bit>
+											<Name>DBG_AUTH</Name>
+											<Description>Debug authentication method</Description>
+											<BitOffset>0x8</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>R</Access>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x52002214" name="FLASH_IROT_prog" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>IROT_SELECT</Name>
+											<Description>OEM provisioned device</Description>
+											<BitOffset>0x18</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>W</Access>
+										</Bit>
+										<Bit>
+											<Name>DBG_AUTH</Name>
+											<Description>Debug authentication method</Description>
+											<BitOffset>0x8</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>W</Access>
+										</Bit>
+										<Bit>
+											<Name>OEM_PROV</Name>
+											<Description>OEM provisioned device</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x8</BitWidth>
+											<Access>W</Access>
+										</Bit>
+									</AssignedBits>
+								</Field>	
+					</Category>	
+					
+					<Category>
+							<Name>FLASH fixed bank</Name>
+								<Field>
+									<Parameters address="0x52002248" name="FLASH_FIXED" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>NUM_FIXED_SECT</Name>
+											<Description>Number of fixed sectors</Description>
+											<BitOffset>0x1</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											
+										</Bit>
+										<Bit>
+											<Name>EN_SWAP_BANK</Name>
+											<Description>enable swap bank</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>R</Access>
+											<Values ByBit="true">
+												<Val value="0x0">swap bank disable</Val>
+												<Val value="0x1">swap bank enable</Val>
+									       </Values>
+										</Bit>
+										<Bit>
+											<Name>LOCK_FIXED</Name>
+											<Description>lock fixed</Description>
+											<BitOffset>0x14</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>R</Access>
+											<Values ByBit="true">
+												<Val value="0x0">lock disable</Val>
+												<Val value="0x1">lock enable</Val>
+									       </Values>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x5200224C" name="FLASH_FIXED_PROG" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>NUM_FIXED_SECT</Name>
+											<Description>Number of fixed sectors</Description>
+											<BitOffset>0x1</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											
+										</Bit>
+										<Bit>
+											<Name>EN_SWAP_BANK</Name>
+											<Description>enable swap bank</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>W</Access>
+											<Values ByBit="true">
+												<Val value="0x0">swap bank disable</Val>
+												<Val value="0x1">swap bank enable</Val>
+									       </Values>
+										</Bit>
+										<Bit>
+											<Name>LOCK_FIXED</Name>
+											<Description>lock fixed</Description>
+											<BitOffset>0x14</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>W</Access>
+											<Values ByBit="true">
+												<Val value="0x0">lock disable</Val>
+												<Val value="0x1">lock enable</Val>
+									       </Values>
+										</Bit>
+									</AssignedBits>
+								</Field>
+					</Category>
+					
+					
+				</Bank>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x486.xml

@@ -0,0 +1,40 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x486</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<CPU>Cortex-M55</CPU>
+		<Name>STM32N6xx</Name>
+		<Series>STM32N6</Series>
+		<Description>ARM 32-bit Cortex-M55 based device</Description>
+		<!-- Configurations List -->
+		<Configurations>
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0">
+					<ReadRegister address="0x0" mask="0x0" value="0x4"/>
+				</Configuration>
+			</Interface>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<Configuration>
+					<Parameters address="0x28000000" name="SRAM" size="0x8000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank>
+						<Field>
+							<Parameters address="0x28000000" name="SRAM" occurence="0x1" size="0x8000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x492.xml

@@ -0,0 +1,1800 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x492</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<CPU>Cortex-M33</CPU>
+		<Name>STM32WBA55/54</Name>
+		<Series>STM32WBA</Series>
+		<Description>ARM 32-bit Cortex-M33 based device</Description>
+		<Configurations>
+			<!-- JTAG_SWD Interface -->
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0">	<!-- 1M non secure TZEN=0x0 -->
+					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x1">	<!-- 1M secure + RDP=0xAA + TZEN=0x1 -->
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+					<RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x000000AA"/> </RDP>
+				</Configuration>
+				<!-- <Configuration number="0x2">	 -->
+					<!-- <RDP reference="0x1"> <ReadRegister address="0x40022040" mask="0x000000FF" value="0x00000055"/> </RDP> -->
+					<!-- <TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN> -->
+				<!-- </Configuration> -->
+				<Configuration number="0x3">	<!-- 1M secure + TZEN=0x1 -->
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+				</Configuration>				
+			</Interface>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader">
+				<Configuration number="0x4">	<!-- 1M  non Secure-->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x400000" value="0x0"/> </DBANK>
+					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x5">	<!-- 1M Secure-->
+					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x400000" value="0x0"/> </DBANK>
+					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
+				</Configuration>
+			</Interface>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<!-- Embedded SRAM -->
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- 128 KB FOR 1M of flash Size --> 
+				<Configuration config="0">
+					<Parameters address="0x20000000" name="SRAM" size="0x20000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x20000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="1,3">
+					<Parameters address="0x30000000" name="SRAM" size="0x20000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x30000000" name="SRAM" occurence="0x1" size="0x20000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Embedded Flash -->
+			<Peripheral>
+				<Name>Embedded Flash</Name>
+				<Type>Storage</Type>
+				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<FlashSize address="0xBF907A0" default="0x100000"/>
+				<BootloaderVersion address="0x0BF8FEFA"/>
+				<ReconnectAfterOB value="1"/>
+				<Configuration config="0,1,3"> <!-- 1 Mbyte non secure -->
+					<Parameters address="0x08000000" name=" 1 Mbyte Embedded Flash" size="0x100000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<!--<Configuration config="1,3">
+					<Parameters address="0x0c000000" name=" 1 Mbyte Embedded Flash" size="0x100000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0c000000" name="sector0" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>-->
+			</Peripheral>
+			<!-- Data EEPROM -->
+			<Peripheral>
+				<Name>Data EEPROM</Name>
+				<Type>Storage</Type>
+				<Description>The Data EEPROM memory block. It contains user data.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- Dummy Config Just to avoid crash when TZEN=0 -->
+				<Configuration config="1,3,5">
+					<Parameters address="0x0c000000" name=" 1 Mbyte Data EEPROM" size="0x100000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0c000000" name="sector0" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- OTP -->
+			<Peripheral>
+				<Name>OTP</Name>
+				<Type>Storage</Type>
+				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 512 Bytes single bank -->
+				<Configuration>
+					<Parameters address="0x0BF90000" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="OTP">
+						<Field>
+							<Parameters address="0x0BF90000" name="OTP" occurence="0x1" size="0x200"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Option Bytes -->
+			<Peripheral>
+				<Name>Option Bytes</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Configuration config="0">
+				<Bank interface="JTAG_SWD">
+						<Parameters address="0x40022040" name="Bank 1" size="0xA0"/>
+					<Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+						<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0xDC">Level 1, read protection of memories</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+										<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+										<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+										<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+										<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_RST</Name>
+									<Description>SRAM1 erase upon system reset</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM1, SRAM3 and SRAM4 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1, SRAM3 and SRAM4 not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_PE</Name>
+									<Description>SRAM2 parity check enable </Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 PE check enabled</Val>
+										<Val value="0x1">SRAM2 PE check disabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 Erase when system reset</Description>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nSWBOOT0</Name>
+									<Description>Software BOOT0</Description>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+										<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description>nBOOT0 option bit</Description>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0 = 0</Val>
+										<Val value="0x1">nBOOT0 = 1</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Global TrustZone security disabled</Val>
+										<Val value="0x1">Global TrustZone security enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+							<Name>Boot Configuration</Name>
+								<Field>
+								<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+								</Field>
+							<Field>
+								<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					<Category>
+							<Name>Write Protection</Name>
+						<Field>
+								<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit config="0,2">
+										<Name>WRPA_PSTRT</Name>
+										<Description>WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="0,2">
+										<Name>WRPA_PEND</Name>
+										<Description>WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_A</Name>
+									<Description>WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRPA start and end pages locked</Val>
+										<Val value="0x1">WRPA start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x4002205C" name="FLASH_WRPBR" size="0x4"/>
+								<AssignedBits>
+									<Bit config="0,2">
+										<Name>WRPB_PSTRT</Name>
+										<Description>WPR second area &quot;B&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="0,2">
+										<Name>WRPB_PEND</Name>
+										<Description>WPR second area &quot;B&quot; end page</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+								<Bit>
+									<Name>UNLOCK_B</Name>
+									<Description>WPR second area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRPB start and end pages locked</Val>
+										<Val value="0x1">WRPB start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					</Bank>
+				</Configuration>
+				<Configuration config="1">
+					<Bank interface="JTAG_SWD">
+						<Parameters address="0x50022040" name="Bank 1" size="0x20"/>
+						<Category>
+							<Name>Read Out Protection</Name>
+							<Field>
+								<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>RDP</Name>
+										<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0xAA">Level 0, no protection</Val>
+											<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
+											<Val value="0xDC">Level 1, read protection of memories</Val>
+											<Val value="0xCC">Level 2, chip protection</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>BOR Level</Name>
+							<Field>
+								<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BOR_LEV</Name>
+										<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
+										<BitOffset>0x8</BitOffset>
+										<BitWidth>0x3</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+											<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+											<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+											<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+											<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>User Configuration</Name>
+							<Field>
+								<Parameters address="0x50022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>nRST_STOP</Name>
+										<Description/>
+										<BitOffset>0xC</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Stop mode</Val>
+											<Val value="0x1">No reset generated when entering Stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_STDBY</Name>
+										<Description/>
+										<BitOffset>0xD</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Standby mode</Val>
+											<Val value="0x1">No reset generated when entering Standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM1_RST</Name>
+										<Description>SRAM1, SRAM3 and SRAM4 erase upon system reset</Description>
+										<BitOffset>0xF</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM1 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1 not erased when a system reset occurs</Val>
+									</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware independant watchdog</Val>
+											<Val value="0x1">Software independant watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STOP</Name>
+										<Description/>
+										<BitOffset>0x11</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+											<Val value="0x1">IWDG counter active in stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STDBY</Name>
+										<Description/>
+										<BitOffset>0x12</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+											<Val value="0x1">IWDG counter active in standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>WWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x13</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware window watchdog</Val>
+											<Val value="0x1">Software window watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_PE</Name>
+										<Description>SRAM2 parity check enable</Description>
+										<BitOffset>0x18</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 parity check enable</Val>
+											<Val value="0x1">SRAM2 parity check disable</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_RST</Name>
+										<Description>SRAM2 Erase when system reset</Description>
+										<BitOffset>0x19</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+											<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nSWBOOT0</Name>
+										<Description>Software BOOT0</Description>
+										<BitOffset>0x1A</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+											<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nBOOT0</Name>
+										<Description>nBOOT0 option bit</Description>
+										<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">nBOOT0 = 0</Val>
+											<Val value="0x1">nBOOT0 = 1</Val>
+										</Values>
+									</Bit>
+								<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">Global TrustZone security disabled</Val>
+											<Val value="0x1">Global TrustZone security enabled</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					<Category>
+							<Name>Boot Configuration</Name>
+							<Field>
+								<Parameters address="0x50022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x50022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x5002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>SECBOOTADD0</Name>
+										<Description>Secure boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						<Field>
+							<Parameters address="0x5002204C" name="BOOT_LOCK" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from base address memory</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+				</Category>
+					<Category>
+						<Name>Secure Area</Name>
+							<Field>
+								<Parameters address="0x50022050" name="FLASH_SECWMR1" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit >
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+									<Parameters address="0x50022054" name="FLASH_SECWMR2" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_PEND</Name>
+											<Description>End page of secure hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC003fff"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1EN</Name>
+											<Description>Secure Hide protection first area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No secHDP area</Val>
+												<Val value="0x1">HDP first area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>Write Protection 1</Name>
+						<Field>
+								<Parameters address="0x50022058" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit>
+										<Name>WRPA_PSTRT</Name>
+										<Description>WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+									<Bit>
+										<Name>WRPA_PEND</Name>
+										<Description>WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_A</Name>
+									<Description>WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRPA start and end pages locked</Val>
+										<Val value="0x1">WRPA start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x5002205C" name="FLASH_WRPBR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>WRPB_PSTRT</Name>
+										<Description>WPR second area &quot;B&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit>
+										<Name>WRPB_PEND</Name>
+										<Description>WPR second area &quot;B&quot; end page</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+								<Bit>
+									<Name>UNLOCK_B</Name>
+									<Description>WPR second area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRPB start and end pages locked</Val>
+										<Val value="0x1">WRPB start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Configuration>
+			<Configuration config="3">
+					<Bank interface="JTAG_SWD">
+						<Parameters address="0x40022040" name="Bank 1" size="0x20"/>
+						<Category>
+							<Name>Read Out Protection</Name>
+							<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>RDP</Name>
+										<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0xAA">Level 0, no protection</Val>
+											<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
+											<Val value="0xDC">Level 1, read protection of memories</Val>
+											<Val value="0xCC">Level 2, chip protection</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>BOR Level</Name>
+							<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>BOR_LEV</Name>
+										<Description>These bits contain the VDD supply level threshold that activates/releases the reset.</Description>
+										<BitOffset>0x8</BitOffset>
+										<BitWidth>0x3</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+											<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+											<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+											<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+											<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>User Configuration</Name>
+							<Field>
+								<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>nRST_STOP</Name>
+										<Description/>
+										<BitOffset>0xC</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Stop mode</Val>
+											<Val value="0x1">No reset generated when entering Stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_STDBY</Name>
+										<Description/>
+										<BitOffset>0xD</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering Standby mode</Val>
+											<Val value="0x1">No reset generated when entering Standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nRST_SHDW</Name>
+										<Description/>
+										<BitOffset>0xE</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+											<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM1_RST</Name>
+										<Description>SRAM1 erase upon system reset</Description>
+										<BitOffset>0xF</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM1, SRAM3 and SRAM4 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM1, SRAM3 and SRAM4 not erased when a system reset occurs</Val>
+									</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware independant watchdog</Val>
+											<Val value="0x1">Software independant watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STOP</Name>
+										<Description/>
+										<BitOffset>0x11</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+											<Val value="0x1">IWDG counter active in stop mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>IWDG_STDBY</Name>
+										<Description/>
+										<BitOffset>0x12</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+											<Val value="0x1">IWDG counter active in standby mode</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>WWDG_SW</Name>
+										<Description/>
+										<BitOffset>0x13</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">Hardware window watchdog</Val>
+											<Val value="0x1">Software window watchdog</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_PE</Name>
+										<Description>SRAM2 parity check enable</Description>
+										<BitOffset>0x18</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 parity check enable</Val>
+											<Val value="0x1">SRAM2 parity check disable</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>SRAM2_RST</Name>
+										<Description>SRAM2 Erase when system reset</Description>
+										<BitOffset>0x19</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+											<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nSWBOOT0</Name>
+										<Description>Software BOOT0</Description>
+										<BitOffset>0x1A</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+										<Values>
+											<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+											<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+										</Values>
+									</Bit>
+									<Bit>
+										<Name>nBOOT0</Name>
+										<Description>nBOOT0 option bit</Description>
+										<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">nBOOT0 = 0</Val>
+											<Val value="0x1">nBOOT0 = 1</Val>
+									</Values>
+									</Bit>
+								<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											<Val value="0x0">Global TrustZone security disabled</Val>
+											<Val value="0x1">Global TrustZone security enabled</Val>
+										</Values>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							</Category>
+							<Category>
+							<Name>Boot Configuration</Name>
+								<Field>
+								<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+								</Field>
+							<Field>
+								<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x4002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>SECBOOTADD0</Name>
+										<Description>Secure boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+							<Parameters address="0x4002204C" name="BOOT_LOCK" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_LOCK</Name>
+									<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from base address memory</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Secure Area </Name>
+							<Field>
+								<Parameters address="0x40022050" name="FLASH_SECWMR1" size="0x4"/>
+								<AssignedBits>
+									<Bit config="3">
+										<Name>SECWM1_PSTRT</Name>
+										<Description>Start page of first secure area</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit config="3">
+										<Name>SECWM1_PEND</Name>
+										<Description>End page of first secure area</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+									<Parameters address="0x40022054" name="FLASH_SECWMR2" size="0x4"/>
+									<AssignedBits>
+										<Bit config="4">
+											<Name>HDP1_PEND</Name>
+											<Description>End page of secure hide protection area</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0xC003fff"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1EN</Name>
+											<Description>Secure Hide protection  area enable</Description>
+											<BitOffset>0x1F</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>RW</Access>
+											<Values>
+												<Val value="0x0">No HDP area 1</Val>
+												<Val value="0x1">HDP first area is enabled</Val>
+											</Values>
+										</Bit>
+									</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+							<Name>Write Protection 1</Name>
+						<Field>
+							<Parameters address="0x40022058" name="FLASH_WRPAR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="3">
+									<Name>WRPA_PSTRT</Name>
+									<Description>WPR area A &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRPA_PEND</Name>
+									<Description>WPR area A &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_A</Name>
+									<Description>WPR area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1A start and end pages locked</Val>
+										<Val value="0x1">WRP1A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x4002205C" name="FLASH_WRPBR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="3">
+									<Name>WRPB_PSTRT</Name>
+									<Description>WPR area B &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="3">
+									<Name>WRPB_PEND</Name>
+									<Description>WPR area B &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_B</Name>
+									<Description>WPR area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRPB start and end pages locked</Val>
+										<Val value="0x1">WRPB start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Configuration>
+				<Bank interface="Bootloader">
+                    <Parameters address="0x40022040" name="Bank 1" size="0x30"/>
+                    <Category>
+						<Name>Read Out Protection</Name>
+						<Field>
+							<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>RDP</Name>
+									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0xAA">Level 0, no protection</Val>
+										<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
+										<Val value="0xDC">Level 1, read protection of memories</Val>
+										<Val value="0xCC">Level 2, chip protection</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR Level 0, reset level threshold is around 1.7 V</Val>
+										<Val value="0x1">BOR Level 1, reset level threshold is around 2.0 V</Val>
+										<Val value="0x2">BOR Level 2, reset level threshold is around 2.2 V</Val>
+										<Val value="0x3">BOR Level 3, reset level threshold is around 2.5 V</Val>
+										<Val value="0x4">BOR Level 4, reset level threshold is around 2.8 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+							<Parameters address="0x40022040" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>nRST_STOP</Name>
+									<Description/>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_STDBY</Name>
+									<Description/>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nRST_SHDW</Name>
+									<Description/>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware independant watchdog</Val>
+										<Val value="0x1">Software independant watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description/>
+									<BitOffset>0x11</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IWDG_STDBY</Name>
+									<Description/>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description/>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+											  <Val value="0x0">Bank 1 and bank 2 address are not swapped</Val>
+											  <Val value="0x1">Bank 1 and bank 2 address are swapped</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DB256</Name>
+									<Description>Dual-Bank on 256 Kb Flash memory devices</Description>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">256Kb single Flash: contiguous address in bank1</Val>
+										<Val value="0x1">256Kb dual-bank Flash with contiguous addresses</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DBANK</Name>
+									<Description>Dual-bank on 1-Mbyte and 512-Kbyte Flash memory devices</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Single bank mode with 128 bits data read width</Val>
+										<Val value="0x1">Dual bank mode with 64 bits data</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_PE</Name>
+									<Description>SRAM2 parity check enable</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 parity check enable</Val>
+										<Val value="0x1">SRAM2 parity check disable</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description>SRAM2 Erase when system reset</Description>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2 erased when a system reset occurs</Val>
+										<Val value="0x1">SRAM2 is not erased when a system reset occurs</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nSWBOOT0</Name>
+									<Description>Software BOOT0</Description>
+									<BitOffset>0x1A</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOOT0 taken from the option bit nBOOT0</Val>
+										<Val value="0x1">BOOT0 taken from PH3/BOOT0 pin</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>nBOOT0</Name>
+									<Description>nBOOT0 option bit</Description>
+									<BitOffset>0x1B</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">nBOOT0 = 0</Val>
+										<Val value="0x1">nBOOT0 = 1</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>PA15_PUPEN</Name>
+									<Description>PA15 pull-up enable</Description>
+									<BitOffset>0x1C</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
+										<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>TZEN</Name>
+									<Description>Global TrustZone security enable</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Global TrustZone security disabled</Val>
+										<Val value="0x1">Global TrustZone security enabled</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Boot Configuration</Name>													
+							<Field>
+								<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+											<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+									<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+											<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x4002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
+								<AssignedBits>
+									<Bit config="6,7">
+										<Name>SECBOOTADD0</Name>
+										<Description>Secure boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+											<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+						<Field>
+							<Parameters address="0x4002204C" name="BOOT_LOCK" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6,7">
+									<Name>BOOT_LOCK</Name>
+									<Description> The boot is always forced to base address value programmed in SECBOOTADD0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Boot based on the pad/option bit configuration</Val>
+										<Val value="0x1">Boot forced from base address memory</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Secure Area </Name>
+						<Field>
+							<Parameters address="0x40022050" name="FLASH_SECWM1R1" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6">
+									<Name>SECWM1_PSTRT</Name>
+									<Description>Start page of first secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7">
+									<Name>SECWM1_PSTRT</Name>
+									<Description>Start page of first secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									 <BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="6">
+									<Name>SECWM1_PEND</Name>
+									<Description>End page of first secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7">
+									<Name>SECWM1_PEND</Name>
+									<Description>End page of first secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022054" name="FLASH_SECWM2R1" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6">
+									<Name>HDP1_PEND</Name>
+									<Description>End page of first hide protection area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x400" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7">
+									<Name>HDP1_PEND</Name>
+									<Description>End page of first hide protection area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+								<Bit config="6,7">
+									<Name>HDP1EN</Name>
+									<Description>Hide protection first area enable</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">No HDP area 1</Val>
+										<Val value="0x1">HDP first area is enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>						
+						</Field>
+					</Category>
+					<Category>
+						<Name>Write Protection 1</Name>
+						<Field>
+							<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6,8">
+									<Name>WRP1A_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+									<Name>WRP1A_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="6,8">
+									<Name>WRP1A_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+									<Name>WRP1A_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1A</Name>
+									<Description>Bank 1 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1A start and end pages locked</Val>
+										<Val value="0x1">WRP1A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6,8">
+									<Name>WRP1B_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+									<Name>WRP1B_PSTRT</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="6,8">
+									<Name>WRP1B_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+									<Name>WRP1B_PEND</Name>
+									<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_1B</Name>
+									<Description>Bank 1 WPR second area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1B start and end pages locked</Val>
+										<Val value="0x1">WRP1B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Secure area 2</Name>
+						<Field>
+							<Parameters address="0x40022060" name="FLASH_SECWM2R1" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7">
+									<Name>SECWM2_PSTRT</Name>
+									<Description>Start page of second secure area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08100000"/>
+								</Bit>
+								<Bit config="6">
+									<Name>SECWM2_PEND</Name>
+									 <Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7">
+									<Name>SECWM2_PEND</Name>
+									<Description>End page of second secure area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08100000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022064" name="FLASH_SECWM2R2" size="0x4"/>
+							<AssignedBits>									
+								<Bit config="6">
+									<Name>HDP2_PEND</Name>
+									<Description>End page of second hide protection area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x400" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7">
+									<Name>HDP2_PEND</Name>
+									<Description>End page of second hide protection area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+								<Bit config="6,7">
+									<Name>HDP2EN</Name>
+									<Description>Hide protection second area enable</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">No HDP area 2</Val>
+										<Val value="0x1">HDP second area is enabled</Val>
+									 </Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>Write Protection 2</Name>
+						<Field>
+							<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6,8">
+									<Name>WRP2A_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+										<Name>WRP2A_PSTRT</Name>
+										<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08100000"/>
+								</Bit>
+								<Bit config="6,8">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+									<Name>WRP2A_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									 <BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08100000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_2A</Name>
+									<Description>Bank 2 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2A start and end pages locked</Val>
+										<Val value="0x1">WRP2A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="6,8">
+										<Name>WRP2B_PSTRT</Name>
+										<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+									<Name>WRP2B_PSTRT</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08100000"/>
+								</Bit>
+								<Bit config="6,8">
+										<Name>WRP2B_PEND</Name>
+										<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+										<BitOffset>0x10</BitOffset>
+										<BitWidth>0x7</BitWidth>
+										<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="7,9">
+									<Name>WRP2B_PEND</Name>
+									<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+										<Equation multiplier="0x2000" offset="0x08100000"/>
+								</Bit>
+								<Bit>
+									<Name>UNLOCK_2B</Name>
+									<Description>Bank 2 WPR second area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP2B start and end pages locked</Val>
+										<Val value="0x1">WRP2B start and end pages unlocked</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+                    </Category>
+				</Bank>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x494.xml

@@ -5,7 +5,7 @@
 		<Vendor>STMicroelectronics</Vendor>
 		<Type>MCU</Type>
 		<CPU>Cortex-M0+/M4</CPU>
-		<Name>STM32WB15xx</Name>
+		<Name>STM32WB1xxx</Name>
 		<Series>STM32WB</Series>
 		<Description>ARM 32-bit Cortex-M0+ and ARM 32-bit Cortex-M4 dual core based device</Description>
 		<Configurations>
@@ -252,7 +252,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWGDSTDBY</Name>
+									<Name>IWDGSTDBY</Name>
 									<Description/>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -363,7 +363,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x400" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x08000400"/>
 								</Bit>
 								<Bit>
 									<Name>PCROP_RDP</Name>
@@ -400,7 +400,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x400" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x08000400"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -540,7 +540,7 @@
 									<BitOffset>0x19</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x2000BFFF"/>
+									<Equation multiplier="0x400" offset="0x20038000"/>
 								</Bit>
 								<Bit>
 									<Name>BRSD_A</Name>
@@ -559,7 +559,7 @@
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x2000B000"/>
+									<Equation multiplier="0x400" offset="0x20030000"/>
 								</Bit>
 								<Bit>
 									<Name>SBRV</Name>
@@ -567,7 +567,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x000" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>		
@@ -722,7 +722,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWGDSTDBY</Name>
+									<Name>IWDGSTDBY</Name>
 									<Description/>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -886,7 +886,7 @@
 									<BitOffset>0x19</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x20038000"/>
 								</Bit>
 								<Bit>
 									<Name>BRSD_A</Name>
@@ -905,7 +905,7 @@
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x20030000"/>
 								</Bit>
 								<Bit>
 									<Name>SBRV</Name>
@@ -913,7 +913,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x000" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -942,7 +942,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x400" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x08000400"/>
 								</Bit>
 								<Bit>
 									<Name>PCROP_RDP</Name>
@@ -979,7 +979,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x400" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x08000400"/>
 								</Bit>
 							</AssignedBits>
 						</Field>

tools/Data_Base/STM32_Prog_DB_0x495.xml

@@ -5,7 +5,7 @@
 		<Vendor>STMicroelectronics</Vendor>
 		<Type>MCU</Type>
 		<CPU>Cortex-M0+/M4</CPU>
-		<Name>STM32WBxx</Name>
+		<Name>STM32WB5x</Name>
 		<Series>STM32WB</Series>
 		<Description>ARM 32-bit Cortex-M0+ and ARM 32-bit Cortex-M4 dual core based device</Description>
 		<Configurations>
@@ -43,6 +43,9 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x100000"/>
+				<BootloaderVersion address="0x1FFF6FFE"/>
+				<DBGMCU_CR address="0xE0042004" mask="0x007"/>
+				<DBGMCU_APB1_FZ address="0xE0042008" mask="0x1800"/>
 				<!-- 1024KB Single Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 1024 Kbytes Embedded Flash" size="0x100000"/>
@@ -251,7 +254,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWGDSTDBY</Name>
+									<Name>IWDGSTDBY</Name>
 									<Description/>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -442,7 +445,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>FSD</Name>
@@ -499,7 +502,7 @@
 									<BitOffset>0x19</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x2000BFFF"/>
+									<Equation multiplier="0x400" offset="0x20038000"/>
 								</Bit>
 								<Bit>
 									<Name>BRSD</Name>
@@ -518,7 +521,7 @@
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x2000B000"/>
+									<Equation multiplier="0x400" offset="0x20030000"/>
 								</Bit>
 								<Bit>
 									<Name>SBRV</Name>
@@ -526,7 +529,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x12</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x000" offset="0x20000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -681,7 +684,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWGDSTDBY</Name>
+									<Name>IWDGSTDBY</Name>
 									<Description/>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -755,6 +758,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>FSD</Name>
@@ -811,6 +815,7 @@
 									<BitOffset>0x19</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x400" offset="0x20038000"/>
 								</Bit>
 								<Bit>
 									<Name>BRSD</Name>
@@ -829,6 +834,7 @@
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x400" offset="0x20030000"/>
 								</Bit>
 								<Bit>
 									<Name>SBRV</Name>

tools/Data_Base/STM32_Prog_DB_0x496.xml

@@ -43,6 +43,7 @@
 				<ErasedValue>0x00</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x80000"/>
+				<BootloaderVersion address="0x1FFF6FFE"/>
 				<!-- 1024KB Single Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 512 Kbytes Embedded Flash" size="0x80000"/>
@@ -251,7 +252,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWGDSTDBY</Name>
+									<Name>IWDGSTDBY</Name>
 									<Description/>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -671,7 +672,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWGDSTDBY</Name>
+									<Name>IWDGSTDBY</Name>
 									<Description/>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>

tools/Data_Base/STM32_Prog_DB_0x497.xml

@@ -10,7 +10,14 @@
 		<Description>ARM 32-bit Cortex-M0+ and ARM 32-bit Cortex-M4 dual core based device</Description>
 		<Configurations>
 			<!-- JTAG_SWD Interface -->
-			<Interface name="JTAG_SWD"/>
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0">	<!-- Single Core -->
+					<DBANK reference="0x0"> <ReadRegister address="0x1FFF7550" mask="0x00000100" value="0x0"/> </DBANK>
+				</Configuration>
+				<Configuration number="0x1">	<!-- Dual Core -->
+					<DBANK reference="0x0"> <ReadRegister address="0x1FFF7550" mask="0x00000100" value="0x00000100"/> </DBANK>
+				</Configuration>
+			</Interface>
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader"/>
 		</Configurations>
@@ -43,6 +50,7 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x40000"/>
+				<BootloaderVersion address="0x1FFF3EFE"/>
 				<!-- 1024KB Single Bank -->
 				<Configuration>
 					<Parameters address="0x08000000" name=" 256 Kbytes Embedded Flash" size="0x40000"/>
@@ -294,7 +302,7 @@
 										<Val value="0x1">CPU1 CM4 Boot lock enabled</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>C2BOOT_LOCK</Name>
 									<Description/>
 									<BitOffset>0x1F</BitOffset>
@@ -310,7 +318,7 @@
 						<Field>
 							<Parameters address="0x5800403C" name="FLASH_IPCCBR" size="0x1"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="1">
 									<Name>IPCCDBA</Name>
 									<Description>IPCC mailbox data buffer base address</Description>
 									<BitOffset>0x0</BitOffset>
@@ -458,14 +466,14 @@
 						<Field>
 							<Parameters address="0x58004080" name="FLASH_SFR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="1">
 									<Name>SFSA</Name>
 									<Description>This bit can only be accessed by software when HDPADIS = 0. When FSD=0: system and Flash secure. SFSA[6:0] contain the start address of the first 2 kB page of the secure Flash area.</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>FSD</Name>
 									<Description/>
 									<BitOffset>0x7</BitOffset>
@@ -476,7 +484,7 @@
 										<Val value="0x1">System and Flash non-secure. This bit can only be accessed when HDPADIS = 0</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>DDS</Name>
 									<Description/>
 									<BitOffset>0xC</BitOffset>
@@ -487,14 +495,14 @@
 										<Val value="0x1">CPU2 debug access disabled (when also enabled by C2SWDBGEN)</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>HDPSA</Name>
 									<Description>HDPSA[6:0] contain the start address of the first 2 kB page of the User Flash hide protection area. This bit field can only be accessed by software when HDPADIS = 0. When FSD=0 and HDPAD = 0: User Flash hide protection area enabled.</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>HDPAD</Name>
 									<Description>User Flash hide protection area disabled. This bit can only be accessed by software when HDPADIS = 0</Description>
 									<BitOffset>0x17</BitOffset>
@@ -506,7 +514,7 @@
 									</Values>
 									
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>SUBGHSPISD</Name>
 									<Description>SPI3 security disable. This bit can only be accessed by software when HDPADIS = 0. FSD=1: SPI3 security is disabled</Description>
 									<BitOffset>0x1F</BitOffset>
@@ -522,7 +530,7 @@
 						<Field>
 							<Parameters address="0x58004084" name="FLASH_SRRVR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="1">
 									<Name>C2OPT</Name>
 									<Description/>
 									<BitOffset>0x1F</BitOffset>
@@ -533,7 +541,7 @@
 										<Val value="0x1">SBRV will address Flash memory, from start address 0x0800 0000 + SBRV.</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>NBRSD</Name>
 									<Description/>
 									<BitOffset>0x1E</BitOffset>
@@ -544,14 +552,14 @@
 										<Val value="0x1">SRAM1 is non-secure if FSD=0 and secure otherwise. This bit can only be accessed when HDPADIS = 0</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>SNBRSA</Name>
 									<Description>SNBRSA[4:0] contain the start address of the first 1 kB page of the secure &quot;non-backup&quot; SRAM1 area. To keep the tool working you have to set a value greater or equal to 0xC</Description>
 									<BitOffset>0x19</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>BRSD</Name>
 									<Description/>
 									<BitOffset>0x17</BitOffset>
@@ -562,14 +570,14 @@
 										<Val value="0x1">SRAM2 is non-secure if FSD=0 and secure otherwise. This bit can only be accessed when HDPADIS = 0</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>SBRSA</Name>
 									<Description>SBRSA[4:0] contain the start address of the first 1 kB page of the secure backup SRAM2 area. To keep the tool working you have to set a value less than 0x15</Description>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-								<Bit>
+								<Bit config="1">
 									<Name>SBRV</Name>
 									<Description>SBRV[15:0] contain the word (4B) aligned CPU2 boot reset start address offset within the selected memory area by C2OPT.</Description>
 									<BitOffset>0x0</BitOffset>

tools/Data_Base/STM32_Prog_DB_0x501.xml

@@ -45,1774 +45,2707 @@
 				<Bank>
 					<Parameters address="0x0" name="Bank 1" size="0x400"/>
 					<Category>
-						<Name>OTP</Name>
+						<Name>Struct version</Name>
 						<Field>
-							<Parameters address="0x0" name="Struct_version" size="0x4"/>
+							<Parameters address="0x0" name="STRUCT VERSION" size="0x4"/>
 							<AssignedBits>
 								<Bit>
-									<Name>none</Name>
-									<Description>none</Description>
+									<Name>version</Name>
+									<Description>Structure version</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+					</Category>
+					<Category>
+						<Name>Global</Name>
 						<Field>
-							<Parameters address="0x4" name="BSEC_OTP_CONFIG" size="0x4"/>
+							<Parameters address="0x4" name="GLOBAL STATE" size="0x4"/>
 							<AssignedBits>
 								<Bit>
-									<Name>TR</Name>
-									<Description>set SAFMEM Ring current level, default value = 0b00</Description>
-									<BitOffset>0x7</BitOffset>
-									<BitWidth>0x2</BitWidth>
+									<Name>Status</Name>
+									<Description>Structure global state</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					<Category>
+						<Name>OTP0</Name>
+							<Field>
+								<Parameters address="0x8" name="CFG0" size="0x8"/>
+								<AssignedBits>
+									<Bit>
+										<Name>Data0</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>Status0</Name>
+										<Description>Status</Description>
+										<BitOffset>0x4</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>R</Access>
+									</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+						<Category>
+						<Name>OTP1</Name>
+							<Field>
+								<Parameters address="0x10" name="CFG1" size="0x8"/>
+								<AssignedBits>
+									<Bit>
+										<Name>Data1</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>Status1</Name>
+										<Description>Status</Description>
+										<BitOffset>0x4</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>R</Access>
+									</Bit>	
+									<Bit>
+										<Name>RPN</Name>
+										<Description>RPN Coding</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0xC</BitWidth>
+										<Access>R</Access>
+										<Values>
+											<Val value="0x6C9">STM32MP131A</Val>
+											<Val value="0x6C8">STM32MP131C</Val>
+											<Val value="0xEC9">STM32MP131D</Val>
+											<Val value="0xEC8">STM32MP131F</Val>
+											<Val value="0x0C1">STM32MP133A</Val>
+											<Val value="0x0C0">STM32MP133C</Val>
+											<Val value="0x8C1">STM32MP133D</Val>
+											<Val value="0x8C0">STM32MP133F</Val>
+											<Val value="0x001">STM32MP135A</Val>
+											<Val value="0x000">STM32MP135C</Val>
+											<Val value="0x801">STM32MP135D</Val>
+											<Val value="0x800">STM32MP135F</Val>
+									</Values>
+									</Bit>	
+								</AssignedBits>
+							</Field>
+						</Category>
+						<Category>
+						<Name>OTP2</Name>
+						<Field>
+							<Parameters address="0x18" name="CFG2" size="0x8"/>
+							<AssignedBits>
+									<Bit>
+										<Name>Data2</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+								<Bit>
+									<Name>Status2</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+						<Category>
+						<Name>OTP3</Name>
+						<Field>
+							<Parameters address="0x20" name="CFG3" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+										<Name>Data3</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+								<Bit>
+									<Name>Status3</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+									<Bit>
+										<Name>qspi_not_default_af</Name>
+										<Description>0:QSPI uses default hard coded AFmux 1:QSPI no default AFmux</Description>
+										<BitOffset>0x0</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>emmc_if_id</Name>
+										<Description>0:Source is default SDMMC2  1:SDMMC1 2: SDMMC2</Description>
+										<BitOffset>0x1</BitOffset>
+										<BitWidth>0x2</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>sd_if_id</Name>
+										<Description>0:Source is default SDMMC1 1:SDMMC1 2:SDMMC2</Description>
+										<BitOffset>0x4</BitOffset>
+										<BitWidth>0x2</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>no_cpu_pll</Name>
+										<Description>0:PLLs for CPU/AXI are enable 1:PLLs for CPU/AXI are disable</Description>
+										<BitOffset>0x5</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>no_usb_dp_pullup</Name>
+										<Description>0:USB DP pull-up is set  1: USB DP pull-up is not set</Description>
+										<BitOffset>0x6</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>uart_instances_disabled</Name>
+										<Description>Disable instance 0x1: Reserved 0x2: USART2 0x4: USART3 0x8: USART4 0x10: USART5 0x20: USART6 0x40: USART7 0x80: USART8 </Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>no_data_cache</Name>
+										<Description>0:Data cache is used by bootrom 1:Data cache is not used by bootrom </Description>
+										<BitOffset>0xF</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>boot_source_disable</Name>
+										<Description>Disable boot source 0x1: FMC 0x2: QSPI NOR 0x4: eMMC 0x8: SD 0x10: UART 0x20: USB 0x40: QSPI NAND </Description>
+										<BitOffset>0x17</BitOffset>
+										<BitWidth>0x8</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>second_boot_source</Name>
+										<Description>0:NOT defined 1:FMC NAND 2:QSPI NOR 3:eMMC 4:SD 5:QSPI NAND</Description>
+										<BitOffset>0x18</BitOffset>
+										<BitWidth>0x3</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>primary_boot_source</Name>
+										<Description>0:NOT defined 1:FMC NAND 2:QSPI NOR 3:eMMC 4:SD 5:QSPI NAND</Description>
+										<BitOffset>0x1B</BitOffset>
+										<BitWidth>0x3</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+									<Bit>
+										<Name>HSE value</Name>
+										<Description>0: HSE is autodetected 1: 24 MHz 2: 25 MHz 3: 26 MHz</Description>
+										<BitOffset>0x1E</BitOffset>
+										<BitWidth>0x2</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+						<Category>
+						<Name>OTP4</Name>
+						<Field>
+							<Parameters address="0x28" name="CFG4" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+										<Name>Data4</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+								<Bit>
+									<Name>Status4</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+						<Category>
+						<Name>OTP5</Name>
+						<Field>
+							<Parameters address="0x30" name="CFG5" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+										<Name>Data5</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+								<Bit>
+									<Name>Status5</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+								<Bit>
+									<Name>mode0</Name>
+									<Description></Description>
+									<BitOffset>0x0</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>PRGWIDTH</Name>
-									<Description>SAFMEM Programming Pulse Width, default value = 0b0001</Description>
-									<BitOffset>0x3</BitOffset>
+									<Name>afmux0</Name>
+									<Description>AF mux value between 0 and 15</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>FRC</Name>
-									<Description>SAFMEM CLOCK frequency range selection, default value = 0b11</Description>
-									<BitOffset>0x1</BitOffset>
-									<BitWidth>0x2</BitWidth>
+									<Name>pin0</Name>
+									<Description>pin id between 0 and 15 for GPIOA to GPIOJ and between 0 and 7 for GPIOK and GPIOZ</Description>
+									<BitOffset>0x8</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>PWRUP</Name>
-									<Description>SAFMEM Power up control</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>port0</Name>
+									<Description>0: Unused 1: Bank A 2: Bank B 3: Bank C 4: Bank D 5: Bank E 6: Bank F 7: Bank G 8: Bank H 9: Bank I 10-15: Unused</Description>
+									<BitOffset>0xC</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>mode1</Name>
+									<Description>idem CFG5 mode0</Description>
+									<BitOffset>0x10</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>afmux1</Name>
+									<Description>idem CFG5 afmux0</Description>
+									<BitOffset>0x14</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+									<Bit>
+									<Name>pin1</Name>
+									<Description>idem CFG5 pin0</Description>
+									<BitOffset>0x18</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>port1</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x1C</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP6</Name>
 						<Field>
-							<Parameters address="0xC" name="BSEC_OTP_Status" size="0x4"/>
+							<Parameters address="0x38" name="CFG6" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>BIST2LOCK</Name>
-									<Description>0: BIST2 is not locked, 1: BIST2 is locked.</Description>
-									<BitOffset>0x7</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
-								</Bit>
+										<Name>Data6</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BIST1LOCK</Name>
-									<Description>0: BIST1 is not locked, 1: BIST1 is locked.</Description>
-									<BitOffset>0x6</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>Status6</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 								<Bit>
-									<Name>PWRON</Name>
-									<Description>0: SAFMEM is in Power Off, 1: SAFMEM is in Power On.</Description>
-									<BitOffset>0x5</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Name>mode2</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x0</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>PROGFAIL</Name>
-									<Description>0: SAFMEM last programming was successful, 1: SAFMEM last programming failed.</Description>
-									<BitOffset>0x4</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Name>afmux2</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>BUSY</Name>
-									<Description>0: SAFMEM is Idle, 1: SAFMEM operation is on going.</Description>
-									<BitOffset>0x3</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Name>pin2</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x8</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>								
+								<Bit>
+									<Name>port2</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0xC</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>								
+								<Bit>
+									<Name>mode3</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x10</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>INVALID</Name>
-									<Description>0: OTP mode is not OTP-INVALID, 1: OTP mode is OTP-INVALID.</Description>
-									<BitOffset>0x2</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Name>afmux3</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x14</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>FULLDBG</Name>
-									<Description>0: OTP mode is OTP-OPEN1, 1: OTP mode is OTP-OPEN2.</Description>
-									<BitOffset>0x1</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Name>pin3</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x18</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>SECURE</Name>
-									<Description>0: OTP mode is not OTP-SECURED, 1: OTP mode is OTP-SECURED.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Name>port3</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x1C</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP7</Name>
 						<Field>
-							<Parameters address="0x10" name="BSEC_OTP_LOCK" size="0x4"/>
+							<Parameters address="0x40" name="CFG7" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>GPLOCK</Name>
-									<Description>0: SAFMEM Programming is allowed, 1: SAFMEM Programming is disabled until next sytem reste.</Description>
-									<BitOffset>0x4</BitOffset>
-									<BitWidth>0x1</BitWidth>
+										<Name>Data7</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+								<Bit>
+									<Name>Status7</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+								<Bit>
+									<Name>mode4</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x0</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>FENREG</Name>
-									<Description>0: BSEC_FENABLE register is not Locked, 1: BSEC_FENABLE register is Locked until the next System-Reset.</Description>
-									<BitOffset>0x3</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>afmux4</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>DENREG</Name>
-									<Description>0: BSEC_DENABLE register is not Locked, 1: BSEC_DENABLE register is Locked until the next System-Reset.</Description>
-									<BitOffset>0x2</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>pin4</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x8</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>								
+								<Bit>
+									<Name>port4</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0xC</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>								
+								<Bit>
+									<Name>mode5</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x10</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>OTP</Name>
-									<Description>0: upper OTP region access is not locked, 1: upper OTP region access is Locked until the next System-Reset, when locked, the upper region OTP can not be R out from SAFMEM.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>afmux5</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x14</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>pin5</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x18</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>port5</Name>
+									<Description>idem CFG5 port0</Description>
+									<BitOffset>0x1C</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP8</Name>
 						<Field>
-							<Parameters address="0x14" name="BSEC_DENABLE" size="0x4"/>
+							<Parameters address="0x48" name="CFG8" size="0x8"/>
 							<AssignedBits>
+									<Bit>
+										<Name>Data8</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>DBGSWENABLE</Name>
-									<Description>Control Self Hosted Debug enable with signal dbgswenable. 0: memory-mapped accesses to all ETM registers are disabled and return Error, 1: no effect on external debugger accesses.</Description>
-									<BitOffset>0xA</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
+									<Name>Status8</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
 								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+						<Category>
+						<Name>OTP9</Name>
+						<Field>
+							<Parameters address="0x50" name="CFG9" size="0x8"/>
+							<AssignedBits>
+									<Bit>
+										<Name>Data9</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>CFGSDISABLE</Name>
-									<Description>Write access to secure GIC registers disable with signal: cfgsdisable. 0: no effect, all GIC registers can be accessed, 1: Disable write access to some Secure GIC registers.</Description>
-									<BitOffset>0x9</BitOffset>
+									<Name>Status9</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+								<Bit>
+									<Name>boot_traces_disabled</Name>
+									<Description>0: No 1: Yes</Description>
+									<BitOffset>0x0</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>CP15SDISABLE</Name>
-									<Description>Write access to some secure Cortex-A7 CP15 registers is disabled for CPUx. 0: All CP15 registers can be accessed, 1: Disable write access to some Secure CP15 registers into Cortex-A7 corresponding CPU.</Description>
-									<BitOffset>0x7</BitOffset>
-									<BitWidth>0x2</BitWidth>
+									<Name>hse_frequency_autodetection_disable</Name>
+									<Description>0: No 1: Yes</Description>
+									<BitOffset>0x1</BitOffset> <!--  -->
+									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>SPNIDEN</Name>
-									<Description>Secure Privilege Non Invasive Debug enable with signal spiden. 0: Secure Privilege Non Invasive Debug Disabled, 1: Secure Privilege Non Invasive Debug Enabled.</Description>
-									<BitOffset>0x6</BitOffset>
+									<Name>hse_bypass_detection_disable</Name>
+									<Description>0: No 1: Yes</Description>
+									<BitOffset>0x2</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>SPIDEN</Name>
-									<Description>Secure Privilege Invasive Debug enable with signal spniden. 0: Secure Privilege Invasive Debug Disabled, 1: Secure Privilege Invasive Debug Enabled.</Description>
-									<BitOffset>0x5</BitOffset>
+									<Name>emmc_128k_boot_partition</Name>
+									<Description>0: No 1: Yes</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>HDPEN</Name>
-									<Description>Hardware Debug Port enable with signal hdpen. 0: Hardware Debug Port Disabled, 1: Hardware Debug Port Enabled.</Description>
-									<BitOffset>0x4</BitOffset>
+									<Name>ssp_req</Name>
+									<Description></Description>
+									<BitOffset>0x5</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>DEVICEEN</Name>
-									<Description>Controls the access to Debug component via external debug port by signal deviceen. 0: Disabled, 1: Enabled.</Description>
-									<BitOffset>0x3</BitOffset>
+									<Name>ssp_success</Name>
+									<Description></Description>
+									<BitOffset>0x6</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>NIDEN</Name>
-									<Description>Non Invasive Debug enable with signal niden. 0: Non Invasive Debug Disabled, 1: Non Invasive Debug Enabled.</Description>
-									<BitOffset>0x2</BitOffset>
+									<Name>fsbl_decrypt_prio</Name>
+									<Description>0: Use CRYP 1: Use SAES</Description>
+									<BitOffset>0x7</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>DBGEN</Name>
-									<Description>Debug enable with signal dbgen. 0: Disabled, 1: Enabled.</Description>
-									<BitOffset>0x1</BitOffset>
+									<Name>spinand_need_plane_select</Name>
+									<Description>0:SPI NAND plane select not need 1:SPI NAND plane select is needed</Description>
+									<BitOffset>0xE</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>DFTEN</Name>
-									<Description>DFT enable with signal dften. 0: DFT Disabled, 1: DFT Enabled.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>nand_number_of_ecc_bits</Name>
+									<Description></Description>
+									<BitOffset>0xF</BitOffset> <!--  -->
+									<BitWidth>0x3</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x18" name="BSEC_FENABLE" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>CAN_disable</Name>
-									<Description>0: CAN interface is enabled, 1: CAN interface is disabled.</Description>
-									<BitOffset>0x3</BitOffset>
+									<Name>nand_bus_width</Name>
+									<Description>0:8 bit 1:16 bit</Description>
+									<BitOffset>0x12</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>GPU_disable</Name>
-									<Description>0: GPU enabled, 1: GPU disabled.</Description>
-									<BitOffset>0x2</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>nand_nb_of_blocks</Name>
+									<Description>Number of blocks in unit of 256 blocks</Description>
+									<BitOffset>0x13</BitOffset> <!--  -->
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>Dual_A7_disable</Name>
-									<Description>0: Cortex A7 Dual CPU, 1: Cortex A7 Single CPU.</Description>
-									<BitOffset>0x1</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>nand_block_size</Name>
+									<Description>0:64 pages per block 1:128 pages per block 2:256 pages per block</Description>
+									<BitOffset>0x1B</BitOffset> <!--  -->
+									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>Crypto_disable</Name>
-									<Description>0: All crypto HW accelerators are enabled(default), 1: All crypto HW accelerators are disabled for export license control.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<Name>nand_page_size</Name>
+									<Description>0:2 Kbytes 1:4 Kbytes 2:8 Kbytes</Description>
+									<BitOffset>0x1D</BitOffset> <!--  -->
+									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x1C" name="Write_R_Conf" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>W_R conf</Name>
-									<Description>This Bit determins weither the OTP file will be written in BSEC or programmed in SAFMEM</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>nand_param_stored_in_otp</Name>
+									<Description>0:No 1:Nand parameters bits 15 to 30 are used</Description>
+									<BitOffset>0x1F</BitOffset> <!--  -->
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP10</Name>
 						<Field>
-							<Parameters address="0x20" name="BSEC_OTP_DISTURBED0" size="0x4"/>
+							<Parameters address="0x58" name="CFG10" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data10</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BSEC_OTP_DISTURBED0</Name>
-									<Description>If the Bit is set to 1 that means that the last Ring of the corresponding word has been disturbed; abnormal Ring conditions in decoding circuitry and Ring voltages have been detected</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status10</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP11</Name>
 						<Field>
-							<Parameters address="0x24" name="BSEC_OTP_DISTURBED1" size="0x4"/>
+							<Parameters address="0x60" name="CFG11" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data11</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BSEC_OTP_DISTURBED1</Name>
-									<Description>If the Bit is set to 1 that means that the last Ring of the corresponding word has been disturbed; abnormal Ring conditions in decoding circuitry and Ring voltages have been detected</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status11</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP12</Name>
 						<Field>
-							<Parameters address="0x28" name="BSEC_OTP_DISTURBED2" size="0x4"/>
+							<Parameters address="0x68" name="CFG12" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data12</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BSEC_OTP_DISTURBED2</Name>
-									<Description>If the Bit is set to 1 that means that the last Ring of the corresponding word has been disturbed; abnormal Ring conditions in decoding circuitry and Ring voltages have been detected</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status12</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP13</Name>
 						<Field>
-							<Parameters address="0x38" name="BSEC_OTP_ERROR0" size="0x4"/>
+							<Parameters address="0x70" name="ID0" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data13</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BSEC_OTP_ERROR0</Name>
-									<Description>If the Bit is set to 1 that means that the last R operation of the word concerned has revealed a redundancy or ECC check error.</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status13</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP14</Name>
 						<Field>
-							<Parameters address="0x3C" name="BSEC_OTP_ERROR1" size="0x4"/>
+							<Parameters address="0x78" name="ID1" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data14</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BSEC_OTP_ERROR1</Name>
-									<Description>If the Bit is set to 1 that means that the last R operation of the word concerned has revealed a redundancy or ECC check error.</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status14</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP15</Name>
 						<Field>
-							<Parameters address="0x40" name="BSEC_OTP_ERROR2" size="0x4"/>
+							<Parameters address="0x80" name="ID2" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data15</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BSEC_OTP_ERROR2</Name>
-									<Description>If the Bit is set to 1 that means that the last R operation of the word concerned has revealed a redundancy or ECC check error.</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status15</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP16</Name>
 						<Field>
-							<Parameters address="0x50" name="BSEC_OTP_WRLOCK0" size="0x4"/>
+							<Parameters address="0x88" name="HW0" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_WRLOCK0</Name>
-									<Description>If the Bit is set to 1 that means that the correspanding OTP word is under programming permenant lock.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x54" name="BSEC_OTP_WRLOCK1" size="0x4"/>
-							<AssignedBits>
+										<Name>Data16</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>BSEC_OTP_WRLOCK1</Name>
-									<Description>If the Bit is set to 1 that means that the correspanding OTP word is under programming permenant lock.</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status16</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x58" name="BSEC_OTP_WRLOCK2" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_WRLOCK2</Name>
-									<Description>If the Bit is set to 1 that means that the correspanding OTP word is under programming permenant lock.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>I/O compensation  trim</Name>
+									<Description>Used for I/O calibration</Description>
+									<BitOffset>0x6</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x68" name="BSEC_OTP_SPLOCK0" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SPLOCK0</Name>
-									<Description>If the Bit is set to 1 that means that the correspanding OTP word is under programming sticky lock until next system-reset</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>1V8 reference trim</Name>
+									<Description>1V8 Regulator Trim</Description>
+									<BitOffset>0xC</BitOffset> <!--  -->
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x6C" name="BSEC_OTP_SPLOCK1" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SPLOCK1</Name>
-									<Description>If the Bit is set to 1 that means that the correspanding OTP word is under programming sticky lock until next system-reset</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>LSI trim</Name>
+									<Description></Description>
+									<BitOffset>0x10</BitOffset> <!--  -->
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x70" name="BSEC_OTP_SPLOCK2" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SPLOCK2</Name>
-									<Description>If the Bit is set to 1 that means that the correspanding OTP word is under programming sticky lock until next system-reset</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>1V1 reference trim</Name>
+									<Description>1V1 Regulator Trim</Description>
+									<BitOffset>0x16</BitOffset> <!--  -->
+									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP17</Name>
 						<Field>
-							<Parameters address="0x80" name="BSEC_OTP_SWLOCK0" size="0x4"/>
+							<Parameters address="0x90" name="HW1" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SWLOCK0</Name>
-									<Description>If the Bit is set to 1 that means that any attempt to write to the correspanding OTP shadow register will be prevented until next system-reset</Description>
-									<BitOffset>0x0</BitOffset>
+										<Name>Data17</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+								<Bit>
+									<Name>Status17</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x84" name="BSEC_OTP_SWLOCK1" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SWLOCK1</Name>
-									<Description>If the Bit is set to 1 that means that any attempt to write to the correspanding OTP shadow register will be prevented until next system-reset</Description>
+									<Name>CSITRIM</Name>
+									<Description>CSI Trim</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x8C" name="BSEC_OTP_SWLOCK2" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SWLOCK2</Name>
-									<Description>If the Bit is set to 1 that means that any attempt to write to the correspanding OTP shadow register will be prevented until next system-reset</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>HSITRIM</Name>
+									<Description>HSI Trim</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0xC</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x98" name="BSEC_OTP_SRLOCK0" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SRLOCK0</Name>
-									<Description>If the Bit is set to 1 that means that any attempt to reload to the correspanding OTP shadow register will be prevented until next system-reset. Instead a R command, shall clear the shadow register</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>TEMPHTRIM</Name>
+									<Description>High temperature threshold trimming</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x9C" name="BSEC_OTP_SRLOCK1" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SRLOCK1</Name>
-									<Description>If the Bit is set to 1 that means that any attempt to reload to the correspanding OTP shadow register will be prevented until next system-reset. Instead a R command, shall clear the shadow register</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>TEMPLTRIM</Name>
+									<Description>Low temperature threshold trimming</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xA0" name="BSEC_OTP_SRLOCK2" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>BSEC_OTP_SRLOCK2</Name>
-									<Description>If the Bit is set to 1 that means that any attempt to reload to the correspanding OTP shadow register will be prevented until next system-reset. Instead a R command, shall clear the shadow register</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>VBATHTRIM</Name>
+									<Description>High VBAT threshold trimming</Description>
+									<BitOffset>0x1C</BitOffset>
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP18</Name>
 						<Field>
-							<Parameters address="0xB0" name="CFG0" size="0x4"/>
+							<Parameters address="0x98" name="HW2" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data18</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>CFG0</Name>
-									<Description>These bits determins the OTP mode encoding</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
-									<Access>RW</Access>
+									<Name>Status18</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xB4" name="CFG1" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>fdis3</Name>
-									<Description>Disable CAN</Description>
+									<Name>IWDG1_HW</Name>
+									<Description>IWDG1 start 0:Start by software 1:Auto start</Description>
 									<BitOffset>0x3</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>fdis2</Name>
-									<Description>Disable GPU</Description>
-									<BitOffset>0x2</BitOffset>
+									<Name>IWDG2_HW</Name>
+									<Description>IWDG2 start 0:Start by software 1:Auto start</Description>
+									<BitOffset>0x4</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>fdis1</Name>
-									<Description>Disable CPU1</Description>
-									<BitOffset>0x1</BitOffset>
+									<Name>IWDG1_FZ_STOP</Name>
+									<Description>IWDG1 freeze in Stop 0:No 1:Yes</Description>
+									<BitOffset>0x5</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>fdis0</Name>
-									<Description>Disable Crypto (license export)</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>IWDG2_FZ_STOP</Name>
+									<Description>IWDG2 freeze in Stop 0:No 1:Yes</Description>
+									<BitOffset>0x6</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xB8" name="CFG2" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>rma_force</Name>
-									<Description>RMA force Bit</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>IWDG1_FZ_STANDBY</Name>
+									<Description>IWDG1 freeze in Standby 0:No 1:Yes</Description>
+									<BitOffset>0x7</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>rma_relock</Name>
-									<Description>RMA relock Bit</Description>
-									<BitOffset>0x1</BitOffset>
+									<Name>IWDG2_FZ_STANDBY</Name>
+									<Description>IWDG2 freeze in Standby 0:No 1:Yes</Description>
+									<BitOffset>0x8</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xBC" name="CFG3" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>CFG3</Name>
-									<Description>These bits determins the BOOT source definition</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>RNG_BYPASS_DISABLE</Name>
+									<Description>RNG noise observation 0:Enable 1:Disable</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xC0" name="CFG4" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>CFG4</Name>
-									<Description>These bits determins the BOOT monotonic counter</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>SELINBORH</Name>
+									<Description>00: BOR Disabled 01: BOR = 2.1V 10: BOR = 2.4V 11: BOR = 2.7V</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xC4" name="CFG5" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>CFG5</Name>
-									<Description>These bits determins the BOOT AFmux configuration</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xC8" name="CFG6" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>CFG6</Name>
-									<Description>These bits determins the BOOT AFmux configuration</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>PRODUCT_BELOW_2V5</Name>
+									<Description>Required when VDD is below 2.5 V to allow the SYSCFG high speed lowvoltage enable registers HSLVEN bits to be taken into account.</Description>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP19</Name>
 						<Field>
-							<Parameters address="0xCC" name="CFG7" size="0x4"/>
+							<Parameters address="0xA0" name="HW3" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data19</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>CFG7</Name>
-									<Description>These bits determins the BOOT AFmux configuration</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status19</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xD0" name="CFG8" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>CFG8</Name>
-									<Description>BOOT/Device configuration.</Description>
-									<BitOffset>0x2</BitOffset>
-									<BitWidth>0x1E</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>rma_relock</Name>
-									<Description>RMA relock Bit</Description>
-									<BitOffset>0x1</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 								<Bit>
-									<Name>rma_lock</Name>
-									<Description>RMA lock Bit</Description>
+									<Name>TS1_FMT0</Name>
+									<Description>DTS frequency measured freq at T0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x1</BitWidth>
+									<BitWidth>0x10</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xD4" name="CFG9" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>CFG9</Name>
-									<Description>These bits determin the device configuration.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>TS1_RAMP_COEF</Name>
+									<Description>DTS ramp coefficient</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x10</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP20</Name>
 						<Field>
-							<Parameters address="0xD8" name="CFG10" size="0x4"/>
+							<Parameters address="0xA8" name="HW4" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>CFG10</Name>
-									<Description>These bits determin the device configuration.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xDC" name="CFG11" size="0x4"/>
-							<AssignedBits>
+										<Name>Data20</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>CFG11</Name>
-									<Description>These bits determin the device configuration.</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status20</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xE0" name="CFG12" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>CFG12</Name>
-									<Description>These bits determin the device configuration.</Description>
+									<Name>TRIM_DTP_R</Name>
+									<Description>DTS R Trim</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xE4" name="ID0" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>ID0</Name>
-									<Description>Lot ID on 42bit (11LSB's)</Description>
-									<BitOffset>0x15</BitOffset>
-									<BitWidth>0xB</BitWidth>
+									<Name>TS1_T0</Name>
+									<Description>DTS T0 value</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>ID0</Name>
-									<Description>Wafer ID</Description>
+									<Name>VREFINT_CAL</Name>
+									<Description>ADC VBG measurement to correct for VREF</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x5</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>ID0</Name>
-									<Description>Wafer Y coordinates</Description>
-									<BitOffset>0x8</BitOffset>
-									<BitWidth>0x8</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>ID0</Name>
-									<Description>Wafer X coordinates</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x10</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP21</Name>
 						<Field>
-							<Parameters address="0xE8" name="ID1" size="0x4"/>
+							<Parameters address="0xB0" name="HW5" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>ID1</Name>
-									<Description>Lot ID on 42bit (31MSB's)</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xEC" name="ID2" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>ID2</Name>
-									<Description>Test program flow T[12],F[12],Q[12]</Description>
-									<BitOffset>0x14</BitOffset>
-									<BitWidth>0xC</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>ID2</Name>
-									<Description>FT program revision</Description>
-									<BitOffset>0xA</BitOffset>
-									<BitWidth>0xA</BitWidth>
-									<Access>RW</Access>
-								</Bit>
+										<Name>Data21</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>ID2</Name>
-									<Description>EWS program revision</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0xA</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xF0" name="HW0" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>HW0</Name>
-									<Description>Analog TRIM</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status21</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xF4" name="HW1" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>HW1</Name>
-									<Description>Analog TRIM</Description>
+									<Name>VREFBUFTRIM</Name>
+									<Description>6 trim bits for each of 4 VREFBUF settings</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<BitWidth>0x18</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xF8" name="HW2" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>HW2</Name>
-									<Description>Analog TRIM and hardware options</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>SD1COMPCELL</Name>
+									<Description>VDDSD1 I/O calibration</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0xFC" name="HW3" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>HW3</Name>
-									<Description>Analog TRIM</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>SD2COMPCELL</Name>
+									<Description>VDDSD2 I/O calibration</Description>
+									<BitOffset>0x1c</BitOffset>
+									<BitWidth>0x4</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP22</Name>
 						<Field>
-							<Parameters address="0x100" name="HW4" size="0x4"/>
+							<Parameters address="0xC8" name="HW6" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>HW4</Name>
-									<Description>not used yet</Description>
-									<BitOffset>0x0</BitOffset>
+										<Name>Data22</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
+								<Bit>
+									<Name>Status24</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP23</Name>
 						<Field>
-							<Parameters address="0x104" name="HW5" size="0x4"/>
+							<Parameters address="0xC8" name="HW7" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>HW5</Name>
-									<Description>memory repair bits</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Data23</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x108" name="HW6" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>HW6</Name>
-									<Description>memory repair bits</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status24</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x10C" name="HW7" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>HW7</Name>
-									<Description>reserved</Description>
+									<Name>TS_CAL1</Name>
+									<Description>ADC TEMP measurement at T0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<BitWidth>0x10</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x110" name="PKH0" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>PKH0</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x20</BitWidth>
+									<Name>TS_CAL2</Name>
+									<Description>ADC TEMP measurement at T1</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x10</BitWidth>
 									<Access>RW</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP24</Name>
 						<Field>
-							<Parameters address="0x114" name="PKH1" size="0x4"/>
+							<Parameters address="0xC8" name="PKH0" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data24</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>PKH1</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status24</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP25</Name>
 						<Field>
-							<Parameters address="0x118" name="PKH2" size="0x4"/>
+							<Parameters address="0xD0" name="PKH1" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data25</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>PKH2</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status25</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP26</Name>
 						<Field>
-							<Parameters address="0x11C" name="PKH3" size="0x4"/>
+							<Parameters address="0xD8" name="PKH2" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data26</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>PKH3</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status26</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP27</Name>
 						<Field>
-							<Parameters address="0x120" name="PKH4" size="0x4"/>
+							<Parameters address="0xE0" name="PKH3" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data27</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>PKH4</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status27</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP28</Name>
 						<Field>
-							<Parameters address="0x124" name="PKH5" size="0x4"/>
+							<Parameters address="0xE8" name="PKH4" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data28</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>PKH5</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status28</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP29</Name>
 						<Field>
-							<Parameters address="0x128" name="PKH6" size="0x4"/>
+							<Parameters address="0xF0" name="PKH5" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data29</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>PKH6</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status29</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP30</Name>
 						<Field>
-							<Parameters address="0x12C" name="PKH7" size="0x4"/>
+							<Parameters address="0xF8" name="PKH6" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data30</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>PKH7</Name>
-									<Description>Public Key Hash</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status30</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP31</Name>
 						<Field>
-							<Parameters address="0x130" name="XK0" size="0x4"/>
+							<Parameters address="0x100" name="PKH7" size="0x8"/>
 							<AssignedBits>
+																<Bit>
+										<Name>Data31</Name>
+										<Description>Data</Description>
+										<BitOffset>0x0</BitOffset> <!--  -->
+										<BitWidth>0x20</BitWidth>
+										<Access>RW</Access>
+									</Bit>
 								<Bit>
-									<Name>XK0</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status31</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP32</Name>
 						<Field>
-							<Parameters address="0x134" name="XK1" size="0x4"/>
+							<Parameters address="0x108" name="XK0" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK1</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
+									<Name>Data32</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x138" name="XK2" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>XK2</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status32</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP33</Name>
 						<Field>
-							<Parameters address="0x13C" name="XK3" size="0x4"/>
+							<Parameters address="0x110" name="XK1" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK3</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
+									<Name>Data33</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x140" name="XK4" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>XK4</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status33</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP34</Name>
 						<Field>
-							<Parameters address="0x144" name="XK5" size="0x4"/>
+							<Parameters address="0x118" name="XK2" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK5</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
+									<Name>Data34</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x148" name="XK6" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>XK6</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
-									<BitOffset>0x0</BitOffset>
+									<Name>Status34</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
 									<BitWidth>0x20</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP35</Name>
 						<Field>
-							<Parameters address="0x14C" name="XK7" size="0x4"/>
+							<Parameters address="0x120" name="XK3" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK7</Name>
-									<Description>ST ECDSA Private Key for SSP</Description>
+									<Name>Data</Name>
+									<Description>Data35</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status35</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP36</Name>
 						<Field>
-							<Parameters address="0x150" name="XK8" size="0x4"/>
+							<Parameters address="0x128" name="XK4" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK8</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data36</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status36</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP37</Name>
 						<Field>
-							<Parameters address="0x154" name="XK9" size="0x4"/>
+							<Parameters address="0x130" name="XK5" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK9</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data37</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status37</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP38</Name>
 						<Field>
-							<Parameters address="0x158" name="XK10" size="0x4"/>
+							<Parameters address="0x138" name="XK6" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK10</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data38</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status38</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP39</Name>
 						<Field>
-							<Parameters address="0x15C" name="XK11" size="0x4"/>
+							<Parameters address="0x140" name="XK7" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK11</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data39</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status39</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP40</Name>
 						<Field>
-							<Parameters address="0x160" name="XK12" size="0x4"/>
+							<Parameters address="0x148" name="XK8" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK12</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data40</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status40</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP41</Name>
 						<Field>
-							<Parameters address="0x164" name="XK13" size="0x4"/>
+							<Parameters address="0x150" name="XK9" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK13</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data41</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status41</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP42</Name>
 						<Field>
-							<Parameters address="0x168" name="XK14" size="0x4"/>
+							<Parameters address="0x158" name="XK10" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK14</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data42</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status42</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP43</Name>
 						<Field>
-							<Parameters address="0x16C" name="XK15" size="0x4"/>
+							<Parameters address="0x160" name="XK11" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK15</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data43</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status43</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP44</Name>
 						<Field>
-							<Parameters address="0x170" name="XK16" size="0x4"/>
+							<Parameters address="0x168" name="XK12" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK16</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data44</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status44</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP45</Name>
 						<Field>
-							<Parameters address="0x174" name="XK17" size="0x4"/>
+							<Parameters address="0x170" name="XK13" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK17</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data45</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status45</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP46</Name>
 						<Field>
-							<Parameters address="0x178" name="XK18" size="0x4"/>
+							<Parameters address="0x178" name="XK14" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK18</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data46</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status46</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP47</Name>
 						<Field>
-							<Parameters address="0x17C" name="XK19" size="0x4"/>
+							<Parameters address="0x180" name="XK15" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK19</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data47</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status47</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP48</Name>
 						<Field>
-							<Parameters address="0x180" name="XK20" size="0x4"/>
+							<Parameters address="0x188" name="XK16" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK20</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data48</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status48</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP49</Name>
 						<Field>
-							<Parameters address="0x184" name="XK21" size="0x4"/>
+							<Parameters address="0x190" name="XK17" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK21</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data49</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status49</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP50</Name>
 						<Field>
-							<Parameters address="0x188" name="XK22" size="0x4"/>
+							<Parameters address="0x198" name="XK18" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK22</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data50</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status50</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP51</Name>
 						<Field>
-							<Parameters address="0x18C" name="XK23" size="0x4"/>
+							<Parameters address="0x1A0" name="XK19" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK23</Name>
-									<Description>ST Public ECDSA Chip Certificate for SSP</Description>
+									<Name>Data51</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status51</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP52</Name>
 						<Field>
-							<Parameters address="0x190" name="XK24" size="0x4"/>
+							<Parameters address="0x1A8" name="XK20" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK24</Name>
-									<Description>RMA lock and relock passwords</Description>
+									<Name>Data52</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status52</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP53</Name>
 						<Field>
-							<Parameters address="0x194" name="XK25" size="0x4"/>
+							<Parameters address="0x1B0" name="XK21" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK25</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data53</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status53</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP54</Name>
 						<Field>
-							<Parameters address="0x198" name="XK26" size="0x4"/>
+							<Parameters address="0x1B8" name="XK22" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK26</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data54</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status54</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP55</Name>
 						<Field>
-							<Parameters address="0x19C" name="XK27" size="0x4"/>
+							<Parameters address="0x1C0" name="XK23" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK27</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data55</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status55</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP56</Name>
 						<Field>
-							<Parameters address="0x1A0" name="XK28" size="0x4"/>
+							<Parameters address="0x1C8" name="XK24" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK28</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data56</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status56</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP57</Name>
 						<Field>
-							<Parameters address="0x1A4" name="XK29" size="0x4"/>
+							<Parameters address="0x1D0" name="XK25" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK29</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data57</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status57</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP58</Name>
 						<Field>
-							<Parameters address="0x1A8" name="XK30" size="0x4"/>
+							<Parameters address="0x1D8" name="XK26" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK30</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data58</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status58</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP59</Name>
 						<Field>
-							<Parameters address="0x1AC" name="XK31" size="0x4"/>
+							<Parameters address="0x1E0" name="XK27" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK31</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data59</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status59</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP60</Name>
 						<Field>
-							<Parameters address="0x1B0" name="XK32" size="0x4"/>
+							<Parameters address="0x1E8" name="XK28" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK32</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data60</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status60</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP61</Name>
 						<Field>
-							<Parameters address="0x1B4" name="XK33" size="0x4"/>
+							<Parameters address="0x1F0" name="XK29" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK33</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data61</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status61</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP62</Name>
 						<Field>
-							<Parameters address="0x1B8" name="XK34" size="0x4"/>
+							<Parameters address="0x1F8" name="XK30" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK34</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data62</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status62</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP63</Name>
 						<Field>
-							<Parameters address="0x1BC" name="XK35" size="0x4"/>
+							<Parameters address="0x200" name="XK31" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK35</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data63</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status63</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP64</Name>
 						<Field>
-							<Parameters address="0x1C0" name="XK36" size="0x4"/>
+							<Parameters address="0x208" name="XK32" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK36</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data64</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status64</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP65</Name>
 						<Field>
-							<Parameters address="0x1C4" name="XK37" size="0x4"/>
+							<Parameters address="0x210" name="XK33" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK37</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data65</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status65</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP66</Name>
 						<Field>
-							<Parameters address="0x1C8" name="XK38" size="0x4"/>
+							<Parameters address="0x218" name="XK34" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK38</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data66</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status66</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP67</Name>
 						<Field>
-							<Parameters address="0x1CC" name="XK39" size="0x4"/>
+							<Parameters address="0x220" name="XK35" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK39</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data67</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status67</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP68</Name>
 						<Field>
-							<Parameters address="0x1D0" name="XK40" size="0x4"/>
+							<Parameters address="0x228" name="XK36" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK40</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data68</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status68</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP69</Name>
 						<Field>
-							<Parameters address="0x1D4" name="XK41" size="0x4"/>
+							<Parameters address="0x230" name="XK37" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK41</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data69</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status69</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP70</Name>
 						<Field>
-							<Parameters address="0x1D8" name="XK42" size="0x4"/>
+							<Parameters address="0x238" name="XK38" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK42</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data70</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status70</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP71</Name>
 						<Field>
-							<Parameters address="0x1DC" name="XK43" size="0x4"/>
+							<Parameters address="0x240" name="XK39" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK43</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data71</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status71</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP72</Name>
 						<Field>
-							<Parameters address="0x1E0" name="XK44" size="0x4"/>
+							<Parameters address="0x248" name="XK40" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK44</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data72</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status72</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP73</Name>
 						<Field>
-							<Parameters address="0x1E4" name="XK45" size="0x4"/>
+							<Parameters address="0x250" name="XK41" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK45</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data73</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status73</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP74</Name>
 						<Field>
-							<Parameters address="0x1E8" name="XK46" size="0x4"/>
+							<Parameters address="0x258" name="XK42" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK46</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data74</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status74</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP75</Name>
 						<Field>
-							<Parameters address="0x1EC" name="XK47" size="0x4"/>
+							<Parameters address="0x260" name="XK43" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK47</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data75</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status75</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP76</Name>
 						<Field>
-							<Parameters address="0x1F0" name="XK48" size="0x4"/>
+							<Parameters address="0x268" name="XK44" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK48</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data76</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status76</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP77</Name>
 						<Field>
-							<Parameters address="0x1F4" name="XK49" size="0x4"/>
+							<Parameters address="0x270" name="XK45" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK49</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data77</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status77</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP78</Name>
 						<Field>
-							<Parameters address="0x1F8" name="XK50" size="0x4"/>
+							<Parameters address="0x278" name="XK46" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK50</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data78</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status78</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP79</Name>
 						<Field>
-							<Parameters address="0x1FC" name="XK51" size="0x4"/>
+							<Parameters address="0x280" name="XK47" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK51</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data79</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status79</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP80</Name>
 						<Field>
-							<Parameters address="0x200" name="XK52" size="0x4"/>
+							<Parameters address="0x288" name="XK48" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK52</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data80</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status80</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP81</Name>
 						<Field>
-							<Parameters address="0x204" name="XK53" size="0x4"/>
+							<Parameters address="0x290" name="XK49" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK53</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data81</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status81</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP82</Name>
 						<Field>
-							<Parameters address="0x208" name="XK54" size="0x4"/>
+							<Parameters address="0x298" name="XK50" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK54</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data82</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status82</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP83</Name>
 						<Field>
-							<Parameters address="0x20C" name="XK55" size="0x4"/>
+							<Parameters address="0x2A0" name="XK51" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK55</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data83</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status83</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP84</Name>
 						<Field>
-							<Parameters address="0x210" name="XK56" size="0x4"/>
+							<Parameters address="0x2A8" name="XK52" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK56</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data84</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status84</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP85</Name>
 						<Field>
-							<Parameters address="0x214" name="XK57" size="0x4"/>
+							<Parameters address="0x2B0" name="XK53" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK57</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data85</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status85</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP86</Name>
 						<Field>
-							<Parameters address="0x218" name="XK58" size="0x4"/>
+							<Parameters address="0x2B8" name="XK54" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK58</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data86</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status86</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP87</Name>
 						<Field>
-							<Parameters address="0x21C" name="XK59" size="0x4"/>
+							<Parameters address="0x2C0" name="XK55" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK59</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data87</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status87</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP88</Name>
 						<Field>
-							<Parameters address="0x220" name="XK60" size="0x4"/>
+							<Parameters address="0x2C8" name="XK56" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK60</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data88</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status88</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP89</Name>
 						<Field>
-							<Parameters address="0x224" name="XK61" size="0x4"/>
+							<Parameters address="0x2D0" name="XK57" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK61</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data89</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status89</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP90</Name>
 						<Field>
-							<Parameters address="0x228" name="XK62" size="0x4"/>
+							<Parameters address="0x2D8" name="XK58" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK62</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data90</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status90</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP91</Name>
 						<Field>
-							<Parameters address="0x22C" name="XK63" size="0x4"/>
+							<Parameters address="0x2E0" name="XK59" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>XK63</Name>
-									<Description>OEM OTP secret word</Description>
+									<Name>Data91</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
 									<Access>RW</Access>
 								</Bit>
+								<Bit>
+									<Name>Status91</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP92</Name>
 						<Field>
-							<Parameters address="0x3F0" name="BSEC_HWCFGR" size="0x4"/>
+							<Parameters address="0x2E8" name="XK60" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>ECC_USE</Name>
-									<Description>SAFMEM use ECC for Upper OTP bits. 0x0: No, 0x1: Yes, others: reserved.</Description>
-									<BitOffset>0x4</BitOffset>
-									<BitWidth>0x4</BitWidth>
-									<Access>R</Access>
+									<Name>Data92</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>SAFMEM_SIZE</Name>
-									<Description>SAFMEM size. 0x2: 2KBits, 0x4: 4KBits, 0x8: 8KBits, others: reserved.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x4</BitWidth>
+									<Name>Status92</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP93</Name>
 						<Field>
-							<Parameters address="0x3F4" name="BSEC_VER" size="0x4"/>
+							<Parameters address="0x2F0" name="XK61" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>MAJREV</Name>
-									<Description>IP Version major revision information.</Description>
-									<BitOffset>0x4</BitOffset>
-									<BitWidth>0x4</BitWidth>
-									<Access>R</Access>
+									<Name>Data93</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
 								</Bit>
 								<Bit>
-									<Name>MINREV</Name>
-									<Description>IP Version minor revision information.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x4</BitWidth>
+									<Name>Status93</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP94</Name>
 						<Field>
-							<Parameters address="0x3F8" name="BSEC_ID" size="0x4"/>
+							<Parameters address="0x2F8" name="XK62" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>ID</Name>
-									<Description>IP Identification.</Description>
+									<Name>Data94</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status94</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						</Category>
+						<Category>
+						<Name>OTP95</Name>
 						<Field>
-							<Parameters address="0x3FC" name="BSEC_SID" size="0x04"/>
+							<Parameters address="0x300" name="XK63" size="0x8"/>
 							<AssignedBits>
 								<Bit>
-									<Name>ID</Name>
-									<Description>IP Magic Identification.</Description>
+									<Name>Data95</Name>
+									<Description>Data</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status95</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!--  -->
+									<BitWidth>0x20</BitWidth>
 									<Access>R</Access>
 								</Bit>
 							</AssignedBits>
 						</Field>
-					</Category>
+						</Category>
 				</Bank>
 			</Peripheral>
 		</Peripherals>

tools/Data_Base/STM32_Prog_DB_0x505.xml

@@ -0,0 +1,1902 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x505</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MPU</Type>
+		<CPU>Cortex-A7</CPU>
+		<Name>STM32MP25xx</Name>
+		<Series>STM32MP</Series>
+		<Description>ARM 32-bit Cortex-A7 based device, CPU clock up to 600MHz</Description>
+		<!-- Gonfigurations' List -->
+		<Configurations>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader">
+				<Configuration number="0x0">
+					<ReadRegister address="0x0" mask="0x0" value="0x4"/>
+				</Configuration>
+			</Interface>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- dummy -->
+				<Configuration>
+					<Parameters address="0x10000000" name="SRAM" size="0x20000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank>
+						<Field>
+							<Parameters address="0x10000000" name="SRAM" occurence="0x1" size="0x20000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<Peripheral>
+				<Name>OTP Memory</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Bank>
+					<Parameters address="0x0" name="Bank 1" size="0x400"/>
+					<Category>
+						<Name>OTP</Name>
+						<Field>
+							<Parameters address="0x0" name="STRUCT VERSION" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>version</Name>
+									<Description>Structure version</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x4" name="OTP GLOBAL STATE" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Value</Name>
+									<Description>BSEC state</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x8" name="OTP0" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x10" name="OTP1" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x18" name="OTP2" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x20" name="OTP3" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x28" name="OTP4" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x30" name="OTP5" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x38" name="OTP6" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40" name="OTP7" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x48" name="OTP8" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50" name="OTP9" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x58" name="OTP10" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x60" name="OTP11" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x68" name="OTP12" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x70" name="OTP13" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x78" name="OTP14" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x80" name="OTP15" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x88" name="OTP16" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x90" name="OTP17" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x98" name="OTP18" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xA0" name="OTP19" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xA8" name="OTP20" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xB0" name="OTP21" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xB8" name="OTP22" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xC0" name="OTP23" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xC8" name="OTP24" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xD0" name="OTP25" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xD8" name="OTP26" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xE0" name="OTP27" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xE8" name="OTP28" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xF0" name="OTP29" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0xF8" name="OTP30" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x100" name="OTP31" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x108" name="OTP32" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x110" name="OTP33" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x118" name="OTP34" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x120" name="OTP35" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x128" name="OTP36" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x130" name="OTP37" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x138" name="OTP38" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x140" name="OTP39" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x148" name="OTP40" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x150" name="OTP41" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x158" name="OTP42" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x160" name="OTP43" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x168" name="OTP44" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x170" name="OTP45" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x178" name="OTP46" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x180" name="OTP47" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x188" name="OTP48" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x190" name="OTP49" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x198" name="OTP50" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1A0" name="OTP51" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1A8" name="OTP52" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1B0" name="OTP53" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1B8" name="OTP54" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1C0" name="OTP55" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1C8" name="OTP56" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1D0" name="OTP57" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1D8" name="OTP58" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1E0" name="OTP59" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1E8" name="OTP60" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1F0" name="OTP61" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1F8" name="OTP62" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x200" name="OTP63" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x208" name="OTP64" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x210" name="OTP65" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x218" name="OTP66" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x220" name="OTP67" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x228" name="OTP68" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x230" name="OTP69" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x238" name="OTP70" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x240" name="OTP71" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x248" name="OTP72" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x250" name="OTP73" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x258" name="OTP74" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x260" name="OTP75" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x268" name="OTP76" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x270" name="OTP77" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x278" name="OTP78" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x280" name="OTP79" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x288" name="OTP80" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x290" name="OTP81" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x298" name="OTP82" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2A0" name="OTP83" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2A8" name="OTP84" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2B0" name="OTP85" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2B8" name="OTP86" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2C0" name="OTP87" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2C8" name="OTP88" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2D0" name="OTP89" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2D8" name="OTP90" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2E0" name="OTP91" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2E8" name="OTP92" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2F0" name="OTP93" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x2F8" name="OTP94" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x300" name="OTP95" size="0x8"/>
+							<AssignedBits>
+								<Bit>
+									<Name>Data</Name>
+									<Description>Data</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x20</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>Status</Name>
+									<Description>Status</Description>
+									<BitOffset>0x4</BitOffset> <!-- in Bytes to fix C++ code -->
+									<BitWidth>0x20</BitWidth>
+									<Access>R</Access>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/bin/HSM/data/P11_Objects_Table.xml

@@ -1,16 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<Objects xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
-	<KEY_PAIRS>
-	</KEY_PAIRS>
-	<PUBLIC_KEYS>
-	</PUBLIC_KEYS>
-	<CERTIFICATES>
-	</CERTIFICATES>
-	<SECRET_KEYS>
-	</SECRET_KEYS>	
-	<CKO_DATA>
-		<FILE_DATA DF_PATH="3F00" ID="011D">
-			<CKA_LABEL>FwId</CKA_LABEL>
-		</FILE_DATA>
-	</CKO_DATA>
-</Objects>

tools/bin/HSM/data/P11_Objects_Table.xsd

@@ -1,415 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<!-- edited with XMLSpy v2007 sp2 (http://www.altova.com) by Giancarlo Pasquariello (STIncard Srl) -->
-<!--W3C Schema generated by XMLSpy v2007 sp2 (http://www.altova.com)-->
-<xs:schema xmlns:xs="http://www.w3.org/2001/XMLSchema">
-	<xs:simpleType name="OnlyTrue">
-		<xs:restriction base="xs:string">
-			<xs:enumeration value="TRUE"/>
-		</xs:restriction>
-	</xs:simpleType>
-	<xs:simpleType name="OnlyFalse">
-		<xs:restriction base="xs:string">
-			<xs:enumeration value="FALSE"/>
-		</xs:restriction>
-	</xs:simpleType>
-	<xs:simpleType name="TrueFalse">
-		<xs:restriction base="xs:string">
-			<xs:enumeration value="TRUE"/>
-			<xs:enumeration value="FALSE"/>
-		</xs:restriction>
-	</xs:simpleType>
-	<xs:simpleType name="OneDigit">
-		<xs:restriction base="xs:integer">
-			<xs:pattern value="[1-9]"/>
-		</xs:restriction>
-	</xs:simpleType>
-	<xs:element name="SECRET_KEYS">
-		<xs:complexType>
-			<xs:sequence minOccurs="0" maxOccurs="unbounded">
-				<xs:element ref="SECRET_KEY"/>
-			</xs:sequence>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="SECRET_KEY">
-		<xs:complexType>
-			<xs:all>
-				<xs:element ref="CKA_ID"/>
-				<xs:element ref="CKA_LABEL" minOccurs="0"/>
-				<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-				<xs:element name="CKA_KEY_TYPE" minOccurs="0">
-					<xs:simpleType>
-						<xs:restriction base="xs:decimal"/>
-					</xs:simpleType>
-				</xs:element>
-				<xs:element name="CKA_LOCAL" type="TrueFalse" minOccurs="0"/>
-				<xs:element ref="CKA_ENCRYPT" minOccurs="0"/>
-				<xs:element ref="CKA_DECRYPT" minOccurs="0"/>
-				<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-				<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-				<xs:element ref="CKA_DERIVE" minOccurs="0"/>
-				<xs:element ref="CKA_ALLOWED_MECHANISMS" minOccurs="0"/>
-				<xs:element ref="CKA_KEY_GEN_MECHANISM" minOccurs="0"/>
-				<xs:element ref="CKA_WRAP" minOccurs="0"/>
-				<xs:element ref="CKA_EXTRACTABLE" minOccurs="0"/>
-				<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-				<xs:element ref="CKA_SENSITIVE" minOccurs="0"/>
-				<xs:element ref="CKA_UNWRAP" minOccurs="0"/>
-				<xs:element ref="CKA_SIGN" minOccurs="0"/>
-				<xs:element ref="CKA_VERIFY" minOccurs="0"/>
-				<xs:element ref="CKA_ALWAYS_SENSITIVE" minOccurs="0"/>
-				<xs:element ref="CKA_NEVER_EXTRACTABLE" minOccurs="0"/>
-				<xs:element ref="CKA_WRAP_WITH_TRUSTED" minOccurs="0"/>
-				<xs:element ref="CKA_TRUSTED" minOccurs="0"/>
-				<xs:element ref="CKA_WRAP_TEMPLATE" minOccurs="0"/>
-				<xs:element ref="CKA_UNWRAP_TEMPLATE" minOccurs="0"/>
-			</xs:all>
-			<xs:attribute name="ID" type="xs:hexBinary" use="required"/>
-			<xs:attribute name="DF_PATH" type="xs:string" use="required"/>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="RENEWABLE_KEY_PAIR">
-		<xs:complexType>
-			<xs:all>
-				<xs:element name="PRIVATE_KEY">
-					<xs:complexType>
-						<xs:all>
-							<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-							<xs:element ref="CKA_LABEL"/>
-							<xs:element name="CKA_KEY_TYPE" minOccurs="0">
-								<xs:simpleType>
-									<xs:restriction base="xs:decimal">
-										<xs:minInclusive value="3"/>
-										<xs:maxInclusive value="3"/>
-									</xs:restriction>
-								</xs:simpleType>
-							</xs:element>
-							<xs:element ref="CKA_ID"/>
-							<xs:element name="CKA_SENSITIVE" type="OnlyTrue" minOccurs="0"/>
-							<xs:element ref="CKA_UNWRAP" minOccurs="0"/>
-							<xs:element ref="CKA_SIGN" minOccurs="0"/>
-							<xs:element name="CKA_EXTRACTABLE" type="OnlyFalse" minOccurs="0"/>
-							<xs:element ref="CKA_DECRYPT" minOccurs="0"/>
-							<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-							<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-							<xs:element ref="CKA_DERIVE" minOccurs="0"/>
-							<xs:element name="CKA_LOCAL" type="OnlyTrue" minOccurs="0"/>
-							<xs:element ref="CKA_SUBJECT" minOccurs="0"/>
-							<xs:element ref="CKA_SIGN_RECOVER" minOccurs="0"/>
-							<xs:element name="CKA_ALWAYS_SENSITIVE" type="OnlyTrue" minOccurs="0"/>
-							<xs:element name="CKA_NEVER_EXTRACTABLE" type="OnlyTrue" minOccurs="0"/>
-							<xs:element name="CKA_ALWAYS_AUTHENTICATE" type="OnlyFalse" minOccurs="0"/>
-							<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP_WITH_TRUSTED" minOccurs="0"/>
-							<xs:element ref="CKA_START_DATE" minOccurs="0"/>
-							<xs:element ref="CKA_END_DATE" minOccurs="0"/>
-							<xs:element ref="CKA_UNWRAP_TEMPLATE" minOccurs="0"/>
-						</xs:all>
-					</xs:complexType>
-				</xs:element>
-				<xs:element name="PUBLIC_KEY">
-					<xs:complexType>
-						<xs:all>
-							<xs:element ref="CKA_ID"/>
-							<xs:element ref="CKA_LABEL"/>
-							<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-							<xs:element name="CKA_KEY_TYPE" minOccurs="0">
-								<xs:simpleType>
-									<xs:restriction base="xs:decimal">
-										<xs:minInclusive value="3"/>
-										<xs:maxInclusive value="3"/>
-									</xs:restriction>
-								</xs:simpleType>
-							</xs:element>
-							<xs:element ref="CKA_VERIFY" minOccurs="0"/>
-							<xs:element ref="CKA_TRUSTED" minOccurs="0"/>
-							<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-							<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-							<xs:element ref="CKA_DERIVE" minOccurs="0"/>
-							<xs:element name="CKA_LOCAL" type="OnlyTrue" minOccurs="0"/>
-							<xs:element ref="CKA_SUBJECT" minOccurs="0"/>
-							<xs:element ref="CKA_VERIFY_RECOVER" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP" minOccurs="0"/>
-							<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-							<xs:element ref="CKA_ALLOWED_MECHANISMS" minOccurs="0"/>
-							<xs:element ref="CKA_KEY_GEN_MECHANISM" minOccurs="0"/>
-							<xs:element ref="CKA_ENCRYPT" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP_TEMPLATE" minOccurs="0"/>
-							<xs:element ref="CKA_START_DATE" minOccurs="0"/>
-							<xs:element ref="CKA_END_DATE" minOccurs="0"/>
-						</xs:all>
-						<xs:attribute name="ID" type="xs:hexBinary"/>
-						<xs:attribute name="DF_PATH" type="xs:string"/>
-					</xs:complexType>
-				</xs:element>
-			</xs:all>
-			<xs:attribute name="IS_PRIMARY" type="TrueFalse" use="required"/>
-			<xs:attribute name="INDEX" type="OneDigit" use="required"/>
-			<xs:attribute name="ID" type="xs:hexBinary" use="required"/>
-			<xs:attribute name="DF_PATH" type="xs:hexBinary" use="required"/>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="PUBLIC_KEYS">
-		<xs:complexType>
-			<xs:sequence minOccurs="0" maxOccurs="unbounded">
-				<xs:element name="PUBLIC_KEY">
-					<xs:complexType>
-						<xs:all>
-							<xs:element ref="CKA_ID"/>
-							<xs:element ref="CKA_LABEL"/>
-							<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-							<xs:element name="CKA_KEY_TYPE" minOccurs="0">
-								<xs:simpleType>
-									<xs:restriction base="xs:decimal">
-										<xs:minInclusive value="3"/>
-										<xs:maxInclusive value="3"/>
-									</xs:restriction>
-								</xs:simpleType>
-							</xs:element>
-							<xs:element ref="CKA_VERIFY" minOccurs="0"/>
-							<xs:element ref="CKA_TRUSTED" minOccurs="0"/>
-							<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-							<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-							<xs:element ref="CKA_DERIVE" minOccurs="0"/>
-							<xs:element name="CKA_LOCAL" type="OnlyTrue" minOccurs="0"/>
-							<xs:element ref="CKA_SUBJECT" minOccurs="0"/>
-							<xs:element ref="CKA_VERIFY_RECOVER" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP" minOccurs="0"/>
-							<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-							<xs:element ref="CKA_ALLOWED_MECHANISMS" minOccurs="0"/>
-							<xs:element ref="CKA_KEY_GEN_MECHANISM" minOccurs="0"/>
-							<xs:element ref="CKA_ENCRYPT" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP_TEMPLATE" minOccurs="0"/>
-							<xs:element ref="CKA_START_DATE" minOccurs="0"/>
-							<xs:element ref="CKA_END_DATE" minOccurs="0"/>
-						</xs:all>
-						<xs:attribute name="ID" type="xs:hexBinary"/>
-						<xs:attribute name="DF_PATH" type="xs:string"/>
-					</xs:complexType>
-				</xs:element>
-			</xs:sequence>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="Objects">
-		<xs:complexType>
-			<xs:all>
-				<xs:element ref="KEY_PAIRS"/>
-				<xs:element ref="PUBLIC_KEYS"/>
-				<xs:element ref="CERTIFICATES"/>
-				<xs:element ref="CKO_DATA"/>
-				<xs:element ref="SECRET_KEYS"/>
-			</xs:all>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="KEY_PAIRS">
-		<xs:complexType>
-			<xs:choice minOccurs="0" maxOccurs="unbounded">
-				<xs:element ref="RENEWABLE_KEY_PAIR"/>
-				<xs:element ref="KEY_PAIR"/>
-			</xs:choice>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="KEY_PAIR">
-		<xs:complexType>
-			<xs:all>
-				<xs:element name="PRIVATE_KEY">
-					<xs:complexType>
-						<xs:all>
-							<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-							<xs:element ref="CKA_LABEL"/>
-							<xs:element name="CKA_KEY_TYPE">
-								<xs:simpleType>
-									<xs:restriction base="xs:decimal">
-										<xs:minInclusive value="2"/>
-										<xs:maxInclusive value="3"/>
-									</xs:restriction>
-								</xs:simpleType>
-							</xs:element>
-							<xs:element ref="CKA_ID"/>
-							<xs:element name="CKA_SENSITIVE" type="OnlyTrue" minOccurs="0"/>
-							<xs:element ref="CKA_UNWRAP" minOccurs="0"/>
-							<xs:element ref="CKA_SIGN" minOccurs="0"/>
-							<xs:element name="CKA_EXTRACTABLE" type="OnlyFalse" minOccurs="0"/>
-							<xs:element ref="CKA_DECRYPT" minOccurs="0"/>
-							<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-							<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-							<xs:element ref="CKA_DERIVE" minOccurs="0"/>
-							<xs:element name="CKA_LOCAL" type="OnlyTrue" minOccurs="0"/>
-							<xs:element ref="CKA_SUBJECT" minOccurs="0"/>
-							<xs:element ref="CKA_SIGN_RECOVER" minOccurs="0"/>
-							<xs:element name="CKA_ALWAYS_SENSITIVE" type="OnlyTrue" minOccurs="0"/>
-							<xs:element name="CKA_NEVER_EXTRACTABLE" type="OnlyTrue" minOccurs="0"/>
-							<xs:element name="CKA_ALWAYS_AUTHENTICATE" type="OnlyFalse" minOccurs="0"/>
-							<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP_WITH_TRUSTED" minOccurs="0"/>
-							<xs:element ref="CKA_START_DATE" minOccurs="0"/>
-							<xs:element ref="CKA_END_DATE" minOccurs="0"/>
-							<xs:element ref="CKA_UNWRAP_TEMPLATE" minOccurs="0"/>
-						</xs:all>
-					</xs:complexType>
-				</xs:element>
-				<xs:element name="PUBLIC_KEY">
-					<xs:complexType>
-						<xs:all>
-							<xs:element ref="CKA_ID"/>
-							<xs:element ref="CKA_LABEL"/>
-							<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-							<xs:element name="CKA_KEY_TYPE">
-								<xs:simpleType>
-									<xs:restriction base="xs:decimal">
-										<xs:minInclusive value="2"/>
-										<xs:maxInclusive value="3"/>
-									</xs:restriction>
-								</xs:simpleType>
-							</xs:element>
-							<xs:element ref="CKA_VERIFY" minOccurs="0"/>
-							<xs:element ref="CKA_TRUSTED" minOccurs="0"/>
-							<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-							<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-							<xs:element ref="CKA_DERIVE" minOccurs="0"/>
-							<xs:element name="CKA_LOCAL" type="OnlyTrue" minOccurs="0"/>
-							<xs:element ref="CKA_SUBJECT" minOccurs="0"/>
-							<xs:element ref="CKA_VERIFY_RECOVER" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP" minOccurs="0"/>
-							<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-							<xs:element ref="CKA_ALLOWED_MECHANISMS" minOccurs="0"/>
-							<xs:element ref="CKA_KEY_GEN_MECHANISM" minOccurs="0"/>
-							<xs:element ref="CKA_ENCRYPT" minOccurs="0"/>
-							<xs:element ref="CKA_WRAP_TEMPLATE" minOccurs="0"/>
-							<xs:element ref="CKA_START_DATE" minOccurs="0"/>
-							<xs:element ref="CKA_END_DATE" minOccurs="0"/>
-						</xs:all>
-						<xs:attribute name="ID" type="xs:hexBinary"/>
-						<xs:attribute name="DF_PATH" type="xs:string"/>
-					</xs:complexType>
-				</xs:element>
-			</xs:all>
-			<xs:attribute name="ID" type="xs:hexBinary" use="required"/>
-			<xs:attribute name="DF_PATH" type="xs:hexBinary" use="required"/>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="FILE_DATA">
-		<xs:complexType>
-			<xs:all>
-				<xs:element ref="CKA_LABEL"/>
-				<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-				<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-				<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-				<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-				<xs:element ref="CKA_APPLICATION" minOccurs="0"/>
-				<xs:element name="CKA_OBJECT_ID" type="xs:hexBinary" minOccurs="0"/>
-			</xs:all>
-			<xs:attribute name="ID" type="xs:hexBinary" use="required"/>
-			<xs:attribute name="DF_PATH" type="xs:hexBinary" use="required"/>
-			<xs:attribute name="RECORD_NUMBER">
-				<xs:simpleType>
-					<xs:restriction base="xs:decimal">
-						<xs:minInclusive value="1"/>
-						<xs:maxInclusive value="254"/>
-					</xs:restriction>
-				</xs:simpleType>
-			</xs:attribute>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="CKO_DATA">
-		<xs:complexType>
-			<xs:sequence minOccurs="0" maxOccurs="unbounded">
-				<xs:element ref="FILE_DATA"/>
-			</xs:sequence>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="CKA_WRAP_WITH_TRUSTED" type="TrueFalse"/>
-	<xs:element name="CKA_WRAP" type="TrueFalse"/>
-	<xs:element name="CKA_WRAP_TEMPLATE" type="TrueFalse"/>
-	<xs:element name="CKA_TOKEN" type="OnlyTrue"/>
-	<xs:element name="CKA_VERIFY_RECOVER" type="TrueFalse"/>
-	<xs:element name="CKA_VERIFY" type="TrueFalse"/>
-	<xs:element name="CKA_UNWRAP" type="TrueFalse"/>
-	<xs:element name="CKA_TRUSTED" type="TrueFalse"/>
-	<xs:element name="CKA_SUBJECT" type="xs:string"/>
-	<xs:element name="CKA_SIGN_RECOVER" type="TrueFalse"/>
-	<xs:element name="CKA_SIGN" type="TrueFalse"/>
-	<xs:element name="CKA_SENSITIVE" type="TrueFalse"/>
-	<xs:element name="CKA_PRIVATE" type="TrueFalse"/>
-	<xs:element name="CKA_NEVER_EXTRACTABLE" type="TrueFalse"/>
-	<xs:element name="CKA_MODIFIABLE" type="TrueFalse"/>
-	<xs:element name="CKA_LOCAL" type="OnlyTrue"/>
-	<xs:element name="CKA_LABEL" type="xs:string"/>
-	<xs:element name="CKA_KEY_TYPE" type="xs:byte"/>
-	<xs:element name="CKA_ID" type="xs:string"/>
-	<xs:element name="CKA_EXTRACTABLE" type="TrueFalse"/>
-	<xs:element name="CKA_ENCRYPT" type="TrueFalse"/>
-	<xs:element name="CKA_DERIVE" type="TrueFalse"/>
-	<xs:element name="CKA_DECRYPT" type="TrueFalse"/>
-	<xs:element name="CKA_COPYABLE" type="TrueFalse"/>
-	<xs:element name="CKA_APPLICATION" type="xs:string"/>
-	<xs:element name="CKA_ALWAYS_SENSITIVE" type="TrueFalse"/>
-	<xs:element name="CKA_ALWAYS_AUTHENTICATE" type="TrueFalse"/>
-	<xs:element name="CKA_ALLOWED_MECHANISMS">
-		<xs:simpleType>
-			<xs:restriction base="xs:decimal">
-				<xs:minExclusive value="0"/>
-			</xs:restriction>
-		</xs:simpleType>
-	</xs:element>
-	<xs:element name="CKA_KEY_GEN_MECHANISM">
-		<xs:simpleType>
-			<xs:restriction base="xs:decimal">
-				<xs:minExclusive value="0"/>
-			</xs:restriction>
-		</xs:simpleType>
-	</xs:element>
-	<xs:element name="CKA_START_DATE" type="xs:string"/>
-	<xs:element name="CKA_END_DATE" type="xs:string"/>
-	<xs:element name="CKA_UNWRAP_TEMPLATE" type="xs:string"/>
-	<xs:element name="CKA_CHECK_VALUE" type="xs:string"/>
-	<xs:element name="CKA_HASH_OF_SUBJECT_PUBLIC_KEY" type="xs:string"/>
-	<xs:element name="CKA_HASH_OF_ISSUER_PUBLIC_KEY" type="xs:string"/>
-	<xs:element name="CKA_JAVA_MIDP_SECURITY_DOMAIN" type="xs:string"/>
-	<xs:element name="CKA_NAME_HASH_ALGORITHM" type="xs:string"/>
-	<xs:element name="CERTIFICATES">
-		<xs:complexType>
-			<xs:sequence minOccurs="0" maxOccurs="unbounded">
-				<xs:element ref="CERTIFICATE"/>
-			</xs:sequence>
-		</xs:complexType>
-	</xs:element>
-	<xs:element name="CERTIFICATE">
-		<xs:complexType>
-			<xs:all>
-				<xs:element ref="CKA_ID"/>
-				<xs:element ref="CKA_LABEL" minOccurs="0"/>
-				<xs:element ref="CKA_TRUSTED" minOccurs="0"/>
-				<xs:element ref="CKA_TOKEN" minOccurs="0"/>
-				<xs:element ref="CKA_MODIFIABLE" minOccurs="0"/>
-				<xs:element name="CKA_CERTIFICATE_TYPE" minOccurs="0">
-					<xs:simpleType>
-						<xs:restriction base="xs:decimal">
-							<xs:minInclusive value="0"/>
-							<xs:maxInclusive value="0"/>
-						</xs:restriction>
-					</xs:simpleType>
-				</xs:element>
-				<xs:element ref="CKA_EXTRACTABLE" minOccurs="0"/>
-				<xs:element ref="CKA_PRIVATE" minOccurs="0"/>
-				<xs:element ref="CKA_COPYABLE" minOccurs="0"/>
-				<xs:element name="CKA_CERTIFICATE_CATEGORY" minOccurs="0">
-					<xs:simpleType>
-						<xs:restriction base="xs:decimal">
-							<xs:minExclusive value="0"/>
-							<xs:maxExclusive value="3"/>
-						</xs:restriction>
-					</xs:simpleType>
-				</xs:element>
-				<xs:element ref="CKA_CHECK_VALUE" minOccurs="0"/>
-				<xs:element ref="CKA_START_DATE" minOccurs="0"/>
-				<xs:element ref="CKA_END_DATE" minOccurs="0"/>
-				<xs:element ref="CKA_HASH_OF_SUBJECT_PUBLIC_KEY" minOccurs="0"/>
-				<xs:element ref="CKA_HASH_OF_ISSUER_PUBLIC_KEY" minOccurs="0"/>
-				<xs:element ref="CKA_JAVA_MIDP_SECURITY_DOMAIN" minOccurs="0"/>
-				<xs:element ref="CKA_NAME_HASH_ALGORITHM" minOccurs="0"/>
-			</xs:all>
-			<xs:attribute name="ID" type="xs:hexBinary" use="required"/>
-			<xs:attribute name="DF_PATH" type="xs:string" use="required"/>
-		</xs:complexType>
-	</xs:element>
-</xs:schema>