esp32s2: put static .data and .bss directly after .iram.text

This results in a single large heap section instead of two smaller
ones.

Closes IDF-1354

components/esp32s2/ld/esp32s2.ld

@@ -26,16 +26,16 @@
 
 #define RAM_IRAM_START    0x40020000
 #define RAM_DRAM_START    0x3FFB0000
-#define DATA_RAM_END      0x3FFF0000  /* start address of bootloader */
+
+#define DATA_RAM_END      0x3FFE4000  /* 2nd stage bootloader iram_loader_seg starts at block 15 */
 
 #define IRAM_ORG    (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
                                     + CONFIG_ESP32S2_DATA_CACHE_SIZE)
-#define IRAM_SIZE   0x18000
 
 #define DRAM_ORG    (RAM_DRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
-                                    + CONFIG_ESP32S2_DATA_CACHE_SIZE \
-                                    + IRAM_SIZE)
-#define DRAM_SIZE   DATA_RAM_END - DRAM_ORG
+                                    + CONFIG_ESP32S2_DATA_CACHE_SIZE)
+
+#define I_D_RAM_SIZE   DATA_RAM_END - DRAM_ORG
 
 MEMORY
 {
@@ -44,7 +44,7 @@ MEMORY
   are connected to the data port of the CPU and eg allow bytewise access. */
 
   /* IRAM for CPU.*/
-  iram0_0_seg (RX) :                 org = IRAM_ORG, len = IRAM_SIZE
+  iram0_0_seg (RX) :                 org = IRAM_ORG, len = I_D_RAM_SIZE
 
 #ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
   /* Even though the segment name is iram, it is actually mapped to flash
@@ -62,7 +62,7 @@ MEMORY
 
 
   /* Shared data RAM, excluding memory reserved for bootloader and ROM bss/data/stack. */
-  dram0_0_seg (RW) :                 org = DRAM_ORG, len = DRAM_SIZE
+  dram0_0_seg (RW) :                 org = DRAM_ORG, len = I_D_RAM_SIZE
 
 #ifdef CONFIG_APP_BUILD_USE_FLASH_SECTIONS
   /* Flash mapped constant data */

components/esp32s2/ld/esp32s2.project.ld.in

@@ -164,8 +164,10 @@ SECTIONS
     _iram_end = ABSOLUTE(.);
   } > iram0_0_seg
 
-  ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
-          "IRAM0 segment data does not fit.")
+  .dram0_reserved_for_iram (NOLOAD):
+  {
+    . = ORIGIN(dram0_0_seg) + _iram_end - _iram_start;
+  } > dram0_0_seg
 
   .dram0.data :
   {
@@ -243,9 +245,6 @@ SECTIONS
     _heap_start = ABSOLUTE(.);
   } > dram0_0_seg
 
-  ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
-          "DRAM segment data does not fit.")
-
   /* When modifying the alignment, update tls_section_alignment in pxPortInitialiseStack */
   .flash.rodata : ALIGN(0x10)
   {
@@ -349,5 +348,5 @@ SECTIONS
 ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
           "IRAM0 segment data does not fit.")
 
-ASSERT(((_heap_start - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
+ASSERT(((_heap_start - _data_start) <= LENGTH(dram0_0_seg)),
           "DRAM segment data does not fit.")