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@@ -1,16 +1,8 @@
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-// Copyright 2015-2021 Espressif Systems (Shanghai) PTE LTD
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-//
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-// Licensed under the Apache License, Version 2.0 (the "License");
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-// you may not use this file except in compliance with the License.
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-// You may obtain a copy of the License at
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-//
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-// http://www.apache.org/licenses/LICENSE-2.0
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-//
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-// Unless required by applicable law or agreed to in writing, software
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-// distributed under the License is distributed on an "AS IS" BASIS,
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-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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-// See the License for the specific language governing permissions and
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-// limitations under the License.
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+/*
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+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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/*******************************************************************************
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/*******************************************************************************
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* NOTICE
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* NOTICE
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@@ -349,17 +341,15 @@ static inline void mcpwm_ll_timer_set_count_mode(mcpwm_dev_t *mcpwm, int timer_i
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static inline mcpwm_timer_count_mode_t mcpwm_ll_timer_get_count_mode(mcpwm_dev_t *mcpwm, int timer_id)
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static inline mcpwm_timer_count_mode_t mcpwm_ll_timer_get_count_mode(mcpwm_dev_t *mcpwm, int timer_id)
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{
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{
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switch (mcpwm->timer[timer_id].timer_cfg1.timer_mod) {
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switch (mcpwm->timer[timer_id].timer_cfg1.timer_mod) {
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- case 0:
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- return MCPWM_TIMER_COUNT_MODE_PAUSE;
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case 1:
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case 1:
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return MCPWM_TIMER_COUNT_MODE_UP;
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return MCPWM_TIMER_COUNT_MODE_UP;
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case 2:
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case 2:
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return MCPWM_TIMER_COUNT_MODE_DOWN;
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return MCPWM_TIMER_COUNT_MODE_DOWN;
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case 3:
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case 3:
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return MCPWM_TIMER_COUNT_MODE_UP_DOWN;
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return MCPWM_TIMER_COUNT_MODE_UP_DOWN;
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+ case 0:
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default:
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default:
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- HAL_ASSERT(false && "unknown count mode");
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- return mcpwm->timer[timer_id].timer_cfg1.timer_mod;
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+ return MCPWM_TIMER_COUNT_MODE_PAUSE;
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}
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}
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}
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}
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@@ -397,7 +387,7 @@ static inline uint32_t mcpwm_ll_timer_get_count_value(mcpwm_dev_t *mcpwm, int ti
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}
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}
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// up direction
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// up direction
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return (HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_status, timer_value) +
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return (HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_status, timer_value) +
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- HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period)) %
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+ HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period)) %
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(HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period) + 1);
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(HAL_FORCE_READ_U32_REG_FIELD(mcpwm->timer[timer_id].timer_cfg0, timer_period) + 1);
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}
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}
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