| .. |
|
corefile
|
da73dc8195
fix(coredump): parse registers values from stack
|
5 лет назад |
|
include
|
9a2d251912
Merge branch 'feature/coredump_refactor_riscv_support_v4.3' into 'release/v4.3'
|
4 лет назад |
|
include_core_dump
|
113bf479a4
espcoredump: code refactoring and add support for RISC-V implemetation
|
5 лет назад |
|
src
|
84dc42c4b0
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3
|
4 лет назад |
|
test
|
be71f5050d
core dump: modify the test according to the refactor
|
5 лет назад |
|
CMakeLists.txt
|
113bf479a4
espcoredump: code refactoring and add support for RISC-V implemetation
|
5 лет назад |
|
Kconfig
|
113bf479a4
espcoredump: code refactoring and add support for RISC-V implemetation
|
5 лет назад |
|
component.mk
|
113bf479a4
espcoredump: code refactoring and add support for RISC-V implemetation
|
5 лет назад |
|
espcoredump.py
|
d50f021a8c
core dump: rewrite espcoredump.py with corefile package
|
5 лет назад |
|
linker.lf
|
8d52b0b5e1
ci: exempt upstream libmbedtls mapping for sha256
|
5 лет назад |
|
sdkconfig.rename
|
237087a5ca
espcoredump: remove ESP32 prefix from config options
|
5 лет назад |
Omar Chebib
84dc42c4b0
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3