Cronologia Commit

Autore SHA1 Messaggio Data
  GuentherMartin a18a6b7ad6 CMSIS-Core: aligned __disable_irq, __disable_fault_irq between supported compilers (#1187) 4 anni fa
  Jonatan Antoni 4d414083e3 CoreValidation: Added test cases for Cortex-M cache functions. 5 anni fa
  Jonatan Antoni 0b16b65d51 CoreValidation: Added test case for __FPU_Enable. 6 anni fa
  Jonatan Antoni 7cd9150812 CoreValidation: Implemented all unhandled exceptions to abort the test run 7 anni fa
  Jonatan Antoni 690bc33b33 CoreValidation: Reworked test structure. 7 anni fa
  Jonatan Antoni d47055d2ef CoreValidation: Added test cases for unaligned half-word and word access macro functions. 7 anni fa
  GuentherMartin fc5be560c2 Added SIMD tests for Cortex-M devices. 7 anni fa
  Jonatan Antoni c99672a90c CoreValidation: Fixed/enhanced test cases. 7 anni fa
  Jonatan Antoni 9ab4aed8b1 CoreValidation: Fixed/enhanced core and intrinsic function tests. 7 anni fa
  Jonatan Antoni 0ac02767c8 Core(A): Fixed VBAR cp15 register access functions (Issue #301). 8 anni fa
  Jonatan Antoni 17b53ef2a2 Core(A): Refactored L1 Cache maintenance to be compiler agnostic. 8 anni fa
  Jonatan Antoni 19a14a4f84 Core(M): Aligned PSPLIM and MSPLIM access functions among compilers and device variants. 8 anni fa
  Jonatan Antoni 6ea73cae71 CoreValidation: Added test functions for MSPLIM and PSPLIM. 8 anni fa
  Jonatan Antoni 44c3918b78 Core-A: Add 64bit Generic Counter registers access functions 8 anni fa
  Jonatan Antoni 61be213755 CoreValidation: Initial contribution of a test suite for validating CMSIS-Core. 8 anni fa