update to 1.6.0

config.txt

@@ -1,5 +1,75 @@
+###############################################################
+#### ST-LINK_gdbserver - Sample Configuration File
+#### Each Line Contains one argument
+#### Comment lines begin with #
+####
+#### Use option -c <config-file> to start with config file
+####  ST-LINK_gdbserver -c config.txt
+####
+#### Options without SWV
+####  ST-LINK_gdbserver.exe -e -d -cp C:/ST/STM32CubeIDE_1.3.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.win32_1.3.0.202002181050/tools/bin
+####
+#### Options with SWV, Core clock 168MHz, SWO Clock 1 MHz
+####  ST-LINK_gdbserver.exe -e -d -z 61235 -a 168000000 -b 168 -cp C:/ST/STM32CubeIDE_1.3.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.win32_1.3.0.202002181050/tools/bin
+####
+#### Get option information
+####  ST-LINK_gdbserver.exe -h
+####
+#### The ST-LINK_gdbserver manual contains detailed information
+####  about options and program usage.
+####
+###############################################################
+
+###############################################################
+#  -e                 : Enables persistant mode
+###############################################################
+-e
+
+###############################################################
+#  -f <Log-File>      : Name of log file. Please make sure
+#                       that directory not is write protected.
+###############################################################
 -f debug.log
--p 61235
+
+###############################################################
+#  -l <Log-Level>     : Logging level between 0 & 31
+#          0            Disables logging
+#          >=1          Enables logging of error messages
+#          >=2          Adds warning messages
+#          >=4          Adds communication specific messages
+#          >=8          Adds all information messages
+#          >=16         Adds all HW specific messages
+###############################################################
+#-l 31
+
+###############################################################
+#  -p <Port-Number>   : TCP-Listen Port-Number.
+###############################################################
+-p 61234
+
+###############################################################
+#  -v                 : Enables verbose mode
+###############################################################
+#-v
+
+###############################################################
+#  -r <delay-sec>     : Maximum Delay in status refresh
+###############################################################
 -r 15
+
+###############################################################
+#  -d                 : Enables SWD mode
+###############################################################
 -d
--cp D:\STM32CubeIDE_1.3.0\123\tools\bin
+
+###############################################################
+#  -t                 : Shared mode using ST-LINK server
+###############################################################
+#-t
+
+###############################################################
+#  -cp <path>         : Path to STM32CubeProgrammer
+#                       Modify to correct path
+#                       for STM32_Programmer_CLI executable
+###############################################################
+-cp <path to directory containing STM32_Programmer_CLI executable>

tools/Data_Base/STM32_Prog_DB_0x411.xml

@@ -40,7 +40,7 @@
 				<Name>Embedded Flash</Name>
 				<Type>Storage</Type>
 				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
-				<ErasedValue>0x00</ErasedValue>
+				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF7A22" default="0x100000"/>
 				<!-- 1024KB Single Bank -->

tools/Data_Base/STM32_Prog_DB_0x415.xml

@@ -10,7 +10,50 @@
 		<Description>ARM 32-bit Cortex-M4 based device</Description>
 		<Configurations>
 			<!-- JTAG_SWD Interface -->
-			<Interface name="JTAG_SWD"/>
+			<Interface name="JTAG_SWD">
+				<!-- 1MB Dual Bank-->
+				<Configuration number="0x0">
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="0x0400"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 512KB Dual Bank-->
+				<Configuration number="0x1"> <!-- DBANK=0x1-->
+					<DualBank>
+						<ReadRegister address="0x40022020" mask="0x200000" value="0x200000"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="0x0200"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 512KB Single Bank-->
+				<Configuration number="0x2"> <!-- DBANK=0x0-->
+					<DualBank>
+						<ReadRegister address="0x40022020" mask="0x200000" value="0x0"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="0x0200"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 256KB Dual Bank-->
+				<Configuration number="0x3"> <!-- DBANK=0x1-->
+					<DualBank>
+						<ReadRegister address="0x40022020" mask="0x200000" value="0x200000"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="0x0100"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 256KB Single Bank-->
+				<Configuration number="0x4"> <!-- DBANK=0x0-->
+					<DualBank>
+						<ReadRegister address="0x40022020" mask="0x200000" value="0x0"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="0x0100"/>
+					</FlashSize>
+				</Configuration>								
+			</Interface>
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader"/>
 		</Configurations>
@@ -44,7 +87,7 @@
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x100000"/>
 				<!-- 1MB dual Bank -->
-				<Configuration>
+				<Configuration config="0">
 					<Parameters address="0x08000000" name=" 1 Mbyte Embedded Flash" size="0x100000"/>
 					<Description/>
 					<Organization>Dual</Organization>
@@ -60,6 +103,64 @@
 						</Field>
 					</Bank>
 				</Configuration>
+				<!-- 512KB dual Bank -->
+				<Configuration config="1">
+					<Parameters address="0x08000000" name=" 512 KBbyte Embedded Flash" size="0x80000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x80" size="0x800"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08040000 " name="sector128" occurence="0x80" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<!-- 512KB Single Bank -->
+				<Configuration config="2">
+					<Parameters address="0x08000000" name=" 512 KBbyte Embedded Flash" size="0x80000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x80" size="0x1000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<!-- 256KB dual Bank -->
+				<Configuration config="3">
+					<Parameters address="0x08000000" name=" 256 KBbyte Embedded Flash" size="0x40000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x40" size="0x800"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08020000 " name="sector65" occurence="0x40" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<!-- 256KB Single Bank -->
+				<Configuration config="4">
+					<Parameters address="0x08000000" name=" 256 KBbyte Embedded Flash" size="0x40000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x80" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
 			</Peripheral>
 			<!-- OTP -->
 			<Peripheral>
@@ -249,6 +350,17 @@
 										<Val value="0x1">Dual-bank boot enable</Val>
 									</Values>
 								</Bit>
+								<Bit config="1,2,3,4">
+									<Name>DualBank</Name>
+									<Description/>
+									<BitOffset>0x15</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">256 KB/512 KB Single-bank Flash: Contiguous addresses in Bank 1</Val>
+										<Val value="0x1">256 KB/512 KB Dual-bank Flash</Val>
+									</Values>
+								</Bit>
 								<Bit>
 									<Name>nBOOT1</Name>
 									<Description/>

tools/Data_Base/STM32_Prog_DB_0x416.xml

@@ -56,7 +56,7 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x1000"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x1000"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x417.xml

@@ -78,7 +78,7 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x800"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x800"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x425.xml

@@ -78,7 +78,7 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x400"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x400"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x427.xml

@@ -78,7 +78,7 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x2000"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x2000"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x429.xml

@@ -78,7 +78,7 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x1000"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x1000"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x436.xml

@@ -61,12 +61,12 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x1800"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x1800"/>
 						</Field>
 					</Bank>
 					<Bank name="EEPROM2">
 						<Field>
-							<Parameters address="0x08081800" name="sector1" occurence="0x1" size="0x1800"/>
+							<Parameters address="0x08081800" name="sector65282" occurence="0x1" size="0x1800"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x437.xml

@@ -61,12 +61,12 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x2000"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x2000"/>
 						</Field>
 					</Bank>
 					<Bank name="EEPROM2">
 						<Field>
-							<Parameters address="0x08082000" name="sector1" occurence="0x1" size="0x2000"/>
+							<Parameters address="0x08082000" name="sector65282" occurence="0x1" size="0x2000"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -280,7 +280,7 @@
 							<Parameters address="0x40023C88" name="FLASH_WRPR4" size="0x4"/>
 							<AssignedBits>
 								<Bit>
-									<Name>WRP64</Name>
+									<Name>WRP96</Name>
 									<Description/>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x20</BitWidth>
@@ -398,140 +398,9 @@
 							</AssignedBits>
 						</Field>
 					</Category>
-					<Category>
-						<Name>Write Protection</Name>
-						<Field>
-							<Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP0</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-						<Field>
-							<Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP16</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-						<Field>
-							<Parameters address="0x1FF80010" name="WRP2" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP32</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true"> 
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-						<Field>
-							<Parameters address="0x1FF80014" name="WRP2" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP48</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-						<Field>
-							<Parameters address="0x1FF80018" name="WRP3" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP64</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-						<Field>
-							<Parameters address="0x1FF8001C" name="WRP3" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP80</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-						<Field>
-							<Parameters address="0x1FF80080" name="WRP4" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP96</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-						<Field>
-							<Parameters address="0x1FF80084" name="WRP4" size="0x8"/>
-							<AssignedBits>
-								<Bit>
-									<Name>WRP112</Name>
-									<Description/>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x10</BitWidth>
-									<Access>W</Access>
-									<Values ByBit="true">
-										<Val value="0x0">Write protection not active</Val>
-										<Val value="0x1">Write protection active</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field> 
-					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
-					<Parameters address="0x1FF80000" name="Bank 1" size="0x88"/>
+					<Parameters address="0x1FF80000" name="Bank 1" size="0x20"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -732,6 +601,12 @@
 								</Bit>
 							</AssignedBits>
 						</Field> 
+					</Category>
+				</Bank>
+				<Bank interface="Bootloader">
+					<Parameters address="0x1FF80080" name="Bank 2" size="0x8"/>
+					<Category>
+					<Name>Write Protection</Name>
 						<Field>
 							<Parameters address="0x1FF80080" name="WRP4" size="0x8"/>
 							<AssignedBits>

tools/Data_Base/STM32_Prog_DB_0x447.xml

@@ -110,12 +110,12 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0xC00"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0xC00"/>
 						</Field>
 					</Bank>
 					<Bank name="EEPROM2">
 						<Field>
-							<Parameters address="0x08080C00" name="sector1" occurence="0x1" size="0xC00"/>
+							<Parameters address="0x08080C00" name="sector65282" occurence="0x1" size="0xC00"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -131,12 +131,12 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0xC00"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0xC00"/>
 						</Field>
 					</Bank>
 					<Bank name="EEPROM2">
 						<Field>
-							<Parameters address="0x08080C00" name="sector1" occurence="0x1" size="0xC00"/>
+							<Parameters address="0x08080C00" name="sector65282" occurence="0x1" size="0xC00"/>
 						</Field>
 					</Bank>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x449.xml

@@ -16,6 +16,11 @@
 						<ReadRegister address="0x1FF0F442" mask="0x40" value="0x00"/>
 					</RomLess>
 				</Configuration>
+				<Configuration number="0x0"> <!-- ROM Die -->
+					<RomLess>
+						<ReadRegister address="0x1FF0F442" mask="0xFFFFFFFF" value="0xFFFFFFFF"/>
+					</RomLess>
+				</Configuration>
 				<Configuration number="0x1"> <!-- RomLess Die -->
 					<RomLess>
 						<ReadRegister address="0x1FF0F442" mask="0x40" value="0x40"/>

tools/Data_Base/STM32_Prog_DB_0x450.xml

@@ -471,6 +471,17 @@
 										<Val value="0x1">after boot loading, user sectors swapped</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>IO_HSLV</Name>
+									<Description> I/O high-speed at low-voltage configuration bit. This bit indicates that the product operates below 2.5 V</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+										<Val value="0x1">Product operating below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 						<Field>
@@ -553,6 +564,17 @@
 										<Val value="0x1">Security feature enabled</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>IO_HSLV</Name>
+									<Description> I/O high-speed at low-voltage configuration bit. This bit indicates that the product operates below 2.5 V</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+										<Val value="0x1">Product operating below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+									</Values>
+								</Bit>
 								<Bit config="0,1,4,5">
 									<Name>BCM4</Name>
 									<Description/>

tools/Data_Base/STM32_Prog_DB_0x451.xml

@@ -11,17 +11,55 @@
 		<Configurations>
 			<!-- JTAG_SWD Interface -->
 			<Interface name="JTAG_SWD">
-				<Configuration number="0x0"> <!-- 2MB Single Bank-->
-					<DualBank reference="0x1">
+				<!-- 2MB Single Bank-->
+				<Configuration number="0x0"> 
+					<DualBank>
 						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x20000000"/>
 					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0800"/>
+					</FlashSize>
 				</Configuration>
-				<Configuration number="0x1"> <!-- 2MB Dual Bank-->
-					<DualBank reference="0x0">
+				<!-- 2MB Dual Bank-->
+				<Configuration number="0x1"> 
+					<DualBank>
+						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x0"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0800"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 1MB Single Bank-->
+				<Configuration number="0x2"> 
+					<DualBank>
+						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x20000000"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0400"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 1MB Dual Bank-->
+				<Configuration number="0x3"> 
+					<DualBank>
 						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x0"/>
 					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0400"/>
+					</FlashSize>
 				</Configuration>
-			</Interface>		
+				<!-- Dummy Config Dual bank-->
+				<Configuration number="0x4">
+					<DualBank>
+						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x00000000"/>
+					</DualBank>
+				</Configuration>
+				<!-- Dummy Config-->				
+				<Configuration number="0x5">
+					<DualBank>
+						<ReadRegister address="0x40023C14" mask="0x00000000" value="0x00000000"/>
+					</DualBank>
+				</Configuration>					
+			</Interface>
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader">
 				<Configuration number="0x0"> <!-- 2MB Single Bank-->
@@ -66,7 +104,7 @@
 				<Access>RWE</Access>
 				<FlashSize address="0x1FF0F442" default="0x200000"/>
 				<!-- 2MB Single Bank -->
-				<Configuration config="0">
+				<Configuration config="0,5">
 					<Parameters address="0x08000000" name=" 2 Mbytes single bank Embedded Flash" size="0x200000"/>
 					<Description/>
 					<Organization>Single</Organization>
@@ -84,7 +122,7 @@
 					</Bank>
 				</Configuration>
 				<!-- 2MB Dual Bank -->
-				<Configuration config="1">
+				<Configuration config="1,4">
 					<Parameters address="0x08000000" name=" 2 Mbytes dual bank Embedded Flash" size="0x200000"/>
 					<Description/>
 					<Organization>Dual</Organization>
@@ -112,6 +150,53 @@
 						</Field>
 					</Bank>
 				</Configuration>
+				<!-- 1MB Single Bank -->
+				<Configuration config="2">
+					<Parameters address="0x08000000" name=" 1 Mbyte single bank Embedded Flash" size="0x100000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x20</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x4" size="0x8000"/>
+						</Field>
+						<Field>
+							<Parameters address="0x08020000" name="sector4" occurence="0x1" size="0x20000"/>
+						</Field>
+						<Field>
+							<Parameters address="0x08040000" name="sector5" occurence="0x3" size="0x40000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<!-- 1MB Dual Bank -->
+				<Configuration config="3">
+					<Parameters address="0x08000000" name=" 1 Mbyte dual bank Embedded Flash" size="0x100000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x4" size="0x4000"/>
+						</Field>
+						<Field>
+							<Parameters address="0x08010000" name="sector4" occurence="0x1" size="0x10000"/>
+						</Field>
+						<Field>
+							<Parameters address="0x08020000" name="sector5" occurence="0x3" size="0x20000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08080000 " name="sector12" occurence="0x4" size="0x4000"/>
+						</Field>
+						<Field>
+							<Parameters address="0x08090000" name="sector16" occurence="0x1" size="0x10000"/>
+						</Field>
+						<Field>
+							<Parameters address="0x080A0000" name="sector17" occurence="0x3" size="0x20000"/>
+						</Field>
+					</Bank>
+				</Configuration>
 			</Peripheral>
 			<!-- ITCM FLASH -->
 			<Peripheral>
@@ -121,7 +206,7 @@
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<!-- 2MB Single Bank -->
-				<Configuration config="0">
+				<Configuration config="0,5">
 					<Parameters address="0x00200000" name=" 2 Mbytes single bank Embedded Flash" size="0x200000"/>
 					<Description/>
 					<Organization>Single</Organization>
@@ -139,7 +224,7 @@
 					</Bank>
 				</Configuration>
 				<!-- 2MB Dual Bank -->
-				<Configuration config="1">
+				<Configuration config="1,4">
 					<Parameters address="0x00200000" name=" 2 Mbytes dual bank Embedded Flash" size="0x200000"/>
 					<Description/>
 					<Organization>Dual</Organization>
@@ -177,13 +262,13 @@
 				<Access>RW</Access>
 				<!-- 1 KBytes single bank -->
 				<Configuration>
-					<Parameters address="0x1FF0F000" name=" 1 KBytes Data OTP" size="0x400"/>
+					<Parameters address="0x1FF0F000" name=" 1 KBytes Data OTP" size="0x480"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x4</Allignement>
 					<Bank name="OTP">
 						<Field>
-							<Parameters address="0x1FF0F000" name="OTP" occurence="0x1" size="0x400"/>
+							<Parameters address="0x1FF0F000" name="OTP" occurence="0x1" size="0x480"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -295,7 +380,7 @@
 										<Val value="0x1">Flash in single bank with 256 bits read access</Val>
 									</Values>
 								</Bit>
-								<Bit config="1">
+								<Bit config="1,4">
 									<Name>nDBOOT</Name>
 									<Description/>
 									<BitOffset>0x1C</BitOffset>
@@ -382,7 +467,7 @@
 						<Field>
 							<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
 							<AssignedBits>
-								<Bit config="0">
+								<Bit config="0,2,5">
 									<Name>nWRP0</Name>
 									<Description/>
 									<BitOffset>0x10</BitOffset>
@@ -393,7 +478,7 @@
 										<Val value="0x1">Write protection not active on this sector</Val>
 									</Values>
 								</Bit>
-								<Bit config="1">
+								<Bit config="1,3,4">
 									<Name>nWRP0</Name>
 									<Description/>
 									<BitOffset>0x10</BitOffset>
@@ -404,7 +489,7 @@
 										<Val value="0x1">Write protection not active on bank1 sector 2i, 2i+1</Val>
 									</Values>
 								</Bit>
-								<Bit config="1">
+								<Bit config="1,3,4">
 									<Name>nWRP6</Name>
 									<Description/>
 									<BitOffset>0x16</BitOffset>

tools/api/Data_Base/STM32_Prog_DB_0x460.xml → tools/Data_Base/STM32_Prog_DB_0x456.xml

@@ -1,11 +1,11 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
 <Device>
-		<DeviceID>0x460</DeviceID>
+		<DeviceID>0x456</DeviceID>
 		<Vendor>STMicroelectronics</Vendor>
 		<Type>MCU</Type>
 		<CPU>Cortex-M0+</CPU>
-		<Name>STM32G07x/STM32G08x</Name>
+		<Name>STM32G051/STM32G061</Name> 
 		<Series>STM32G0</Series>
 		<Description>ARM 32-bit Cortex-M0+ based device</Description>
 		<Configurations>
@@ -23,14 +23,14 @@
 				<Description/>
 				<ErasedValue>0x00</ErasedValue>
 				<Access>RWE</Access>
-				<!-- 96 KB -->
+				<!-- 16 KB -->
 				<Configuration>
-					<Parameters address="0x20000000" name="SRAM" size="0x8000"/>
+					<Parameters address="0x20000000" name="SRAM" size="0x4000"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Bank name="Bank 1">
 						<Field>
-							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x8000"/>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x4000"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -42,16 +42,16 @@
 				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
-				<FlashSize address="0x1FFF75E0" default="0x20000"/>
+				<FlashSize address="0x1FFF75E0" default="0x10000"/>
 				<!-- Single Bank -->
 				<Configuration>
-					<Parameters address="0x08000000" name=" 128 KB Embedded Flash" size="0x20000"/>
+					<Parameters address="0x08000000" name=" 64 KB Embedded Flash" size="0x10000"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Allignement>0x8</Allignement>
 					<Bank name="Bank 1">
 						<Field>
-							<Parameters address="0x08000000" name="sector0" occurence="0x40" size="0x800"/>
+							<Parameters address="0x08000000" name="sector0" occurence="0x20" size="0x800"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -76,6 +76,31 @@
 					</Bank>
 				</Configuration>
 			</Peripheral>
+			<!-- Mirror Option Bytes -->
+			<Peripheral>
+				<Name>MirrorOptionBytes</Name>
+				<Type>Storage</Type>
+				<Description>Mirror Option Bytes contains the extra area.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 56 Bytes Dual bank -->
+				<Configuration>
+					<Parameters address="0x1FFF7800" name=" 56 Bytes Data MirrorOptionBytes" size="0x38"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x1FFF7800" name="Bank1" occurence="0x1" size="0x34"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x1FFF7870" name="Bank2" occurence="0x1" size="0x4"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
 			<!-- Option Bytes -->
 			<Peripheral>
 				<Name>Option Bytes</Name>
@@ -121,31 +146,32 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>BORF_LEV</Name>
+									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x9</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
-										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
-										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
-										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>BORR_LEV</Name>
+									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0xB</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
-										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
-										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
-										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
+								
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -177,7 +203,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>nRST_SHDW</Name>
+									<Name>nRST_HDW</Name>
 									<Description/>
 									<BitOffset>0xF</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -287,7 +313,18 @@
 										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
-								</Bit>	
+								</Bit>
+								<Bit>
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -300,7 +337,7 @@
 									<Name>PCROP1A_STRT</Name>
 									<Description>Flash Area A PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x9</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000000"/>
 								</Bit>
@@ -313,7 +350,7 @@
 									<Name>PCROP1A_END</Name>
 									<Description>Flash Area A PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x9</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000200"/>
 								</Bit>
@@ -337,7 +374,7 @@
 									<Name>PCROP1B_STRT</Name>
 									<Description>Flash Area B PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x9</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000000"/>
 								</Bit>
@@ -350,7 +387,7 @@
 									<Name>PCROP1B_END</Name>
 									<Description>Flash Area B PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x9</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000200"/>
 								</Bit>
@@ -366,7 +403,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -374,7 +411,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -387,7 +424,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -395,7 +432,7 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -404,7 +441,7 @@
 					</Category>
 				</Bank>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022080" name="Bank 2" size="0x4"/>
+					<Parameters address="0x40022080" name="Bank 2" size="0x10"/>
 					<Category>
 						<Name>FLASH security</Name>
 						<Field>
@@ -423,11 +460,10 @@
 								</Bit>
 								<Bit>
 									<Name>SEC_SIZE</Name>
-									<Description>Securable memory area size</Description>
+									<Description>Securable memory area size </Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -472,31 +508,32 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>BORF_LEV</Name>
+									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x9</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
-										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
-										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
-										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>BORR_LEV</Name>
+									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0xB</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
-										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
-										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
-										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
+								
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -660,9 +697,9 @@
 							<AssignedBits>
 								<Bit>
 									<Name>PCROP1A_STRT</Name>
-									<Description>Flash Bank 1 PCROP start address</Description>
+									<Description>Flash Area A PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x9</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000000"/>
 								</Bit>
@@ -673,9 +710,9 @@
 							<AssignedBits>
 								<Bit>
 									<Name>PCROP1A_END</Name>
-									<Description>Flash Bank 1 PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<Description>Flash Area A PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x9</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000200"/>
 								</Bit>
@@ -692,6 +729,32 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
+					    <Field>
+							<Parameters name="PCROP1BSR" size="0x4" address="0x1FFF8028"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_STRT</Name>
+									<Description>Flash Bank 2 PCROP start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x8"	offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+							<Field>
+							<Parameters name="PCROP1BER" size="0x4" address="0x1FFF8030"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_END</Name>
+									<Description>Flash Bank 2 PCROP End address. Deactivation of PCROP can be done by enbaling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x8"	offset="0x08000008"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
 					</Category>
 					<Category>
 						<Name>Write Protection</Name>
@@ -763,7 +826,6 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>

tools/Data_Base/STM32_Prog_DB_0x457.xml

@@ -78,7 +78,7 @@
 					</Bank>
 					<Bank name="EEPROM1">
 						<Field>
-							<Parameters address="0x08080000" name="sector0" occurence="0x1" size="0x200"/>
+							<Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x200"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -236,8 +236,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>R</Access>
 									<Values>
-										<Val value="0x0">Main Flash memory is selected as boot area</Val>
-										<Val value="0x1">nBOOT1=1 SysMem/nBOOT1=0 SRAM as boot area</Val>
+										<Val value="0x0">nBOOT1=1 SysMem/nBOOT1=0 SRAM as boot area</Val>
+										<Val value="0x1">Main Flash memory is selected as boot area</Val>
 									</Values>
 								</Bit>
 								<Bit>

tools/Data_Base/STM32_Prog_DB_0x460.xml

@@ -10,9 +10,29 @@
 		<Description>ARM 32-bit Cortex-M0+ based device</Description>
 		<Configurations>
 			<!-- JTAG_SWD Interface -->
-			<Interface name="JTAG_SWD"/>
+			<Interface name="JTAG_SWD">
+				<Configuration	number="0x0">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x1">
+					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x2">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
+				</Configuration>
+			</Interface>
 			<!-- Bootloader Interface -->
-			<Interface name="Bootloader"/>
+			<Interface name="Bootloader">
+				<Configuration	number="0x0">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x1">
+					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x2">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
+				</Configuration>
+			</Interface>
 		</Configurations>
 		<!-- Peripherals -->
 		<Peripherals>
@@ -76,6 +96,31 @@
 					</Bank>
 				</Configuration>
 			</Peripheral>
+			<!-- Mirror Option Bytes -->
+			<Peripheral>
+				<Name>MirrorOptionBytes</Name>
+				<Type>Storage</Type>
+				<Description>Mirror Option Bytes contains the extra area.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 44 Bytes single bank -->
+				<Configuration>
+					<Parameters address="0x1FFF7800" name=" 56 Bytes Data MirrorOptionBytes" size="0x38"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x1FFF7800" name="Bank1" occurence="0x1" size="0x34"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x1FFF7870" name="Bank2" occurence="0x1" size="0x4"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
 			<!-- Option Bytes -->
 			<Peripheral>
 				<Name>Option Bytes</Name>
@@ -107,9 +152,9 @@
 					<Category>
 						<Name>BOR Level</Name>
 						<Field>
-							<Parameters address="0x40022020" name="FLASH_OPTR" size="0x4"/>
+							<Parameters name="FLASH_OPTR" size="0x4" address="0x40022020"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BOR_EN</Name>
 									<Description/>
 									<BitOffset>0x8</BitOffset>
@@ -120,7 +165,7 @@
 										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x9</BitOffset>
@@ -133,7 +178,7 @@
 										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0xB</BitOffset>
@@ -260,8 +305,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Boot from Flash if BOOT0 = 0, otherwise Embedded SRAM1</Val>
-										<Val value="0x1">Boot from Flash if BOOT0 = 0, otherwise system memory</Val>
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -274,8 +319,8 @@
 										<Val value="0x0">nBOOT0=0</Val>
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
-								</Bit>				
-								<Bit>
+								</Bit>
+								<Bit config="0,2">
 									<Name>NRST_MODE</Name>
 									<Description/>
 									<BitOffset>0x1B</BitOffset>
@@ -287,7 +332,18 @@
 										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
-								</Bit>	
+								</Bit>
+								<Bit config="0,2">
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+								</Bit>									
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -460,7 +516,7 @@
 						<Field>
 							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BOR_EN</Name>
 									<Description/>
 									<BitOffset>0x8</BitOffset>
@@ -471,7 +527,7 @@
 										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x9</BitOffset>
@@ -484,7 +540,7 @@
 										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0xB</BitOffset>
@@ -611,8 +667,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Boot from Flash if BOOT0 = 0, otherwise Embedded SRAM1</Val>
-										<Val value="0x1">Boot from Flash if BOOT0 = 0, otherwise system memory</Val>
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -625,8 +681,8 @@
 										<Val value="0x0">nBOOT0=0</Val>
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
-								</Bit>				
-								<Bit>
+								</Bit>	
+								<Bit config="0,2">
 									<Name>NRST_MODE</Name>
 									<Description/>
 									<BitOffset>0x1B</BitOffset>
@@ -638,8 +694,8 @@
 										<Val value="0x2">GPIO: standard GPIO pad functionality, only internal RESET possible</Val>
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
-								</Bit>
-								<Bit>
+								</Bit>								
+								<Bit config="0,2">
 									<Name>IRHEN</Name>
 									<Description>Internal reset holder enable bit</Description>
 									<BitOffset>0x1D</BitOffset>

tools/Data_Base/STM32_Prog_DB_0x466.xml

@@ -10,9 +10,29 @@
 		<Description>ARM 32-bit Cortex-M0+ based device</Description>
 		<Configurations>
 			<!-- JTAG_SWD Interface -->
-			<Interface name="JTAG_SWD"/>
+			<Interface name="JTAG_SWD">
+				<Configuration	number="0x0">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x1">
+					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x2">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
+				</Configuration>
+			</Interface>
 			<!-- Bootloader Interface -->
-			<Interface name="Bootloader"/>
+			<Interface name="Bootloader">
+				<Configuration	number="0x0">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0xFF"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x1">
+					<ValueLine> <ReadRegister address="0x1FFF77DD"	mask="0xFF"	value="0x30"/> </ValueLine>
+				</Configuration>
+				<Configuration	number="0x2">
+					<ValueLine> <ReadRegister address="0x1FFF77DD" mask="0xFF" value="0x31"/> </ValueLine>
+				</Configuration>
+			</Interface>
 		</Configurations>
 		<!-- Peripherals -->
 		<Peripherals>
@@ -129,6 +149,51 @@
 							</AssignedBits>
 						</Field>
 					</Category>
+					<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters name="FLASH_OPTR" size="0x4" address="0x40022020"/>
+							<AssignedBits>
+								<Bit config="0,2">
+									<Name>BOR_EN</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Configurable brown out reset disabled, power-on reset defined by POR/PDR levels</Val>
+										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
+									</Values>
+								</Bit>
+								<Bit config="0,2">
+									<Name>BORF_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
+									</Values>
+								</Bit>
+								<Bit config="0,2">
+									<Name>BORR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
 					<Category>
 						<Name>User Configuration</Name>
 						<Field>
@@ -240,8 +305,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Boot from Flash if BOOT0 = 0, otherwise Embedded SRAM1</Val>
-										<Val value="0x1">Boot from Flash if BOOT0 = 0, otherwise system memory</Val>
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -255,7 +320,7 @@
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
 								</Bit>				
-								<Bit>
+								<Bit config="0,2">
 									<Name>NRST_MODE</Name>
 									<Description/>
 									<BitOffset>0x1B</BitOffset>
@@ -268,6 +333,17 @@
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
 								</Bit>
+								<Bit config="0,2">
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+								</Bit>	
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -440,7 +516,7 @@
 						<Field>
 							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BOR_EN</Name>
 									<Description/>
 									<BitOffset>0x8</BitOffset>
@@ -451,7 +527,7 @@
 										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BORF_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0x9</BitOffset>
@@ -464,7 +540,7 @@
 										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2">
 									<Name>BORR_LEV</Name>
 									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
 									<BitOffset>0xB</BitOffset>
@@ -591,8 +667,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Boot from Flash if BOOT0 = 0, otherwise Embedded SRAM1</Val>
-										<Val value="0x1">Boot from Flash if BOOT0 = 0, otherwise system memory</Val>
+										<Val value="0x0">Boot from Flash if BOOT0 = 1, otherwise Embedded SRAM1</Val>
+										<Val value="0x1">Boot from Flash if BOOT0 = 1, otherwise system memory</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -606,7 +682,7 @@
 										<Val value="0x1">nBOOT0=1</Val>
 									</Values>
 								</Bit>				
-								<Bit>
+								<Bit config="0,2">
 									<Name>NRST_MODE</Name>
 									<Description/>
 									<BitOffset>0x1B</BitOffset>
@@ -619,7 +695,7 @@
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
 								</Bit>
-								<Bit>
+								<Bit config="0,2">
 									<Name>IRHEN</Name>
 									<Description>Internal reset holder enable bit</Description>
 									<BitOffset>0x1D</BitOffset>

tools/api/Data_Base/STM32_Prog_DB_0x466.xml → tools/Data_Base/STM32_Prog_DB_0x467.xml

@@ -1,16 +1,44 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
 <Device>
-		<DeviceID>0x466</DeviceID>
+		<DeviceID>0x467</DeviceID>
 		<Vendor>STMicroelectronics</Vendor>
 		<Type>MCU</Type>
+		<!-- cortex written in word file +mpu should it be written?? -->
 		<CPU>Cortex-M0+</CPU>
-		<Name>STM32G03x/STM32G04x</Name>
+		<Name>STM32G0B1xx/C1xx</Name>
 		<Series>STM32G0</Series>
 		<Description>ARM 32-bit Cortex-M0+ based device</Description>
 		<Configurations>
 			<!-- JTAG_SWD Interface -->
 			<Interface name="JTAG_SWD"/>
+			<!-- 512B Single Bank-->
+				<Configuration number="0x0"> 
+					<DualBank>
+						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x20000000"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="200"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 256 Single Bank-->
+				<Configuration number="0x1"> 
+					<DualBank>
+						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x20000000"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="100"/>
+					</FlashSize>
+				</Configuration>
+				<!-- 128 Single Bank-->
+				<Configuration number="0x2"> 
+					<DualBank>
+						<ReadRegister address="0x40023C14" mask="0x20000000" value="0x20000000"/>
+					</DualBank>
+					<FlashSize>
+						<ReadRegister address="0x1FFF75E0" mask="0x0000FFFF" value="80"/>
+					</FlashSize>
+				</Configuration>
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader"/>
 		</Configurations>
@@ -23,14 +51,14 @@
 				<Description/>
 				<ErasedValue>0x00</ErasedValue>
 				<Access>RWE</Access>
-				<!-- 96 KB -->
+				<!-- 128KB  -->
 				<Configuration>
-					<Parameters address="0x20000000" name="SRAM" size="0x2000"/>
+					<Parameters address="0x20000000" name="SRAM" size="0x20000"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Bank name="Bank 1">
 						<Field>
-							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x2000"/>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x20000"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -42,16 +70,45 @@
 				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
-				<FlashSize address="0x1FFF75E0" default="0x10000"/>
-				<!-- Single Bank -->
-				<Configuration>
-					<Parameters address="0x08000000" name=" 64 KB Embedded Flash" size="0x10000"/>
+				<FlashSize address="0x1FFF75E0" default="0x80000"/>
+					<!-- 512K dual Bank -->
+				<Configuration config="0">
+					<Parameters address="0x08000000" name=" 512 KB Embedded Flash" size="0x080000"/>
 					<Description/>
-					<Organization>Single</Organization>
+					<Organization>Dual</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x80" size="0x800"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08040000" name="sector128" occurence="0x80" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+					<!-- 256K single Bank-->
+				<Configuration number="0x1"> 
+					<Parameters address="0x08000000" name=" 256 KB Embedded Flash" size="0x040000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x80" size="0x800"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<!-- 128K Single Bank-->
+				<Configuration number="0x2"> 
+					<Parameters address="0x08000000" name=" 128 KB Embedded Flash" size="0x020000"/>
+					<Description/>
+					<Organization>Dual</Organization>
 					<Allignement>0x8</Allignement>
 					<Bank name="Bank 1">
 						<Field>
-							<Parameters address="0x08000000" name="sector0" occurence="0x20" size="0x800"/>
+							<Parameters address="0x08000000" name="sector0" occurence="0x40" size="0x800"/>
 						</Field>
 					</Bank>
 				</Configuration>
@@ -108,7 +165,7 @@
 				<Description/>
 				<Access>RW</Access>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x40022020" name="Bank 1" size="0x20"/>
+					<Parameters address="0x40022020" name="Bank 1" size="0x40"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -128,6 +185,51 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
+					</Category>
+						<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters name="FLASH_OPTR" size="0x4" address="0x40022020"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_EN</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Configurable brown out reset disabled, power-on reset defined by POR/PDR levels</Val>
+										<Val value="0x1">Configurable brown out reset enabled, values of BORR_LEV and BORF_LEV taken into account</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BORF_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0x9</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR falling level 1 with threshold around 2.0 V</Val>
+										<Val value="0x1">BOR falling level 2 with threshold around 2.2 V</Val>
+										<Val value="0x2">BOR falling level 3 with threshold around 2.5 V</Val>
+										<Val value="0x3">BOR falling level 4 with threshold around 2.8 V</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BORR_LEV</Name>
+									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">BOR rising level 1 with threshold around 2.1 V</Val>
+										<Val value="0x1">BOR rising level 2 with threshold around 2.3 V</Val>
+										<Val value="0x2">BOR rising level 3 with threshold around 2.6 V</Val>
+										<Val value="0x3">BOR rising level 4 with threshold around 2.9 V</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
 					</Category>
 					<Category>
 						<Name>User Configuration</Name>
@@ -157,7 +259,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>nRST_HDW</Name>
+									<Name>nRST_SHDW</Name>
 									<Description/>
 									<BitOffset>0xF</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -268,6 +370,17 @@
 										<Val value="0x3">Bidirectional reset: NRST pin configured in reset input/output mode (legacy mode)</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>IRHEN</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0x1D</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -280,7 +393,7 @@
 									<Name>PCROP1A_STRT</Name>
 									<Description>Flash Area A PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000000"/>
 								</Bit>
@@ -293,7 +406,7 @@
 									<Name>PCROP1A_END</Name>
 									<Description>Flash Area A PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000200"/>
 								</Bit>
@@ -317,7 +430,7 @@
 									<Name>PCROP1B_STRT</Name>
 									<Description>Flash Area B PCROP start address</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000000"/>
 								</Bit>
@@ -330,12 +443,64 @@
 									<Name>PCROP1B_END</Name>
 									<Description>Flash Area B PCROP End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022044" name="FLASH_PCROP2SR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2A_STRT</Name>
+									<Description>Flash Area A PCROP2 start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022048" name="FLASH_PCROP1ER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2A_END</Name>
+									<Description>Flash Area A PCROP2 End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x200" offset="0x08000200"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						<Field>
+							<Parameters address="0x40022054" name="FLASH_PCROP1BSR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2B_STRT</Name>
+									<Description>Flash Area B PCROP2 start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022058" name="FLASH_PCROP1BER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2B_END</Name>
+									<Description>Flash Area B PCROP2 End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>											
 					</Category>
 					<Category>
 						<Name>Write Protection</Name>
@@ -346,7 +511,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -354,7 +519,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -367,7 +532,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -375,19 +540,62 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x8</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						
+					<Field>
+							<Parameters address="0x4002204C" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP2A_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2A_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022050" name="FLASH_WRP2BR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP2B_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2B_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>						
 					</Category>
 				</Bank>
 				<Bank interface="JTAG_SWD">
 					<Parameters address="0x40022080" name="Bank 2" size="0x10"/>
 					<Category>
 						<Name>FLASH security</Name>
-						<Field>
+								<Field>
 							<Parameters address="0x40022080" name="FLASH_SECR" size="0x4"/>
 							<AssignedBits>
 								<Bit>
@@ -403,18 +611,24 @@
 								</Bit>
 								<Bit>
 									<Name>SEC_SIZE</Name>
-									<Description>Securable memory area size</Description>
+									<Description>Securable memory for Bank 1  </Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>SEC_SIZE2</Name>
+									<Description>Securable memory for Bank 2 On Dual Bank device,otherwise reserved </Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
 				</Bank>
 				<Bank interface="Bootloader">
-					<Parameters address="0x1FFF7800" name="Bank 1" size="0x34"/>
+					<Parameters address="0x1FFF7800" name="Bank 1" size="0x44"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -672,6 +886,84 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
+							<Field>
+							<Parameters name="PCROP1BSR" size="0x4" address="0x1FFF7828"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_STRT</Name>
+									<Description>Flash Bank 2 PCROP start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x8"	offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters name="PCROP1BER" size="0x4" address="0x1FFF7830"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP1B_END</Name>
+									<Description>Flash Bank 2 PCROP End address. Deactivation of PCROP can be done by enbaling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x8"	offset="0x08000008"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x1FFF7838" name="FLASH_PCROP2SR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2A_STRT</Name>
+									<Description>Flash Area A PCROP2 start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7840" name="FLASH_PCROP1ER" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2A_END</Name>
+									<Description>Flash Area A PCROP2 End address(excluded). Deactivation of PCROP can be done by enabling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x200" offset="0x08000200"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+							<Field>
+							<Parameters name="PCROP2BSR" size="0x4" address="0x1FFF7858"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2B_STRT</Name>
+									<Description>Flash Bank 2 PCROP2 start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x8"	offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters name="PCROP2BER" size="0x4" address="0x1FFF7860"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PCROP2B_END</Name>
+									<Description>Flash Bank 2 PCROP2 End address. Deactivation of PCROP can be done by enbaling PCROP_RDP and changing RDP from level 1 to level 0</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x9</BitWidth>
+									<Access>RW</Access>
+									<Equation	multiplier="0x8"	offset="0x08000008"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
 					</Category>
 					<Category>
 						<Name>Write Protection</Name>
@@ -682,7 +974,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -690,7 +982,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -703,7 +995,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -711,13 +1003,56 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x6</BitWidth>
+									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
+						<Field>
+							<Parameters address="0x1FFF7848" name="FLASH_WRP2AR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WRP2A_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2A_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP first area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x1FFF7850" name="FLASH_WRP1BR" size="0x4"/>
+							<AssignedBits>	
+								<Bit>
+									<Name>WRP2B_STRT</Name>
+									<Description>The address of the first page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>WRP2B_END</Name>
+									<Description>The address of the last page of the Bank 2 WRP second area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>					
 					</Category>
+					
 				</Bank>
 				<Bank interface="Bootloader">
 					<Parameters address="0x1FFF7870" name="Bank 2" size="0x4"/>
@@ -737,13 +1072,19 @@
 										<Val value="0x1">Boot forced from Main Flash memory</Val>
 									</Values>
 								</Bit>
-								<Bit>
+									<Bit>
 									<Name>SEC_SIZE</Name>
-									<Description>Securable memory area size</Description>
+									<Description>Securable memory for Bank 1  </Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+								</Bit>
+								<Bit>
+									<Name>SEC_SIZE2</Name>
+									<Description>Securable memory for Bank 2 On Dual Bank device,otherwise reserved </Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>

tools/Data_Base/STM32_Prog_DB_0x468.xml

@@ -359,7 +359,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -367,7 +367,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -380,7 +380,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -388,7 +388,7 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -687,7 +687,7 @@
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -695,7 +695,7 @@
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -708,7 +708,7 @@
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
@@ -716,7 +716,7 @@
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of the Bank 1 WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x6</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>

tools/Data_Base/STM32_Prog_DB_0x471.xml

@@ -40,22 +40,22 @@
 					<DBANK reference="0x1"> <ReadRegister address="0x40022020" mask="0x400000" value="0x400000"/> </DBANK>
 				</Configuration>
 				<Configuration number="0x6">
-					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x400"/> </flashSize>
+					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x200"/> </flashSize>
 					<DB1M reference="0x0"> <ReadRegister address="0x40022020" mask="0x200000" value="0x0"/> </DB1M>
 					<DBANK reference="0x0"> <ReadRegister address="0x40022020" mask="0x400000" value="0x0"/> </DBANK>
 				</Configuration>
 				<Configuration number="0x7">
-					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x400"/> </flashSize>
+					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x200"/> </flashSize>
 					<DB1M reference="0x0"> <ReadRegister address="0x40022020" mask="0x200000" value="0x0"/> </DB1M>
 					<DBANK reference="0x1"> <ReadRegister address="0x40022020" mask="0x400000" value="0x400000"/> </DBANK>
 				</Configuration>
 				<Configuration number="0x8">
-					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x400"/> </flashSize>
+					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x200"/> </flashSize>
 					<DB1M reference="0x1"> <ReadRegister address="0x40022020" mask="0x200000" value="0x200000"/> </DB1M>
 					<DBANK reference="0x1"> <ReadRegister address="0x40022020" mask="0x400000" value="0x400000"/> </DBANK>
 				</Configuration>
 				<Configuration number="0x9">
-					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x400"/> </flashSize>
+					<flashSize> <!-- 512K --><ReadRegister address="0x1FFF75E0" mask="0xFFFF" value="0x200"/> </flashSize>
 					<DB1M reference="0x1"> <ReadRegister address="0x40022020" mask="0x200000" value="0x200000"/> </DB1M>
 					<DBANK reference="0x0"> <ReadRegister address="0x40022020" mask="0x400000" value="0x0"/> </DBANK>
 				</Configuration>

tools/Data_Base/STM32_Prog_DB_0x479.xml

@@ -10,9 +10,23 @@
 		<Description>Category 3 devices, ARM 32-bit Cortex-M4 based device</Description>
 		<Configurations>
 			<!-- JTAG_SWD Interface -->
-			<Interface name="JTAG_SWD"/>
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0"> <!-- DBANK=0x1-->
+					<DBANK reference="0x1"> <ReadRegister address="0x40022020" mask="0x400000" value="0x400000"/> </DBANK>
+				</Configuration>
+				<Configuration number="0x1"> <!-- DBANK=0x0-->
+					<DBANK reference="0x1"> <ReadRegister address="0x40022020" mask="0x400000" value="0x000000"/> </DBANK>
+				</Configuration>
+				</Interface>
 			<!-- Bootloader Interface -->
-			<Interface name="Bootloader"/>
+			<Interface name="Bootloader">
+			    <Configuration number="0x0"> <!-- DBANK=0x1-->
+					<DBANK reference="0x1"> <ReadRegister address="0x1FFF7800" mask="0x400000" value="0x400000"/> </DBANK>
+				</Configuration>
+				<Configuration number="0x1"> <!-- DBANK=0x0-->
+					<DBANK reference="0x0"> <ReadRegister address="0x1FFF7800" mask="0x400000" value="0x000000"/> </DBANK>
+				</Configuration>
+				</Interface>
 		</Configurations>
 		<!-- Peripherals -->
 		<Peripherals>
@@ -152,36 +166,36 @@
 							<Parameters address="0x40022020" name="FLASH_OPTR" size="0x4"/>
 							<AssignedBits>
 								<Bit>
-									<Name>nRST_STOP</Name>
+									<Name>IWDG_STOP</Name>
 									<Description/>
-									<BitOffset>0xC</BitOffset>
+									<BitOffset>0x11</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Reset generated when entering Stop mode</Val>
-										<Val value="0x1">No reset generated when entering Stop mode</Val>
+										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
+										<Val value="0x1">IWDG counter active in stop mode</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>nRST_STDBY</Name>
+									<Name>IWDG_STDBY</Name>
 									<Description/>
-									<BitOffset>0xD</BitOffset>
+									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Reset generated when entering Standby mode</Val>
-										<Val value="0x1">No reset generated when entering Standby mode</Val>
+										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
+										<Val value="0x1">IWDG counter active in standby mode</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>nRST_SHDW</Name>
+									<Name>WWDG_SW</Name>
 									<Description/>
-									<BitOffset>0xE</BitOffset>
+									<BitOffset>0x13</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
-										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
+										<Val value="0x0">Hardware window watchdog</Val>
+										<Val value="0x1">Software window watchdog</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -196,47 +210,58 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWDG_STOP</Name>
+									<Name>nRST_STOP</Name>
 									<Description/>
-									<BitOffset>0x11</BitOffset>
+									<BitOffset>0xC</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
-										<Val value="0x1">IWDG counter active in stop mode</Val>
+										<Val value="0x0">Reset generated when entering Stop mode</Val>
+										<Val value="0x1">No reset generated when entering Stop mode</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>IWDG_STDBY</Name>
+									<Name>nRST_STDBY</Name>
 									<Description/>
-									<BitOffset>0x12</BitOffset>
+									<BitOffset>0xD</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
-										<Val value="0x1">IWDG counter active in standby mode</Val>
+										<Val value="0x0">Reset generated when entering Standby mode</Val>
+										<Val value="0x1">No reset generated when entering Standby mode</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>WWDG_SW</Name>
+									<Name>nRST_SHDW</Name>
 									<Description/>
-									<BitOffset>0x13</BitOffset>
+									<BitOffset>0xE</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Hardware window watchdog</Val>
-										<Val value="0x1">Software window watchdog</Val>
+										<Val value="0x0">Reset generated when entering the Shutdown mode</Val>
+										<Val value="0x1">No reset generated when entering the Shutdown mode</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>PB4_PUEN</Name>
+									<Name>BFB2</Name>
+									<Description/>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Dual-bank boot disable</Val>
+										<Val value="0x1">Dual-bank boot enable</Val>
+									</Values>
+								</Bit>
+								<Bit reference="DualBank">
+									<Name>DBANK</Name>
 									<Description/>
 									<BitOffset>0x16</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
-										<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+										<Val value="0x0">Single bank mode with 128 bits data read width</Val>
+										<Val value="0x1">Dual bank mode with 64 bits data</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -318,6 +343,17 @@
 										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>PB4_PUEN</Name>
+									<Description/>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
+										<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -366,7 +402,7 @@
 						<Field>
 							<Parameters address="0x4002202C" name="FLASH_WRP1AR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0">
 									<Name>WRP1A_STRT</Name>
 									<Description>The address of the first page of WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
@@ -374,7 +410,15 @@
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
-								<Bit>
+								<Bit config="1">
+									<Name>WRP1A_STRT</Name>
+									<Description>The address of the first page of WRP first area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x1000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="0">
 									<Name>WRP1A_END</Name>
 									<Description>The address of the last page of WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
@@ -382,12 +426,20 @@
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
+								<Bit config="1">
+									<Name>WRP1A_END</Name>
+									<Description>The address of the last page of WRP first area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x1000" offset="0x08000000"/>
+								</Bit>
 							</AssignedBits>
 						</Field>
 						<Field>
 							<Parameters address="0x40022030" name="FLASH_WRP1BR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0">
 									<Name>WRP1B_STRT</Name>
 									<Description>The address of the first page of  WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
@@ -395,7 +447,23 @@
 									<Access>RW</Access>
 									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
-								<Bit>
+								<Bit config="1">
+									<Name>WRP1B_STRT</Name>
+									<Description>The address of the first page of  WRP second area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="0">
+									<Name>WRP1B_END</Name>
+									<Description>The address of the last page of WRP second area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="1">
 									<Name>WRP1B_END</Name>
 									<Description>The address of the last page of WRP second area</Description>
 									<BitOffset>0x10</BitOffset>
@@ -504,11 +572,6 @@
 										<Val value="0x1">IWDG counter active in standby mode</Val>
 									</Values>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x1FFF7800" name="FLASH_OPTR" size="0x4"/>
-							<AssignedBits>
 								<Bit>
 									<Name>WWDG_SW</Name>
 									<Description/>
@@ -520,17 +583,6 @@
 										<Val value="0x1">Software window watchdog</Val>
 									</Values>
 								</Bit>
-								<Bit>
-									<Name>PB4_PUEN</Name>
-									<Description/>
-									<BitOffset>0x16</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
-										<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
-									</Values>
-								</Bit>
 								<Bit>
 									<Name>IWDG_SW</Name>
 									<Description/>
@@ -676,6 +728,17 @@
 										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>PB4_PUEN</Name>
+									<Description/>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">USB power delivery dead-battery enabled/ TDI pull-up deactivated</Val>
+										<Val value="0x1">USB power delivery dead-battery disabled/ TDI pull-up activated</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
@@ -726,9 +789,33 @@
 							<AssignedBits>
 								<Bit config="0">
 									<Name>WRP1A_STRT</Name>
-									<Description>The address of the first page of the Bank 1 WRP first area</Description>
+									<Description>The address of the first page of WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="1">
+									<Name>WRP1A_STRT</Name>
+									<Description>The address of the first page of WRP first area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x1000" offset="0x08000000"/>
+								</Bit>
+								<Bit config="0">
+									<Name>WRP1A_END</Name>
+									<Description>The address of the last page of WRP first area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="1">
+									<Name>WRP1A_END</Name>
+									<Description>The address of the last page of WRP first area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
 									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
@@ -737,16 +824,43 @@
 						<Field>
 							<Parameters address="0x1FFF7820" name="FLASH_WRP1BR" size="0x4"/>
 							<AssignedBits>
-								<Bit>
+								<Bit config="0">
 									<Name>WRP1B_STRT</Name>
-									<Description>The address of the first page of the Bank 1 WRP second area</Description>
+									<Description>The address of the first page of  WRP second area</Description>
 									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x1000" offset="0x08000000"/>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="1">
+									<Name>WRP1B_STRT</Name>
+									<Description>The address of the first page of  WRP second area</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="0">
+									<Name>WRP1B_END</Name>
+									<Description>The address of the last page of WRP second area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit config="1">
+									<Name>WRP1B_END</Name>
+									<Description>The address of the last page of WRP second area</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
+					</Category>
+					<Category>
+						<Name>Secure Protection</Name>
 						<Field>
 							<Parameters address="0x1FFF7828" name="FLASH_SECR1" size="0x4"/>
 							<AssignedBits>

tools/Data_Base/STM32_Prog_DB_0x480.xml

@@ -369,7 +369,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>FZ_IWDG_STOP</Name>
+									<Name>IWDG_FZ_STOP</Name>
 									<Description/>
 									<BitOffset>0x11</BitOffset>
 									<BitWidth>0x1</BitWidth>
@@ -380,7 +380,7 @@
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>FZ_IWDG_SDBY</Name>
+									<Name>IWDG_FZ_SDBY</Name>
 									<Description/>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x1</BitWidth>

tools/Data_Base/STM32_Prog_DB_0x482.xml

@@ -42,19 +42,9 @@
 			<Interface name="Bootloader">
 				<Configuration number="0x6">	<!-- Single Bank Secure-->
 					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x400000" value="0x0"/> </DBANK>
-					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
 				</Configuration>
 				<Configuration number="0x7">	<!-- Dual Bank Secure-->
 					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x400000" value="0x400000"/> </DBANK>
-					<TZEN reference="0x1"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x80000000"/> </TZEN>
-				</Configuration>
-				<Configuration number="0x8">	<!-- Single Bank non Secure-->
-					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x400000" value="0x0"/> </DBANK>
-					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
-				</Configuration>
-				<Configuration number="0x9">	<!-- Dual Bank non Secure-->
-					<DBANK reference="0x0"> <ReadRegister address="0x40022040" mask="0x400000" value="0x400000"/> </DBANK>
-					<TZEN reference="0x0"> <ReadRegister address="0x40022040" mask="0x80000000" value="0x0"/> </TZEN>
 				</Configuration>
 			</Interface>
 		</Configurations>
@@ -69,7 +59,7 @@
 				<Access>RWE</Access>
 				<!-- 96 KB -->
 				<Configuration config="0,1,6,7,8,9">
-					<Parameters address="0x20000000" name="SRAM" size="0x8000"/>
+					<Parameters address="0x20000000" name="SRAM" size="0xC0000"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Bank name="Bank 1">
@@ -79,7 +69,7 @@
 					</Bank>
 				</Configuration>
 				<Configuration config="2,3,4,5">
-					<Parameters address="0x30000000" name="SRAM" size="0x8000"/>
+					<Parameters address="0x30000000" name="SRAM" size="0xC0000"/>
 					<Description/>
 					<Organization>Single</Organization>
 					<Bank name="Bank 1">
@@ -96,7 +86,7 @@
 				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
 				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
-				<FlashSize address="0x0BFA0764" default="0x200000"/>
+				<FlashSize address="0x0BFA07A0" default="0x200000"/>
 				<Configuration config="0"> <!-- Single Bank -->
 					<Parameters address="0x08000000" name=" 2048 Kbyte Embedded Flash" size="0x200000"/>
 					<Description/>
@@ -246,7 +236,6 @@
 									<Access>RW</Access>
 									<Values>
 										<Val value="0xAA">Level 0, no protection</Val>
-										<Val value="0x55">Level 0.5, read protection not active, only non-secure debug access is possible. Only available when TrustZone is active (TZEN=1)</Val>
 										<Val value="0xDC">Level 1, read protection of memories</Val>
 										<Val value="0xCC">Level 2, chip protection</Val>
 									</Values>
@@ -504,6 +493,35 @@
 							</AssignedBits>
 						</Field>
 					</Category>
+					<Category>
+							<Name>Boot Configuration</Name>
+								<Field>
+								<Parameters address="0x40022044" name="FLASH_NSBOOTADD0" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD0</Name>
+										<Description>Non-secure Boot base address 0</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+								</Field>
+							<Field>
+								<Parameters address="0x40022048" name="FLASH_NSBOOTADD1" size="0x4"/>
+								<AssignedBits>
+								<Bit>
+										<Name>NSBOOTADD1</Name>
+										<Description>Non-secure Boot base address 1</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x19</BitWidth>
+										<Access>RW</Access>
+										<Equation multiplier="0x80" offset="0x0000000"/>
+									</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
 					<Category>
 							<Name>Write Protection 1</Name>
 						<Field>
@@ -605,7 +623,7 @@
 					</Category>
 					</Bank>
 					<Bank interface="JTAG_SWD">
-							<Parameters address="0x40022060" name="Bank 2" size="0x10"/>
+							<Parameters address="0x40022068" name="Bank 2" size="0x10"/>
 							<Category>
 								<Name>Write Protection 2</Name>
 							<Field>
@@ -706,64 +724,6 @@
 								</Field>
 							</Category>
 					</Bank>
-					<!--Bank interface="JTAG_SWD">
-					<Parameters name="Bank 3" size="0x10" address="0x40022070"/>
-							<Category>
-								<Name>OEMxKEY</Name>
-								<Field>
-								<Parameters name="FLASH_OEM1KEYR1" size="0x4" address="0x40022070"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM1KEY_31_0</Name>
-											<Description>OEM1 least significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM1KEYR2" size="0x4" address="0x40022074"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM1KEY_63_32</Name>
-											<Description>OEM1 most significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM2KEYR1" size="0x4" address="0x40022078"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM2KEY_31_0</Name>
-											<Description>OEM2 least significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM2KEYR1" size="0x4" address="0x4002207C"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM2KEY_63_32</Name>
-											<Description>OEM2 most significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-							</Category>
-					</Bank-->
 				</Configuration>
 				<Configuration config="2,3">
 					<Bank interface="JTAG_SWD">
@@ -1147,70 +1107,6 @@
 									</Bit>
 								</AssignedBits>
 							</Field>
-						<Field>
-								<Parameters address="0x50022054" name="FLASH_PCROP1SR" size="0x4"/>
-								<AssignedBits>
-									<Bit config="2">
-										<Name>PCROP1_PSTRT</Name>
-										<Description>This field contains the first page of the PCROP area in bank 1</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x4000" offset="0xC000000"/>
-									</Bit>
-									<Bit config="3">
-										<Name>PCROP1_PSTRT</Name>
-										<Description>This field contains the first page of the PCROP area in bank 1</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x2000" offset="0xC000000"/>
-									</Bit>
-									<Bit>
-										<Name>PCROP1EN</Name>
-										<Description>PCROP1 area enable</Description>
-										<BitOffset>0xF</BitOffset>
-										<BitWidth>0x1</BitWidth>
-										<Access>RW</Access>
-									<Values>
-										<Val value="0x0">PCROP1 area is disabled</Val>
-										<Val value="0x1">PCROP1 area is enabled</Val>
-									</Values>
-									</Bit>
-								</AssignedBits>
-							</Field>
-							<Field>
-									<Parameters address="0x50022054" name="FLASH_SECWM2R1" size="0x4"/>
-									<AssignedBits>
-										<Bit config="2">
-											<Name>HDP1_PEND</Name>
-											<Description>End page of first hide protection area</Description>
-											<BitOffset>0x10</BitOffset>
-											<BitWidth>0x7</BitWidth>
-											<Access>RW</Access>
-											<Equation multiplier="0x4000" offset="0xC000000"/>
-										</Bit>
-										<Bit config="3">
-											<Name>HDP1_PEND</Name>
-											<Description>End page of first hide protection area</Description>
-											<BitOffset>0x10</BitOffset>
-											<BitWidth>0x7</BitWidth>
-											<Access>RW</Access>
-											<Equation multiplier="0x2000" offset="0xC000000"/>
-										</Bit>
-										<Bit>
-											<Name>HDP1EN</Name>
-											<Description>Hide protection first area enable</Description>
-											<BitOffset>0x1F</BitOffset>
-											<BitWidth>0x1</BitWidth>
-											<Access>RW</Access>
-											<Values>
-												<Val value="0x0">No HDP area 1</Val>
-												<Val value="0x1">HDP first area is enabled</Val>
-											</Values>
-										</Bit>
-									</AssignedBits>
-							</Field>
 						</Category>
 						<Category>
 							<Name>Write Protection 1</Name>
@@ -1353,70 +1249,6 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
-						<Field>
-								<Parameters address="0x50022064" name="FLASH_SECWM2R2" size="0x4"/>
-								<AssignedBits>
-									<Bit config="2">
-										<Name>PCROP2_PSTRT</Name>
-										<Description>PRCROP2_PSTRT contains the first page of the PCROP area in bank 2.</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x4000" offset="0xC100000"/>
-									</Bit>
-									<Bit config="3">
-										<Name>PCROP2_PSTRT</Name>
-										<Description>PRCROP2_PSTRT contains the first page of the PCROP area in bank 2.</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x2000" offset="0xC100000"/>
-									</Bit>
-									<Bit>
-										<Name>PCROP2EN</Name>
-										<Description>PCROP2 area enable</Description>
-										<BitOffset>0xF</BitOffset>
-										<BitWidth>0x1</BitWidth>
-										<Access>RW</Access>
-									<Values>
-										<Val value="0x0">PCROP2 area is disabled</Val>
-										<Val value="0x1">PCROP2 area is enabled</Val>
-									</Values>
-									</Bit>
-								</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x50022064" name="FLASH_SECWM2R2" size="0x4"/>
-							<AssignedBits>
-									<Bit config="2">
-										<Name>HDP2_PEND</Name>
-										<Description>End page of second hide protection area</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x4000" offset="0xC100000"/>
-									</Bit>
-									<Bit config="3">
-										<Name>HDP2_PEND</Name>
-										<Description>End page of second hide protection area</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x2000" offset="0xC100000"/>
-									</Bit>
-									<Bit>
-									<Name>HDP2EN</Name>
-									<Description>Hide protection second area enable</Description>
-									<BitOffset>0x1F</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">No HDP area 2</Val>
-										<Val value="0x1">HDP second area is enabled</Val>
-									</Values>
-								</Bit>
-									</AssignedBits>
-						</Field>
 					</Category>
 					<Category>
 						<Name>Write Protection 2</Name>
@@ -1518,64 +1350,6 @@
 						</Field>
 					</Category>
 				</Bank>
-				<!--Bank interface="JTAG_SWD">
-					<Parameters name="Bank 3" size="0x10" address="0x40022070"/>
-							<Category>
-								<Name>OEMxKEY</Name>
-								<Field>
-								<Parameters name="FLASH_OEM1KEYR1" size="0x4" address="0x40022070"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM1KEY_31_0</Name>
-											<Description>OEM1 least significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM1KEYR2" size="0x4" address="0x40022074"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM1KEY_63_32</Name>
-											<Description>OEM1 most significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM2KEYR1" size="0x4" address="0x40022078"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM2KEY_31_0</Name>
-											<Description>OEM2 least significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM2KEYR1" size="0x4" address="0x4002207C"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM2KEY_63_32</Name>
-											<Description>OEM2 most significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-							</Category>
-					</Bank-->
 			</Configuration>
 			<Configuration config="4,5">
 					<Bank interface="JTAG_SWD">
@@ -1922,70 +1696,6 @@
 					</Category>
 					<Category>
 						<Name>Secure Area 1</Name>
-							<Field>
-								<Parameters address="0x40022054" name="FLASH_SECWM1R2" size="0x4"/>
-								<AssignedBits>
-									<Bit config="4">
-										<Name>PCROP1_PSTRT</Name>
-										<Description>This field contains the first page of the PCROP area in bank 1</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x4000" offset="0xC000000"/>
-									</Bit>
-									<Bit config="5">
-										<Name>PCROP1_PSTRT</Name>
-										<Description>This field contains the first page of the PCROP area in bank 1</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x2000" offset="0xC000000"/>
-									</Bit>
-									<Bit>
-										<Name>PCROP1EN</Name>
-										<Description>PCROP1 area enable</Description>
-										<BitOffset>0xF</BitOffset>
-										<BitWidth>0x1</BitWidth>
-										<Access>RW</Access>
-									<Values>
-										<Val value="0x0">PCROP1 area is disabled</Val>
-										<Val value="0x1">PCROP1 area is enabled</Val>
-									</Values>
-									</Bit>
-								</AssignedBits>
-							</Field>
-							<Field>
-									<Parameters address="0x40022054" name="FLASH_SECWM2R1" size="0x4"/>
-									<AssignedBits>
-										<Bit config="4">
-											<Name>HDP1_PEND</Name>
-											<Description>End page of first hide protection area</Description>
-											<BitOffset>0x10</BitOffset>
-											<BitWidth>0x7</BitWidth>
-											<Access>RW</Access>
-											<Equation multiplier="0x4000" offset="0xC000000"/>
-										</Bit>
-										<Bit config="5">
-											<Name>HDP1_PEND</Name>
-											<Description>End page of first hide protection area</Description>
-											<BitOffset>0x10</BitOffset>
-											<BitWidth>0x7</BitWidth>
-											<Access>RW</Access>
-											<Equation multiplier="0x2000" offset="0xC000000"/>
-										</Bit>
-										<Bit>
-											<Name>HDP1EN</Name>
-											<Description>Hide protection first area enable</Description>
-											<BitOffset>0x1F</BitOffset>
-											<BitWidth>0x1</BitWidth>
-											<Access>RW</Access>
-											<Values>
-												<Val value="0x0">No HDP area 1</Val>
-												<Val value="0x1">HDP first area is enabled</Val>
-											</Values>
-										</Bit>
-									</AssignedBits>
-							</Field>
 							<Field>
 								<Parameters address="0x40022050" name="FLASH_SECWM1R1" size="0x4"/>
 								<AssignedBits>
@@ -2165,70 +1875,6 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
-					<Field>
-								<Parameters address="0x40022064" name="FLASH_SECWM2R2" size="0x4"/>
-								<AssignedBits>
-									<Bit config="4">
-										<Name>PCROP2_PSTRT</Name>
-										<Description>PRCROP2_PSTRT contains the first page of the PCROP area in bank 2.</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x4000" offset="0xC100000"/>
-									</Bit>
-									<Bit config="5">
-										<Name>PCROP2_PSTRT</Name>
-										<Description>PRCROP2_PSTRT contains the first page of the PCROP area in bank 2.</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x2000" offset="0xC100000"/>
-									</Bit>
-									<Bit>
-										<Name>PCROP2EN</Name>
-										<Description>PCROP2 area enable</Description>
-										<BitOffset>0xF</BitOffset>
-										<BitWidth>0x1</BitWidth>
-										<Access>RW</Access>
-									<Values>
-										<Val value="0x0">PCROP2 area is disabled</Val>
-										<Val value="0x1">PCROP2 area is enabled</Val>
-									</Values>
-									</Bit>
-								</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x40022064" name="FLASH_SECWM2R2" size="0x4"/>
-							<AssignedBits>
-									<Bit config="4">
-										<Name>HDP2_PEND</Name>
-										<Description>End page of second hide protection area</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x4000" offset="0xC100000"/>
-									</Bit>
-									<Bit config="5">
-										<Name>HDP2_PEND</Name>
-										<Description>End page of second hide protection area</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x2000" offset="0xC100000"/>
-									</Bit>
-									<Bit>
-									<Name>HDP2EN</Name>
-									<Description>Hide protection second area enable</Description>
-									<BitOffset>0x1F</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">No HDP area 2</Val>
-										<Val value="0x1">HDP second area is enabled</Val>
-									</Values>
-								</Bit>
-									</AssignedBits>
-						</Field>
 					</Category>
 					<Category>
 						<Name>Write Protection 2</Name>
@@ -2330,64 +1976,6 @@
 						</Field>
 					</Category>
 				</Bank>
-				<!--Bank interface="JTAG_SWD">
-					<Parameters name="Bank 3" size="0x10" address="0x40022070"/>
-							<Category>
-								<Name>OEMxKEY</Name>
-								<Field>
-								<Parameters name="FLASH_OEM1KEYR1" size="0x4" address="0x40022070"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM1KEY_31_0</Name>
-											<Description>OEM1 least significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM1KEYR2" size="0x4" address="0x40022074"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM1KEY_63_32</Name>
-											<Description>OEM1 most significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM2KEYR1" size="0x4" address="0x40022078"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM2KEY_31_0</Name>
-											<Description>OEM2 least significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-								<Field>
-								<Parameters name="FLASH_OEM2KEYR1" size="0x4" address="0x4002207C"/>
-								<AssignedBits>
-									<Bit>
-											<Name>OEM2KEY_63_32</Name>
-											<Description>OEM2 most significant bytes key</Description>
-											<BitOffset>0x0</BitOffset>
-											<BitWidth>0x20</BitWidth>
-											<Access>RW</Access>
-											<Equation	multiplier="0x1"	offset="0x0"/>
-									</Bit>
-								</AssignedBits>
-								</Field>
-							</Category>
-					</Bank-->
 			</Configuration>
 				<Bank interface="Bootloader">
 						<Parameters address="0x40022040" name="Bank 1" size="0x30"/>
@@ -2707,250 +2295,202 @@
 									</Bit>
 								</AssignedBits>
 							</Field>
-							<Field>
-								<Parameters address="0x4002204C" name="FLASH_SECBOOTADD0" size="0x4"/>
-								<AssignedBits>
-								<Bit>
-										<Name>SECBOOTADD0</Name>
-										<Description>Secure boot base address 0</Description>
-										<BitOffset>0x7</BitOffset>
-										<BitWidth>0x19</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x80" offset="0x0000000"/>
-									</Bit>
-								</AssignedBits>
-							</Field>
-						</Category>
-						<Category>
-						<Name>Secure area 1</Name>
-							<Field>
-								<Parameters address="0x40022050" name="FLASH_SECWM1R1" size="0x4"/>
-								<AssignedBits>
-									<Bit config="6,8">
-										<Name>SECWM1_PSTRT</Name>
-										<Description>Start page of first secure area</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x1000" offset="0x08000000"/>
-									</Bit>
-									<Bit config="7,9">
-										<Name>SECWM1_PSTRT</Name>
-										<Description>Start page of first secure area</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x800" offset="0x08000000"/>
-									</Bit>
-									<Bit config="6,8">
-										<Name>SECWM1_PEND</Name>
-										<Description>End page of first secure area</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x1000" offset="0x08000000"/>
-									</Bit>
-									<Bit config="7,9">
-										<Name>SECWM1_PEND</Name>
-										<Description>End page of first secure area</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x800" offset="0x08000000"/>
-									</Bit>
-								</AssignedBits>
-							</Field>
-						</Category>
-						<Category>
+					</Category>
+					<Category>
 							<Name>Write Protection 1</Name>
-							<Field>
+						<Field>
 								<Parameters address="0x40022058" name="FLASH_WRP1AR" size="0x4"/>
-								<AssignedBits>
-									<Bit config="6,8">
+							<AssignedBits>
+									<Bit config="6">
 										<Name>WRP1A_PSTRT</Name>
 										<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x1000" offset="0x08000000"/>
-									</Bit>
-									<Bit config="7,9">
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="7">
 										<Name>WRP1A_PSTRT</Name>
 										<Description>Bank 1 WPR first area &quot;A&quot; start page</Description>
-										<BitOffset>0x0</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x800" offset="0x08000000"/>
-									</Bit>
-									<Bit config="6,8">
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="6">
 										<Name>WRP1A_PEND</Name>
 										<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x1000" offset="0x08000000"/>
-									</Bit>
-									<Bit config="7,9">
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x7</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x4000" offset="0x08000000"/>
+								</Bit>
+									<Bit config="7">
 										<Name>WRP1A_PEND</Name>
 										<Description>Bank 1 WPR first area &quot;A&quot; end page</Description>
 										<BitOffset>0x10</BitOffset>
 										<BitWidth>0x7</BitWidth>
 										<Access>RW</Access>
-										<Equation multiplier="0x800" offset="0x08000000"/>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
 									</Bit>
+									<Bit>
+									<Name>UNLOCK</Name>
+									<Description>Bank 1 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">WRP1A start and end pages locked</Val>
+										<Val value="0x1">WRP1A start and end pages unlocked</Val>
+									</Values>
+								</Bit>
 								</AssignedBits>
 							</Field>
 							<Field>
 								<Parameters address="0x4002205C" name="FLASH_WRP1BR" size="0x4"/>
 								<AssignedBits>
-									<Bit config="6,8">
+									<Bit config="6">
 										<Name>WRP1B_PSTRT</Name>
 										<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
 										<BitOffset>0x0</BitOffset>
 										<BitWidth>0x7</BitWidth>
 										<Access>RW</Access>
-										<Equation multiplier="0x1000" offset="0x08000000"/>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
 									</Bit>
-									<Bit config="7,9">
+									<Bit config="7">
 										<Name>WRP1B_PSTRT</Name>
 										<Description>Bank 1 WPR first area &quot;B&quot; start page</Description>
 										<BitOffset>0x0</BitOffset>
 										<BitWidth>0x7</BitWidth>
 										<Access>RW</Access>
-										<Equation multiplier="0x800" offset="0x08000000"/>
+										<Equation multiplier="0x2000" offset="0x08000000"/>
 									</Bit>
-									<Bit config="6,8">
+									<Bit config="6">
 										<Name>WRP1B_PEND</Name>
 										<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
 										<BitOffset>0x10</BitOffset>
 										<BitWidth>0x7</BitWidth>
 										<Access>RW</Access>
-										<Equation multiplier="0x1000" offset="0x08000000"/>
+										<Equation multiplier="0x4000" offset="0x08000000"/>
 									</Bit>
-									<Bit config="7,9">
+									<Bit config="7">
 										<Name>WRP1B_PEND</Name>
 										<Description>Bank 1 WPR first area &quot;B&quot; end page</Description>
-										<BitOffset>0x10</BitOffset>
-										<BitWidth>0x7</BitWidth>
-										<Access>RW</Access>
-										<Equation multiplier="0x800" offset="0x08000000"/>
-									</Bit>
-								</AssignedBits>
-							</Field>
-						</Category>
-					<Category>
-					<Name>Secure area 2</Name>
-						<Field>
-							<Parameters address="0x40022060" name="FLASH_SECWM2R1" size="0x4"/>
-							<AssignedBits>
-								<Bit config="6,8">
-									<Name>SECWM2_PSTRT</Name>
-									<Description>Start page of second secure area</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
-									<Access>RW</Access>
-									<Equation multiplier="0x1000" offset="0x08000000"/>
-								</Bit>
-								<Bit config="7,9">
-									<Name>SECWM2_PSTRT</Name>
-									<Description>Start page of second secure area</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
-									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08040000"/>
-								</Bit>
-								<Bit config="6,8">
-									<Name>SECWM2_PEND</Name>
-									<Description>End page of second secure area</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x1000" offset="0x08000000"/>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
 								</Bit>
-								<Bit config="7,9">
-									<Name>SECWM2_PEND</Name>
-									<Description>End page of second secure area</Description>
-									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+								<Bit>
+									<Name>UNLOCK</Name>
+									<Description>Bank 1 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08040000"/>
+									<Values>
+										<Val value="0x0">WRP1B start and end pages locked</Val>
+										<Val value="0x1">WRP1B start and end pages unlocked</Val>
+									</Values>
 								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
-					<Category>
-						<Name>Write Protection 2</Name>
-						<Field>
-							<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
-							<AssignedBits>
-								<Bit config="6,8">
-									<Name>WRP2A_PSTRT</Name>
-									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
+							<Parameters address="0x40022068" name="Bank 2" size="0x8"/>
+							<Category>
+								<Name>Write Protection 2</Name>
+							<Field>
+									<Parameters address="0x40022068" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+										<Bit config="6">
+											<Name>WRP2A_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x1000" offset="0x08000000"/>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
 								</Bit>
-								<Bit config="7,9">
+									<Bit config="7">
 									<Name>WRP2A_PSTRT</Name>
 									<Description>Bank 2 WPR first area &quot;A&quot; start page</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08040000"/>
+									<Equation multiplier="0x2000" offset="0x08200000"/>
 								</Bit>
-								<Bit config="6,8">
+									<Bit config="6">
 									<Name>WRP2A_PEND</Name>
 									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x1000" offset="0x08000000"/>
-								</Bit>
-								<Bit config="7,9">
-									<Name>WRP2A_PEND</Name>
-									<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
-									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
-									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08040000"/>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
-							<AssignedBits>
-								<Bit config="6,8">
-									<Name>WRP2B_PSTRT</Name>
-									<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
-									<Access>RW</Access>
-									<Equation multiplier="0x1000" offset="0x08000000"/>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
 								</Bit>
-								<Bit config="7,9">
-									<Name>WRP2B_PSTRT</Name>
-									<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x7</BitWidth>
+										<Bit config="7">
+											<Name>WRP2A_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;A&quot; end page</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+								<Bit>
+									<Name>UNLOCK</Name>
+									<Description>Bank 2 WPR first area A unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08040000"/>
+									<Values>
+										<Val value="0x0">WRP2A start and end pages locked</Val>
+										<Val value="0x1">WRP2A start and end pages unlocked</Val>
+									</Values>
 								</Bit>
-								<Bit config="6,8">
-									<Name>WRP2B_PEND</Name>
-									<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x4002206C" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit config="6">
+											<Name>WRP2B_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+										</Bit>
+										<Bit config="7">
+											<Name>WRP2B_PSTRT</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; start page</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+										<Bit config="6">
+											<Name>WRP2B_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x7</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x1000" offset="0x08000000"/>
-								</Bit>
-								<Bit config="7,9">
-									<Name>WRP2B_PEND</Name>
-									<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
-									<BitOffset>0x10</BitOffset>
-									<BitWidth>0x7</BitWidth>
+											<Equation multiplier="0x4000" offset="0x08000000"/>
+										</Bit>
+										<Bit config="7">
+											<Name>WRP2B_PEND</Name>
+											<Description>Bank 2 WPR first area &quot;B&quot; end page</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>RW</Access>
+											<Equation multiplier="0x2000" offset="0x08200000"/>
+										</Bit>
+									<Bit>
+									<Name>UNLOCK</Name>
+									<Description>Bank 2 WPR first area B unlock</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08040000"/>
+									<Values>
+										<Val value="0x0">WRP2B start and end pages locked</Val>
+										<Val value="0x1">WRP2B start and end pages unlocked</Val>
+									</Values>
 								</Bit>
 							</AssignedBits>
 						</Field>

tools/Data_Base/STM32_Prog_DB_0x483.xml

@@ -451,6 +451,42 @@
 					</Category>
 					<Category>
 						<Name>Secure Protection</Name>
+						<Field>
+							<Parameters address="0x5200201C" name="FOPTSR_CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0">
+									<Name>ST_RAM_SIZE</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">2  KB reserved to ST code</Val>
+										<Val value="0x1">4  KB reserved to ST code</Val>
+										<Val value="0x2">8  KB reserved to ST code</Val>
+										<Val value="0x3">16 KB reserved to ST code</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x52002020" name="FOPTSR_PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit config="0">
+									<Name>ST_RAM_SIZE</Name>
+									<Description/>
+									<BitOffset>0x13</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">2  KB reserved to ST code</Val>
+										<Val value="0x1">4  KB reserved to ST code</Val>
+										<Val value="0x2">8  KB reserved to ST code</Val>
+										<Val value="0x3">16 KB reserved to ST code</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
 						<Field>
 							<Parameters address="0x52002030" name="FLASH_SCAR_CUR" size="0x4"/>
 							<AssignedBits>
@@ -516,45 +552,6 @@
 							</AssignedBits>
 						</Field>
 					</Category>
-					<Category>
-						<Name>DTCM RAM Protection</Name>
-						<Field>
-							<Parameters address="0x5200201C" name="FOPTSR_CUR" size="0x4"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>ST_RAM_SIZE</Name>
-									<Description/>
-									<BitOffset>0x13</BitOffset>
-									<BitWidth>0x2</BitWidth>
-									<Access>R</Access>
-									<Values>
-										<Val value="0x0">2  KB reserved to ST code</Val>
-										<Val value="0x1">4  KB reserved to ST code</Val>
-										<Val value="0x2">8  KB reserved to ST code</Val>
-										<Val value="0x3">16 KB reserved to ST code</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x52002020" name="FOPTSR_PRG" size="0x4"/>
-							<AssignedBits>
-								<Bit config="0">
-									<Name>ST_RAM_SIZE</Name>
-									<Description/>
-									<BitOffset>0x13</BitOffset>
-									<BitWidth>0x2</BitWidth>
-									<Access>W</Access>
-									<Values>
-										<Val value="0x0">2  KB reserved to ST code</Val>
-										<Val value="0x1">4  KB reserved to ST code</Val>
-										<Val value="0x2">8  KB reserved to ST code</Val>
-										<Val value="0x3">16 KB reserved to ST code</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
 					<Category>
 						<Name>Write Protection</Name>
 						<Field>

tools/Data_Base/STM32_Prog_DB_0x484.xml

@@ -0,0 +1,2617 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
+<Device>
+		<DeviceID>0x484</DeviceID>
+		<Vendor>STMicroelectronics</Vendor>
+		<Type>MCU</Type>
+		<CPU>Cortex-M33</CPU>
+		<Name>STM32H5xx</Name>
+		<Series>STM32H5</Series>
+		<Description>ARM 32-bit Cortex-M33 based device</Description>
+		<Configurations>
+			<!-- JTAG_SWD Interface -->
+			<Interface name="JTAG_SWD">
+				<Configuration number="0x0">	<!-- dual Bank non secure -->
+					
+					<TZEN reference="0x0"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xC3000000"/> </TZEN>
+				</Configuration>
+				<Configuration number="0x1">	<!-- Dual Bank  secure -->
+					
+					<TZEN reference="0x1"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xB4000000"/> </TZEN>
+				</Configuration>
+			
+			</Interface>
+			<!-- Bootloader Interface -->
+			<Interface name="Bootloader">
+				
+				<Configuration number="0x2">	<!-- Dual Bank Secure-->
+				
+				<TZEN reference="0x1"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xB4000000"/> </TZEN>
+				</Configuration>
+				
+				<Configuration number="0x3">	<!-- Dual Bank non Secure-->
+					
+					<TZEN reference="0x0"> <ReadRegister address="0x40022070" mask="0xFF000000" value="0xC3000000"/> </TZEN>
+				</Configuration>
+			</Interface>
+		</Configurations>
+		<!-- Peripherals -->
+		<Peripherals>
+			<!-- Embedded SRAM -->
+			<Peripheral>
+				<Name>Embedded SRAM</Name>
+				<Type>Storage</Type>
+				<Description/>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- 96 KB -->
+				<Configuration config="0,3">
+					<Parameters address="0x20000000" name="SRAM" size="0x40000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x40000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="1,2">
+					<Parameters address="0x30000000" name="SRAM" size="0x40000"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x30000000" name="SRAM" occurence="0x1" size="0x40000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Embedded Flash -->
+			<Peripheral>
+				<Name>Embedded Flash</Name>
+				<Type>Storage</Type>
+				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<FlashSize address="0x0BFA07A0" default="0x200000"/>
+		
+				<Configuration config="0,3"> <!-- dual Bank nn secure -->
+					<Parameters address="0x08000000" name=" 2 Mbyte Embedded Flash" size="0x200000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x08000000" name="sector0" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x08100000" name="sector128" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+				<Configuration config="1,2"> <!-- dual Bank secure -->
+					<Parameters address="0x0c000000" name=" 2 Mbyte Embedded Flash" size="0x200000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x10</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0c000000" name="sector0" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x0c100000" name="sector128" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Data EEPROM -->
+			<Peripheral>
+				<Name>Data EEPROM</Name>
+				<Type>Storage</Type>
+				<Description>The Data EEPROM memory block. It contains user data.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RWE</Access>
+				<!-- Dummy Config Just to avoid crash when TZEN=0 -->
+				<Configuration config="1,3">
+					<Parameters address="0x0C000000" name=" 2 Mbyte Data EEPROM" size="0x200000"/>
+					<Description/>
+					<Organization>Dual</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="Bank 1">
+						<Field>
+							<Parameters address="0x0C000000" name="sector0" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+					<Bank name="Bank 2">
+						<Field>
+							<Parameters address="0x0C100000" name="sector128" occurence="0x80" size="0x2000"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- OTP -->
+			<Peripheral>
+				<Name>OTP</Name>
+				<Type>Storage</Type>
+				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 512 Bytes single bank -->
+				<Configuration>
+					<Parameters address="0x0BFA0000" name=" 512 Bytes Data OTP" size="0x200"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x4</Allignement>
+					<Bank name="OTP">
+						<Field>
+							<Parameters address="0x0BFA0000" name="OTP" occurence="0x1" size="0x200"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+			<!-- Option Bytes -->
+			<Peripheral>
+				<Name>Option Bytes</Name>
+				<Type>Configuration</Type>
+				<Description/>
+				<Access>RW</Access>
+				<Configuration config="0,3">
+				<Bank interface="JTAG_SWD">
+						<Parameters address="0x40022050" name="Bank 1" size="0x70"/>
+						<Category>
+						<Name>Product state</Name>
+						<Field>
+							<Parameters address="0x40022050" name="CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+									<Val value="0xB4">ST-VIRGIN</Val>
+									<Val value="0x39">ST-OPEN</Val>
+									<Val value="0x4B">ST-SFI-READY</Val>
+									<Val value="0xED">ST-ROT-READY</Val>
+									<Val value="0x17">OEM-provisioning</Val>
+									<Val value="0x2E">OEM-provisioned</Val>
+									<Val value="0xC6">TZ-OEM-Closed</Val>
+									<Val value="0x72">OEM-Closed</Val>
+									<Val value="0x5C">OEM-Locked</Val>
+									<Val value="0x9A">OEM-Unconstrained-Debug</Val>
+									<Val value="0xA3">OEM-NS-Unconstrained-Debug</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022054" name="PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+									<Val value="0xB4">ST-VIRGIN</Val>
+									<Val value="0x39">ST-OPEN</Val>
+									<Val value="0x4B">ST-SFI-READY</Val>
+									<Val value="0xED">ST-ROT-READY</Val>
+									<Val value="0x17">OEM-provisioning</Val>
+									<Val value="0x2E">OEM-provisioned</Val>
+									<Val value="0xC6">TZ-OEM-Closed</Val>
+									<Val value="0x72">OEM-Closed</Val>
+									<Val value="0x5C">OEM-Locked</Val>
+									<Val value="0x9A">OEM-Unconstrained-Debug</Val>
+									<Val value="0xA3">OEM-NS-Unconstrained-Debug</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+						<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BOR OFF, POR/PDR reset threshold level is applied</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">BOR OFF, POR/PDR reset threshold level is applied</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>VDDIO_HSLV</Name>
+									<Description>VDD I/O high-speed at low-voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+									<Val value="0x1">VDD I/O below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>VDDIO_HSLV</Name>
+									<Description>VDD I/O high-speed at low-voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+									<Val value="0x1">VDD I/O below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_UBE</Name>
+									<Description>Unique boot entry control, selects either ST or OEM iRoT for secure boot.</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Val value="0xB4">OEM-iRoT (system flash) selected</Val>
+									<Val value="0xC3">ST-iRoT (user flash) selected</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_UBE</Name>
+									<Description>Unique boot entry control, selects either ST or OEM iRoT for secure boot.</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Val value="0xB4">OEM-iRoT (system flash) selected</Val>
+									<Val value="0xC3">ST-iRoT (user flash) selected</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_SHDWN</Name>
+									<Description>Core domain Shutdown entry reset option status bit.</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_SHDWN</Name>
+									<Description>Core domain Shutdown entry reset option status bit.</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain DStop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering DStop or DStop2 mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering DStop or DStop2 mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain DStop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering DStop or DStop2 mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering DStop or DStop2 mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x40022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x40022058" name="FLASH_SECIPR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>USB_EN</Name>
+									<Description>USB peripheral enable bit</Description>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">USB communication disabled</Val>
+										<Val value="0x1">USB communication enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HASH_EN</Name>
+									<Description>HASH SHA IP enable bit.</Description>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RNG_EN</Name>
+									<Description>random number generator IP enable bit</Description>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>PKA_EN</Name>
+									<Description>public key cryptography IP enable bit</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>AES_EN</Name>
+									<Description/>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RSS_OPT</Name>
+									<Description/>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<!--Val value="0x0">Freeze IWDG counter in stop mode</Val-->
+										<!--Val value="0x1">IWDG counter active in stop mode</Val-->
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FLASH_SIZE</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">512kB product</Val>
+										<Val value="0x1">1MB product</Val>
+										<Val value="0x2">2MB product</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>GFX_EN</Name>
+									<Description>GFX module option status bit</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">GFX disabled</Val>
+										<Val value="0x1">GFX enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OTFDEC_EN</Name>
+									<Description>OTFDEC option status bit. Controls on the fly decryption of external memory</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">OTFDEC disabled</Val>
+										<Val value="0x1">OTFDEC enbled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SAES_EN</Name>
+									<Description>Secure AES module control bit. SAES is symmetric cryptography module with close ties to OBKey storage</Description>
+									<BitOffset>0x1</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SAES disabled</Val>
+										<Val value="0x1">SAES enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>CAN_EN</Name>
+									<Description>CAN module control bit</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">CAN disabled</Val>
+										<Val value="0x1">CAN enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x4002205C" name="FLASH_SECIPR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>USB_EN</Name>
+									<Description>USB peripheral enable bit.</Description>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">USB communication disabled</Val>
+										<Val value="0x1">USB communication enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HASH_EN</Name>
+									<Description>HASH SHA IP enable bit.</Description>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RNG_EN</Name>
+									<Description>random number generator IP enable bit</Description>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>PKA_EN</Name>
+									<Description>public key cryptography IP enable bit</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>AES_EN</Name>
+									<Description/>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RSS_OPT</Name>
+									<Description/>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<!--Val value="0x0">Freeze IWDG counter in stop mode</Val-->
+										<!--Val value="0x1">IWDG counter active in stop mode</Val-->
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FLASH_SIZE</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">512kB product</Val>
+										<Val value="0x1">1MB product</Val>
+										<Val value="0x2">2MB product</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>GFX_EN</Name>
+									<Description>GFX module option status bit</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">GFX disabled</Val>
+										<Val value="0x1">GFX enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OTFDEC_EN</Name>
+									<Description>OTFDEC option status bit. Controls on the fly decryption of external memory</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">OTFDEC disabled</Val>
+										<Val value="0x1">OTFDEC enbled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SAES_EN</Name>
+									<Description>Secure AES module control bit. SAES is symmetric cryptography module with close ties to OBKey storage</Description>
+									<BitOffset>0x1</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SAES disabled</Val>
+										<Val value="0x1">SAES enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>CAN_EN</Name>
+									<Description>CAN module control bit</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">CAN disabled</Val>
+										<Val value="0x1">CAN enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+					<Parameters address="0x40022070" name="Bank 2" size="0x10"/>
+					<Category>
+							<Name>User Configuration 2</Name>
+						<Field>
+								<Parameters address="0x40022070" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit>
+									<Name>TZEN</Name>
+									<Description>Trust Zone Enable configuration bits</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0xC3">Trust zone disabled</Val>
+										<Val value="0xB4">Trust zone enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>HUK_PUF</Name>
+										<Description>This bit configures the nature and use of the unique key</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>USBPD_DB_DIS</Name>
+										<Description>USB power delivery configuration option bit</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>SRAM2_PAR</Name>
+										<Description>Parity in SRAM2 region configuration bit</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+									</Bit>
+									<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>ECC in SRAM3 region configuration bit</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description/>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_3_RST</Name>
+									<Description/>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x40022074" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit>
+									<Name>TZEN</Name>
+									<Description>Trust Zone Enable configuration bits</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0xC3">Trust zone disabled</Val>
+										<Val value="0xB4">Trust zone enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>HUK_PUF</Name>
+										<Description>This bit configures the nature and use of the unique key</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>USBPD_DB_DIS</Name>
+										<Description>USB power delivery configuration option bit</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>SRAM2_PAR</Name>
+										<Description>Parity in SRAM2 region configuration bit</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+									</Bit>
+									<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>ECC in SRAM3 region configuration bit</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description></Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_3_RST</Name>
+									<Description/>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x40022080" name="Bank 3" size="0x8"/>
+							<Category>
+								<Name>Boot Configuration</Name>
+								<Field>
+									<Parameters address="0x40022080" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>BOOT_ADDR_NS</Name>
+									<Description>Unique Boot Entry Secure Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x10</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit>
+									<Name>BOOT_LOCK_NS</Name>
+									<Description>A field locking the values of UBE, SWAP, and BOOT_ADDR_SEC settings</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x40022084" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>BOOT_ADDR_NS</Name>
+									<Description>Unique Boot Entry Secure Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x10</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit>
+									<Name>BOOT_LOCK_NS</Name>
+									<Description>A field locking the values of UBE, SWAP, and BOOT_ADDR_SEC settings</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400220E8" name="Bank 4" size="0x8"/>
+							<Category>
+							<Name>Write sector group protection 1</Name>
+								<Field>
+									<Parameters address="0x400220E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400220EC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400221E8" name="Bank 5" size="0x8"/>
+							<Category>
+							<Name>Write sector group protection 2</Name>
+								<Field>
+									<Parameters address="0x400221E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400221E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x40022090" name="Bank 6" size="0x8"/>
+							<Category>
+							<Name>OTP write protection</Name>
+								<Field>
+									<Parameters address="0x40022090" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x40022094" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400220F0" name="Bank 7" size="0x8"/>
+							<Category>
+							<Name>Flash data sectors</Name>
+								<Field>
+									<Parameters address="0x400220F0" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>R</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_1</Name>
+											<Description>DATA_SECTOR_START_1 contains the start sectors of the Flash high-cycle data area in Bank1.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400220F4" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>W</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_1</Name>
+											<Description>DATA_SECTOR_START_1 contains the start sectors of the Flash high-cycle data area in Bank1.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400221F0" name="Bank 8" size="0x8"/>
+							<Category>
+							<Name>Flash data sectors</Name>
+								<Field>
+									<Parameters address="0x400221F0" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN_2</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>R</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_2</Name>
+											<Description>DATA_SECTOR_START_2 contains the start sectors of the Flash high-cycle data area in Bank2.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400221F4" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN_2</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>W</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_2</Name>
+											<Description>DATA_SECTOR_START_2 contains the start sectors of the Flash high-cycle data area in Bank2.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x40022060" name="Bank 9" size="0x10"/>
+							<Category>
+							<Name>Flash EPOCH</Name>
+								<Field>
+									<Parameters address="0x40022060" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>NS_EPOCH</Name>
+											<Description>Non Volatile Non Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x40022064" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>NS_EPOCH</Name>
+											<Description>Non Volatile Non Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x40022064" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>SEC_EPOCH</Name>
+											<Description>Non Volatile Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x40022068" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>SEC_EPOCH</Name>
+											<Description>Non Volatile Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400220F8" name="Bank 10" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 1</Name>
+								<Field>
+									<Parameters address="0x400220F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400220FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x400221F8" name="Bank 11" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 2</Name>
+								<Field>
+									<Parameters address="0x400221F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x400221FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+				</Configuration>
+				<Configuration config="1,2">
+				<Bank interface="JTAG_SWD">
+						<Parameters address="0x50022050" name="Bank 1" size="0x70"/>
+						<Category>
+						<Name>Product state</Name>
+						<Field>
+							<Parameters address="0x50022050" name="CUR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+									<Val value="0xB4">ST-VIRGIN</Val>
+									<Val value="0x39">ST-OPEN</Val>
+									<Val value="0x4B">ST-SFI-READY</Val>
+									<Val value="0xED">ST-ROT-READY</Val>
+									<Val value="0x17">OEM-provisioning</Val>
+									<Val value="0x2E">OEM-provisioned</Val>
+									<Val value="0xC6">TZ-OEM-Closed</Val>
+									<Val value="0x72">OEM-Closed</Val>
+									<Val value="0x5C">OEM-Locked</Val>
+									<Val value="0x9A">OEM-Unconstrained-Debug</Val>
+									<Val value="0xA3">OEM-NS-Unconstrained-Debug</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50022054" name="PRG" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>PRODUCT_STATE</Name>
+									<Description>Life state code.</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+									<Val value="0xB4">ST-VIRGIN</Val>
+									<Val value="0x39">ST-OPEN</Val>
+									<Val value="0x4B">ST-SFI-READY</Val>
+									<Val value="0xED">ST-ROT-READY</Val>
+									<Val value="0x17">OEM-provisioning</Val>
+									<Val value="0x2E">OEM-provisioned</Val>
+									<Val value="0xC6">TZ-OEM-Closed</Val>
+									<Val value="0x72">OEM-Closed</Val>
+									<Val value="0x5C">OEM-Locked</Val>
+									<Val value="0x9A">OEM-Unconstrained-Debug</Val>
+									<Val value="0xA3">OEM-NS-Unconstrained-Debug</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+						<Category>
+						<Name>BOR Level</Name>
+						<Field>
+							<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">BOR OFF, POR/PDR reset threshold level is applied</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOR_LEV</Name>
+									<Description>Brownout level option status bit.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">BOR OFF, POR/PDR reset threshold level is applied</Val>
+										<Val value="0x1">BOR Level 1, the threshold level is low (around 2.1 V)</Val>
+										<Val value="0x2">BOR Level 2, the threshold level is medium (around 2.4 V)</Val>
+										<Val value="0x3">BOR Level 3, the threshold level is high (around 2.7 V)</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						</Category>
+					<Category>
+						<Name>User Configuration</Name>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>VDDIO_HSLV</Name>
+									<Description>VDD I/O high-speed at low-voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+									<Val value="0x1">VDD I/O below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>VDDIO_HSLV</Name>
+									<Description>VDD I/O high-speed at low-voltage status bit.</Description>
+									<BitOffset>0x10</BitOffset>
+									<BitWidth>0x4</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Product working in the full voltage range, I/O speed optimization at low-voltage disabled</Val>
+									<Val value="0x1">VDD I/O below 2.5 V, I/O speed optimization at low-voltage feature allowed</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_STOP</Name>
+									<Description>Stop mode freeze option status bit.</Description>
+									<BitOffset>0x14</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">Independent watchdog frozen in system Stop mode</Val>
+									<Val value="0x1">Independent watchdog keep running in system Stop mode.</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_UBE</Name>
+									<Description>Unique boot entry control, selects either ST or OEM iRoT for secure boot.</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Val value="0xB4">OEM-iRoT (system flash) selected</Val>
+									<Val value="0xC3">ST-iRoT (user flash) selected</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>BOOT_UBE</Name>
+									<Description>Unique boot entry control, selects either ST or OEM iRoT for secure boot.</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Val value="0xB4">OEM-iRoT (system flash) selected</Val>
+									<Val value="0xC3">ST-iRoT (user flash) selected</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SWAP_BANK</Name>
+									<Description>Bank swapping option status bit.</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">bank 1 and bank 2 not swapped</Val>
+									<Val value="0x1">bank 1 and bank 2 swapped</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>WWDG_SW</Name>
+									<Description>IWDG control mode option status bit.</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_SHDWN</Name>
+									<Description>Core domain Shutdown entry reset option status bit.</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_SHDWN</Name>
+									<Description>Core domain Shutdown entry reset option status bit.</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">IWDG watchdog is controlled by hardware</Val>
+									<Val value="0x1">IWDG watchdog is controlled by software</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain DStop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering DStop or DStop2 mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering DStop or DStop2 mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STOP</Name>
+									<Description>Core domain DStop entry reset option status bit.</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering DStop or DStop2 mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering DStop or DStop2 mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022050" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+						<Parameters address="0x50022054" name="FLASH_OPTR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>NRST_STDY</Name>
+									<Description>Core domain Standby entry reset option status bit.</Description>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Val value="0x0">a reset is generated when entering Standby mode on core domain</Val>
+									<Val value="0x1">no reset generated when entering Standby mode on core domain</Val>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x50022058" name="FLASH_SECIPR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>USB_EN</Name>
+									<Description>USB peripheral enable bit</Description>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">USB communication disabled</Val>
+										<Val value="0x1">USB communication enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HASH_EN</Name>
+									<Description>HASH SHA IP enable bit.</Description>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RNG_EN</Name>
+									<Description>random number generator IP enable bit</Description>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>PKA_EN</Name>
+									<Description>public key cryptography IP enable bit</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>AES_EN</Name>
+									<Description/>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RSS_OPT</Name>
+									<Description/>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<!--Val value="0x0">Freeze IWDG counter in stop mode</Val-->
+										<!--Val value="0x1">IWDG counter active in stop mode</Val-->
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FLASH_SIZE</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">512kB product</Val>
+										<Val value="0x1">1MB product</Val>
+										<Val value="0x2">2MB product</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>GFX_EN</Name>
+									<Description>GFX module option status bit</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">GFX disabled</Val>
+										<Val value="0x1">GFX enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OTFDEC_EN</Name>
+									<Description>OTFDEC option status bit. Controls on the fly decryption of external memory</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">OTFDEC disabled</Val>
+										<Val value="0x1">OTFDEC enbled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SAES_EN</Name>
+									<Description>Secure AES module control bit. SAES is symmetric cryptography module with close ties to OBKey storage</Description>
+									<BitOffset>0x1</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">SAES disabled</Val>
+										<Val value="0x1">SAES enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>CAN_EN</Name>
+									<Description>CAN module control bit</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">CAN disabled</Val>
+										<Val value="0x1">CAN enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x5002205C" name="FLASH_SECIPR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>USB_EN</Name>
+									<Description>USB peripheral enable bit.</Description>
+									<BitOffset>0xE</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">USB communication disabled</Val>
+										<Val value="0x1">USB communication enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>HASH_EN</Name>
+									<Description>HASH SHA IP enable bit.</Description>
+									<BitOffset>0xD</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RNG_EN</Name>
+									<Description>random number generator IP enable bit</Description>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>PKA_EN</Name>
+									<Description>public key cryptography IP enable bit</Description>
+									<BitOffset>0xB</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>AES_EN</Name>
+									<Description/>
+									<BitOffset>0xA</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">HASH feature disabled</Val>
+										<Val value="0x1">HASH feature enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RSS_OPT</Name>
+									<Description/>
+									<BitOffset>0x7</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<!--Val value="0x0">Freeze IWDG counter in stop mode</Val-->
+										<!--Val value="0x1">IWDG counter active in stop mode</Val-->
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>FLASH_SIZE</Name>
+									<Description/>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x3</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">512kB product</Val>
+										<Val value="0x1">1MB product</Val>
+										<Val value="0x2">2MB product</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>GFX_EN</Name>
+									<Description>GFX module option status bit</Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">GFX disabled</Val>
+										<Val value="0x1">GFX enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>OTFDEC_EN</Name>
+									<Description>OTFDEC option status bit. Controls on the fly decryption of external memory</Description>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">OTFDEC disabled</Val>
+										<Val value="0x1">OTFDEC enbled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SAES_EN</Name>
+									<Description>Secure AES module control bit. SAES is symmetric cryptography module with close ties to OBKey storage</Description>
+									<BitOffset>0x1</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">SAES disabled</Val>
+										<Val value="0x1">SAES enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>CAN_EN</Name>
+									<Description>CAN module control bit</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">CAN disabled</Val>
+										<Val value="0x1">CAN enabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+					<Parameters address="0x50022070" name="Bank 2" size="0x10"/>
+					<Category>
+							<Name>User Configuration 2</Name>
+						<Field>
+								<Parameters address="0x50022070" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit>
+									<Name>TZEN</Name>
+									<Description>Trust Zone Enable configuration bits</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0xC3">Trust zone disabled</Val>
+										<Val value="0xB4">Trust zone enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>HUK_PUF</Name>
+										<Description>This bit configures the nature and use of the unique key</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>USBPD_DB_DIS</Name>
+										<Description>USB power delivery configuration option bit</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>SRAM2_PAR</Name>
+										<Description>Parity in SRAM2 region configuration bit</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>R</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+									</Bit>
+									<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>ECC in SRAM3 region configuration bit</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description/>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_3_RST</Name>
+									<Description/>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>R</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+							<Field>
+								<Parameters address="0x50022074" name="FLASH_WRP1AR" size="0x4"/>
+							<AssignedBits>
+									<Bit>
+									<Name>TZEN</Name>
+									<Description>Trust Zone Enable configuration bits</Description>
+									<BitOffset>0x18</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0xC3">Trust zone disabled</Val>
+										<Val value="0xB4">Trust zone enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>HUK_PUF</Name>
+										<Description>This bit configures the nature and use of the unique key</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>USBPD_DB_DIS</Name>
+										<Description>USB power delivery configuration option bit</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+									<Bit>
+										<Name>SRAM2_PAR</Name>
+										<Description>Parity in SRAM2 region configuration bit</Description>
+										<BitOffset>0x7</BitOffset>
+										<BitWidth>0x1</BitWidth>
+										<Access>W</Access>
+									<Values>
+										<Val value="0x0">The key is treated as HUK</Val>
+										<Val value="0x1">The key is treated as PUF</Val>
+									</Values>
+									</Bit>
+									<Bit>
+									<Name>SRAM2_ECC</Name>
+									<Description>ECC in SRAM2 region configuration bit</Description>
+									<BitOffset>0x6</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM3_ECC</Name>
+									<Description>ECC in SRAM3 region configuration bit</Description>
+									<BitOffset>0x5</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BKPRAM_ECC</Name>
+									<Description>ECC in BKPRAM region configuration bit</Description>
+									<BitOffset>0x4</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM2_RST</Name>
+									<Description></Description>
+									<BitOffset>0x3</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SRAM1_3_RST</Name>
+									<Description/>
+									<BitOffset>0x2</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>W</Access>
+									<Values>
+										<Val value="0x0">Disabled</Val>
+										<Val value="0x1">Enabled</Val>
+									</Values>
+								</Bit>
+								</AssignedBits>
+							</Field>
+					</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x50022080" name="Bank 3" size="0x8"/>
+							<Category>
+								<Name>Boot Configuration</Name>
+								<Field>
+									<Parameters address="0x50022080" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>BOOT_ADDR_NS</Name>
+									<Description>Unique Boot Entry Secure Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x10</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit>
+									<Name>BOOT_LOCK_NS</Name>
+									<Description>A field locking the values of UBE, SWAP, and BOOT_ADDR_SEC settings</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>R</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x50022084" name="FLASH_WRP2AR" size="0x4"/>
+									<AssignedBits>
+									<Bit>
+									<Name>BOOT_ADDR_NS</Name>
+									<Description>Unique Boot Entry Secure Address</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x10</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									<Bit>
+									<Name>BOOT_LOCK_NS</Name>
+									<Description>A field locking the values of UBE, SWAP, and BOOT_ADDR_SEC settings</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>W</Access>
+									<Equation multiplier="0x2000" offset="0x08000000"/>
+									</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500220E8" name="Bank 4" size="0x8"/>
+							<Category>
+							<Name>Write sector group protection 1</Name>
+								<Field>
+									<Parameters address="0x500220E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500220EC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn1</Name>
+											<Description>Bank 1 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500221E8" name="Bank 5" size="0x8"/>
+							<Category>
+							<Name>Write sector group protection 2</Name>
+								<Field>
+									<Parameters address="0x500221E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500221E8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>WRPSGn2</Name>
+											<Description>Bank 2 sector group protection option status byte</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x08000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x50022090" name="Bank 6" size="0x8"/>
+							<Category>
+							<Name>OTP write protection</Name>
+								<Field>
+									<Parameters address="0x50022090" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x50022094" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>LOCKBL</Name>
+											<Description>OTP Block Lock</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x20</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000000"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500220F0" name="Bank 7" size="0x8"/>
+							<Category>
+							<Name>Flash data sectors</Name>
+								<Field>
+									<Parameters address="0x500220F0" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>R</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_1</Name>
+											<Description>DATA_SECTOR_START_1 contains the start sectors of the Flash high-cycle data area in Bank1.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500220F4" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>W</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_1</Name>
+											<Description>DATA_SECTOR_START_1 contains the start sectors of the Flash high-cycle data area in Bank1.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500221F0" name="Bank 8" size="0x8"/>
+							<Category>
+							<Name>Flash data sectors</Name>
+								<Field>
+									<Parameters address="0x500221F0" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN_2</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>R</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_2</Name>
+											<Description>DATA_SECTOR_START_2 contains the start sectors of the Flash high-cycle data area in Bank2.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500221F4" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>DATA_EN_2</Name>
+											<Description>Bank1 Flash high-cycle data enable</Description>
+											<BitOffset>0xF</BitOffset>
+											<BitWidth>0x1</BitWidth>
+											<Access>W</Access>
+											<Values>
+												<Val value="0x0">No Flash high-cycle data area</Val>
+												<Val value="0x1">Flash high-cycle data is used</Val>
+											</Values>
+										</Bit>
+										<Bit>
+											<Name>DATA_SECTOR_START_2</Name>
+											<Description>DATA_SECTOR_START_2 contains the start sectors of the Flash high-cycle data area in Bank2.</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x3</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x0"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x50022060" name="Bank 9" size="0x10"/>
+							<Category>
+							<Name>Flash EPOCH</Name>
+								<Field>
+									<Parameters address="0x50022060" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>NS_EPOCH</Name>
+											<Description>Non Volatile Non Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x50022064" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>NS_EPOCH</Name>
+											<Description>Non Volatile Non Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x50022064" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>SEC_EPOCH</Name>
+											<Description>Non Volatile Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x50022068" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>SEC_EPOCH</Name>
+											<Description>Non Volatile Secure EPOCH counter</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x18</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x1" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500220F8" name="Bank 10" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 1</Name>
+								<Field>
+									<Parameters address="0x500220F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500220FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP1_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP1_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+					<Bank interface="JTAG_SWD">
+							<Parameters address="0x500221F8" name="Bank 11" size="0x8"/>
+							<Category>
+							<Name>Flash HDP bank 2</Name>
+								<Field>
+									<Parameters address="0x500221F8" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>R</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+								<Field>
+									<Parameters address="0x500221FC" name="FLASH_WRP2BR" size="0x4"/>
+									<AssignedBits>
+										<Bit>
+											<Name>HDP2_STRT</Name>
+											<Description>TIL barrier start set in number of 8kb sectors</Description>
+											<BitOffset>0x0</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+										<Bit>
+											<Name>HDP2_END</Name>
+											<Description>TIL barrier end set in number of 8kb sectors</Description>
+											<BitOffset>0x10</BitOffset>
+											<BitWidth>0x7</BitWidth>
+											<Access>W</Access>
+											<Equation multiplier="0x2000" offset="0x00000001"/>
+										</Bit>
+									</AssignedBits>
+								</Field>
+							</Category>
+					</Bank>
+				</Configuration>
+			</Peripheral>
+		</Peripherals>
+	</Device>
+</Root>

tools/Data_Base/STM32_Prog_DB_0x494.xml

@@ -103,8 +103,9 @@
 				<Description/>
 				<Access>RW</Access>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x58004020" name="Bank 1" size="0x68"/>
-					<Category>
+				    <!-- Bank non secure -->
+					<Parameters address="0x58004020" name="Bank 1" size="0x3C"/>
+						<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
 							<Parameters address="0x58004020" name="RDP" size="0x4"/>
@@ -169,8 +170,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Boot from code area if BOOT0=0 otherwise system Flash</Val>
-										<Val value="0x1">Boot from code area if BOOT0=0 otherwise embedded SRAM</Val>
+										<Val value="0x0">Boot from code area if BOOT0=0 otherwise embedded SRAM1</Val>
+										<Val value="0x1">Boot from code area if BOOT0=0 otherwise system Flash</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -283,132 +284,60 @@
 										<Val value="0x1">Software independent watchdog</Val>
 									</Values>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x5800403C" name="FLASH_IPCCBR" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>IPCCDBA</Name>
-									<Description>IPCC mailbox data buffer base address</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0xE</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
-					</Category>
-					<Category>
-						<Name>Security Configuration</Name>
-						<Field>
-							<Parameters address="0x58004020" name="FLASH_OPTR" size="0x4"/>
-							<AssignedBits>
 								<Bit>
-									<Name>ESE</Name>
-									<Description>System Security Enabled flag</Description>
-									<BitOffset>0x8</BitOffset>
+									<Name>GPIO_MODE_PB11</Name>
+									<Description>PB11 GPIO mode</Description>
+									<BitOffset>0x1C</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>R</Access>
+									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Security disabled</Val>
-										<Val value="0x1">Security enabled</Val>
+										<Val value="0x0">If RESET_MODE_PB11 = 0: Bidirectional reset, NRST pin configured in reset input/output mode, GPIO functionality is not available on PB11. If RESET_MODE_PB11 = 1: Reset Input only, a low level on the NRST pin generates system reset, internal RESET.</Val>
+										<Val value="0x1">If RESET_MODE_PB11 = 0: Standard GPIO pad functionality, Only internal RESET possible. If RESET_MODE_PB11 = 1: Bidirectional reset, NRST pin configured in reset input/output mode (default mode), GPIO functionality is not available on PB11.</Val>
 									</Values>
 								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x58004080" name="FLASH_SFR" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>SFSA</Name>
-									<Description>Secure Flash Start Address</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
-									<Access>RW</Access>
-								</Bit> 
 								<Bit>
-									<Name>FSD</Name>
-									<Description>Flash Security Disable</Description>
-									<BitOffset>0x8</BitOffset>
+									<Name>RESET_MODE_PB11</Name>
+									<Description>PB11 reset mode</Description>
+									<BitOffset>0x16</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">System and Flash secure</Val>
-										<Val value="0x1">System and Flash non-secure</Val>
+										<Val value="0x0">If GPIO_MODE_PB11 = 0: Bidirectional reset, NRST pin configured in reset input/output mode. If GPIO_MODE_PB11 = 1: Standard GPIO pad functionality, only internal RESET possible.</Val>
+										<Val value="0x1">If GPIO_MODE_PB11 = 0: Reset input only, a low level on the NRST pin generates system reset, internal RESET not propagated to the NSRT pin. If GPIO_MODE_PB11 = 1: Bidirectional reset, NRST pin configured in reset input/output mode (default mode).</Val>
 									</Values>
 								</Bit>
 								<Bit>
-									<Name>DDS</Name>
-									<Description>Disable CPU2 Debug access</Description>
-									<BitOffset>0xC</BitOffset>
+									<Name>IRH</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0xF</BitOffset>
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">CPU2 debug access enabled</Val>
-										<Val value="0x1">CPU2 debug access disabled</Val>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin.</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level.</Val>
 									</Values>
 								</Bit>
 							</AssignedBits>
 						</Field>
+					</Category>
+					<Category>
+						<Name>ESE</Name>
 						<Field>
-							<Parameters address="0x58004084" name="FLASH_SRRVR" size="0x4"/>
+							<Parameters address="0x58004020" name="FLASH_OPTR" size="0x4"/>
 							<AssignedBits>
 								<Bit>
-									<Name>C2OPT</Name>
-									<Description>CPU2 boot reset vector memory selection</Description>
-									<BitOffset>0x1F</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">SBRV will address SRAM1 or SRAM2</Val>
-										<Val value="0x1">SBRV will address Flash</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>BRSD_B</Name>
-									<Description>Backup SRAM2b security disable</Description>
-									<BitOffset>0x1E</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">SRAM2b is secure</Val>
-										<Val value="0x1">SRAM2b is non-secure</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>SBRSA_B</Name>
-									<Description>SBRSA_B[1:0] contains the start address of the first 1K page of the secure non-backup SRAM2b area.</Description>
-									<BitOffset>0x19</BitOffset>
-									<BitWidth>0x2</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>BRSD_A</Name>
-									<Description>Backup SRAM2a security disable</Description>
-									<BitOffset>0x17</BitOffset>
+									<Name>ESE</Name>
+									<Description>System Security Enabled flag</Description>
+									<BitOffset>0x8</BitOffset>
 									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
+									<Access>R</Access>
 									<Values>
-										<Val value="0x0">SRAM2a is secure</Val>
-										<Val value="0x1">SRAM2a is non-secure</Val>
+										<Val value="0x0">Security disabled</Val>
+										<Val value="0x1">Security enabled</Val>
 									</Values>
 								</Bit>
-								<Bit>
-									<Name>SBRSA_A</Name>
-									<Description>SBRSA_A[4:0] contains the start address of the first 1K page of the secure backup SRAM2a area.</Description>
-									<BitOffset>0x12</BitOffset>
-									<BitWidth>0x5</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>SBRV</Name>
-									<Description>Contains the word aligned CPU2 boot reset start address offset within the selected. memory area by C2OPT.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x11</BitWidth>
-									<Access>RW</Access>
-								</Bit>
 							</AssignedBits>
-						</Field>
+						</Field>				
 					</Category>
 					<Category>
 						<Name>PCROP Protection</Name>
@@ -421,7 +350,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -434,7 +363,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000800"/>
+									<Equation multiplier="0x400" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>PCROP_RDP</Name>
@@ -458,7 +387,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -471,7 +400,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000800"/>
+									<Equation multiplier="0x400" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -483,19 +412,19 @@
 							<AssignedBits>
 								<Bit>
 									<Name>WRP1A_STRT</Name>
-									<Description>The address of the first page of the Bank 1 WRP first area.</Description>
+									<Description>The address of the first page of the WRP first area.</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x0800" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>WRP1A_END</Name>
-									<Description>The address of the last page of the Bank 1 WRP first area.</Description>
+									<Description>The address of the last page of the WRP first area.</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x0800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -504,24 +433,146 @@
 							<AssignedBits>
 								<Bit>
 									<Name>WRP1B_STRT</Name>
-									<Description>The address of the first page of the Bank 1 WRP second area.</Description>
+									<Description>The address of the first page of WRP second area.</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x0800" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>WRP1B_END</Name>
-									<Description>The address of the last page of the Bank 1 WRP second area.</Description>
+									<Description>The address of the last page of WRP second area.</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x0800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
+				<Bank interface="JTAG_SWD">
+					<Parameters address="0x5800403C" name="Bank 2" size="0x4"/>
+				    <Category>
+					<Name>IPCCDBA-AA</Name>
+						<Field>
+							<Parameters address="0x5800403C" name="FLASH_IPCCBR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>IPCCDBA</Name>
+									<Description>IPCC mailbox data buffer base address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0xE</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x1" offset="0x20010000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
 					</Category>
 				</Bank>
+				<Bank interface="JTAG_SWD">
+				<Parameters address="0x58004080" name="Bank 3" size="0x8"/>
+				<Category>
+					<Name>Security Configuration Option bytes</Name>
+						<Field>
+							<Parameters address="0x58004080" name="FLASH_SFR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SFSA</Name>
+									<Description>Secure Flash Start Address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit> 
+								<Bit>
+									<Name>FSD</Name>
+									<Description>Flash Security Disable</Description>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">System and Flash secure</Val>
+										<Val value="0x1">System and Flash non-secure</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DDS</Name>
+									<Description>Disable CPU2 Debug access</Description>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">CPU2 debug access enabled</Val>
+										<Val value="0x1">CPU2 debug access disabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x58004084" name="FLASH_SRRVR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>C2OPT</Name>
+									<Description>CPU2 boot reset vector memory selection</Description>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SBRV will address SRAM1 or SRAM2</Val>
+										<Val value="0x1">SBRV will address Flash</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>BRSD_B</Name>
+									<Description>Backup SRAM2b security disable</Description>
+									<BitOffset>0x1E</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2b is secure</Val>
+										<Val value="0x1">SRAM2b is non-secure</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SBRSA_B</Name>
+									<Description>SBRSA_B[1:0] contains the start address of the first 1K page of the secure non-backup SRAM2b area.</Description>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x2</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x2000BFFF"/>
+								</Bit>
+								<Bit>
+									<Name>BRSD_A</Name>
+									<Description>Backup SRAM2a security disable</Description>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2a is secure</Val>
+										<Val value="0x1">SRAM2a is non-secure</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SBRSA_A</Name>
+									<Description>SBRSA_A[4:0] contains the start address of the first 1K page of the secure backup SRAM2a area.</Description>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x5</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x2000B000"/>
+								</Bit>
+								<Bit>
+									<Name>SBRV</Name>
+									<Description>Contains the word aligned CPU2 boot reset start address offset within the selected. memory area by C2OPT.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x11</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>		
+					</Category>	
+				</Bank>
 				<Bank interface="Bootloader">
 					<Parameters address="0x1FFF7800" name="Bank 1" size="0x80"/>
 					<Category>
@@ -589,8 +640,8 @@
 									<BitWidth>0x1</BitWidth>
 									<Access>RW</Access>
 									<Values>
-										<Val value="0x0">Boot from code area if BOOT0=0 otherwise system Flash</Val>
-										<Val value="0x1">Boot from code area if BOOT0=0 otherwise embedded SRAM</Val>
+										<Val value="0x0">Boot from code area if BOOT0=0 otherwise embedded SRAM1</Val>
+										<Val value="0x1">Boot from code area if BOOT0=0 otherwise  system Flash</Val>
 									</Values>
 								</Bit>
 								<Bit>
@@ -703,6 +754,39 @@
 										<Val value="0x1">Software independent watchdog</Val>
 									</Values>
 								</Bit>
+								<Bit>
+									<Name>GPIO_MODE_PB11</Name>
+									<Description>PB11 GPIO mode</Description>
+									<BitOffset>0x1C</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">If RESET_MODE_PB11 = 0: Bidirectional reset, NRST pin configured in reset input/output mode, GPIO functionality is not available on PB11. If RESET_MODE_PB11 = 1: Reset Input only, a low level on the NRST pin generates system reset, internal RESET.</Val>
+										<Val value="0x1">If RESET_MODE_PB11 = 0: Standard GPIO pad functionality, Only internal RESET possible. If RESET_MODE_PB11 = 1: Bidirectional reset, NRST pin configured in reset input/output mode (default mode), GPIO functionality is not available on PB11.</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>RESET_MODE_PB11</Name>
+									<Description>PB11 reset mode</Description>
+									<BitOffset>0x16</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">If GPIO_MODE_PB11 = 0: Bidirectional reset, NRST pin configured in reset input/output mode. If GPIO_MODE_PB11 = 1: Standard GPIO pad functionality, only internal RESET possible.</Val>
+										<Val value="0x1">If GPIO_MODE_PB11 = 0: Reset input only, a low level on the NRST pin generates system reset, internal RESET not propagated to the NSRT pin. If GPIO_MODE_PB11 = 1: Bidirectional reset, NRST pin configured in reset input/output mode (default mode).</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>IRH</Name>
+									<Description>Internal reset holder enable bit</Description>
+									<BitOffset>0xF</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">Internal resets are propagated as simple pulse on NRST pin.</Val>
+										<Val value="0x1">Internal resets drives NRST pin low until it is seen as low level.</Val>
+									</Values>
+								</Bit>
 							</AssignedBits>
 						</Field>
 						<Field>
@@ -745,6 +829,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>FSD</Name>
@@ -801,6 +886,7 @@
 									<BitOffset>0x19</BitOffset>
 									<BitWidth>0x2</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>BRSD_A</Name>
@@ -819,6 +905,7 @@
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>SBRV</Name>
@@ -826,6 +913,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x11</BitWidth>
 									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -841,7 +929,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x400" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -854,7 +942,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000800"/>
+									<Equation multiplier="0x400" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>PCROP_RDP</Name>
@@ -891,7 +979,7 @@
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x9</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000800"/>
+									<Equation multiplier="0x400" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -903,19 +991,19 @@
 							<AssignedBits>
 								<Bit>
 									<Name>WRP1A_STRT</Name>
-									<Description>The address of the first page of the Bank 1 WRP first area</Description>
+									<Description>The address of the first page of the WRP first area</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x1000" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>WRP1A_END</Name>
-									<Description>The address of the last page of the Bank 1 WRP first area</Description>
+									<Description>The address of the last page of the WRP first area</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x0800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>
@@ -924,19 +1012,19 @@
 							<AssignedBits>
 								<Bit>
 									<Name>WRP1B_STRT</Name>
-									<Description>The address of the first page of the Bank 1 WRP second area.</Description>
+									<Description>The address of the first page of the WRP second area.</Description>
 									<BitOffset>0x0</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x0800" offset="0x08000000"/>
 								</Bit>
 								<Bit>
 									<Name>WRP1B_END</Name>
-									<Description>The address of the last page of the Bank 1 WRP second area.</Description>
+									<Description>The address of the last page of the WRP second area.</Description>
 									<BitOffset>0x10</BitOffset>
 									<BitWidth>0x8</BitWidth>
 									<Access>RW</Access>
-									<Equation multiplier="0x800" offset="0x08000000"/>
+									<Equation multiplier="0x0800" offset="0x08000000"/>
 								</Bit>
 							</AssignedBits>
 						</Field>

tools/Data_Base/STM32_Prog_DB_0x495.xml

@@ -40,7 +40,7 @@
 				<Name>Embedded Flash</Name>
 				<Type>Storage</Type>
 				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
-				<ErasedValue>0x00</ErasedValue>
+				<ErasedValue>0xFF</ErasedValue>
 				<Access>RWE</Access>
 				<FlashSize address="0x1FFF75E0" default="0x100000"/>
 				<!-- 1024KB Single Bank -->
@@ -103,7 +103,7 @@
 				<Description/>
 				<Access>RW</Access>
 				<Bank interface="JTAG_SWD">
-					<Parameters address="0x58004020" name="Bank 1" size="0x68"/>
+					<Parameters address="0x58004020" name="Bank 1" size="0x60"/>
 					<Category>
 						<Name>Read Out Protection</Name>
 						<Field>
@@ -299,7 +299,7 @@
 						</Field>
 					</Category>
 					<Category>
-						<Name>Security Configuration Option bytes</Name>
+						<Name>Security Configuration Option bytes - 1</Name>
 						<Field>
 							<Parameters address="0x58004020" name="FLASH_OPTR" size="0x4"/>
 							<AssignedBits>
@@ -316,99 +316,6 @@
 								</Bit>
 							</AssignedBits>
 						</Field>
-						<Field>
-							<Parameters address="0x58004080" name="FLASH_SFR" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>SFSA</Name>
-									<Description>Secure Flash start address</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x8</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>FSD</Name>
-									<Description/>
-									<BitOffset>0x8</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">System and Flash secure</Val>
-										<Val value="0x1">System and Flash non-secure</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>DDS</Name>
-									<Description/>
-									<BitOffset>0xC</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">CPU2 debug access enabled</Val>
-										<Val value="0x1">CPU2 debug access disabled</Val>
-									</Values>
-								</Bit>
-							</AssignedBits>
-						</Field>
-						<Field>
-							<Parameters address="0x58004084" name="FLASH_SRRVR" size="0x4"/>
-							<AssignedBits>
-								<Bit>
-									<Name>C2OPT</Name>
-									<Description/>
-									<BitOffset>0x1F</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">SBRV will address SRAM2</Val>
-										<Val value="0x1">SBRV will address Flash</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>NBRSD</Name>
-									<Description>If FSD=1 : SRAM2b is non-secure. If FSD=0 :</Description>
-									<BitOffset>0x1E</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">SRAM2b is secure</Val>
-										<Val value="0x1">SRAM2b is non-secure</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>SNBRSA</Name>
-									<Description>SNBRSA[4:0] contains the start address of the first 1K page of the secure non-backup SRAM2b area.</Description>
-									<BitOffset>0x19</BitOffset>
-									<BitWidth>0x5</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>BRSD</Name>
-									<Description>If FSD=1 : SRAM2a is non-secure. If FSD=0 :</Description>
-									<BitOffset>0x17</BitOffset>
-									<BitWidth>0x1</BitWidth>
-									<Access>RW</Access>
-									<Values>
-										<Val value="0x0">SRAM2a is secure</Val>
-										<Val value="0x1">SRAM2a is non-secure</Val>
-									</Values>
-								</Bit>
-								<Bit>
-									<Name>SBRSA</Name>
-									<Description>SBRSA[4:0] contains the start address of the first 1K page of the secure backup SRAM2a area.</Description>
-									<BitOffset>0x12</BitOffset>
-									<BitWidth>0x5</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-								<Bit>
-									<Name>SBRV</Name>
-									<Description>Contains the word aligned CPU2 boot reset start address offset within the selected. memory area by C2OPT.</Description>
-									<BitOffset>0x0</BitOffset>
-									<BitWidth>0x12</BitWidth>
-									<Access>RW</Access>
-								</Bit>
-							</AssignedBits>
-						</Field>
 					</Category>
 					<Category>
 						<Name>PCROP Protection</Name>
@@ -522,6 +429,109 @@
 						</Field>
 					</Category>
 				</Bank>
+				<Bank interface="JTAG_SWD">
+					<Parameters address="0x58004080" name="Bank 2" size="0x8"/>
+					<Category>
+						<Name>Security Configuration Option bytes - 2</Name>
+						<Field>
+							<Parameters address="0x58004080" name="FLASH_SFR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>SFSA</Name>
+									<Description>Secure Flash start address</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x8</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+								<Bit>
+									<Name>FSD</Name>
+									<Description/>
+									<BitOffset>0x8</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">System and Flash secure</Val>
+										<Val value="0x1">System and Flash non-secure</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>DDS</Name>
+									<Description/>
+									<BitOffset>0xC</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">CPU2 debug access enabled</Val>
+										<Val value="0x1">CPU2 debug access disabled</Val>
+									</Values>
+								</Bit>
+							</AssignedBits>
+						</Field>
+						<Field>
+							<Parameters address="0x58004084" name="FLASH_SRRVR" size="0x4"/>
+							<AssignedBits>
+								<Bit>
+									<Name>C2OPT</Name>
+									<Description/>
+									<BitOffset>0x1F</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SBRV will address SRAM2</Val>
+										<Val value="0x1">SBRV will address Flash</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>NBRSD</Name>
+									<Description>If FSD=1 : SRAM2b is non-secure. If FSD=0 :</Description>
+									<BitOffset>0x1E</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2b is secure</Val>
+										<Val value="0x1">SRAM2b is non-secure</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SNBRSA</Name>
+									<Description>SNBRSA[4:0] contains the start address of the first 1K page of the secure non-backup SRAM2b area.</Description>
+									<BitOffset>0x19</BitOffset>
+									<BitWidth>0x5</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x2000BFFF"/>
+								</Bit>
+								<Bit>
+									<Name>BRSD</Name>
+									<Description>If FSD=1 : SRAM2a is non-secure. If FSD=0 :</Description>
+									<BitOffset>0x17</BitOffset>
+									<BitWidth>0x1</BitWidth>
+									<Access>RW</Access>
+									<Values>
+										<Val value="0x0">SRAM2a is secure</Val>
+										<Val value="0x1">SRAM2a is non-secure</Val>
+									</Values>
+								</Bit>
+								<Bit>
+									<Name>SBRSA</Name>
+									<Description>SBRSA[4:0] contains the start address of the first 1K page of the secure backup SRAM2a area.</Description>
+									<BitOffset>0x12</BitOffset>
+									<BitWidth>0x5</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x2000B000"/>
+								</Bit>
+								<Bit>
+									<Name>SBRV</Name>
+									<Description>Contains the word aligned CPU2 boot reset start address offset within the selected. memory area by C2OPT.</Description>
+									<BitOffset>0x0</BitOffset>
+									<BitWidth>0x12</BitWidth>
+									<Access>RW</Access>
+									<Equation multiplier="0x800" offset="0x08000000"/>
+								</Bit>
+							</AssignedBits>
+						</Field>
+					</Category>
+				</Bank>
 				<Bank interface="Bootloader">
 					<Parameters address="0x1FFF8000" name="Bank 1" size="0x80"/>
 					<Category>

tools/Data_Base/STM32_Prog_DB_0x497.xml

@@ -56,6 +56,26 @@
 					</Bank>
 				</Configuration>
 			</Peripheral>
+			<!-- OTP -->
+			<Peripheral>
+				<Name>OTP</Name>
+				<Type>Storage</Type>
+				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
+				<ErasedValue>0xFF</ErasedValue>
+				<Access>RW</Access>
+				<!-- 1 KBytes single bank -->
+				<Configuration>
+					<Parameters address="0x1FFF7000" name=" 1 KBytes Data OTP" size="0x400"/>
+					<Description/>
+					<Organization>Single</Organization>
+					<Allignement>0x8</Allignement>
+					<Bank name="OTP">
+						<Field>
+							<Parameters address="0x1FFF7000" name="OTP" occurence="0x1" size="0x400"/>
+						</Field>
+					</Bank>
+				</Configuration>
+			</Peripheral>
 			<!-- Mirror Option Bytes -->
 			<Peripheral>
 				<Name>MirrorOptionBytes</Name>
@@ -526,7 +546,7 @@
 								</Bit>
 								<Bit>
 									<Name>SNBRSA</Name>
-									<Description>SNBRSA[4:0] contain the start address of the first 1 kB page of the secure &quot;non-backup&quot; SRAM1 area.</Description>
+									<Description>SNBRSA[4:0] contain the start address of the first 1 kB page of the secure &quot;non-backup&quot; SRAM1 area. To keep the tool working you have to set a value greater or equal to 0xC</Description>
 									<BitOffset>0x19</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>
@@ -544,7 +564,7 @@
 								</Bit>
 								<Bit>
 									<Name>SBRSA</Name>
-									<Description>SBRSA[4:0] contain the start address of the first 1 kB page of the secure backup SRAM2 area.</Description>
+									<Description>SBRSA[4:0] contain the start address of the first 1 kB page of the secure backup SRAM2 area. To keep the tool working you have to set a value less than 0x15</Description>
 									<BitOffset>0x12</BitOffset>
 									<BitWidth>0x5</BitWidth>
 									<Access>RW</Access>

tools/api/Data_Base/STM32_Prog_DB_0x500.xml → tools/Data_Base/STM32_Prog_DB_0x501.xml

@@ -1,21 +1,19 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
 <Device>
-		<DeviceID>0x500</DeviceID>
+		<DeviceID>0x501</DeviceID>
 		<Vendor>STMicroelectronics</Vendor>
 		<Type>MPU</Type>
 		<CPU>Cortex-A7</CPU>
-		<Name>STM32MP1</Name>
+		<Name>STM32MP13xx</Name>
 		<Series>STM32MP</Series>
-		<Description>ARM 32-bit Cortex-A7 and ARM 32-bit Cortex-M4  dualprocessor based device, CPU clock up to 600MHz</Description>
+		<Description>ARM 32-bit Cortex-A7 based device, CPU clock up to 600MHz</Description>
 		<!-- Gonfigurations' List -->
 		<Configurations>
 			<!-- Bootloader Interface -->
 			<Interface name="Bootloader">
 				<Configuration number="0x0">
-					<MultiCore>  <!--  Nothing here just the make sure that the XML file is compliant to the Schema file -->
-						<ReadRegister address="0x0" mask="0x0" value="0x4"/>
-					</MultiCore>
+					<ReadRegister address="0x0" mask="0x0" value="0x4"/>
 				</Configuration>
 			</Interface>
 		</Configurations>

tools/Drivers/DFU_Driver/DriverNotSigned/license/libusb0/installer_license.txt

@@ -1,851 +0,0 @@
-Copyright (c) 2002-2004 Stephan Meyer, <ste_meyer@web.de>
-Copyright (c) 2000-2004 Johannes Erdfelt, <johannes@erdfelt.com>
-Copyright (c) 2000-2004 Thomas Sailer, <sailer@ife.ee.ethz.ch>
-Copyright (c) 2010 Travis Robinson, <libusbdotnet@gmail.com>
-
-This software is distributed under the following licenses:
-Driver:      GNU General Public License (GPL)
-Library, Test Files, Installer:    GNU Lesser General Public License (LGPL)
-
-***********************************************************************
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 3, 29 June 2007
-
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-                            Preamble
-
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-
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-software for all its users.  We, the Free Software Foundation, use the
-GNU General Public License for most of our software; it applies also to
-any other work released this way by its authors.  You can apply it to
-your programs, too.
-
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tools/Drivers/DFU_Driver/STM32Bootloader.bat

@@ -1,20 +0,0 @@
-::echo off
-
-@echo off
-setlocal
-for /f "tokens=4-5 delims=. " %%i in ('ver') do set VERSION=%%i.%%j
-
-if "%version%" == "6.1" (
-if exist "%windir%\sysnative\pnputil.exe" (
-    start "STM32 USB DFU DRIVER" %windir%\sysnative\pnputil.exe -i -a  %0\..\DriverNotSigned\DFU_in_HS_Mode.inf
-) else (
-    start "STM32 USB DFU DRIVER" pnputil -i -a  %0\..\DriverNotSigned\DFU_in_HS_Mode.inf
-)
-) else (
-if exist "%windir%\sysnative\pnputil.exe" (
-    start "STM32 USB DFU DRIVER" %windir%\sysnative\pnputil.exe -i -a  %0\..\Driver\STM32Bootloader.inf
-) else (
-    start "STM32 USB DFU DRIVER" pnputil -i -a  %0\..\Driver\STM32Bootloader.inf
-)
-)
-endlocal

tools/Drivers/FirmwareUpgrade/StlinkRulesFilesForLinux/49-stlinkv2-1.rules

@@ -1,15 +0,0 @@
-# stm32 nucleo boards, with onboard st/linkv2-1
-# ie, STM32F0, STM32F4.
-
-SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", \
-    MODE:="0666", \
-    SYMLINK+="stlinkv2-1_%n"
-
-SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3752", \
-    MODE:="0666", \
-    SYMLINK+="stlinkv2-1_%n"
-
-# If you share your linux system with other users, or just don't like the
-# idea of write permission for everybody, you can replace MODE:="0666" with
-# OWNER:="yourusername" to create the device owned by you, or with
-# GROUP:="somegroupname" and mange access using standard unix groups.

tools/Drivers/FirmwareUpgrade/StlinkRulesFilesForLinux/49-stlinkv2.rules

@@ -1,11 +0,0 @@
-# stm32 discovery boards, with onboard st/linkv2
-# ie, STM32L, STM32F4.
-
-SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", \
-    MODE:="0666", \
-    SYMLINK+="stlinkv2_%n"
-
-# If you share your linux system with other users, or just don't like the
-# idea of write permission for everybody, you can replace MODE:="0666" with
-# OWNER:="yourusername" to create the device owned by you, or with
-# GROUP:="somegroupname" and mange access using standard unix groups.

tools/Drivers/FirmwareUpgrade/StlinkRulesFilesForLinux/49-stlinkv3.rules

@@ -1,22 +0,0 @@
-# stlink-v3 boards (standalone and embedded) in usbloader mode and standard (debug) mode
-
-SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374d", \
-    MODE:="0666", \
-    SYMLINK+="stlinkv3loader_%n"
-
-SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", \
-    MODE:="0666", \
-    SYMLINK+="stlinkv3_%n"
-
-SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374f", \
-    MODE:="0666", \
-    SYMLINK+="stlinkv3_%n"
-
-SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3753", \
-    MODE:="0666", \
-    SYMLINK+="stlinkv3_%n"
-
-# If you share your linux system with other users, or just don't like the
-# idea of write permission for everybody, you can replace MODE:="0666" with
-# OWNER:="yourusername" to create the device owned by you, or with
-# GROUP:="somegroupname" and mange access using standard unix groups.

tools/Drivers/FirmwareUpgrade/StlinkRulesFilesForLinux/Readme.txt

@@ -1,4 +0,0 @@
-File to copy in /etc/udev/rules.d/ on Ubuntu ("sudo cp *.* /etc/udev/rules.d").
-
-Note that no file is provided for ST-Link/V1 (idProduct=3744) as long as the interfacing
-with this device has not been ported on Linux.